Commit graph

2564 commits

Author SHA1 Message Date
Mike Frysinger
26ddff2d8d build: add missing $(AR)->$(cmd_link_o_target) update
Seems people fixed their files to use libfoo.o, but didn't actually
update the creation targets to use $(cmd_link_o_target).  Update the
rest of the Makefile's found with grep.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Simon Glass <sjg@chromium.org>
2011-10-22 01:18:41 +02:00
Anatolij Gustschin
c4c9fbebae consolidate mdelay by providing a common function for all users
There are several mdelay() definitions in the driver and
board code. Remove them all and provide a common mdelay()
in lib/time.c.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-10-22 01:16:08 +02:00
Wolfgang Denk
02aff558f4 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx:
  mpc85xx: Add inline GPIO acessor functions
  powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9)
  powerpc/85xx: Fix P2020DS booting
  powerpc/85xx: Update USB device tree status based on pin settings
  fdt: Add new fdt_set_node_status & fdt_set_status_by_alias helpers
  powerpc/85xx: Add support for RMan LIODN initialization
  powerpc/85xx: Update device tree handling for SRIO
  powerpc/85xx: Update setting of SRIO LIODNs
  fm: Don't allow disabling of FM1-DTSEC1
  fm-eth: Don't mark the MAC we use for MDIO as disabled in device tree
2011-10-21 23:48:46 +02:00
Timur Tabi
a836626cc4 powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9)
The work-around for P4080 erratum SERDES9 says that the SERDES receiver
lanes should be reset after the XAUI starts tranmitting alignment signals.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-20 16:01:37 -05:00
stany MARCEL
606667d252 ColdFire: Fix compilation with CONFIG_SYS_DRAMSZ1 defined
A temp variable was used but not declared, with CONFIG_SYS_DRAMSZ1
defined. This variable is now declared in the functione when needed.

Signed-off-by: Stany MARCEL <stany.marcel@novasys-ingenierie.com>
2011-10-19 00:14:16 +08:00
stany MARCEL
327474f854 ColdFire: Merge differentiated linking files into a sigle one by board
The spa, stm, int, 32 and 16 linking files are identical so there is
no need to differentiate them. A single lds file is now used, and
_config rule are simplified.

Signed-off-by: Stany MARCEL <stany.marcel@novasys-ingenierie.com>
2011-10-19 00:13:39 +08:00
stany MARCEL
25ceb277de ColdFire: Cleanup lds files for multiple defined symbols
Lds files cleened to remove multiple defined section and modified to
be compliant with --gc-sections added for ColdFire platform in a
previous patch.

Signed-off-by: Stany MARCEL <stany.marcel@novasys-ingenierie.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-10-19 00:13:13 +08:00
Kumar Gala
3b001ad26d powerpc/85xx: Fix P2020DS booting
The following commit removed the code that set odt_rd_cfg and
odt_wr_cfg.  With out this code P2020DS board will not boot:

commit 712cf7ab0b
Author: York Sun <yorksun@freescale.com>
Date:   Mon Oct 3 09:19:53 2011 -0700

    powerpc/mpc8xxx: Merge entries in DDR speed table

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-18 01:31:08 -05:00
Shengzhou Liu
2a523f5240 fdt: Add new fdt_set_node_status & fdt_set_status_by_alias helpers
Add common function fdt_set_node_status() to assist in various locations
that we set a nodes status.  This function utilizes the status values
that are part of the EPAPR spec (on power.org).

fdt_set_status_by_alias() is based on fdt_set_node_status() but uses an
alias string to identify the node to update.

We also add some shortcut functions to help the common cases of setting
"okay" and "disabled":

	fdt_status_okay()
	fdt_status_disabled()
	fdt_status_okay_by_alias()
	fdt_status_disabled_by_alias()

Finally, we fixup the corenet_ds ethernet code which previously had
a function by the same name that can be replaced with the new helpers.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
2011-10-18 00:36:55 -05:00
Mike Frysinger
464c79207c punt unused clean/distclean targets
The top level Makefile does not do any recursion into subdirs when
cleaning, so these clean/distclean targets in random arch/board dirs
never get used.  Punt them all.

MAKEALL didn't report any errors related to this that I could see.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-15 22:20:36 +02:00
chenhui zhao
fff80975ae powerpc/mpc8548cds: Code cleanup and refactoring
- Rework tlb and law tables.
- PCI2 is not available on MPC8548CDS, so remove it.
- Move the memory map to the board config file.
- Rewrite the board info according to the manual.
- Remove unnecessary macros and redefine some macros to align with other boards.
- Fix some typos.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-13 23:38:10 -05:00
Xie Xiaobo
8af3d22db9 powerpc/mpc8536ds: Invert SDHC_WP pin polarity
MPC8536 Rev 1.0 silicon have NMG_eSDHC118 erratum, so that the SDHC write
protected pin polarity does not follow the SD card standard in MPC8536
Rev 1.0 silicon.

The MPC8536DS board invert the SDHC_WP pin as a workaround.  However, this
silicon erratum has been fixed in Rev 1.1, So need invert the SDHC_WP
polarity again when use the MPC8536 Rev1.1 and greater on MPC8536DS board.

Signed-off-by: Xie Xiaobo <r63061@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-09 17:57:54 -05:00
Xie Xiaobo
ae2044d8b3 powerpc/mpc8536ds: Add eSPI support for MPC8536DS
1. The SD_DATA[4:7] signals are shared with the SPI chip selects on 8536DS,
   so don't set MPC85xx_PMUXCR_SD_DATA that config eSDHC data bus-width
   to 4-bit and enable SPI signals.
2. Add eSPI controller and SPI-FLASH definition.

Signed-off-by: Xie Xiaobo <r63061@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-09 17:57:54 -05:00
York Sun
712cf7ab0b powerpc/mpc8xxx: Merge entries in DDR speed table
It is not necessary to keep multiple entries for the same setting in DDR
speed tables. Merge them for smaller tables. Also restructure the tables
for smaller size. Cleanup some typedefs.

Enforce strict checking for speed table. If DIMM is running at higher than
known speed, try to use the highest speed setting. If rank is unknown, it
has to panic.

Removed ODT overriding for P2020DS as it is not necessary.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-09 17:57:53 -05:00
Wolfgang Denk
1fed668b3f Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx:
  powerpc/p3060: Add SoC related support for P3060 platform
  powerpc/85xx: Add support for setting up RAID engine liodns on P5020
  powerpc/85xx: Refactor some defines out of corenet_ds.h
  fm-eth: Add ability for board code to disable a port
  powerpc/mpc8548: Add workaround for erratum NMG_LBC103
  powerpc/mpc8548: Add workaround for erratum NMG_DDR120
  powerpc/mpc85xxcds: Fix PCI speed
  powerpc/mpc8548cds: Fix booting message
  powerpc/p4080: Add support for secure boot flow
  powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH
  powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards
  powerpc/p2041rdb: remove watch dog related codes
  powerpc/p2041rdb: updated description of cpld command
  powerpc/p2041rdb: add more ddr frequencies support
  powerpc/p2041rdb: set sysclk according to status of physical switch SW1
  powerpc/p2041rdb: update cpld reset command according to CPLD 2.0
  powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver
  powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver
  powerpc/mpc8xxx: Add DDR2 to unified DDR driver
  powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps()
  powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots
  powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en
  powerpc/85xx: Refactor P2041RDB to use common p_corenet files
  powerpc/85xx: refactor common P-Series CoreNet files for FSL boards
  powerpc/85xx: Enable CMD_REGINFO on corenet boards
  powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries
  powerpc/85xx: Fix USB protocol definitions for P1020RDB
  powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM
  powerpc/mpc8xxx: Move DDR RCW overriding to common code
  powerpc/mpc8xxx: Extend CWL table
  powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536
  powerpc/85xx: Cleanup extern in corenet_ds board code
  powerpc/p2041rdb: Add ethernet support on P2041RDB board
  powerpc/85xx: Add networking support to P1023RDS
  powerpc/hydra: Add ethernet support on P5020/P3041 DS boards
  powerpc/85xx: Add FMan ethernet support to P4080DS
  powerpc/85xx: Add support for FMan ethernet in Independent mode
  powerpc/mpc8548cds: Cleanup mpc8548cds.c
  powerpc/mp: add support for discontiguous cores
  powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries
  fdt: Add new fdt_create_phandle helper
  fdt: Rename fdt_create_phandle to fdt_set_phandle
  powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set
  fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010)
  powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC)
  fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010)
  powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M
  powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB
  nand: Freescale Integrated Flash Controller NAND support
  powerpc/85xx: Add basic support for P1010RDB
  powerpc/85xx: Add support for new P102x/P2020 RDB style boards
  powerpc/85xx: relocate CCSR before creating the initial RAM area
  powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros
  powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0
  powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
2011-10-04 22:08:13 +02:00
chenhui zhao
568336ecc7 powerpc/mpc85xxcds: Fix PCI speed
The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz.

Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:52:14 -05:00
chenhui zhao
a6d0bfa86f powerpc/mpc8548cds: Fix booting message
Align the output for PCI. Replace "PCI" with "PCI1".

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
2011-10-03 08:52:14 -05:00
Shaohui Xie
93ab6ca1c8 powerpc/p2041rdb: remove watch dog related codes
CPLD 2.2 removed board watch dog support due to the limitation of CPLD
capacity after adding all the requested features, such as switch overriding.
There is no pin-compatible upgrade part available for current PCB design.
So remove codes related to it.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:52:13 -05:00
Shaohui Xie
60820457cc powerpc/p2041rdb: updated description of cpld command
According to CPLD 2.2, the default configuration is changed, so updated the
description of CPLD command, otherwise it will confusing.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:52:13 -05:00
Shaohui Xie
47784af714 powerpc/p2041rdb: add more ddr frequencies support
This table covers DDR frequencies from 666 to 1666. Frequencies 666, 833,
1000, 1066 and 1333 were verified on this board with SO-DIMM
(UG51U6400N8SU-ACF).

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:30:06 -05:00
Shaohui Xie
44d50f0b54 powerpc/p2041rdb: set sysclk according to status of physical switch SW1
P2041RDB supports 3 sysclk frequencies, it's selected by SW1[6~8],
software need to read the SW1 status to decide what the sysclk needs.

SW1[8~6] : frequency
0 0 1 : 83.3MHz
0 1 0 : 100MHz
others: 66.667MHz

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:30:02 -05:00
Shaohui Xie
ba50fee6ae powerpc/p2041rdb: update cpld reset command according to CPLD 2.0
CPLD 2.0 provides a new register which bit[0] is set to '1' will reset
board with initializing the CPLD registers to default values. And add
bit[6] of register at offset 0x5 to use to enable flash bank selection.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03 08:29:54 -05:00
Fabio Estevam
00e11a4397 mx53evk: Place machine ID into board config
Let common code set the machine ID.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
2011-09-30 22:01:04 +02:00
Fabio Estevam
7c2eabab0d mx53ard: Place machine ID into board config
Let common code set the machine ID.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-30 22:01:04 +02:00
Fabio Estevam
c4c596fb46 mx53smd: Place machine ID into board config
Let common code set the machine ID.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-30 22:01:04 +02:00
Fabio Estevam
9df82896c5 mx53loco: Place machine ID into board config
Let common code set the machine ID.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <jason.hui@linaro.org>
2011-09-30 22:01:04 +02:00
Fabio Estevam
4cd300ef16 mx51evk: Place machine ID into board config
Let common code set the machine ID.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-30 22:01:04 +02:00
Fabio Estevam
da3598ac7a mx31ads: Place machine ID into board config
Let common code set the machine ID.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-30 22:01:04 +02:00
Fabio Estevam
f39c008e92 mx25pdk: Place machine ID into board config
Let common code set the machine ID.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-30 22:01:03 +02:00
Fabio Estevam
9aa3c6a1ee mx31pdk: Place machine ID into board config
Let common code set the machine ID.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-30 22:01:03 +02:00
Fabio Estevam
14c7817b87 mx31ads: Remove dram_init_banksize()
As only one RAM bank is used we can rely on the code from arch/arm/lib/board.c

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-30 22:01:03 +02:00
Fabio Estevam
c3f4f31bcb mx25pdk: Remove dram_init_banksize()
As only one RAM bank is used we can rely on the code from arch/arm/lib/board.c

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-30 22:01:03 +02:00
Fabio Estevam
9bd72ebd0e mx31pdk: Remove dram_init_banksize()
As only one RAM bank is used we can rely on the code from arch/arm/lib/board.c

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-30 22:01:03 +02:00
Fabio Estevam
419adbfbcb MX25: Add initial support for MX25PDK
Add the initial support for MX25PDK booting from SD card via internal boot.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-30 22:01:00 +02:00
York Sun
d4b9106609 powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver
Update MPC8349EMDS to use unified DDR driver instead of spd_sdram.c.
The unified driver can initialize data using DDR controller. No need to
use DMA if just to initialze for ECC.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:06 -05:00
Kumar Gala
f8bc7bb5a7 powerpc/85xx: Refactor P2041RDB to use common p_corenet files
The P2041RDB has almost identical setup for TLB, LAWS, and PCI with
other P-Series CoreNet platforms.

The only difference between P2041RDB & P3041DS/P4080DS/P5020DS is the
CPLD vs PIXIS FPGA which we can handle via some simple #ifdefs in the
TLB and LAW setup tables.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:06 -05:00
Kumar Gala
360275b362 powerpc/85xx: refactor common P-Series CoreNet files for FSL boards
We currently support 4 SoC/Boards from the P-Series of QorIQ SoCs that
are based on the 'CoreNet' Architecture: P2041RDB, P3041DS, P4080DS, and
P5020DS.  There is a significant amount of commonality shared between
these boards that we can refactor into common code:

* Initial LAW setup
* Initial TLB setup
* PCI setup

We start by moving the shared code between P3041DS, P4080DS, and P5020DS
into a common directory to be shared with other P-Series CoreNet boards.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:06 -05:00
Kumar Gala
aa061aeb23 powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries
We shouldn't be setting execute permissions on TLB entries that will not
actually have any code run from them.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:06 -05:00
York Sun
9ec8dec539 powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM
RDIMM has different timing parameters from UDIMM. Create new tables for
RDIMMs. Single-, dual- and quad-rank RDIMMs have been verified with speeds
from 800 to 1333MT/s. Speed table expands to include 1600MT/s for future
use. Single- and quad-rank RDIMM entries are copied into UDIMM tables for
future use.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:06 -05:00
York Sun
cda1de21de powerpc/mpc8xxx: Move DDR RCW overriding to common code
DDR RCW varies at different speeds. It is common for all platform. Move it
out from corenet_ds.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:06 -05:00
Kumar Gala
5471370b43 powerpc/85xx: Cleanup extern in corenet_ds board code
Move extern of pci_of_setup() into corenet_ds.h

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:05 -05:00
Mingkai Hu
0787ecc01f powerpc/p2041rdb: Add ethernet support on P2041RDB board
Add support for RGMII, SGMII and XAUI Ethernet on P2041RDB board.

The five dTSEC can be routed to two on-board RGMII phy, three on-board
SGMII phy or four SGMII phy on SGMII riser card according to different
serdes protocol configuration and board lane configuration. Also updated
the device tree to direct the Fmac MAC to the correct PHY.

Removed CONFIG_SYS_FMAN_FW as its not used anywhere.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:05 -05:00
Roy Zang
fe1a1da038 powerpc/85xx: Add networking support to P1023RDS
The P1023 has two 1G ethernet controllers the first can run in
SGMII, RGMII, or RMII.  The second can only do SGMII & RGMII.

We need to setup a for SoC & board registers based on our various
configuration for ethernet to function properly on the board.

Removed CONFIG_SYS_FMAN_FW as its not used anywhere.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Lei Xu <B33228@freescale.com>
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:05 -05:00
Timur Tabi
cba4614862 powerpc/hydra: Add ethernet support on P5020/P3041 DS boards
Add support for RGMII, SGMII, and XAUI (10Gb) Ethernet on P3041DS &
P5020DS ("Hydra").

The lane_to_slot[] array is initialized dynamically, since board switches
can be used to control the muxing of SERDES lanes to slots.

The BRDCFG1 PIXIS register is used to route the MII bus to the appropriate
slot.  The SERDES configuration is queried to help determine the routing
between MACs and slot/phy combination.

If a XAUI card is inserted, muxing for that card is enabled and never
turned off.  The PHY address for the 10G XAUI card depends on the slot in
which it's inserted.  If it's in slot 1, the address is 4.  If it's in
slot 2, the address is 0.

Update the MDIO routing in the P3041DS and P5020DS device trees based on
the board-level muxing.  The SERDES configuration determines which
SGMII/XGMII boards are located in which slots, and so the MDIO bus needs
to be muxed correctly whenever talking to a PHY connected to any Fman MAC.
The Fman Ethernet nodes in the device tree also need to be routed to the
correct PHYs.

Removed CONFIG_SYS_FMAN_FW as its not used anywhere.

Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:05 -05:00
Andy Fleming
2915609a91 powerpc/85xx: Add FMan ethernet support to P4080DS
Add support for RGMII, SGMII, and XAUI (10Gb) Ethernet on P4080DS.

The board supports add-on cards for SGMII and XAUI functionality.  Which
slots on the board these cards are in is a function of the SERDES option
selected and muxes on the board.

Additionally because of the high-configurablity which MDIO bus one is
connected to is "selected" via an FPGA register.  We create dummy MDIO
bus for the phy layer and hide the mux manipulation in this dummy layer.

Add fman fdt helper function in board common code it'll be used by several
freescale boards that do various muxing of the MDIO signals based on which
controller/interface one is trying to talk to.

Removed CONFIG_SYS_FMAN_FW as its not used anywhere.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:05 -05:00
Zhao Chenhui
44d737111b powerpc/mpc8548cds: Cleanup mpc8548cds.c
Remove unnecessary or dead code/includes.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:05 -05:00
Kumar Gala
86df5142a1 powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries
We shouldn't be setting execute permissions on TLB entries that will not
actually have any code run from them.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:05 -05:00
Poonam Aggrwal
49249e137d powerpc/85xx: Add basic support for P1010RDB
Boot methods supported: NOR Flash, SPI Flash and SDCARD
This patch adds the following basic interfaces:
DDR3, eTSEC, DUART, I2C, SD/MMC, USB, SATA, PCIe, NOR Flash, SPI Flash.

P1010RDB Overview
-----------------
1Gbyte DDR3 (on board DDR)
Local Bus (IFC):
	32Mbyte 16bit NOR flash
	32Mbyte SLC NAND Flash
	64KB CPLD device(GPCM interface)
SPI Flash:
	128 Mbit SPI Flash memory
SD/MMC:
	connector to interface with the SD memory card
SATA:
	1 internal SATA connect to 2.5. 160G SATA2 HDD
	1 eSATA connector to rear panel
USB 2.0:
	x1 USB 2.0 port: connected via a UTMI PHY to Mini-AB interface.
	x1 USB 2.0 port: directly connected to Mini-AB interface Ethernet
eTSEC:
	eTSEC1: Connected to RGMII PHY VSC8641XKO
	eTSEC2: Connected to SGMII PHY VSC8221
	eTSEC3: Connected to SGMII PHY VSC8221
eCAN:
	Two DB-9 female connectors for Field bus interface
UART:
	supports two UARTs up to 115200 bps for console
TDM:
	2 FXS ports connected via an external SLIC to the TDM interface.
SLIC:
	SPI SLIC
I2C:
	Serial EEprom
	Real time clock
	256 Kbit M24256 I2C EEPROM
PCIe:
	PCIe and mPCIe connectors.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:04 -05:00
Li Yang
14aa71e660 powerpc/85xx: Add support for new P102x/P2020 RDB style boards
The following boards share a common design but with minor variations
between them:

P1020MSBG-PC
P1020RDB-PC
P1020UTM-PC
P1021RDB-PC
P1024RDB
P1025RDB
P2020RDB-PC

The P1020RDB-PC shares its roots in the existing P1020RDB board design,
however uses DDR3 instead of DDR2.
P2020RDB-PC differs from the P102x RDB-PC with 64-bit DDR and 100Mhz SYSCLK.

Key features on these boards include:
* DDR3
* NOR flash
* NAND flash (on RDB's only)
* SPI flash (on RDB's only)
* SDHC/MMC card slot
* VSC7385 Ethernet switch (on P1020MBG, P1020RDB, & P1021RDB)
* PCIE slot and mini-PCIE slots

As these boards use soldered DDR chips not regular DIMMs, an on-board EEPROM
is used to store SPD data. In case of absent or corrupted SPD, falling back
to timing data embedded in the source code will be used. Raw timing data is
extracted from DDR chip datasheet. Different speeds of DDR are supported
with this approach. ODT option is forced to fit this set of boards, again
because they don't have regular DIMMs.

CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS is defined as 5ms to meet
specification for writing timing.

VSC firmware Address is defined by default in config file for eTSEC1.

SD width is based off DIP switch. DIP switch is detected on the
board by reading i2c bus and setting the appropriate mux values.

Some boards have QE module in the silicon (P1021 and P1025). QE and eLBC
have pins multiplexing. QE function needs to be disabled to access Nor Flash
and CPLD. QE-UEC and QE-UART can be enabled for linux kernel by setting "qe"
in hwconfig. In addition, QE-UEC and QE-TDM also have pins multiplexing, to
enable QE-TDM for linux kernel, set "qe;tdm" in hwconfig. Syntax is as below

'setenv hwconfig qe' to enable QE UEC/UART and disable Nor-Flash/CPLD.
'setenv hwconfig 'qe;tdm'' to enalbe QE TDM and disable Nor-Flash/CPLD.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Zhao Chenhui <b26998@freescale.com>
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Tang Yuantian <b29983@freescale.com>
Signed-off-by: ramneek.mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Akhil Goyal <akhil.goyal@freescale.com>
2011-09-29 19:01:04 -05:00
Zhao Chenhui
d5c784ed53 powerpc/mpc8610hpcd: set pci1_hose.config_table after fsl_setup_hose
The function fsl_setup_hose clears the variable pci1_hose.
Set pci1_hose.config_table after it.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-09 08:58:11 -05:00
Zhao Chenhui
b813cbe916 powerpc/mpc8548cds: set pci1_hose.config_table after fsl_setup_hose
The function fsl_setup_hose clears the variable pci1_hose.
Set pci1_hose.config_table after it.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-09 08:58:11 -05:00
Zhao Chenhui
b092072e47 powerpc/mpc8568mds: set pci1_hose.config_table after fsl_setup_hose
The function fsl_setup_hose clears the variable pci1_hose.
Set pci1_hose.config_table after it.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-09 08:58:10 -05:00
Stefano Babic
a4814a69d3 Makefile : fix generation of cpu related asm-offsets.h
commit 0edf8b5b2f breaks
building on a different directory with the O= parameter.
The patch wil fix this issue, generating always asm-offsets.h before
the other targets.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
CC: Wolfgang Denk <wd@denx.de>
2011-09-07 21:41:27 +02:00
Wolfgang Denk
684cad5717 Merge branch 'master' of git://git.denx.de/u-boot-coldfire
* 'master' of git://git.denx.de/u-boot-coldfire:
  ColdFire:Clean up the CONFIG_STANDALONE_LOAD_ADDR usage
  ColdFire:Add mb for 5253 dram initialization
  ColdFire:Define the DM9000 byteswap for M5253 board.
  ColdFire:Update the env settings for several boards.
  ColdFire:disable the NFS define for 52277 board.
  ColdFire:Update the timer_init since it was unified.
  ColdFire: Cleanup for partial linking and --gc-sections
  ColdFire: Update compile flags for each CPUs
  ColdFire:Fix the configuration broken for some boards.
2011-09-04 22:53:04 +02:00
Jason Jin
6752da6b26 ColdFire:Add mb for 5253 dram initialization
The dram initialization sequence should be in order.
This patch add mb for the dram intialization code to make
sure the compiler do not disorder the code.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2011-09-04 22:46:55 +08:00
Jason Jin
6c0bf27d74 ColdFire: Cleanup for partial linking and --gc-sections
Introduce the --gc-sections for ColdFire platform and clean up the
corresponding lds file.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2011-09-04 22:46:55 +08:00
Stefano Babic
753fc2ebf9 MX5: mx51evk: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:12 +02:00
Stefano Babic
a4adedd439 MX35: mx35pdk: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:12 +02:00
Stefano Babic
50410078cd MX5: mx53loco: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <r64343@freescale.com>
2011-09-04 11:36:12 +02:00
Stefano Babic
f7a364745e MX5: mx53evk: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <r64343@freescale.com>
2011-09-04 11:36:12 +02:00
Stefano Babic
04e25fd629 MX5: mx53smd: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-04 11:36:12 +02:00
Stefano Babic
00c07fe692 MX5: mx53ard: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-04 11:36:12 +02:00
Stefano Babic
6b5acfc121 MX35: MX35PDK: support additional RAM on CSD1
Modules on mx35pdk have additional 128MB
memory connected to CSD1.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:11 +02:00
Fabio Estevam
9691c5b96d mx53: ddr3: Update DD3 initialization
Updated mx53 ddr3 script in order to align with the latest Freescale version from July 8, 2011:
-change ESDREF[REF_SEL]=01 (for 32KHz), from incorrect setting of 00 (64KHz)
-change DDR3 MR0 write to "setmem /32 0x63fd901c = 0x052080b0" from
"0x092080b0". This changes write recovery from 8 clocks to 6 clocks
(in line with ESDCFG1[tWR])

Signed-off-by: Lily Zhang <r58066@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-04 11:36:11 +02:00
Timur Tabi
3b4a226305 video: Add SHARP LQ084S3LG01 LCD support on P1022DS
The SHARP LQ084S3LG01 is a TFT LCD used on the P1022DS (revision "C") board.
This device only supports 800x600 resolution, so if that resolution is selected,
assume that this is the device.  The device is attached to the LVDS port
on the P1022DS board.

The existing 800x600 entry (for the PDM360NG board) is actually 800x480,
so we fix that.  To support two different 800x resolutions, the Y-resolution
is now passed to fsl_diu_init() and both values are used to pick the proper
fb_videomode structure.

The data for the 800x600 video mode is originally from Jiang Yutang.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Jiang Yutang <b14898@freescale.com>
2011-08-04 22:55:33 +02:00
Shaohui Xie
a3a3e7b2c3 powerpc/85xx: enable USB2 gadget mode for corenet ds board
to make USB2 worked in gadget mode, we need to set it's 'dr_mode' to
'peripheral' in hwconfig, but driver starts scan from 'usb1', it'll break
out if it cannot find 'usb1', so drop the 'else' clause to make driver scan
all the 'usbx'.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:43 -05:00
Wolfgang Denk
21cd5815a7 MPC8xxx: drop redundant boot messages
Current code would print RAM size information like this:

	DRAM:  DDR: 256 MiB (DDR1, 64-bit, CL=2, ECC off)

Turn a number of printf()s into debug() to get rid of the redundant
"DDR: " string like this:

	DRAM:  256 MiB (DDR1, 64-bit, CL=2, ECC off)

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:39 -05:00
Stephen George
f110fe940c powerpc/85xx: Adding configuration for DCSRCR to enable 32M access
Configuring DCSRCR to define the DCSR space to be 1G instead
of the default 4M. DCSRCR only allows selection of either 4M
or 1G.
Most DCSR registers are within 4M but the Nexus trace buffer
is located at offset 16M within the DCSR.

Configuring the LAW to be 32M to allow access to the Nexus
trace buffer. No TLB modification is required since accessing
the Nexus trace buffer from within u-boot is not required.

Signed-off-by: Stephen George <stephen.george@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:37 -05:00
Mike Williams
1626308797 cleanup: Fix typos and misspellings in various files.
Recieve/Receive
recieve/receive
Interupt/Interrupt
interupt/interrupt
Addres/Address
addres/address

Signed-off-by: Mike Williams <mike@mikebwilliams.com>
2011-07-28 21:27:36 +02:00
Wolfgang Denk
cdf1a2328a Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
  ARM: MX5: Fix broken leftover TO-2 errata workaround
  MX31: Cleanup clock function
  scb9328: Add ARM relocation support
  am3517evm: change console device from ttyS2 to ttyO2
  Remove volatile qualifier in get_ram_size() calls
  TI: TNETV107X Fix Build Error
  ARM: add missing CONFIG_SKIP_LOWLEVEL_INIT for armv7
  arm: add CONFIG_MACH_TYPE setting and documentation
  arm: add __ilog2 function
  Timer: Fix misuse of ARM *timer_masked() functions outside arch/arm
  EfikaMX: Enable EXT2 booting
  EfikaMX: Add missing CONFIG_SYS_TEXT_BASE
  EfikaMX: Use correct imximage.cfg
  MX27: Update to autogenerated asm-offsets.h
  MX5: Update to autogenerated asm-offsets.h
  imx: Add support for zmx25 board
  imx: Make imx25 compatible to mxc_gpio driver and fix in tx25
  imx: Add auto generation of asm-offsets.h for imx25
  imx: Add support for USB EHCI on imx25
  imx: Use correct imx25 reset.c
  imx: Add get_tbclk() function for imx25
  ARM: Update maintainer of board scb9328
  mx27: Make the UART port number explicit
  build: Add targets for auto gen of asm-offsets.h and use it in imx35
  mx31pdk: cosmetic: Fix line over 80 characters
2011-07-18 21:04:56 +02:00
Mingkai Hu
4f1d1b7d1e powerpc/p2041rdb: Add p2041rdb board support
P2041RDB Specification:
-----------------------
Memory subsystem:
 * 4Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
 * 128 Mbyte NOR flash single-chip memory
 * 256 Kbit M24256 I2C EEPROM
 * 16 Mbyte SPI memory
 * SD connector to interface with the SD memory card

Ethernet:
 * dTSEC1: connected to the Vitesse SGMII PHY (VSC8221)
 * dTSEC2: connected to the Vitesse SGMII PHY (VSC8221)
 * dTSEC3: connected to the Vitesse SGMII PHY (VSC8221)
 * dTSEC4: connected to the Vitesse RGMII PHY (VSC8641)
 * dTSEC5: connected to the Vitesse RGMII PHY (VSC8641)

PCIe:
 * Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1
 * Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2

SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors

USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces

I2C:
 * I2C1: Real time clock, Temperature sensor, Memory module
 * I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM, PCIe slot1/2

UART: supports two UARTs up to 115200 bps for console

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-17 11:03:36 -05:00
Albert ARIBAUD
a55d23ccf6 Remove volatile qualifier in get_ram_size() calls
Checkpatch.pl complains about the volatile qualifier in calls to
get_ram_size(). Remove this qualifier in the prototype and in the
calls where it is useless, and leave it only in the function body
where it is needed.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-07-17 17:11:53 +02:00
Ramneek Mehresh
86dda50484 qoriq/p1_p2_rdb: USB device-tree fixups for P1020
Resolve P1020 second USB controller multiplexing with eLBC
	- mandatory to mention USB2 in hwconfig string to select it
	  over eLBC, otherwise USB2 node is removed
	- works only for SPI and SD boot

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
Roy Zang
3f7f6b8592 powerpc/85xx: Add basic support for P1023RDS board
The P1023RDS board is the reference board for the P1023 SoC.

Add support for booting it from NOR or NAND, with fixed 2G of DDR, PCIe,
UART, I2C, etc.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Signed-off-by: Lei Xu <B33228@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
York Sun
939e5bf9b3 powerpc/mpc85xx: Display a warning for unsupported DDR data rates
If DDR initialziation uses a speed table and the speed is not matched,
print a warning message instead of silently ignoring.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
York Sun
79fa00af5d powerpc/corenet_ds: Fix RCW overriding for RDIMM
Allow overriding RCW for all RDIMM, not only quad-rank ones.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
Timur Tabi
26fd33b9be powerpc/86xx: display boot device and bank on the MPC8610 HPCD
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
Kumar Gala
58b2f96e38 powerpc/85xx: Fix compile errors if CONFIG_SYS_DPAA_QBMAN isn't set
Add ifdef protection for qp_info and liodn associated with Q/BMan.  Also
rearrange setting of _tbl_sz variables to utilize existing ifdef
protection for things like FMAN.

Also add protection around setup_portals() call in corenet_ds board
code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
Kumar Gala
be1ff615ea powerpc/85xx: Fix compile errors if CONFIG_SYS_{B,Q}MAN_MEM_PHYS aren't set
Add ifdef protection in LAW & TLB code to handle the case in which
CONFIG_SYS_BMAN_MEM_PHYS or CONFIG_SYS_QMAN_MEM_PHYS arent defined for a
build.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
Timur Tabi
f5f30dea2a powerpc/83xx: remove empty board_early_init_f()
Remove an empty board_early_init_f() from the MPC8323ERD and MPC360ERDK boards.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-07-06 19:09:28 -05:00
Fabio Estevam
47c3e074ad MX53: Add initial support for MX53ARD
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-07-04 10:55:26 +02:00
Timur Tabi
29b83d9833 powerpc/p1022ds: set the clock-frequency prop only if the clock is enabled
The clock-frequency property in an audio codec's device tree node is set to
the input clock frequency for that codec.  On the Freescale P1022DS board,
the input clock is enabled only if the hwconfig 'audclk' option is set.
Therefore, the property should only be set in the device tree if the clock
is actually enabled.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-09 15:53:38 -05:00
Fabio Estevam
4ac2e2d69f mx31ads: Use the new relocation scheme
This fixes the MX31ADS build by using the new relocation scheme.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Felix Radensky <felix@embedded-sol.com>
2011-06-06 09:35:25 +02:00
Jason Liu
5195890440 mx5: board: code clean up for checkboard code
The boot cause code has been factor out to soc common
code,we need drop the part from the board support code

This patch also remove the redundant cpu version print

Signed-off-by: Jason Liu <jason.hui@linaro.org>
2011-05-23 08:36:46 +02:00
Fabio Estevam
860b32ee50 MX53: Add initial support for MX53SMD board.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-05-23 08:36:46 +02:00
Jason Liu
938080dc4b MX53: support for freescale MX53LOCO board
This patch add initial support for freescale MX53LOCO board.
Network(FEC),SD/MMC,UART have been supported by this patch

Signed-off-by: Jason Liu <jason.hui@linaro.org>
2011-05-23 08:36:46 +02:00
Wolfgang Denk
cd6881b519 Minor coding style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-05-19 22:22:44 +02:00
Shaohui Xie
be827c7ab0 powerpc/85xx: add support for env in MMC/SPI on corenet ds boards
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-18 09:15:25 -05:00
Fabio Estevam
b73850f764 MX31: mx31pdk: Add watchdog support
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-05-11 23:03:15 +02:00
Wolfgang Denk
aeabdeb7a3 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2011-04-30 22:45:55 +02:00
Scott Wood
83b7e2a7f2 Handle most LDSCRIPT setting centrally
Currently, some linker scripts are found by common code in config.mk.
Some are found using CONFIG_SYS_LDSCRIPT, but the code for that is
sometimes in arch config.mk and sometimes in board config.mk.  Some
are found using an arch-specific rule for looking in CPUDIR, etc.

Further, the powerpc config.mk rule relied on CONFIG_NAND_SPL
when it really wanted CONFIG_NAND_U_BOOT -- which covered up the fact
that not all NAND_U_BOOT builds actually wanted CPUDIR/u-boot-nand.lds.

Replace all of this -- except for a handful of boards that are actually
selecting a linker script in a unique way -- with centralized ldscript
finding.

If board code specifies LDSCRIPT, that will be used.
Otherwise, if CONFIG_SYS_LDSCRIPT is specified, that will be used.

If neither of these are specified, then the central config.mk will
check for the existence of the following, in order:

$(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds (only if CONFIG_NAND_U_BOOT)
$(TOPDIR)/$(CPUDIR)/u-boot-nand.lds (only if CONFIG_NAND_U_BOOT)
$(TOPDIR)/board/$(BOARDDIR)/u-boot.lds
$(TOPDIR)/$(CPUDIR)/u-boot.lds

Some boards (sc3, cm5200, munices) provided their own u-boot.lds that
were dead code, because they were overridden by a CPUDIR u-boot.lds under
the old powerpc rules.  These boards' own u-boot.lds have bitrotted and
no longer work -- these lds files have been removed.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Tested-by: Graeme Russ <graeme.russ@gmail.com>
2011-04-30 00:59:47 +02:00
Jiang Yutang
9b6e9d1c13 powerpc/85xx: Enable eSPI support on P1022DS
Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-29 07:36:17 -05:00
Timur Tabi
82c9dfdc20 powerpc/fsl: add 'pixis_reset dump' command
Add the 'pixis_reset dump' command, which displays the contents of the PIXIS
registers.  This command is only available if DEBUG is defined.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-28 22:09:23 -05:00
Timur Tabi
eb0d47e181 powerpc/86xx: remove empty board_early_init_f()
Remove an empty board_early_init_f() from the MPC8641HPCN board.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-28 22:08:16 -05:00
Timur Tabi
ba8e76bd49 powerpc: use 'video-mode' environment variable to configure DIU
Use the 'video-mode' environment variable (for Freescale chips that have a
DIU display controller) to designate the full video configuration.  Previously,
the DIU driver used the 'monitor' variable, and it was used only to determine
the output video port.

The old definition of the "monitor" environment variable only determines
which video port to use for output.  This variable was set to a number (0,
1, or sometimes 2) to specify a DVI, LVDS, or Dual-LVDS port.  The
resolution was hard-coded into board-specific code.  The Linux command-line
arguments needed to be hard-coded to the proper video definition string.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-04-28 21:31:16 +02:00
Kumar Gala
e02aea61cb powerpc: Add P3041DS/P5020DS board support (uses corenet_ds code)
The P3041DS & P5020DS boards are almost identical (except for the
processor in them).  Additionally they are based on the P4080DS board
design so we use the some board code for all 3 boards.

Some ngPIXIS (FPGA) registers where reserved on P4080DS and now have
meaning on P3041DS/P5020DS.  We utilize some of these for SERDES clock
configuration.

Additionally, the P3041DS/P5020DS support NAND.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-27 22:29:04 -05:00
Ramneek Mehresh
2bad42a0c8 powerpc/85xx: Add support for 2nd USB controller on p1_p2_rdb
Second USB controller only works for SPI and SD boot because of pin muxing

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
2011-04-27 22:29:03 -05:00
Fabio Estevam
e9e0790cff MX31: mx31pdk: Make the board name simpler.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-04-27 19:38:05 +02:00
Stefano Babic
8627111543 IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers
As exception among the i.MX processors, the i.MX31 has headers
without general names (mx31-regs.h, mx31.h instead of imx-regs.h and
clock.h). This requires several nasty #ifdef in the drivers to
include the correct header. The patch cleans up the driver and
renames the header files as for the other i.MX processors.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-04-27 19:38:05 +02:00
Liu Hui-R64343
ec665d75a7 MX53: drop config.mk from mx53evk
The config.mk file in board directory is now obsolete and
should be removed. Add option for the IMX image into
boards.cfg

Signed-off-by: Jason Liu <r64343@freescale.com>
2011-04-27 19:38:05 +02:00
Stefano Babic
c7bdcb61f3 MX51: drop config.mk from mx51evk
The config.mk file in board directory is now obsolete and
should be removed. Add option for the IMX image into
boards.cfg

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-04-27 19:38:04 +02:00
Andy Fleming
865ff85640 fsl: Change fsl_phy_enet_if to phy_interface_t
The fsl_phy_enet_if enum was, essentially, the phy_interface_t enum.
This meant that drivers which used fsl_phy_enet_if to deal with
PHY interfaces would have to convert between the two (or we would have
to have them mirror each other, and deal with the ensuing maintenance
headache). Instead, we switch all clients of fsl_phy_enet_if over to
phy_interface_t, which should become the standard, anyway.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-20 15:09:35 -05:00
Andy Fleming
063c12633d tsec: Convert tsec to use PHY Lib
This converts tsec to use the new PHY Lib.  All of the old PHY support
is ripped out.  The old MDIO driver is split off, and placed in
fsl_mdio.c.  The initialization is modified to initialize the MDIO
driver as well.  The powerpc config file is modified to configure PHYLIB
if TSEC_ENET is configured.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-20 15:09:34 -05:00
Shaohui Xie
2a9fab82b7 powerpc/85xx: Add PBL boot from SPI flash support on P4080DS
PBL(pre-boot loader): SPI flash used as RCW(Reset Configuration Word) and
PBI(pre-boot initialization) source, CPC(CoreNet Platform Cache) used as
1M SRAM where PBL will copy whole U-BOOT image to, U-boot can boot from
CPC after PBL completes RCW and PBI phases.

Signed-off-by: Chunhe Lan <b25806@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-10 11:17:55 -05:00
Jiang Yutang
b93f81a418 powerpc/85xx: Add support usb2/etsec and tdm/audio pin multiplex on P1022DS
For soc which have pin multiplex relation, some of them can't enable
simultaneously. This patch add environment var 'hwconfig' content
defination for them. you can enable some one function by setting
environment var 'hwconfig' content and reset board. Detail setting
please refer doc/README.p1022ds

Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-10 11:17:55 -05:00
Jerry Huang
1ac63e4094 powerpc/85xx: Enable eSDHC boot support on P2020 DS
We implement our own mmc_get_env_addr since the environment variables are
written to just after the u-boot image on SDCard, so we must read the MBR
to get the start address and code length of the u-boot image, then
calculate the address of the env.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 22:26:32 -05:00
Jiang Yutang
9899ac1951 powerpc/85xx: Add 36-bit address map support to P1022DS
Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:43 -05:00
Poonam Aggrwal
e0082f7cb4 powerpc/85xx: Add 36-bit physical addressing support for P1_P2_RDB
Add support for 36-bit address map for NOR, SD, and SPI boot cfgs.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <priyanka.jain@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Poonam Aggrwal
66c74fca18 powerpc/85xx: Optimized DDR settings for 800MT/s on P1/P2 RDB
Changed the following DDR timing parameters for 800Mt/s:
tRRT    BL/2+1 to  BL/2
tWWT    BL/2+1 to  BL/2
tWRT    BL/2+1 to  BL/2
tRWT    BL/2+1 to  BL/2
REFINT  6500ns to  7800ns

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Poonam Aggrwal
3313b20b95 powerpc/85xx: Removed P1/P2 RDB RevB support
RevB boards never really made it outside of Freescale and have been
replaced with RevC & RevD which had various board bug fixes.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Priyanka Jain
cac29f25fd powerpc/85xx: Read board switch settings on p1_p2_rdb
PCA9557 is parallel I/O expansion device on I2C bus which stores various
board switch settings like NOR Flash-Bank selection, SD Data width.

On board:
switch SW5[6] is to select width for eSDHC
        ON  - 4-bit [Enable eSPI]
        OFF - 8-bit [Disable eSPI]

switch SW4[8] is to select NOR Flash Bank for Booting
        OFF - Primary Bank
        ON  - Secondary Bank

Read board switch settings on p1_p2_rdb and configure corresponding
eSDHC width.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Priyanka Jain
0c871e952e powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdb
Using DDR as RAMBOOT base instead of L2SRAM for SDCard and SPI Flash
boot loaders because:
- P1_P2_RDB boards have soldered DDR so no need for SPD
- Also P102x has 256K L2 cache size so becomes a limiting factor for
  size of image that could be loaded in SRAM mode and would require three
  stage boot loader (TPL).

Changes done:
 1. CONFIG_SYS_TEXT_BASE to 0x11000000
 2. CONFIG_RESET_VECTOR_ADDRESS to 0x1107fffc

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Timur Tabi
f098c9c880 fsl: obsolete NXID v0 EEPROMs, automatically upgrade them to NXID v1
The NXID EEPROM format comes in two versions, v0 and v1.  The only
difference is in the number of MAC addresses that can be stored.  NXID v0
supports eight addresses, and NXID v1 supports 23.

Rather than allow a board to choose which version to support, NXID v0 is
now considered deprecated.  The EEPROM code is updated to support only
NXID v1, but it can still read EEPROMs formatted with v0.  In these cases,
the EEPROM data is loaded and the CRC is verified, but the data is stored
into a v1 data structure.  If the EEPROM data is written back, it is
written in v1 format.  This allows existing v0-formatted EEPROMs to
continue providing MAC addresses, but any changes to the data will force
an upgrade to the v1 format, while retaining all data.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
York Sun
dea8bd627c powerpc/85xx: Update fixed DDR3 timing table for P4080DS
Most of time U-boot doesn't get an exact clock number. For example, clock
900MHz may be detected as 899.99MHz. 800MHz could be 799.99MHz. Update the
table to align the desired clocks in the middle.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Kumar Gala
c39f44dc6f powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from board
Move fsl_ddr_get_spd into common mpc8xxx/ddr/main.c as most boards
pretty much do the same thing.  The only variations are in how many
controllers or DIMMs per controller exist.  To make this work we
standardize on the names of the SPD_EEPROM_ADDRESS defines based on the
use case of the board.

We allow boards to override get_spd to either do board specific fixups
to the SPD data or deal with any unique behavior of how the SPD eeproms
are wired up.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Kumar Gala
5df4b0ad0d powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq()
Every 85xx board implements fsl_ddr_get_mem_data_rate via get_ddr_freq()
and every 86xx board uses get_bus_freq().  If implement get_ddr_freq()
as a static inline to call get_bus_freq() we can remove
fsl_ddr_get_mem_data_rate altogether and just call get_ddr_freq()
directly.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Kumar Gala
00203c6464 powerpc/85xx: Remove config.mk for nand linker script
Move the include of mpc85xx/u-boot-nand.lds to utilize
CONFIG_SYS_LDSCRIPT rather than having an explicit config.mk

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Kumar Gala
561e710a97 powerpc: Move cpu specific lmb reserve to arch_lmb_reserve
We've been utilizing board_lmb_reserve to reserve the boot page for MP
systems.  We can just move this into arch_lmb_reserve for 85xx & 86xx
systems rather than duplicating in each board port.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Jerry Huang
9c4d8767ed powerpc/85xx: Add eSDHC support on P2020DS
We enable SDHC_CD and SDHC_WP signals (pin muxed with GPIO8 & GPIO9
respectively).

We enable EXT2, FAT, and parition support for both MMC & USB configs.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Jin Qing <b24347@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Kumar Gala
f0f899432e powerpc/85xx: Declare fsl_ddr_set_memctl_regs in <asm/fsl_ddr_sdram.h>
Remove declerations of fsl_ddr_set_memctl_regs in board files with and
place it into a common header.

Based on patch from Poonam Aggrwal.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Kumar Gala
5cfbc458d4 powerpc/85xx: Remove DATARATE_*_MHZ defines in static ddr init
Rather than having #defines DATARATE_*_MHZ, lets just match what we do on
the SPD code and convert the DDR frequency into MHZ and just compare
with a constant.

Based on patch from Poonam Aggrwal.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Timur Tabi
aa8d3fb8f4 p1022ds: allow for board-specific ngPIXIS functions
The ngPIXIS is an FPGA used on the reference boards of most Freescale PowerPC
SOCs.  Although programming the ngPIXIS is mostly standard on all boards that
have it, the P1022DS is unique in that the ngPIXIS needs to be programmed in
"indirect" mode whenever the video display (DIU) is active.

To support indirect mode, and to make it easier to support other quirks on
future reference boards, the low-level ngPIXIS functions are all marked as
weak, so that board-specific code can override any of them.  We take advantage
of this feature on the P1022DS, so that we can properly reset the board when
the DIU is active.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Wolfgang Denk
c04bf5e9a4 Merge branch 'master' of git://git.denx.de/u-boot-arm 2011-03-27 21:20:29 +02:00
Po-Yu Chuang
44c6e6591c rename _end to __bss_end__
Currently, _end is used for end of BSS section.  We want _end to mean
end of u-boot image, so we rename _end to __bss_end__ first.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
2011-03-27 19:18:37 +02:00
Prabhakar Kushwaha
b0c5ceb305 powerpc/85xx: Fix PCI memory map setup on P1_P2_RDB
Update the PCIe address map to match standard FSL memory map.
Additionally, fix the TLBs so the cover the PCIe address space properly
so cards plugged in like an e1000 work correctly.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-24 09:46:21 -05:00
York Sun
634bc55429 powerpc/mpc8572ds: revise board specific timing for dual-rank DIMMs
Tested all possible values for clk_adjust and write_data_delay for dual
rank UDIMM and RDIMM to revise the tables.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-24 09:20:50 -05:00
York Sun
d89a976c13 powerpc/corenet_ds: revise platform dependent parameters
This patch revised clk_adjust and wrlvl_start timings for corenet_ds, based
on testing on Virtium VL33B5163F-K9S and Kingston KVR1333D3Q8R9S/4G.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-05 10:13:50 -06:00
York Sun
59a4089f82 corenet_ds: pick the middle value for all tested timing parameters
For DDR3 controller, the clk_adjust and wrlvl_start are platform-dependent.
The best values should be picked up from the middle of all working
combinations. This patch updates the table with confirmed values tested on
Hynix dual-rank UDIMMs (HMT125U7BFR8C-H9) at 1300MT/s, 1200MT/s, 1000MT/s,
900MT/s, 800MT/s and Kingston quad-rank RDIMMs (KVR1333D3Q8R9S/4G) at 1300MT/s,
1200MT/s, 1000MT/s.

Signed-off-by: York Sun <yorksun@freescale.com>
2011-03-05 10:13:50 -06:00
Fabio Estevam
9b6442f99c mx31pdk: Make the full boot log visible
Use board_early_init_f so that the full boot log output can be displayed.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-02-21 08:30:54 +01:00
Fabio Estevam
ed3df72db1 mx31pdk: Use the new relocation scheme
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-02-21 08:30:54 +01:00
Timur Tabi
3fee334c85 fsl: update CRC after setting EEPROM identifier
The "mac id" command is used to initialize the EEPROM data to a specific
format, but it was not updating the CRC.  This didn't cause any real
problems, because writing the data to the EEPROM will always update the
CRC anyway, but it did result in a bogus CRC warning.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-09 23:30:39 -06:00
Stefano Babic
eae4988b45 Add support for Freescale's mx35pdk board.
The patch adds suupport for the Freescale's mx35pdk board
(known as well as mx35_3stack).

The board boots from the NOR flash. Following devices
are supported:
 - two ethernet devices (FEC and SMC911x on debug board)
 - I2C
 - PMIC (MC13892) via I2C interface
 - UART
 - NOR flash (64MB)
 - NAND flash (2GB)
 - basic access to mc9sdz60 registers via I2C interface

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-02-02 00:54:43 +01:00
Marek Vasut
c4a3c7442b MX51EVK: Use SWx macros in PMIC init
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-02-02 00:54:42 +01:00
Liu Hui-R64343
94391fbcee MX5:MX53: add initial support for MX53EVK board
Add initial support for MX53EVK board support.
FEC, SD/MMC, UART, I2C, have been supported.

Signed-off-by: Jason Liu <r64343@freescale.com>
2011-02-02 00:54:42 +01:00
Liu Hui-R64343
877eb0f915 MX51EVK: UART does not print out the early information
The early bootup information is not print out due to
the UART pin iomux not set up correctly before board_init

Add the board_early_init_f function and enable the
CONFIG_BOARD_EARLY_INIT_F. Move the UART pin setting
from board_init to board_early_init_f function.

This patch also move the FEC pin iomux setup to the
board_early_init_f.

Signed-off-by: Jason Liu <r64343@freescale.com>
2011-02-02 00:54:41 +01:00
Prabhakar Kushwaha
b707090432 ppc/85xx: Fix compile err when PCI disabled on P1_P2_RDB
u-boot cannot be compiled after disabling CONFIG_PCI.

Place PCI related codes under #ifdef CONFIG_PCI

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:24 -06:00
York Sun
6b06d7dc07 corenet_ds: Extend board specific parameters
Extend board specific parameters to include cpo, write leveling override
Extend write leveling sample to 0xf
Adding rcw overrid for quad-rank RDIMMs

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:24 -06:00
Kumar Gala
7a577fda22 powerpc/85xx: Move RESET_VECTOR_ADDRESS into config.h
Rather than defining it config.mk we can set it in config.h and remove
config.mk from several boards that don't need it.

We mimic what 4xx does and introduce CONFIG_RESET_VECTOR_ADDRESS for
config.h to set.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
2011-01-19 22:58:23 -06:00
Kumar Gala
3dbd5d7d7e powerpc/8xxx: Move fsl_is_spd() into generic 8xxx ddr code
Move the parsing of hwconfig to determine if to use spd into common code
so we can share it across all boards instead of duplicating it
everywhere.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:22 -06:00
Kumar Gala
1b77ca8afa powerpc/86xx: Convert MPC8641HPCN to use common SRIO init code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:21 -06:00
Kumar Gala
e5fe96b1ab powerpc/85xx: Convert MPC8569MDS to use common SRIO init code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:21 -06:00
Kumar Gala
5f7bbd13a8 powerpc/85xx: Convert MPC8568MDS to use common SRIO init code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:21 -06:00
Kumar Gala
8b47d7ec9b powerpc/85xx: Convert MPC8548CDS to use common SRIO init code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:21 -06:00
Kumar Gala
a09b9b68d4 powerpc/8xxx: Refactor SRIO initialization into common code
Moved the SRIO init out of corenet_ds and into common code for
8xxx/QorIQ processors that have SRIO.  We mimic what we do with PCIe
controllers for SRIO.

We utilize the fact that SRIO is over serdes to determine if its
configured or not and thus can setup the LAWs needed for it dynamically.

We additionally update the device tree (to remove the SRIO nodes) if the
board doesn't have SRIO enabled.

Introduced the following standard defines for board config.h:

CONFIG_SYS_SRIO - Chip has SRIO or not
CONFIG_SRIO1 - Board has SRIO 1 port available
CONFIG_SRIO2 - Board has SRIO 2 port available

(where 'n' is the port #)
CONFIG_SYS_SRIOn_MEM_VIRT - virtual address in u-boot
CONFIG_SYS_SRIOn_MEM_PHYS - physical address (for law setup)
CONFIG_SYS_SRIOn_MEM_SIZE - size of window (for law setup)

[ These mimic what we have for PCI and PCIe controllers ]

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
2011-01-14 01:32:21 -06:00
Kumar Gala
e650ae1bb7 powerpc/85xx: Rework corenet_ds pci_init_board to use common FSL PCIe code
Remove duplicated code in corenet_ds boards and utilize the common
fsl_pcie_init_board().

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:21 -06:00
Kumar Gala
b8526212ca powerpc/86xx: Rework MPC8610HPCD pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8610HPCD board and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
06eb4d8c68 powerpc/85xx: Rework P1_P2_RDB pci_init_board to use common FSL PCIe code
Remove duplicated code in P1_P2_RDB boards and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
94f2bc4860 powerpc/85xx: Rework MPC8569MDS pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8569MDS board and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
3f6f9d7641 powerpc/85xx: Rework MPC8568MDS pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8568MDS board and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
f5fa8f3669 powerpc/85xx: Rework MPC8548CDS pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8548CDS board and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
64e55d5ed4 powerpc/86xx: Rework MPC8641HPCN pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8641HPCN board and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
5f7b31b000 powerpc/85xx: Rework MPC8536DS pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8536DS board and utilize the common
fsl_pcie_init_board().

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
64a1686a55 powerpc/85xx: Rework MPC8544DS pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8544DS board and utilize the common
fsl_pcie_init_ctrl().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

We don't use the full fsl_pcie_init_ctrl() since we have to handle PCIE3
specially to setup the additional memory map region and we utilize a
single LAW to cover the controller.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
4d5723da57 powerpc/85xx: Rework P2020DS pci_init_board to use common FSL PCIe code
Remove duplicated code in P2020DS board and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
18ea555130 powerpc/85xx: Rework MPC8572DS pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8572DS board and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Chenhui Zhao <b26998@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
a4aafcc990 powerpc/fsl-pci: Add generic code to setup PCIe controllers
Since all the PCIe controllers are connected over SERDES on the SoCs we
can utilize is_serdes_configured() to determine if a controller is
enabled.  After which we can setup the ATMUs and LAWs for the controller
in a common fashion and allow board code to specify what the controller
is connected to for reporting reasons.

We also provide a per controller (rather than all) for some systems that
may have special requirements.

Finally, we refactor the code used by the P1022DS to utilize the new
generic code.

Based on patch by: Li Yang <leoli@freescale.com>

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Becky Bruce
7ea3871e06 MPC8xxx DDR: align informational prints
Add spaces to cause the informational prints to line up with
the ones from init_func_ram() in board.c.  Output now looks like
this:

....
DRAM:  Detected 4096 MB of memory
       This U-Boot only supports < 4G of DDR
       You could rebuild it with CONFIG_PHYS_64BIT
       DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off)
....

The prints from lbc_sdram_init() have also been modified to line
line up and changed to start with "LBC SDRAM" instead of the
confusing "SDRAM".

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Becky Bruce
70961ba414 mpc85xx: rename sdram_init() lbc_sdram_init()
sdram_init() is used to initialize sdram on the lbc.  Rename it
accordingly.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Becky Bruce
38dba0c2ff mpc85xx boards: initdram() cleanup/bugfix
Correct initdram to use phys_size_t to represent the size of
dram; instead of changing this all over the place, and correcting
all the other random errors I've noticed, create a
common initdram that is used by all non-corenet 85xx parts.  Most
of the initdram() functions were identical, with 2 common differences:

1) DDR tlbs for the fixed_sdram case were set up in initdram() on
some boards, and were part of the tlb_table on others.  I have
changed them all over to the initdram() method - we shouldn't
be accessing dram before this point so they don't need to be
done sooner, and this seems cleaner.

2) Parts that require the DDR11 erratum workaround had different
implementations - I have adopted the version from the Freescale
errata document.  It also looks like some of the versions were
buggy, and, depending on timing, could have resulted in the
DDR controller being disabled.  This seems bad.

The xpedite boards had a common/fsl_8xxx_ddr.c; with this
change only the 517 board uses this so I have moved the ddr code
into that board's directory in xpedite517x.c

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Kumar Gala
058d7dc7ba powerpc/85xx: Cleanup SGMII detection and reporting
Use new is_serdes_configured to determine if TSECs are in SGMII mode and
report that on the various boards that use or can be configured in SGMII
mode in board_eth_init() instead of in the PCI init code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Kumar Gala
5d27e02c04 powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured
Now that we have serdes support for all 85xx/86xx/Pxxx chips we can
replace the is_fsl_pci_cfg() code with the is_serdes_configured().

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Kumar Gala
cb14e93b55 powerpc/85xx: Add support for booting from NAND on MPC8572DS
Mimic support that exists on MPC8536DS on the MPC8572DS to allow booting
from NAND.

Signed-off-by: Jin Qing <b24347@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:18 -06:00
Mike Frysinger
8ef583a035 miiphy: convert to linux/mii.h
The include/miiphy.h header duplicates a lot of things from linux/mii.h.
So punt all the things that overlap to keep the API simple and to make
merging between U-Boot and Linux simpler.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-09 18:06:50 +01:00
Wolfgang Denk
006915fbb0 Merge branch 'master' of ../master into next 2010-12-16 23:00:53 +01:00
Timur Tabi
fdb9482b42 p1022ds: fix switching of DIU/LBC signals
On the P1022, the pins which drive the video display (DIU) are muxed with the
local bus controller (LBC), so if the DIU is active, the pins need to be
temporarily muxed to LBC whenever accessing NOR flash.

The code which handled this transition is checking and changing the wrong
bits in PMUXCR.

Also add a follow-up read after a write to NOR flash if we're going to
mux back to DIU after the write, as described in the P1022 RM.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-12-13 10:05:51 -06:00
Anatolij Gustschin
14f88c43fc video: move fsl_diu_fb driver to drivers/video
Since the driver is used not only on Freescale boards,
we move it to a common place for video drivers as
suggested by Wolfgang. The patch also cleans up the
top level Makefile.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-12-01 20:48:13 +01:00
Kumar Gala
b194577b29 hwconfig: Fix dummy initialization of {board, cpu}_hwconfig
Since board_hwconfig & cpu_hwconfig are defined as weak and dont have a
default value they will get put into the BSS if they aren't defined
elsewhere.  This is problematic as we try to utilize hwconfig before
we've relocated and thus BSS isn't setup.

Instead of giving dummy values in the board files that utilize this
feature, we can just initialize the variables to an empty string and
thus move them out of the BSS if they aren't defined elsewhere.

Also made board_hwconfig & cpu_hwconfig arrays to reduce size associated
with string pointers vs arrays.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-11-30 22:11:19 +01:00
Mike Frysinger
882b7d726f do_reset: unify duplicate prototypes
The duplication of the do_reset prototype has gotten out of hand,
and they're not all in sync.  Unify them all in command.h.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-11-28 21:47:24 +01:00
Wolfgang Denk
e2c2a95e60 74xx_7xx: Cleanup for partial linking and --gc-sections
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2010-11-27 23:35:12 +01:00
Wolfgang Denk
566d49a3f5 512x: Cleanup for partial linking and --gc-sections
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Timur Tabi <timur@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
2010-11-27 23:35:11 +01:00
Sebastien Carlier
6d8962e814 Switch from archive libraries to partial linking
Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils.  As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".

This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.

The name of each former library archive is preserved except for
extensions which change from ".a" to ".o".  This commit updates
references accordingly where needed, in particular in some linker
scripts.

This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols.  Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.

Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
2010-11-17 21:02:18 +01:00
Peter Tyser
e7060dc570 mpc85xx: Fix SERDES/eTSEC message indentation
Previously some mpc85xx boards printed indented messages such as the
following on bootup:
  printf("    eTSEC4 is in sgmii mode.\n");
  printf("    Serdes2 disalbed\n");

The bootup appearance looks cleaner if the indentation is removed which
aligns these messages with other bootup output.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
CC: galak@kernel.crashing.org
2010-11-14 23:46:44 +01:00
Peter Tyser
8ca78f2c89 fsl: Clean up printing of PCI boot info
Previously boards used a variety of indentations, newline styles, and
colon styles for the PCI information that is printed on bootup.  This
patch unifies the style to look like:

...
NAND:  1024 MiB
PCIE1: connected as Root Complex
           Scanning PCI bus 01
        04  01  8086  1010  0200  00
        04  01  8086  1010  0200  00
        03  00  10b5  8112  0604  00
        02  01  10b5  8518  0604  00
        02  02  10b5  8518  0604  00
        08  00  1957  0040  0b20  00
        07  00  10b5  8518  0604  00
        09  00  10b5  8112  0604  00
        07  01  10b5  8518  0604  00
        07  02  10b5  8518  0604  00
        06  00  10b5  8518  0604  00
        02  03  10b5  8518  0604  00
        01  00  10b5  8518  0604  00
PCIE1: Bus 00 - 0b
PCIE2: connected as Root Complex
           Scanning PCI bus 0d
        0d  00  1957  0040  0b20  00
PCIE2: Bus 0c - 0d
In:    serial
...

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
CC: wd@denx.de
CC: sr@denx.de
CC: galak@kernel.crashing.org
2010-11-14 23:46:42 +01:00
Timur Tabi
46299078e6 powerpc/corenet_ds: display the RCW at boot
Display the 64-byte Reset Configuration Word (RCW) during boot, so that
there's no confusion as to what RCW U-boot is using.

Reset Configuration Word (RCW):
       00000000: 4a500000 00000000 18181818 00008888
       00000010: 28402400 00002000 fe800000 01200000
       00000020: 00000000 00000000 00000000 000b0000
       00000030: 00000000 00000000 00000000 00000000

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-11-12 09:45:16 -06:00
Priyanka Jain
39c2a6eb75 p1_p2_rdb: to set SQW/INT pin of RTC as INT line
SQW/INT pin in RTC can be used for generating square wave(by default) or
as interrupt line.  U-boot is registering this pin for interrupts.
Configuring SQW/INT bit as interrupt line during board initialization
to avoid spurious interrupts generated by square wave.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-11-12 09:45:11 -06:00
Shawn Guo
1ab027cbf6 mx51evk: support new relocation scheme
This patch is to fix build breakage and support new relocation
scheme for mx51evk.

- Correct IRAM base address and add size definition

  The IRAM starts from 0x1FFE0000 on final revsion i.mx51 than
  0x1FFE8000 which is for older revision.

- Include imx-regs.h in mx51evk.h

  Definitions like CSD0_BASE_ADDR and IRAM_BASE_ADDR can be
  referred to.

- Define CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE

  They are used to define init RAM layout.

- Remove comment for CONFIG_SYS_GBL_DATA_SIZE which has been
  buried by Wolfgang's commit below

  25ddd1fb: Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value

Signed-off-by: Shawn Guo <shawn.gsc@gmail.com>
2010-10-28 11:43:23 +02:00
Shawn Guo
888b4f435f mx51evk: Fix 2 hours reset issue
The mx51evk u-boot has an issue that system will get reset
every 2 hours.

MC13892 has an inside charge timer which expires in 120 minutes.
If ICHRG and CHGAUTOB are not set properly, this timer expiration
will get system power recycled.

Since mx51evk has no Li-Ion battery on board, the patch sets
ICHRG in externally powered mode and sets CHGAUTOB bit to avoid
automatic charging, so that system will not get reset by this
timer expiration.

The patch also corrects the bit field definition of register 48
(Charger 0) per latest MC13892 Reference Manual.

Signed-off-by: Shawn Guo <shawn.gsc@gmail.com>
2010-10-28 11:42:34 +02:00
Jason Liu
95707aaa9e MX5:use common u-boot.lds of cpu layer
Remove u-boot.lds from mx5 and use the common u-boot.lds
of cpu layer. This patch also fix the building errors:

arch/arm/cpu/armv7/start.o: In function `_rel_dyn_start_ofs':
arch/arm/cpu/armv7/start.S:283: undefined reference to `__rel_dyn_start'
arch/arm/cpu/armv7/start.o: In function `_rel_dyn_end_ofs':
arch/arm/cpu/armv7/start.S:283: undefined reference to `__rel_dyn_end'
arch/arm/cpu/armv7/start.o: In function `_dynsym_start_ofs':
arch/arm/cpu/armv7/start.S:283: undefined reference to `__dynsym_start'

Signed-off-by: Jason Liu <r64343@freescale.com>
2010-10-28 10:32:20 +02:00
Kumar Gala
bd9715e3db 86xx: Create common linker script
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:41 -05:00
Peter Tyser
9a268e4b7c mpc8641hpcn: Update PCI code
Update to use the recent, common FSL PCI initialization code.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:40 -05:00
York Sun
28a966715b Adding fixed sdram setting for cornet_ds board
800, 900, 1000, 1200MT/s data rate parameters are added for fixed sdram
setting. SPD based parameters and fixed parameters can be toggled by hwconfig.
To use fixed parameters,

hwconfig=fsl_ddr:sdram=fixed

To use SPD parameters,

hwconfig=fsl_ddr:ctlr_intlv=cacheline,bank_intlv=cs0_cs1

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:39 -05:00
Kumar Gala
a1964ea5c2 powerpc/8xxx: Add fdt_fixup_phy_connection helper
Add a common helper that will set the PHY connection type based on enum.
We use this on eTSEC, UCC, and will with Fman in the future.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:27:18 -05:00
Wolfgang Denk
083d506937 Merge branch 'master' of git://git.denx.de/u-boot-imx
Conflicts:
	board/logicpd/imx31_litekit/config.mk
	boards.cfg

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-19 20:58:16 +02:00
Damien Dusha
29c6fbe047 MPC5121: Add USB EHCI support
Signed-off-by: Francesco Rendine <francesco.rendine@valueteam.com>
Signed-off-by: Damien Dusha <d.dusha@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>

Coding style cleanup; slight file restructuring.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Remy Bohmer <linux@bohmer.net>
2010-10-18 22:33:32 +02:00
Wolfgang Denk
1211a46485 config.mk cleanup: drop "-I$(TOPDIR)/board" entries
After the recent cleanups, a number of config.mk files consist only of
a "PLATFORM_CPPFLAGS += -I$(TOPDIR)/board" entry whih is not needed.
Remove such entries.  In most cases, that means that the whole
config.mk file can be removed.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:14:22 +02:00
Wolfgang Denk
2ae1824196 Makefile: move all Power Architecture boards into boards.cfg
Clean up Makefile, and drop a lot of the config.mk files on the way.

We now also automatically pick all boards that are listed in
boards.cfg (and with all configurations), so we can drop the redundant
entries from MAKEALL to avoid building these twice.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:12:04 +02:00
Wolfgang Denk
14d0a02a16 Rename TEXT_BASE into CONFIG_SYS_TEXT_BASE
The change is currently needed to be able to remove the board
configuration scripting from the top level Makefile and replace it by
a simple, table driven script.

Moving this configuration setting into the "CONFIG_*" name space is
also desirable because it is needed if we ever should move forward to
a Kconfig driven configuration system.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:07:10 +02:00
Wolfgang Denk
d24f2d321d mkconfig: change CONFIG_MK_ prefix into plain CONFIG_
When planning for more generalization and Makefile cleanup it became
obvious that the introduction of a separate CONFIG_MK_ name space for
config options that were set through scripting in the Makefile was
not a good idea.

Originally the idea was to provide a script-free approach to supply
configuration options - there was no real need for a separate name
space. But when we now convert the existing Makefile entries to make
use of this approach, it would mean that we have to touch a large
number of board config files and add #ifdef / #define sequences to
"convert" from the CONFIG_MK_ to the CONFIG_ name space.

It seems much cleaner to get rid of this somewhat arbitrary _MK
string now for the few boards that actually use it.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 22:01:21 +02:00
Kim Phillips
e2229352c1 mpc83xx: fix 837x MDS PCI HOST build
commit 6aa3d3bfaa
"83xx: Remove warmboot parameter from PCI init functions" missed
one mpc83xx_pcie_init callsite, causing this build error:

Configuring for MPC837XEMDS_HOST board...
pci.c: In function 'pci_init_board':
pci.c:141: error: too many arguments to function 'mpc83xx_pcie_init'

this patch extends the commit to include that callsite.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-10-18 21:53:30 +02:00
Wolfgang Denk
ae188d48ec MPC832XEMDS: fix pci.c build warning
Doubled use of DECLARE_GLOBAL_DATA_PTR caused compile warning:

pci.c:71: warning: register used for two global register variables

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
2010-10-18 21:50:24 +02:00
Jason Liu
ff9f475d5d MX5: rename mx51 to mx5
Rename mx51 to mx5 in order to support more mx51
like-style SOCs such as MX53 and the followings.

Signed-off-by: Jason Liu <r64343@freescale.com>
2010-10-18 10:43:19 +02:00
Wolfgang Denk
cacc342d5a Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-10-17 20:25:05 +02:00
Wolfgang Denk
6ca803750e Merge branch 'master' of git://git.denx.de/u-boot-imx 2010-10-17 19:57:38 +02:00
Loic Minier
edad84c299 mx51evk: add u-boot.imx to ALL target
Signed-off-by: Loic Minier <loic.minier@linaro.org>
CC: stefano babic <sbabic@denx.de>
2010-10-14 10:23:24 +02:00
mark.vels@team-embedded.nl
812493ad87 Fix define for MPC5121 ADS board.
Originally the Makefile defines CONFIG_ADS5121_REV2 when configuring
for board mpc5121ads_rev2. The config in include/configs/mpc5121ads.h
expects a define CONFIG_MPC5121ADS_REV2 for this.
Therefore there are two defines used but only 1 is defined.
This patch renames references to CONFIG_ADS5121_REV2 to CONFIG_MPC5121ADS_REV2
to have one common define.

This patch fixes faulty mem size detection caused by wrong config in
include/configs/mpc5121ads.h

Signed-off-by: Mark Vels <mark.vels@team-embedded.nl>
2010-10-13 21:28:54 +02:00
Wolfgang Denk
e67f462864 Merge branch 'master' of git://git.denx.de/u-boot-imx 2010-10-11 10:19:04 +02:00
Timur Tabi
bfb707191a fsl: add support for NXID v1 EEPROM format
Freescale application note AN3638 describes an update to the NXID format,
which stores MAC addresses and related data on an on-board EEPROM.  The new
version adds support for up to 23 MAC addresses, instead of just 8.  Since
the initial implementation of NXID had a "0" in the 'version' field, this
new version is called "v1".

Boards that are shipped with EEPROMs in the NXID v1 format should define
CONFIG_SYS_I2C_EEPROM_NXID_1 instead of CONFIG_SYS_I2C_EEPROM_NXID.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:57:07 -05:00
Kumar Gala
1bf8e9fd74 powerpc/85xx: Add support for 4th PCI controller on corenet_ds
We configure the controller but dont have virtual address space thus any
devices on the 4th controller are not accessible in u-boot.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Timur Tabi
3addcb9343 fsl: verify writes to the MAC address EEPROM
Update the code which writes to the on-board EEPROM so that it can detect if
the write failed because the EEPROM is write-protected.  Most of the 8xxx-class
Freescale reference boards use an AT24C02 EEPROM to store MAC addresses and
similar information.  With this patch, if the EEPROM is protected, the
"mac save" command will display an error message indicating that the write
has not succeeded.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Timur Tabi
a2d12f8812 p1022ds: add audclk hwconfig setting to enable codec reference clock
The Freescale P1022DS can use either a 12.288MHz or a 11.2896MHz reference
clock for the audio codec, but by default both are disabled.  Add a 'audclk'
hwconfig option that allows the user to choose which clock he wants.

The 12.288MHz clock allows the codec to use sampling rates of 16, 24, 32, 48,
64, and 96KHz.  The 11.2896 clock allows 14700, 22050, 29400, 44100, 58800, and
88200Hz.

Also configure a pin muxing to select some SSI signals, which will disable
I2C1.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Haiying Wang
b6bde93090 mpc8569mds: fix some ddr settings
Enable half drive strength, set RTT to 60Ohm and set write leveling override.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Haiying Wang
3aed550742 mpc8569mds: fix consuming long time while relocating code.
The original code maps boot flash as non-cacheable region. When calling
relocate_code in flash to copy u-boot from flash to ddr, every loop copy command
is read from flash. The flash read speed will be the bottleneck, which consuming
long time to do this operation. To resovle this, map the boot flash as
write-through cache via tlb. And set tlb to remap the flash after code
executing in ddr, to confirm flash erase operation properly done.

Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Stefano Babic
4d0e49d336 MX51: Drop unused header file for mx51evk
As stated in 2720178533,
the mx51evk has not CPLD and all references must be removed.
This patch drop a .h file that still remains in board
directory.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-09-29 11:24:31 +02:00
Timur Tabi
55b05237b9 p1022ds: use weak CFI flash accessors when DIU is enabled
On the Freescale P1022, the DIU and the LBC share address pins, which means
that when the DIU is active (e.g. the console is on the DVI display), NOR flash
cannot be accessed.  So we use the weak accessor function feature of the CFI
flash code to temporarily switch the pin mux from DIU to LBC whenever we want
to read or write flash.  This has a significant performance penalty, but it's
the only way to make it work.

This change allows the 'saveenv' command to work when the video display is
enabled.  Erasing flash and writing to flash (with the 'cp' command) works,
but reading from flash (with the 'md' and 'cp' commands) does not.  Also, while
flash is being written, the video display will be blank.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-09-25 14:42:11 +02:00
Timur Tabi
d5e01e49f8 p1022ds: add video support
Add support for the DIU controller.  If CONFIG_VIDEO is defined, then
the console will appear on a DVI monitor instead of the serial port.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-09-25 13:10:10 +02:00
Anatolij Gustschin
9e70d1378c fsl_diu_fb: further refactoring of FSL DIU code
Move common code to the fsl_diu_fb.c file and remove obsolete
code from board files (aria, mpc8610hpcd and pdm360ng).
Move fsl_diu_fb.h file to the include directory.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-09-25 13:10:03 +02:00
Peter Tyser
6aa3d3bfaa 83xx: Remove warmboot parameter from PCI init functions
This change lays the groundwork for the BOOTFLAG_* flags being removed.

This change has the small affect of delaying 100ms on PCI initialization
after a warm boot as opposed to the optimal 1ms on some boards.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

included the mpc8308_p1m board.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-09-23 21:14:42 +02:00
Ilya Yanok
65ea758939 MPC8308RDB: various clean ups
This patch cleans up the Freescale MPC8308RDB Development board support.
Things fixed:
 - Removed unused PCIE2 definitions from configuration
 - SICR{L,H} defines used for System I/O Configuration Registers values
   instead of hardcoding
 - CONFIG_SYS_SCCR_PCIEXP1CM used to enable PCIE clock instead of
   writing to SCCR from the board code
 - sleep mode stuff removed as MPC8308 has no support for deep sleep and
   PMCCR1 register. board_early_init_f() removed.
 - MPC8308 has no ERRATA for DDR controller so workaround removed
 - 'assignment in if statement' issues solved
 - use LBLAWAR_* defines instead of hardcoding

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-09-23 21:14:08 +02:00
Timur Tabi
e69e520f9d fsl: refactor MPC8610 and MPC5121 DIU code to use existing bitmap and logo features
The Freescale MPC8610 and MPC5121 DIU code had re-implement two features that already
existed in U-Boot: bitmap drawing and top-of-screen logo (CONFIG_VIDEO_LOGO).
So delete the 8610-specific code and use the built-in features instead.

Signed-off-by: Timur Tabi <timur@freescale.com>
2010-09-21 22:46:02 +02:00
York Sun
8d9207c792 Fix parameters to support RDIMM for P2020DS
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-31 11:23:04 -05:00
Lian Minghuan
0e159024ea powerpc/85xx: Fix SRIO LAW setup on corenet_ds boards
In function board_early_init_r(), serdes will not be initialize yet.
Thus sRIO was always considered disabled.  Move the check for sRIO into
misc_init_r() which is called after fsl_serdes_init().

Also, fixed warning associated with gur variable possibly not being
used.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Lian Minghuan <B31939@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-19 02:06:14 -05:00
york
90870d9846 powerpc/8xxx: Fix quad-rank DIMMs support on corenet_ds board.
The board specific parameters associated with quad rank dimms where
missing.  This fixes it so the board will function if quad rank dimms
are placed in it.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-19 02:06:14 -05:00
Heiko Schocher
48690d8024 net ppc: fix ethernet device names with spaces
since commit 1384f3bb8a ethernet names
with spaces drop a

Warning: eth device name has a space!

message. This patch fix it for:

- "FEC ETHERNET" devices found on
  mpc512x, mpc5xxx, mpc8xx and mpc8220 boards.
  renamed to "FEC".
- "SCC ETHERNET" devices found on
  mpc8xx, mpc82xx based boards. Renamed to "SCC".
- "HDLC ETHERNET" devices found on mpc8xx boards
  Renamed to "HDLC"
- "FCC ETHERNET" devices found on mpc8260 and mpc85xx based
  boards. Renamed to "FCC"

Tested on the kup4k board.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-08-09 11:52:28 -07:00
Kumar Gala
d17123696c powerpc/p4080: Add support for the P4080DS board
Add support for the P4080DS board, with the following features:

* 36-bit only
* Boots from NOR flash
* FMAN drivers NOT supported
* SPD DDR initialization

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Ashish Kalra <Ashish.Kalra@freescale.com>
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Lan Chunhe-B25806 <b25806@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-01 11:18:40 -05:00
york
394c46caf9 powerpc/p2020ds: Integrated with P2020DS DDR change and enabled hwconfig
Enabled SPD
Enabled DDR2
Enabled hwconfig

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:10 -05:00
york
076bff8f47 powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4
Verified on MPC8641HPCN with four DDR2 dimms. Each dimm has dual
rank with 512MB each rank.

Also check dimm size and rank size for memory controller interleaving

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:09 -05:00
york
d51cc7a0cd powerpc/p2020: Move INIT_RAM_ADDR physical address higher for 36-bit for P2020DS
If 36-bit is enabled, move INIT_RAM_ADDR physical address higher
to free lowest 4GB address space.

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:07:53 -05:00
Wolfgang Denk
47e26b1bf9 cmd_usage(): simplify return code handling
Lots of code use this construct:

	cmd_usage(cmdtp);
	return 1;

Change cmd_usage() let it return 1 - then we can replace all these
ocurrances by

	return cmd_usage(cmdtp);

This fixes a few places with incorrect return code handling, too.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-07-24 20:43:57 +02:00
Kumar Gala
6525d51fa5 powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases
Previously we used an alias the pci node to determine which node to
fixup or delete.  Now we use the new fdt_node_offset_by_compat_reg to
find the node to update.

Additionally, we replace the code in each board with a single macro call
that makes assumes uniform naming and reduces duplication in this area.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:40:06 -05:00
Kumar Gala
46f3e3851d powerpc/86xx: Rename PCI1/2 to PCIE1/2 on MPC8641HPCN & SBC8641
The MPC8641 boards actually only have PCIE not PCI.  Rename so we are
uniform with regards to names so we can replace this code with templated
code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:37:11 -05:00
Kumar Gala
dd2cda3dbd powerpc/86xx: Move PCI/PCIe address defines into common immap_86xx.h
Remove dupliacted setting of PCI/PCIe address and offsets in board
config.h.  Renamed CONFIG_SYS_PCI1/2_ADDR to CONFIG_SYS_PCI1/2ADDR on
MPC8641 boards since its really PCIE controllers and not PCI.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:37:11 -05:00
Kumar Gala
9f43d7997e powerpc/85xx: Move p1022ds slot code into board file
The code to map SERDES configs to slot names is board specific and not
chip specific.  Thus it should live in board/freescale/p1022ds/ and not
in arch/powerpc/cpu/.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:10 -05:00
Kumar Gala
c7e1a43de6 ppc/85xx: Convert MPC8536DS to using board common ICS307 code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:10 -05:00
Kumar Gala
509c4c4ce2 ppc/85xx: Convert MPC8572DS to using board common ICS307 code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:10 -05:00
Timur Tabi
c59e1b4d07 powerpc: add support for the Freescale P1022DS reference board
Specifics:

1) 36-bit only
2) Booting from NOR flash only
3) Environment stored in NOR flash only
4) No SPI support
5) No DIU support

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:10 -05:00
Becky Bruce
f51cdaf191 83xx/85xx/86xx: LBC register cleanup
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers.  Merge
this into a single spot.

To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.

In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.

I have done a successful ppc build all and tested a board or two from
each processor family.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:09 -05:00
Kumar Gala
ebf9d5261e Move ICS CLK chip frequency calculation code into a common board library
We have several boards that use the same ICS307 CLK chip to drive the
System clock and DDR clock.  Move the code into a common location so we
share it.

Convert the P2020DS board as the first to use the new common ICS307
code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Timur Tabi <timur@freescale.com>
2010-07-16 10:55:08 -05:00
Kumar Gala
b4a60e521c ppc/85xx: Add a structure defn for PIXIS registers
The various boards that have PIXIS FPGAs have slightly different
register definitions, however there is some common functionality (like
reset, ICS307 clk control, etc) that can be shared.

The struct definition exists for MPC8536DS, MPC8544DS, MPC8572DS,
MPC8610HPCD, and MPC8641HPCN boards.

Also fixed ngpixis to be __packed__ instead of aligned.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:08 -05:00
Ilya Yanok
5fb17030d5 MPC8308RDB: minimal support for devboard from Freescale
This patch provides support for MPC8308RDB development board from
Freescale with a minimal set of features:
 Dual UART is supported
 NOR flash is supported
 Both TSEC Ethernet controllers are supported
 PCI Express initialization is supported

The following features are enabled in configuration but not fully tested:
 I2C (used to get the board revision)
 I2C-connected RTC
 VSC7385 switch

There is one (hopefully) minor issue: on soft reset the board sometimes
resets twice. I've not managed to find the fix for this problem yet.
As a workaround instruction cache can be disabled.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-07-09 16:10:36 -05:00
Wolfgang Denk
54841ab50c Make sure that argv[] argument pointers are not modified.
The hush shell dynamically allocates (and re-allocates) memory for the
argument strings in the "char *argv[]" argument vector passed to
commands.  Any code that modifies these pointers will cause serious
corruption of the malloc data structures and crash U-Boot, so make
sure the compiler can check that no such modifications are being done
by changing the code into "char * const argv[]".

This modification is the result of debugging a strange crash caused
after adding a new command, which used the following argument
processing code which has been working perfectly fine in all Unix
systems since version 6 - but not so in U-Boot:

int main (int argc, char **argv)
{
	while (--argc > 0 && **++argv == '-') {
/* ====> */	while (*++*argv) {
			switch (**argv) {
			case 'd':
				debug++;
				break;
			...
			default:
				usage ();
			}
		}
	}
	...
}

The line marked "====>" will corrupt the malloc data structures and
usually cause U-Boot to crash when the next command gets executed by
the shell.  With the modification, the compiler will prevent this with
an
	error: increment of read-only location '*argv'

N.B.: The code above can be trivially rewritten like this:

	while (--argc > 0 && **++argv == '-') {
		char *arg = *argv;
		while (*++arg) {
			switch (*arg) {
			...

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2010-07-04 23:55:42 +02:00
Wolfgang Denk
0a9463e935 Merge branch 'master' into next 2010-06-30 01:02:11 +02:00
Poonam Aggrwal
75997dc54f 85xx/p1_p2_rdb: Added RevD board version support
- Also modified the code to use io accessors.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2010-06-29 21:07:26 +02:00
Poonam Aggrwal
d3bee08332 85xx/p1_p2_rdb: Modify the CLK_CTRL value for DDR at 667MHz
Use a slighly larger value of CLK_CTRL for DDR at 667MHz
which fixes random crashes while linux booting.

Applicable for both NAND and NOR boot.

Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2010-06-29 21:01:07 +02:00
Anatolij Gustschin
1054382007 video: cfb_console: add weak default video_set_lut()
Do not enforce drivers to provide empty video_set_lut()
if they do not implement indexed color (8 bpp) frame
buffer support. Add default function to the cfb_console
driver and remove empty video_set_lut() functions.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-06-14 12:28:28 +02:00
Timur Tabi
5f4d36825a fsl: rename 'dma' to 'brdcfg1' in the ngPIXIS structure
The ngPIXIS is a board-specific FPGA, but the definition of the registers
is mostly consistent.  On boards where it matter, register 9 is called
'brdcfg1' instead of 'dma', so rename the variable in the ngpixis_t
definition.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-05-30 11:10:32 -05:00
Kumar Gala
6ece2550d1 Convert Makefiles from COBJS-${} to COBJS-$()
Match style we use almost everywhere else

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-05-26 22:27:38 +02:00
Wolfgang Denk
8a452c2c17 Merge branch 'master' of git://git.denx.de/u-boot-imx 2010-05-21 22:22:23 +02:00
Wolfgang Denk
2f05e394fc fsl_diu_fb.c: fix build warnings
Commit 15351855 "fsl-diu: Using I/O accessor to CCSR space" caused a
number of "passing argument 2 of 'out_be32' makes integer from pointer
without a cast" warnings; fix these.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Dave Liu <daveliu@freescale.com>
Cc: Jerry Huang <Chang-Ming.Huang@freescale.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
2010-05-17 23:34:18 +02:00
Kumar Gala
f54fe87ace 85xx/fsl-sata: Use is_serdes_configured() to determine if SATA is enabled
On the MPC85xx platform if we have SATA its connected on SERDES.
Determing if SATA is enabled via sata_initialize should not be board
specific and thus we move it out of the MPC8536DS board code.

Additionally, now that we have is_serdes_configured() we can determine
if the given SATA port is enabled and error out if its not in the
driver.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-05-12 04:53:51 -05:00
Kumar Gala
54648985e2 85xx/mpc8536ds: Use is_serdes_configured() to determine of PCIe enabled
The new is_serdes_configured covers a broader range of devices than the
PCI specific code.  Use it instead as we convert away from the
is_fsl_pci_cfg() code.

Additionally move to setting LAWs for PCI based on if its configured.
Also updated PCI FDT fixup code to remove PCI controllers from dtb if
they are configured.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-05-12 04:53:51 -05:00
Jerry Huang
1535185577 fsl-diu: Using I/O accessor to CCSR space
Using PPC I/O accessor to DIU I/O space instead of directly
read/write. It will prevent the dozen of compiler order issue
and PPC hardware order issue for accessing I/O space.

Using the toolchain(tc-fsl-x86lnx-e500-dp-4.3.74-2.i386.rpm)
can show up the order issue of DIU driver.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-05-12 04:53:49 -05:00
Stefano Babic
b4377e12e9 Add SPI support to mx51evk board
The patch adds SPI devices to the mx51evk board.
The MC13892 chip (PMIC) is supported.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-05-05 09:48:41 +02:00
Stefano Babic
68c07a0c21 MX51evk: Removed warnings
Changes reflect modifications in the fsl_esdhc driver
(the clk_enable field war removed in the configuration structure).

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-05-05 09:48:41 +02:00
Stefano Babic
dfe83352cb mx51evk: correct list of possible BOOT_FROM values
Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-04-30 05:23:25 -05:00
Fabio Estevam
2720178533 MX51EVK: Remove CPLD related code
There is no CPLD on MX51EVK board, so remove CPLD related function.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2010-04-30 05:23:23 -05:00
Wolfgang Denk
8e98f5f70b Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx 2010-04-27 23:02:12 +02:00
Kumar Gala
7e1afb62a7 ppc: Split MPC83xx SERDES code from MPC85xx/MPC86xx/QorIQ
The MPC83xx SERDES control is different from the other FSL PPC chips.
For now lets split it out so we can standardize on interfaces for
determining of a device on SERDES is configured.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2010-04-26 22:37:57 -05:00
Kumar Gala
1749c3da8d ppc/85xx: Fixup PCI nodes for P1_P2_RDB
While we had ft_pci_board_setup it wasn't being called by
ft_board_setup.  Fix that so we actually update the device tree PCI
nodes on P1_P2_RDB boards.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-04-26 22:37:50 -05:00
Anatolij Gustschin
a3921eefa1 mpc5121: add support for PDM360NG board
PDM360NG is a MPC5121E based board by ifm ecomatic gmbh.

Signed-off-by: Michael Weiss <michael.weiss@ifm.com>
Signed-off-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-04-24 22:56:37 +02:00
Stefan Roese
a47a12becf Move arch/ppc to arch/powerpc
As discussed on the list, move "arch/ppc" to "arch/powerpc" to
better match the Linux directory structure.

Please note that this patch also changes the "ppc" target in
MAKEALL to "powerpc" to match this new infrastructure. But "ppc"
is kept as an alias for now, to not break compatibility with
scripts using this name.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Anatolij Gustschin <agust@denx.de>
2010-04-21 23:42:38 +02:00
Peter Tyser
a414553485 m68k: Move cpu/$CPU to arch/m68k/cpu/$CPU
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:24 +02:00
Peter Tyser
84ad688473 arm: Move cpu/$CPU to arch/arm/cpu/$CPU
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:24 +02:00
Peter Tyser
8d1f268204 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:16 +02:00
Peter Tyser
78acc472d9 Rename lib_generic/ to lib/
Now that the other architecture-specific lib directories have been
moved out of the top-level directory there's not much reason to have the
'_generic' suffix on the common lib directory.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:04 +02:00
Peter Tyser
ea0364f1bb Move lib_$ARCH directories to arch/$ARCH/lib
Also move lib_$ARCH/config.mk to arch/$ARCH/config.mk

This change is intended to clean up the top-level directory structure
and more closely mimic Linux's directory organization.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:03 +02:00
Peter Tyser
03b7004dda Create CPUDIR variable
The CPUDIR variable points to the location of a target's CPU directory.
Currently, it is set to cpu/$CPU.  However, using $CPUDIR will allow for
more flexibility in the future.  It lays the groundwork for reorganizing
U-Boot's directory structure to support a layout such as:

  arch/$ARCH/cpu/$CPU/* (architecture with multiple CPU types)
  arch/$ARCH/cpu/*      (architecture with one CPU type)

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:12:59 +02:00
Timur Tabi
5a46960883 p2020ds: add alternate boot bank support using the ngPIXIS FPGA
The Freescale P2020DS board uses a new type of PIXIS FPGA, called the ngPIXIS.
The ngPIXIS has one distinct new feature: the values of the on-board switches
can be selectively overridden with shadow registers.  This feature is used to
boot from a different NOR flash bank, instead of having a register dedicated
for this purpose.  Because the ngPIXIS is so different from the previous PIXIS,
a new file is introduced: ngpixis.c.

Also update the P2020DS checkboard() function to use the new macros defined
in the header file.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-04-07 00:21:28 -05:00
Timur Tabi
2feb4af001 fsl: improve the PIXIS code and fix a few bugs
Refactor and document the Freescale PIXIS code, used on most 85xx and 86xx
boards.  This makes the code easier to read and more flexible.

Delete pixis.h, because none of the exported functions were actually being
used by any other file.  Make all of the functions in pixis.c 'static'.
Remove "#include pixis.h" from every file that has it.

Remove some unnecessary #includes.

Make 'pixis_base' into a macro, so that we don't need to define it in every
function.

Add "while(1);" loops at the end of functions that reset the board, so that
execution doesn't continue while the reset is in progress.

Replace in_8/out_8 calls with clrbits_8, setbits_8, or clrsetbits_8, where
appropriate.

Replace ulong/uint with their spelled-out equivalents.  Remove unnecessary
typecasts, changing the types of some variables if necessary.

Add CONFIG_SYS_PIXIS_VCFGEN0_ENABLE and CONFIG_SYS_PIXIS_VBOOT_ENABLE to make
it easier for specific boards to support variations in the PIXIS registers
sets.  No current boards appears to need this feature.

Fix the definition of CONFIG_SYS_PIXIS_VBOOT_MASK for the MPC8610 HPCD.
Apparently, "pixis_reset altbank" has never worked on this board.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-04-07 00:21:27 -05:00
Wolfgang Denk
ffa37fc98d Merge branch 'next' 2010-04-01 11:28:32 +02:00
Timur Tabi
9ff32d8ccf mpc86xx: set the DDR BATs after calculating true DDR size
After determining how much DDR is actually in the system, set DBAT0 and
IBAT0 accordingly.  This ensures that the CPU won't attempt to access
(via speculation) addresses outside of actual memory.

On 86xx systems, DBAT0 and IBAT0 (the BATs for DDR) are initialized to 2GB
and kept that way.  If the system has less than 2GB of memory (typical for
an MPC8610 HPCD), the CPU may attempt to access this memory during
speculation.  The zlib code is notorious for generating such memory reads,
and indeed on the MPC8610, uncompressing the Linux kernel causes a machine
check (without this patch).

Currently we are limited to power of two sized DDR since we only use a
single bat.  If a non-power of two size is used that is less than
CONFIG_MAX_MEM_MAPPED u-boot will crash.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-03-30 10:50:22 -05:00
TsiChung Liew
9d3a86aec5 ColdFire: Fix m54455EVB save environment bug
The ATMEL flash does not have buffer write feature. Assgined
buffer_size = 1, so that when there is a write to the flash
will not use buffer write function.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2010-03-24 11:09:42 -05:00
TsiChung Liew
53e4290f20 ColdFire: M5271EVB DRAM Bring up issue
Fix proper portsize: The register for portsize is either 00b, 01b,
or 1xb. The value that previous assigned is 32d.
Fix DRAM bring up: insert asm("nop") for every DRAM register setup

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2010-03-24 11:09:15 -05:00
TsiChung Liew
d04c1efae3 ColdFire: Correct bit definition
Use correct definition for _MASK and _UNMASK. It was combined in
the previous used and causes confusion.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2010-03-24 11:09:03 -05:00
Wolfgang Denk
93910edb59 Prepare v2010.03-rc1
Coding style cleanup, update CHANGELOG.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-12 23:06:04 +01:00
Stefano Babic
e4d3449201 MX51: removed warnings for the mx51evk
The patch removes warnings at compile time and provides
some cleanup code:
- Removed comment on NAND (not yet supported) from lowlevel_init.S
- Removed NFMS bit definition from imx-regs.h
  The bit is only related to MX.25/35 and can lead to confusion
- Moved is_soc_rev() to soc specific code (removed from mx51evk.c)

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-03-07 12:36:36 -06:00
Stefano Babic
c5fb70c911 Add initial support for Freescale mx51evk board
The patch adds initial support for the Freescale mx51evk board.
Network (FEC) and SD controller (fsl_esdhc) are supported.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fred Fan <fanyefeng@gmail.com>
2010-03-07 12:36:36 -06:00
Wolfgang Denk
05c2f4fe29 Merge branch 'master' of git://git.denx.de/u-boot-net 2010-02-03 20:10:20 +01:00
Heiko Schocher
582c55a027 83xx, uec: split enet_interface in two variables
There's no sensible reason to unite speed and interface type into
one variable.  So split this variable enet_interface into two
vars: enet_interface_type, which hold the interface type and speed.

Also: add the possibility for switching between 10 and 100 MBit
interfaces on the fly, when running in FAST_ETH mode.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-01-31 22:37:12 -08:00
Liu Yu
674ef7bd02 Nand boot: Add nand boot support for MPC8569mds board
This patch add nand boot support for MPC8569mds board.

Signed-off-by: Liu Yu <yu.liu@freescale.com>
2010-01-27 14:22:40 -06:00
Liu Yu
d918038269 ppc/85xx: Add PIB/ATM support for MPC8569mds
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-25 22:13:26 -06:00
Peter Tyser
64917ca389 PCIe, USB: Replace 'end point' references with 'endpoint'
When referring to PCIe and USB 'endpoint' is the standard naming
convention.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Remy Bohmer <linux@bohmer.net>
2010-01-17 23:06:44 +01:00
Wolfgang Denk
02c631e6ee Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2010-01-12 23:30:40 +01:00
Anton Vorontsov
2e95004deb mpc83xx: Add NAND boot support for MPC8315E-RDB boards
The core support for NAND booting is there already, so this patch
is pretty straightforward.

There is one trick though: top level Makefile expects nand_spl to
be in nand_spl/board/$(BOARDDIR), but we can fully reuse the code
from mpc8313erdb boards, and so to not duplicate the code we just
symlink nand_spl/board/freescale/mpc8315erdb to mpc8313erdb.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>

o silence make during ln echo
o update documentation
o and avoid:

$ ./MAKEALL MPC8315ERDB_NAND
Configuring for MPC8315ERDB board...
sdram.o: In function `fixed_sdram':
/home/r1aaha/git/u-boot/nand_spl/board/freescale/mpc8313erdb/sdram.c:72: undefined reference to `udelay'

by renaming udelay -> __udelay in the spirit of commit
3eb90bad65 "Generic udelay() with watchdog
support".

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-07 18:33:52 -06:00
Anton Vorontsov
c4ca10f1db mpc85xx: Add 4-bits eSDHC support for MPC8569E-MDS boards
Thanks to "Errata to MPC8569E PowerQUICC III Integrated Host Processor
Family Reference Manual, Rev. 0" document, which describes all eSDHC
pins, we can add 4-bits eSDHC support for MPC8569E-MDS boards.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:10 -06:00
Kumar Gala
abc76eb6a6 ppc/85xx: Map boot page guarded for MP boot
We already map the page cache-inhibited.  There is no reason we
shouldn't also be marking it guarded to prevent speculative accesses.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:09 -06:00
Kumar Gala
5fb6ea3ad3 ppc/85xx: Make flash TLB entry determined at runtime on FSL boards
Rather than hard coding which TLB entry the FLASH is mapped with we can
use find_tlb_idx to determine the entry.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:08 -06:00
Kumar Gala
9263e829f0 ppc/85xx: Move to using fsl_setup_hose on P2020 DS
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host.  Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:07 -06:00
Kumar Gala
1e21ba8f6d ppc/85xx: Move to using fsl_setup_hose on P1/P2 RDB
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host.  Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:07 -06:00
Kumar Gala
42c01b9d1f ppc/85xx: Move to using fsl_setup_hose on MPC8572 DS
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host.  Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:06 -06:00
Kumar Gala
5e3d7050cf ppc/86xx: Clean up MPC8610 HPCD PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:06 -06:00
Kumar Gala
7b626880b4 ppc/85xx: Clean up MPC8548 CDS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:06 -06:00
Kumar Gala
4681457e2a ppc/85xx: Clean up MPC8568 MDS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:05 -06:00
Kumar Gala
c847e98b14 ppc/85xx: Clean up MPC8569 MDS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:05 -06:00
Kumar Gala
645d5a7838 ppc/85xx: Clean up MPC8544 DS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:05 -06:00
Mingkai Hu
8a414c4258 ppc/85xx: Clean up MPC8536 DS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:05 -06:00
Heiko Schocher
00b6d927ba 5xxx, fdt: move fdt_fixup_memory() to cpu.c file
u-boot updates, before starting Linux, the memory node in the
DTS. As this is a "standard" feature, move this functionality
to the cpu.c file for mpc5xxx and mpc512x processors.

Signed-off-by: Heiko Schocher <hs@denx.de>
2009-12-08 22:13:02 +01:00
Wolfgang Denk
2a49bf3149 Merge branch 'master' into next
Conflicts:
	board/esd/plu405/plu405.c
	drivers/rtc/ftrtc010.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-12-05 02:11:59 +01:00
Ingo van Lil
3eb90bad65 Generic udelay() with watchdog support
According to the PPC reference implementation the udelay() function is
responsible for resetting the watchdog timer as frequently as needed.
Most other architectures do not meet that requirement, so long-running
operations might result in a watchdog reset.

This patch adds a generic udelay() function which takes care of
resetting the watchdog before calling an architecture-specific
__udelay().

Signed-off-by: Ingo van Lil <inguin@gmx.de>
2009-12-05 01:08:53 +01:00
Marcel Ziswiler
cada315100 mpc8260: move FDT memory node fixup into common CPU code.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
Tested-by: Heiko Schocher <hs@denx.de>
2009-11-22 23:16:28 +01:00
Becky Bruce
107b579c75 86xx: Remove redundant code in initdram
The same code exists both inside an #ifdef and outside of it.
Remove the extra code for all the 86xx boards.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-11-04 21:37:12 -06:00
Kumar Gala
01471d538f Revert "ppc/85xx/pci: fsl_pci_init: pcie agent mode support"
This reverts commit 70ed869ea5.

There isn't any need to modify the API for fsl_pci_init_port to pass the
status of host/agent(end-point) status.  We can determine that
internally to fsl_pci_init_port.  Revert the patch that makes the API
change.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-11-04 09:14:59 -06:00
Anton Vorontsov
3fca803759 mpc85xx: Configure QE USB for MPC8569E-MDS boards
Setup QE pin multiplexing for USB function, configure needed BCSRs
and add some fdt fixups.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 10:04:17 -05:00
Anton Vorontsov
14809b6c21 mpc85xx: Configure QE UART for MPC8569E-MDS boards
To make QE UART usable by Linux we should setup pin multiplexing
and turn UCC2 Ethernet node into UCC2 QE UART node.

Also, QE UART is mutually exclusive with UART0, so we can't enable
it if eSDHC is in 4-bits mode on pilot boards, or if it's a prototype
board with eSDHC in 1- or 4-bits mode.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 10:04:11 -05:00
Anton Vorontsov
70d665b1d2 mpc85xx: Setup QE pinmux for SPI Flash on MPC8569E-MDS boards
SPI Flash (M25P40) is connected to the SPI1 bus, we need a few
qe_iop entries to actually enable SPI1 on these boards.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 09:44:40 -05:00
Anton Vorontsov
65dec3b459 mpc85xx: Setup SRIO memory region LAW for MPC8569E-MDS boards
This patch sets memory window for Serial RapidIO on MPC8569E-MDS
boards.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 09:44:37 -05:00
Anton Vorontsov
a29155e122 mpc85xx: Add eLBC NAND support for MPC8569E-MDS boards
Simply add some defines, and adjust TLBe setup to include some
space for eLBC NAND.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 09:44:32 -05:00
Anton Vorontsov
7f52ed5ef1 mpc85xx: Add eSDHC support for MPC8569E-MDS boards
eSDHC is mutually exlusive with UART0 (in 4-bits mode) and I2C2
(in 1-bit mode). When eSDHC is used, we should switch u-boot console to
UART1, and make the proper device-tree fixups.

Because of an erratum in prototype boards it is impossible to use eSDHC
without disabling UART0 (which makes it quite easy to 'brick' the board
by simply issung 'setenv hwconfig esdhc', and not able to interact with
U-Boot anylonger).

So, but default we assume that the board is a prototype, which is a most
safe assumption. There is no way to determine board revision from a
register, so we use hwconfig.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 09:36:48 -05:00
Vivek Mahajan
70ed869ea5 ppc/85xx/pci: fsl_pci_init: pcie agent mode support
Originally written by Jason Jin and Mingkai Hu for mpc8536.

When QorIQ based board is configured as a PCIe agent, then unlock/enable
inbound PCI configuration cycles and init a 4K inbound memory window;
so that a PCIe host can access the PCIe agents SDRAM at address 0x0

* Supported in fsl_pci_init_port() after adding pcie_ep as a param
* Revamped copyright in drivers/pci/fsl_pci_init.c
* Mods in 85xx based board specific pci init after this change

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 09:33:51 -05:00
Poonam Aggrwal
273a28ad9e 85xx/p1_p2_rdb: Fixing DDR configuration for 800MHz data rate
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 09:12:36 -05:00
Poonam Aggrwal
924024c396 85xx/p1_p2rdb: Fix crash while configuring 32 bit DDR i/f for P1020RDB.
The data being modified was in NOR flash which caused the crash.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 09:12:32 -05:00
Dipen Dudhat
fad15096e3 ppc/P1_P2_RDB: On-chip BootROM support
On Chip BootROM support for P1 and P2 series RDB platforms.

This patch is derived from latest On Chip BootROM support on MPC8536DS

Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-16 10:21:39 -05:00
Dipen Dudhat
f7780ec977 ppc/P1_P2_RDB: NAND Boot Support
NAND Boot support for P1 and P2 series RDB platforms.

This patch is derived from NAND Boot support on MPC8536DS.

Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-16 10:21:39 -05:00
Wolfgang Denk
cd77dd109c Merge branch 'reloc' 2009-10-09 00:03:18 +02:00
Wolfgang Denk
da01f53404 mpc512x: fix fixed_sdram() init code.
Commit 054197ba and later fixes used an array to initialize some of
the MDDRC parameters; however, the use of an array turned out to be a
bad idea as it was not possible to correlate structure entries to
array indices in readable and reliable way. Now we use a struct
instead, which makes this self-explanatory.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-08 00:23:12 +02:00
Peter Tyser
b32a894011 ppc: Remove pci config table pointer relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 10:17:56 +02:00
Peter Tyser
858290178f ppc: Enable full relocation to RAM
The following changes allow U-Boot to fully relocate from flash to
RAM:
 - Remove linker scripts' .fixup sections from the .text section
 - Add -mrelocatable to PLATFORM_RELFLAGS for all boards
 - Define CONFIG_RELOC_FIXUP_WORKS for all boards

Previously, U-Boot would partially relocate, but statically initialized
pointers needed to be manually relocated.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 10:15:45 +02:00
Wolfgang Denk
1d96cfe8f5 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2009-09-30 23:39:36 +02:00
Mingkai Hu
e40ac4870c On-chip ROM boot: MPC8536DS support
The MPC8536E is capable of booting from the on-chip ROM - boot from
eSDHC and boot from eSPI. When power on, the porcessor excutes the
ROM code to initialize the eSPI/eSDHC controller, and loads the mian
U-Boot image from the memory device that interfaced to the controller,
such as the SDCard or SPI EEPROM, to the target memory, e.g. SDRAM or
L2SRAM, then boot from it.

The memory device should contain a specific data structure with control
word and config word at the fixed address. The config word direct the
process how to config the memory device, and the control word direct
the processor where to find the image on the memory device, or where
copy the main image to. The user can use any method to store the data
structure to the memory device, only if store it on the assigned address.

The on-chip ROM code will map the whole 4GB address space by setting
entry0 in the TLB1, so the main image need to switch to Address space 1
to disable this mapping and map the address space again.

This patch implements loading the mian U-Boot image into L2SRAM, so
the image can configure the system memory by using SPD EEPROM.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-30 08:42:11 -05:00
Mingkai Hu
9a1a0aedbb NAND boot: MPC8536DS support
MPC8536E can support booting from NAND flash which uses the
image u-boot-nand.bin. This image contains two parts: a 4K
NAND loader and a main U-Boot image. The former is appended
to the latter to produce u-boot-nand.bin. The 4K NAND loader
includes the corresponding nand_spl directory, along with the
code twisted by CONFIG_NAND_SPL. The main U-Boot image just
like a general U-Boot image except the parts that included by
CONFIG_SYS_RAMBOOT.

When power on, eLBC will automatically load from bank 0 the
4K NAND loader into the FCM buffer RAM where CPU can execute
the boot code directly. In the first stage, the NAND loader
copies itself to RAM or L2SRAM to free up the FCM buffer RAM,
then loads the main image from NAND flash to RAM or L2SRAM
and boot from it.

This patch implements the NAND loader to load the main image
into L2SRAM, so the main image can configure the RAM by using
SPD EEPROM. In the first stage, the NAND loader copies itself
to the second to last 4K address space, and uses the last 4K
address space as the initial RAM for stack.

Obviously, the size of L2SRAM shouldn't be less than the size
of the image used. If so, the workaround is to generate another
image that includes the code to configure the RAM by SPD and
load it to L2SRAM first, then relocate the main image to RAM
to boot up.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-30 08:42:06 -05:00
Anton Vorontsov
da6eea0f48 mpc83xx: mpc8360emds: Add QE USB device tree fixups
With this patch we can change QE USB mode without need to hand-edit
the device tree.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-09-25 18:25:51 -05:00
Anton Vorontsov
89da44ce3f mpc83xx: mpc8360emds: Use RGMII-ID mode, add workarounds for rev. 2.1 CPUs
This patch fixes various ethernet issues with gigabit links handling
in U-Boot. The workarounds originally implemented by Kim Phillips for
Linux kernel.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-09-25 18:25:51 -05:00
Anton Vorontsov
034477bb31 mpc83xx: mpc8360emds: Don't use LBC SDRAM when DDR is available
Since commit 5c2ff323a9 ("mpc8360emds:
rework LBC SDRAM setup"), LBC SDRAM is available for use in Linux.

Though, it appears that QE Ethernet in Gigabit mode can't transmit
large packets when it tries to work with a data in LBC SDRAM (memtest
didn't discover any issues, is LBC SDRAM just too slow?).

With this patch we can still use the board without DDR memory, but
if DDR is available, we don't use LBC SDRAM.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-09-25 18:25:51 -05:00
Wolfgang Denk
984f10baac mpc5121ads: fix breakage introduced when reordering elpida_mddrc_config[]
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-09-25 14:16:00 +02:00
Martha M Stan
a5aa3998ab Add Elpida Memory Configuration to mpc5121ads Boards
Signed-off-by: Martha M Stan <mmarx@silicontkx.com>

Minor coding style cleanup.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-09-25 00:45:38 +02:00
Martha M Stan
054197ba8e mpc512x: Streamlined fixed_sdram() init sequence.
Signed-off-by: Martha M Stan <mmarx@silicontkx.com>

Minor cleanup:

Re-ordered default_mddrc_config[] to have matching indices.

This allows to use the same index "N" for source and target fields;
before, we had code like this

	out_be32(&im->mddrc.ddr_time_config2, mddrc_config[3]);

which always looked like a copy & paste error because 2 != 3.

Also, use NULL when meaning a null pointer.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-09-25 00:45:30 +02:00
Peter Tyser
8439f05cfd mpc8610hpcd: Use common 86xx fdt fixup code
Using the common 86xx fdt fixups removes some board-specific code and
should make the mpc8610hpcd easier to maintain in the long run.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:05:25 -05:00
Poonam Aggrwal
82b7725b6d ppc/85xx: 32bit DDR changes for P1020/P1011
The P1020/P1011 SOCs support max 32bit DDR width as opposed to P2020/P2010
where max DDR data width supported is 64bit.

As a next step the DDR data width initialization would be made more dynamic
with more flexibility from the board perspective and user choice.
Going forward we would also remove the hardcodings for platforms with onboard
memories and try to use the FSL SPD code for DDR initialization.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:59 -05:00
Kumar Gala
002741ae86 ppc/85xx: Clean up use of LAWAR defines
On 85xx platforms we shouldn't be using any LAWAR_* defines
but using the LAW_* ones provided by fsl-law.h.  Rename any such
uses and limit the LAWAR_ to the 83xx platform as the only user so
we will get compile errors in the future.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:58 -05:00
Kumar Gala
f61dae7c9d ppc/85xx: Clean up mpc8572DS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:58 -05:00
Kumar Gala
4958af8735 ppc/85xx: Clean up p2020ds PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:58 -05:00
Kumar Gala
93a83872c7 ppc/85xx: Clean up p1_p2_rdb PCI setup
General code cleanup to use in/out IO accessors as well as making
the code that prints out info sane between board and generic fsl pci
code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:58 -05:00
Mingkai Hu
6e1385d5f8 NAND boot: change NAND loader's relocate SP to CONFIG param
So that we can set the NAND loader's relocate stack pointer
to the value other than the relocate address + 0x10000.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-15 21:30:09 -05:00
Kumar Gala
6c97a20d0b ppc/85xx: Introduce RESET_VECTOR_ADDRESS to handle non-standard link address
Some board ports place TEXT_BASE at a location that would cause the
RESET_VECTOR_ADDRESS not to be at 0xfffffffc when we link.  By default
we assume RESET_VECTOR_ADDRESS will be 0xfffffffc if the board doesn't
explicitly set it.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
2009-09-09 21:04:47 -05:00
Kumar Gala
3e7b6c1f2d ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host
Refactor the code into a simple bitmask lookup table that determines if
a given PCI controller is enabled and if its in host/root-complex or
agent/end-point mode.

Each processor in the PQ3/MPC86xx family specified different encodings
for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-08 09:10:07 -05:00
Kumar Gala
2abbd31da6 ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist
The ddr_pd_cntl isn't defined in any reference manual and thus we wil
remove especially since we set it to 0, which would most likely be its
POR value.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-08 09:10:04 -05:00
Anton Vorontsov
9c671e7062 fsl: sys_eeprom: Fix 'may be used uninitialized' warning
The warning is bogus, so silence it by initializing the 'ret' variable.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-08 09:10:03 -05:00
Timur Tabi
2d04db088e fsl: simplify the "mac id" command, improve boot-time informational message
The "mac id" command took a 4-character parameter as the identifier string.
However, for any given board, only one kind of identifier is acceptable, so it
makes no sense to ask the user to type it in.  Instead, if the user enters
"mac id", the identifier (and also the version, if it's NXID) will
automatically be set to the correct value.

Improve the message that is displayed when EEPROM is read during boot.  It now
displays "EEPROM:" and then either an error message or the EEPROM identifier
if successful.

If the identifier in EEPROM is valid, then always reject a bad CRC, even if the
CRC field has not been initialized.

Don't force the MAC address count to MAX_NUM_PORTS or less.  Forcing the value
to be changed resulting in an in-memory copy that does not match what's in
hardware, even though the user did not request that change.

Finally, always update the CRC value in the in-memory copy after any field
is changed, so that the CRC is always correct.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:52 -05:00
Poonam Aggrwal
33f3f34255 85xx: Added PCIe support for P1 P2 RDB
Call fsl_pci_init_port() to initialize all the PCIe ports on the board.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:46 -05:00
Kumar Gala
b560ab85ed 85xx: Init pci ethernet cards if we enable any on MPC8572DS
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:40 -05:00
Kumar Gala
ec79d33b2c 85xx: Move to a common linker script
There are really no differences between all the 85xx linker scripts so
we can just move to a single common one.  Board code is still able to
override the common one if need be.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:39 -05:00
Poonam Aggrwal
728ece343e 85xx: Add support for P2020RDB board
The code base adds P1 & P2 RDB platforms support.
The folder and file names can cater to future SOCs of P1/P2 family.
P1 & P2 processors are 85xx platforms, part of Freescale QorIQ series.

Tested following on P2020RDB:
1. eTSECs
2. DDR, NAND, NOR, I2C.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:38 -05:00
Kumar Gala
73aacc5228 86xx: Remove redudant PLATFORM_CPPFLAGS
For historic reasons we had defined some additional PLATFORM_CPPFLAGS like:

PLATFORM_CPPFLAGS += -DCONFIG_MPC86xx=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC8641=1

However these are all captured in the config.h and thus redudant.  Also
moved common 86xx flags into cpu/mpc86xx/config.mk.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:37 -05:00
Kumar Gala
53efa1f1ac 85xx: Remove redudant PLATFORM_CPPFLAGS
For historic reasons we had defined some additional PLATFORM_CPPFLAGS
like:

PLATFORM_CPPFLAGS += -DCONFIG_E500=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC8548=1

However these are all captured in the config.h and thus redudant.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:37 -05:00
Kumar Gala
ecead84d56 85xx: Cleanup whitespace in mpc8536ds.c
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:36 -05:00
Kumar Gala
cb151aa2cf pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init
Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows
before it calls fsl_pci_init.  There isn't any reason to just call it
from fsl_pci_init and simplify things a bit.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:35 -05:00
Kumar Gala
fb3143b35e pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init
Every platform that calls fsl_pci_init calls pci_setup_indirect before
it calls fsl_pci_init.  There isn't any reason to just call it from
fsl_pci_init and simplify things a bit.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:35 -05:00
Ben Warren
b1c0eaac11 Convert CS8900 Ethernet driver to CONFIG_NET_MULTI API
All in-tree boards that use this controller have CONFIG_NET_MULTI added
Also:
  - changed CONFIG_DRIVER_CS8900 to CONFIG_CS8900
  - changed CS8900_BASE to CONFIG_CS8900_BASE
  - changed CS8900_BUS?? to CONFIG_CS8900_BUS??
  - cleaned up line lengths
  - modified VCMA9 command function that accesses the device
  - removed MAC address initialization from lib_arm/board.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Tested-by: Wolfgang Denk <wd@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
2009-08-25 13:35:54 -07:00
Wolfgang Denk
cb32ed1fc2 Merge branch 'next' of git://git.denx.de/u-boot-coldfire 2009-08-04 21:54:11 +02:00
Kumar Gala
4c2e3da82d Update Freescale copyrights to remove "All Rights Reserved"
"All Rights Reserved" conflicts with the GPL.

Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
2009-07-29 09:59:22 +02:00
Ben Warren
736fead8fd Convert SMC911X Ethernet driver to CONFIG_NET_MULTI API
All in-tree boards that use this controller have CONFIG_NET_MULTI added
Also:
 - changed CONFIG_DRIVER_SMC911X* to CONFIG_SMC911X*
 - cleaned up line lengths
 - modified all boards that override weak function in this driver
 - added

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Tested-by: Mike Frysinger <vapier@gentoo.org>
2009-07-22 22:53:44 -07:00
Kumar Gala
048e7efe91 85xx/86xx: Replace in8/out8 with in_8/out_8 on FSL boards
The pixis code used in8/out8 all over the place.  Replace it with
in_8/out_8 macros.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 10:16:55 -05:00
Peter Tyser
e7ee23ec17 86xx: Rename ccsr_ddr's sdram_mode_1, sdram_cfg_1 fields
Rename sdram_mode_1 to sdram_mode and sdram_cfg_1 to sdram_cfg to match
the 86xx user's manual and other Freescale architectures

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 09:43:47 -05:00
Kumar Gala
6bb5b41229 85xx: Report which "bank" of NOR flash we are booting from on FSL boards
The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of
swizzling the upper address bits of the NOR flash we boot out of which
creates the concept of "virtual" banks.  This is useful in that we can
flash a test of image of u-boot and reset to one of the virtual banks
while still maintaining a working image in "bank 0".

The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 09:42:22 -05:00
Kumar Gala
9af9c6bdc1 86xx: Report which "bank" of NOR flash we are booting from on MPC8641HPCN
The MPC8641HPCN board is capable of swizzling the upper address bit of
the NOR flash we boot out of which creates the concept of "virtual"
banks.  This is useful in that we can flash a test of image of u-boot
and reset to one of the virtual banks while still maintaining a
working image in "bank 0".

The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 09:08:50 -05:00
Kim Phillips
9993e196da mpc83xx: convert all remaining boards over to 83XX_GENERIC_PCI
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-18 19:43:04 -05:00
Jean-Christophe PLAGNIOL-VILLARD
52cb4d4fb3 stdio/device: rework function naming convention
So far the console API uses the following naming convention:

	======Extract======
	typedef struct device_t;

	int	device_register (device_t * dev);
	int	devices_init (void);
	int	device_deregister(char *devname);
	struct list_head* device_get_list(void);
	device_t* device_get_by_name(char* name);
	device_t* device_clone(device_t *dev);
	=======

which is too generic and confusing.

Instead of using device_XX and device_t we change this
into stdio_XX and stdio_dev

This will also allow to add later a generic device mechanism in order
to have support for multiple devices and driver instances.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Edited commit message.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-18 00:27:46 +02:00
Anton Vorontsov
bfadb17f69 mpc83xx: MPC837xEMDS: Use hwconfig instead of pci_external_arbiter variable
Since we have simple hwconfig interface now, we don't need
pci_external_arbiter variable any longer.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-16 22:47:10 +02:00
Anton Vorontsov
b8b71ffbc3 mpc83xx: MPC8315ERDB: Use hwconfig for board type selection
This patch simply converts the board to the hwconfig infrastructure.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-16 22:47:01 +02:00
Anton Vorontsov
c78c678354 mpc83xx: MPC837XEMDS: Fixup eSDHC nodes in device tree
fdt_fixup_esdhc() will either disable or enable eSDHC nodes, and
also will fixup clock-frequency property.

Plus, since DR USB and eSDHC are mutually exclusive, we should
only configure the eSDHC if asked through hwconfig.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-16 22:25:43 +02:00
Anton Vorontsov
c9646ed758 mpc83xx: MPC837XERDB: Add support for FSL eSDHC
This patch adds support for eSDHC on MPC837XERDB boards. The WP
switch doesn't seem to work on RDB boards though, the WP pin is
always asserted (can see the pin state when it's in GPIO mode).

FSL DR USB and FSL eSDHC are mutually exclusive because of pins
multiplexing, so user should specify 'esdhc' or 'dr_usb' options
in the hwconfig environment variable to choose between the
devices.

p.s.
Now we're very close to a monitor len limit (196 bytes left using
gcc-4.2.0), so also increase the monitor len by one sector (64 KB).

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-16 22:25:34 +02:00
TsiChung Liew
bf9a521529 ColdFire: Add M5208EVB and MCF520x CPU support
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-07-14 09:27:17 -05:00
TsiChung Liew
709b384b64 ColdFire: Update for M54451EVB
Update serial boot DRAM's Internal RAM, vector table and DRAM in
start.S, serial flash's read status command over SPI and NOR
flash.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-07-14 09:27:14 -05:00
Wolfgang Denk
7629f1c06b MPC512x: factor out common code
Now that we have 3 boards for the MPC512x it turns out that they all
use the very same fixed_sdram() code.

This patch factors out this common code into cpu/mpc512x/fixed_sdram.c
and adds a new header file, include/asm-ppc/mpc512x.h, with some
macros, inline functions and prototype definitions specific to MPC512x
systems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-07-14 00:02:41 +02:00
Wolfgang Denk
a48ecc969f Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
	drivers/spi/Makefile

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-07 22:22:05 +02:00
Magnus Lilja
d08e5ca301 MX31: Add NAND SPL boot support to i.MX31 PDK board.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2009-07-06 21:53:18 +02:00
Magnus Lilja
8449f287f5 MX31: Add basic support for Freescale i.MX31 PDK board.
Add support for Freescale's i.MX31 PDK board (a.k.a. 3 stack board).

This patch assumes that some other program performs the actual
NAND boot.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Acked-by: Fabio Estevam <fabioestevam@yahoo.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-07-06 21:52:38 +02:00
Kumar Gala
afb0b1315c fsl: Fix compiler warnings from gcc-4.4 in sys_eeprom code
sys_eeprom.c: In function 'do_mac':
sys_eeprom.c:323: warning: dereferencing type-punned pointer will break strict-aliasing rules
sys_eeprom.c: In function 'mac_read_from_eeprom':
sys_eeprom.c:395: warning: dereferencing type-punned pointer will break strict-aliasing rules

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-03 12:46:47 -05:00
Peter Tyser
9adda5459c 83xx: Replace CONFIG_ECC_INIT_VIA_DDRC references
Update 83xx architecture's CONFIG_ECC_INIT_VIA_DDRC references to
CONFIG_ECC_INIT_VIA_DDRCONTROLLER, which other Freescale architectures
use

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-02 11:15:49 -05:00
Roy Zang
29c3518246 85xx: Add pci e1000 Ethernet support for P2020 board
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-30 08:26:34 -05:00
Remy Bohmer
60f61e6d76 Convert DM9000 driver for CONFIG_NET_MULTI
All drivers need to be converted to CONFIG_NET_MULTI.
This patch converts the dm9000 driver.

Signed-off-by: Thomas Smits <ts.smits@gmail.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-06-15 00:13:55 -07:00
Haiying Wang
9a6110897f fsl: Update the number of ethxaddr in reading system eeprom
We support up to 8 mac addresses in system eeprom, so we define the macro
MAX_NUM_PORTS to limit the mac_count to 8, and update the number of ethxaddr
according to mac_count.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:01 -05:00
Haiying Wang
f82107f637 85xx: Add RMII support for MPC8569MDS
This patch supports UCC working at RMII mode on PIB board, fixup fdt blob to
support rmii in kernel. It also changes the name of enable_mpc8569mds_qe_mdio to
enalbe_mpc8569mds_qe_uec which is  more accurate.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:01 -05:00
Haiying Wang
750098d33b 85xx: Add UEC3 and UEC4 support for MPC8569MDS
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:00 -05:00
Srikanth Srinivasan
feb7838f97 85xx: Add P2020DS support
The patch adds support for P2020DS reference platform.
DDR3 interface uses hard-coded initialization rather than SPD
for now and was tested at 667Mhz. Some PIXIS register
definitions and associated code sections need to be fixed.
TSEC1/2/3, NOR flash, MAC/SYS ID EEPROM, PCIE1/2/3 are all
tested under u-boot.

Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Travis Wheatley <Travis.Wheatley@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:16:25 -05:00
Stefan Roese
229549a56d mpc512x: MPC5121ADS: Add NAND support
This patch adds NAND support to the MPC5121ADS board. Please
note that the image size increased since NAND support didn't
fit in the current image size (256k).

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2009-06-12 20:47:19 +02:00
Peter Tyser
0f89860494 83xx: Replace CONFIG_MPC83XX with CONFIG_MPC83xx
Use the standard lowercase "xx" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-06-12 20:47:17 +02:00
Wolfgang Denk
843efb1192 MPC512x: use I/O accessors instead of pointer accesses
This commit changes the MPC512x code to use I/O accessor calls (i.e.
out_*() and in_*()) instead of using deprecated pointer accesses.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
2009-06-12 20:47:16 +02:00
Wolfgang Denk
19dc7e1792 MPC512x: add more hardware description to immap_512x.h
- add GPIO module description
- add Address Latch Timing Register description
- add IO Control Memory Map
- add FEC Memory Map

Also change board/freescale/mpc5121ads/mpc5121ads.c and
cpu/mpc512x/iopin.c as needed.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
2009-06-12 20:47:16 +02:00
Wolfgang Denk
72601d04fd Rename ads5121 board into mpc5121ads
We rename the board so we use a consistent name in U-Boot and in
Linux.  Also, we use this opportunity to move the board into the
Freecale vendor directory.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
2009-06-12 20:47:16 +02:00
Wolfgang Denk
a89c33db96 General help message cleanup
Many of the help messages were not really helpful; for example, many
commands that take no arguments would not print a correct synopsis
line, but "No additional help available." which is not exactly wrong,
but not helpful either.

Commit ``Make "usage" messages more helpful.'' changed this
partially. But it also became clear that lots of "Usage" and "Help"
messages (fields "usage" and "help" in struct cmd_tbl_s respective)
were actually redundant.

This patch cleans this up - for example:

Before:
	=> help dtt
	dtt - Digital Thermometer and Thermostat

	Usage:
	dtt         - Read temperature from digital thermometer and thermostat.

After:
	=> help dtt
	dtt - Read temperature from Digital Thermometer and Thermostat

	Usage:
	dtt

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-06-12 20:47:16 +02:00
Jean-Christophe PLAGNIOL-VILLARD
10a451cd57 arm: unify linker script
all arm boards except a few use the same cpu linker script
so move it to cpu/$(CPU)

that could be overwrite in following order
SOC
BOARD
via the corresponding config.mk

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:52 +02:00
Haiying Wang
b2aab386e9 85xx: Add UART1 support for MPC8569MDS
MPC8569 UART1 signals are muxed with PortF bit[9-12], we need to define
those pins before using UART1.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 00:11:10 -05:00
Dave Liu
16e7559c08 85xx: Fix the wrong BCSR address of 8569MDS
The BCSR17[7] = 1 will unlock the write protect of FLASH.
The WP# pin only controls the write protect of top/bottom sector,
That is why we can save env, but we can't write the first sector
before the patch.

Signed-off-by: Dave Liu <daveliu@freescale.com>
2009-06-09 22:58:32 +02:00
Dave Liu
1b5291dddf 85xx: Fix the clock adjust of mpc8569mds board
Currently the clk_adj is 6 (3/4 cycle), The settings will cause
the DDR controller hang at the data init. Change the clk_adj
from 6 to 4 (1/2 cycle), make the memory system stable.

Signed-off-by: Dave Liu <daveliu@freescale.com>
2009-06-09 22:58:05 +02:00
Detlev Zundel
792a09eb9d Fix e-mail address of Gary Jennejohn.
Signed-off-by: Detlev Zundel <dzu@denx.de>
2009-05-15 22:11:59 +02:00
Alan Carvalho de Assis
9abc9ef8fb Small fix to m5282evb
This is just a small fix to get u-boot on m5282evb.

Signed-off-by: Alan Carvalho de Assis <acassis@gmail.com>
2009-04-04 22:47:01 +02:00
Kumar Gala
32049b4048 fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-04-04 10:21:30 -05:00
Kumar Gala
c8514622e2 fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h
Rename the pci header for FSL HW so we can move some prototypes
in there and stop doing explicit externs

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-04-04 10:21:29 -05:00
Kumar Gala
7649a590b5 86xx: Cleanup MP support
* Use CONFIG_MP instead of CONFIG_NUM_CPUS to match 85xx
* Introduce determine_mp_bootpg() helper.  We'll need this to address a
  bug introduced in v2009.03 with 86xx MP booting.  We have to make sure
  to reserve the region of memory used for the MP bootpg() so other
  u-boot code doesn't use it.
* Added dummy versions of cpu_reset(), cpu_status() & cpu_release() to
  allow cmd_mp.c to build and work. In the future we should look at
  implementing all these functions. This could be common w/85xx if we
  use spin tables on 86xx.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-04-01 15:29:44 -05:00
Becky Bruce
f6ef8b7a43 mpc8641hpcn/sbc8641d: Add missing board_lmb_reserves
We're missing the board_lmb_reserve definitions that allow
cpu_mp_lmb_reserve to be called; this means that Linux
is free to reallocate reserved pages.  Linux currently boots
because we're getting lucky - the page we've reserved is
high enough in memory that it isn't allocated by Linux
while we still need it to be in existence.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-03-31 22:41:34 -05:00
Haiying Wang
765547dc5e MPC85xx: Add MPC8569MDS board support
This patch adds MPC8569MDS board support. The UART, QE UEC1 and UEC2, BRD
EEPROM on I2C2 bus, PCI express and DDR3 SPD are supported in this patch.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Hillel Avni <Hillel.Avni@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-03-30 13:33:51 -05:00
Kumar Gala
b0fe93eda6 85xx: Use common LSDMR defines from asm/fsl_lbc.h
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-03-30 13:33:49 -05:00
Wolfgang Grandegger
33846df28f Add wait flags to support board/chip specific delays
The NAND flash on the TQM8548_BE modules requires a short delay after
running the UPM pattern like the MPC8360ERDK board does. The TQM8548_BE
requires a further short delay after writing out a buffer. Normally the
R/B pin should be checked, but it's not connected on the TQM8548_BE.
The corresponding Linux FSL UPM driver uses similar delay points at the
same locations. To manage these extra delays in a more general way, I
introduced the "wait_flags" field allowing the board-specific driver to
specify various types of extra delay.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-03-23 15:53:40 -05:00
Wolfgang Grandegger
e93c1c169d Add multi chip support to the FSL-UPM driver
This patch adds support for multi-chip NAND devices to the FSL-UPM
driver. The "dev_ready" callback of the "struct fsl_upm_nand" is now
called with the argument "chip_nr" to allow testing the proper chip
select line. The NAND support of the MPC8360ERDK is updated as well.
No other boards are currently using the FSL UPM driver.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-03-23 15:53:38 -05:00
Trent Piepho
f62fb99941 Fix all linker script to handle all rodata sections
A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
which needs to be added the the linker script.  Instead of just adding this
one section, we use a wildcard ".rodata*" to get all rodata linker section
gcc has now and might add in the future.

However, '*(.rodata*)' by itself will result in sub-optimal section
ordering.  The sections will be sorted by object file, which causes extra
padding between the unaligned rodata.str.1.1 of one object file and the
aligned rodata of the next object file.  This is easy to fix by using the
SORT_BY_ALIGNMENT command.

This patch has not be tested one most of the boards modified.  Some boards
have a linker script that looks something like this:

*(.text)
. = ALIGN(16);
*(.rodata)
*(.rodata.str1.4)
*(.eh_frame)

I change this to:

*(.text)
. = ALIGN(16);
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

This means the start of rodata will no longer be 16 bytes aligned.
However, the boundary between text and rodata/eh_frame is still aligned to
16 bytes, which is what I think the real purpose of the ALIGN call is.

Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
2009-03-20 22:39:12 +01:00
TsiChung Liew
9017d9325a ColdFire: Fix M5329EVB and M5373EVB nand issue
The Nand flash was unable to read and write properly
due to Nand Chip Select (nCE) setup was in reverse
order. Also, increase the Nand time out value to 60.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2009-03-17 15:58:37 -06:00
Andy Fleming
48c2b7bb43 fsl: Remove unnecessary debug printfs
These were left in accidentally, and are not really useful unless the
code is as broken as it was when it was being developed.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-03-09 17:46:10 -05:00
Wolfgang Denk
014c595f12 Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
Conflicts:
	lib_ppc/board.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-03-09 00:41:48 +01:00
Anton Vorontsov
7e2ec1de1d mpc83xx: MPC837XEMDS: Initialize SerDes before negating PCIE reset signal
The SerDes initialization should be finished before negating the reset
signal according to the reference manual. This isn't an issue on real
hardware, but we'd better stick to the specifications anyway.

Suggested-by: Liu Dave <DaveLiu@freescale.com>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-05 18:13:11 -06:00
Wolfgang Denk
89e372cd3d Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2009-02-24 22:52:16 +01:00
Anton Vorontsov
7e91558032 mpc83xx: MPC837XERDB: Add PCIe support
On MPC8377E-RDB and MPC8378E-RDB boards we have PCIe and mini-PCIe
slots. Let's support them.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-02-23 15:52:35 -06:00
Becky Bruce
2331e18b9d mpc8641hpcn: Indicate 36-bit addr map in boot messages
If 36-bit addressing is enabled, print a message on the console
when we boot.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
2009-02-23 22:48:17 +01:00
Andy Fleming
e1ac387f46 83xx: Add eSDHC support on 8379 EMDS board
Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-02-16 18:07:43 -06:00
Andy Fleming
80522dc836 85xx: Add eSDHC support for 8536 DS
Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-02-16 18:07:43 -06:00
Peter Tyser
4ef630df77 86xx: Reset update
Update the 86xx reset sequence to try executing a board-specific reset
function.  If the board-specific reset is not implemented or does not
succeed, then assert #HRESET_REQ.  Using #HRESET_REQ is a more standard
reset procedure than the previous method and allows all board
peripherals to be reset if needed.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-02-16 18:05:56 -06:00
Kumar Gala
cb69e4de87 85xx: print boot header info to distinquish 36-bit addr map on MPC8572 DS
Added some info that is printed out when we boot to distiquish if we
built MPC8572DS_config vs MPC8572DS_36BIT_config since they have
different address maps.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-02-16 18:05:54 -06:00
Andy Fleming
feede8b070 Fixup SGMII PHY ids in the device tree
The device tree's PHY addresses need to be fixed up if we're using the
SGMII Riser Card.

The 8572, 8536, and 8544 DS boards were modified to call this function.

Code idea taken from Liu Yu <yu.liu@freescale.com>

Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-02-16 18:05:54 -06:00
Kumar Gala
b67305120a 85xx: Fix bug in device tree setup in 36-bit physical confg
In the 36-bit physical config for MPC8572DS when need the start address
of memory and it size to be kept in phys_*_t instead of a ulong since
we support >4G of memory in the config and ulong cant represent that.
Otherwise we end up seeing the memory node in the device tree reporting
back we have memory starting @ 0 and of size 0.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-02-16 18:05:52 -06:00
Kumar Gala
ad97dce184 85xx: Fix address map for 36-bit config of MPC8572DS
When we introduced the 36-bit config of the MPC8572DS board we had the
wrong PCI MEM bus address map.  Additionally, the change to the address
map exposes a small issue in our dummy read on the ULI bus.  We need
to use the new mapping functions to handle that read properly in the
36-bit config.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-02-16 18:05:52 -06:00
Becky Bruce
49f46f3bf0 mpc8641hpcn: Clean up PCI mapping concepts
Clean up PCI mapping concepts in the 8641 config - rename _BASE
to _BUS, as it's actually a PCI bus address, separate virtual
and physical addresses into _VIRT and _PHYS, and use each
appopriately.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
2009-02-10 00:30:17 +01:00
Becky Bruce
2ecca34017 mpc8641hpcn: Set up outbound pci windows before inbound
Because the inbound pci windows are mapped generously, set up
the more specific outbound windows first.  This way, when we
search the pci regions for something, we will hit on the more
specific region.  This can actually be a problem on systems
with large amounts of RAM.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
2009-02-10 00:26:45 +01:00
Kumar Gala
ff4e66e93c pci: Rename PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY for clarity
The PCI_REGION_MEMORY and PCI_REGION_MEM are a bit to similar and
can be confusing when reading the code.

Rename PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY to clarify its used
for system memory mapping purposes.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-02-07 23:50:04 +01:00
Wolfgang Denk
54a7cc4912 mpc8536ds.c: include sata.h to for needed function prototypes
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-01-28 09:25:31 +01:00
Peter Tyser
2fb2604d5c Command usage cleanup
Remove command name from all command "usage" fields and update
common/command.c to display "name - usage" instead of
just "usage". Also remove newlines from command usage fields.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-01-28 08:49:52 +01:00
Peter Tyser
62c3ae7c6e Standardize command usage messages with cmd_usage()
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-01-28 08:43:45 +01:00
Peter Tyser
9507e7867e Clean up diufb command definitions
The diufb command usage formatting is non-standard.  It was
made standard in preparation for larger command usage updates.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-01-28 08:43:34 +01:00
Mike Frysinger
cf7e399fb3 SATA: do not auto-initialize during boot
Rather than have the board code initialize SATA automatically during boot,
make the user manually run "sata init".  This brings the SATA subsystem in
line with common U-Boot policy.

Rather than having a dedicated weak function "is_sata_supported", people
can override sata_initialize() to do their weird board stuff.  Then they
can call the actual __sata_initialize().

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-01-27 23:42:39 +01:00
Wolfgang Denk
8f86a3636e Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2009-01-24 02:17:02 +01:00
Dave Liu
bf5b1f0c0d 85xx: enable the auto self refresh for wake up ARP
The wake up ARP feature need use the memory to process
wake up packet, we enable auto self refresh to support it.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2009-01-23 17:03:14 -06:00
Dave Liu
b4983e16d1 fsl-ddr: use the 1T timing as default configuration
For light loaded system, we use the 1T timing to gain better
memory performance, but for some heavily loaded system,
you have to add the 2T timing options to board files.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2009-01-23 17:03:14 -06:00
Kumar Gala
aca5f018a8 85xx: Introduce CONFIG_SYS_PCI*_IO_VIRT for FSL boards
Introduce a new define to seperate out the virtual address that PCI
IO space is at from the physical address.  In most situations these are
mapped 1:1.  However any code accessing the bus should use VIRT.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
2009-01-23 17:03:13 -06:00
Kumar Gala
5af0fdd81c 85xx: Introduce CONFIG_SYS_PCI*_MEM_VIRT for FSL boards
Introduce a new define to seperate out the virtual address that PCI
memory is at from the physical address.  In most situations these are
mapped 1:1.  However any code accessing the bus should use VIRT.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
2009-01-23 17:03:13 -06:00
Kumar Gala
a6e04c344a 85xx: Use CONFIG_SYS_{PCI*,RIO*}_MEM_PHYS for physical address on FSL boards
Use the _MEM_PHYS defines instead of _MEM_BUS for LAW and real address fields
of TLBs.  This is what we should have always been using from the start.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
2009-01-23 17:03:13 -06:00
Kumar Gala
5f91ef6acd 85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards
Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead
of _IO_BASE so we are more explicit.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-01-23 17:03:13 -06:00
Kumar Gala
10795f42cb 85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards
Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead
of _MEM_BASE so we are more explicit.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
2009-01-23 17:03:13 -06:00
Kumar Gala
c953ddfd56 85xx: separate FLASH BASE virtual from physical address
Added a CONFIG_SYS_FLASH_BASE_PHYS for use as the physical address and
maintain CONFIG_SYS_FLASH_BASE as the virtual address of the flash.

This allows us to deal with 36-bit phys on these boards in the future.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
2009-01-23 17:03:13 -06:00
Kumar Gala
52b565f5ad 85xx: separate PIXIS virtual from physical address
Added a PIXIS_BASE_PHYS for use as the physical address and maintain
PIXIS_BASE as the virtual address of the PIXIS fpga registers.

This allows us to deal with 36-bit phys on these boards in the future.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
2009-01-23 17:03:13 -06:00
Anton Vorontsov
8b34557c54 mpc83xx: Add PCI-E support for MPC837XEMDS boards
MPC837XEMDS boards can support PCI-E via "PCI-E riser card". The card
provides two PCI-E (x2) ports. Though, only one port can be used in x2
mode. Two ports can function simultaneously in x1 mode.

PCI-E x1/x2 modes can be switched via "pex_x2" environment variable.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-01-21 18:43:50 -06:00
Anton Vorontsov
8f11e34b31 mpc83xx: Add PCI-E support for MPC8315ERDB boards
MPC8315ERDB boards features PCI-E x1 and Mini PCI-E x1 ports. Let's
support them.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-01-21 18:43:50 -06:00
Ira Snyder
88ecf55cab MPC8349EMDS: do not setup unused PCI clock outputs in PCI agent mode
When running in PCI agent mode, the PCI_CLK_OUT signals are not used, so do
not enable them. See the MPC8349EA Reference Manual, Section 4.4.2
"Clocking in PCI Agent Mode".

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-01-21 18:43:49 -06:00
Wolfgang Denk
bae6d5e412 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2009-01-14 00:26:48 +01:00
Haiying Wang
b5f65dfa9a Some changes of TLB entry setting for MPC8572DS
- Move the TLB entry of PIXIS_BASE from TLB0 to TLB1[8], because in CAMP mode,
all the TLB0 entries will be invalidated after cpu1 brings up kernel, thus cpu0
can not access PIXIS_BASE anymore (any access will cause DataTLBError exception)

- Set CONFIG_SYS_DDR_TLB_START to 9 for MPC8572DS board.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2009-01-13 16:58:46 -06:00
Roy Zang
6d3a10f73e Change PCIE1&2 deciide logic on MPC8544DS board more readable
The IO port selection for MPC8544DS board:
 Port			cfg_io_ports
 PCIE1		0x2, 0x3, 0x4, 0x5, 0x6, 0x7
 PCIE2		0x4, 0x5, 0x6, 0x7
 PCIE3		0x6, 0x7
 This patch changes the PCIE12 and PCIE2 logic more readable.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2009-01-13 16:32:53 -06:00
Roy Zang
028e116811 PCIE2 and PCIE3 are decided by corresponing bit in devdisr instead of PCIE1 bit
PCIE2 and PCIE3 should be decided by corresponing bit in devdisr instead of
PCIE1 bit.
On MPC8572DS board, PCIE refers to PCIE1.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2009-01-13 16:32:52 -06:00
Roy Zang
9afc2ef030 Fix IO port selection issue on MPC8544DS and MPC8572DS boards
The IO port selection is not correct on MPC8572DS and MPC8544DS board.
 This patch fixes this issue.
 For MPC8572
 Port			cfg_io_ports
 PCIE1		0x2, 0x3, 0x7, 0xb, 0xc, 0xf
 PCIE2		0x3, 0x7
 PCIE3		0x7

For MPC8544
Port			cfg_io_ports
PCIE1		0x2, 0x3, 0x4, 0x5, 0x6, 0x7
PCIE2		0x4, 0x5, 0x6, 0x7
PCIE3		0x6, 0x7
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2009-01-13 16:32:52 -06:00
Becky Bruce
3e3fffe3ba mpc8610hpcd: Fix PCI mapping concepts
Rename _BASE to _BUS, as it's actually a PCI bus address,
separate virtual and physical addresses into _VIRT and _PHYS,
and use each appopriately.  This makes the code easier to read
and understand, and facilitates mapping changes going forward.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
2009-01-13 15:27:46 -06:00
Trent Piepho
a5d212a263 mpc8xxx: LCRR[CLKDIV] is sometimes five bits
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits
instead of four.

In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems.  It
should be safe as the fifth bit was defined as reserved and set to 0.

Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV.

Signed-off-by: Trent Piepho <tpiepho@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
2008-12-19 18:20:25 -06:00
Peter Tyser
9427ccde03 85xx: Add PORDEVSR_PCI1 define
Add define used to determine if PCI1 interface is in PCI or PCIX mode.

Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-12-04 03:15:43 -06:00
Peter Tyser
a2cd50ed6e 85xx: Add CPU 2 errata workaround to all 8548 boards
All mpc8548-based boards should implement the suggested workaround
to CPU 2 errata. Without the workaround, its possible for the
8548's core to hang while executing a msync or mbar 0 instruction
and a snoopable transaction from an I/O master tagged to make
quick forward progress is present.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2008-12-03 22:46:42 -06:00
Dave Liu
e57f0fa133 85xx: the DDR tlb is missed for the !CONFIG_SPD_EEPROM case
we need TLB entry for DDR at !SPD case.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2008-12-03 22:46:05 -06:00
Dave Liu
9b0ad1b1c7 85xx: remove the unused ddr_enable_ecc in the board file
The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2008-12-03 22:44:48 -06:00
Selvamuthukumar
9b827cf172 Align end of bss by 4 bytes
Most of the bss initialization loop increments 4 bytes
at a time. And the loop end is checked for an 'equal'
condition. Make the bss end address aligned by 4, so
that the loop will end as expected.

Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-11-18 23:13:16 +01:00
Becky Bruce
3f510db522 mpc8641: fix address-cells default in old .dts detection
address-cells defaults to 2, not 1; so in the unlikely
event that it isn't specified, this patch is required
for correct operation.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-11 09:44:10 -06:00
Becky Bruce
d52082b12c mpc8641: Try to detect old .dts files
Since we've changed the memory map of the board, be nice and
add some checking to try to catch out-of-date .dts files.  We do
this by checking the CCSRBAR location in the .dts and comparing
it to the CCSRBAR location in u-boot.  If they don't match, a
warning msg is printed.  This isn't foolproof, but it's simple and
will catch most of the cases where an out-of-date .dts is present,
including all of the cases where a new u-boot is used with an old
standard MPC8641 .dts file as supplied with Linux.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-10 10:10:05 -06:00
Becky Bruce
3111d32c49 mpc8641: Support 36-bit physical addressing
This patch creates a memory map with all the devices
in 36-bit physical space, in addition to the 32-bit map.
The CCSR relocation is moved (again, sorry) to
allow for the physical address to be 36 bits - this
requires translation to be enabled.  With 36-bit physical
addressing enabled, we are no longer running with VA=PA
translations.  This means we have to distinguish between
the two in the config file.  The existing region name is
used to indicate the virtual address, and a _PHYS variety
is created to represent the physical address.

Large physical addressing is not enabled by default.
Set CONFIG_PHYS_64BIT in the config file to turn this on.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-10 10:10:05 -06:00
Becky Bruce
c759a01a00 mpc8641: Change 32-bit memory map
The memory map on the 8641hpcn is modified to look more like
the 85xx boards; this is a step towards a more standardized
layout going forward. As part of this change, we now relocate
the flash.

The regions for some of the mappings were far larger than they
needed to be.  I have reduced the mappings to match the
actual sizes supported by the hardware.

In addition I have removed the comments at the head
of the BAT blocks in the config file, rather than updating
them.  These get horribly out of date, and it's a simple
matter to look at the defines to see what they are set to
since everything is right here in the same file.

Documentation has been changed to reflect the new map, as this
change is user visible, and affects the OS which runs post-uboot.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-10 10:10:04 -06:00
Becky Bruce
170deacb1d mpc8641: Drop imaginary second flash bank, map 8MB
There's a lot of setup and foo for the second flash
bank.  The problem is, this board doesn't actually have one.
Clean this up.  Also, the flash is 8M in size.  Get rid
of the confusing aliased overmapping, and just map 8M.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-10 10:10:03 -06:00
Jon Loeliger
33211469f7 Merge commit 'wd/master' 2008-11-10 10:04:51 -06:00
Wolfgang Denk
c06d9bbbeb Merge branch 'master' of git://git.denx.de/u-boot-coldfire 2008-11-09 00:01:42 +01:00
Becky Bruce
4c77de3f14 86xx: Make dram_size a phys_size_t
It's currently a long and should be phys_size_t.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-03 11:05:01 -06:00
Becky Bruce
af5d100e8d mpc8641: Make PCI and RIO mutually exclusive, fix non-PCI build
You can't actually have both, and with some coming changes to
change the memory map for the board and support 36-bit physical,
we need the extra BAT that is being consumed by having both.

I also make non-PCI configs build cleanly, for the sake of sanity.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-03 11:04:59 -06:00
Becky Bruce
98693b85d4 mpc8641: Stop supporting non-PCI_PNP configs
We don't actually ever do this, remove the code so we
can stop maintaining it.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-03 11:04:59 -06:00
TsiChung Liew
e4f69d1bd2 ColdFire: Fix M5329EVB and M5373EVB nand issue
Fix compilation issue caused by a few mismatches.
Provide proper nand chip select enable/disable in
nand_hwcontrol() rather than in board_nand_init()
just enable once. Remove redundant local nand driver
functions - nand_read_byte(), nand_write_byte() and
nand_dev_ready() to use common nand driver.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-11-03 09:45:59 -07:00
TsiChung Liew
536e7dac16 ColdFire: Add MCF5301x CPU and M53017EVB support
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-11-03 09:45:58 -07:00
TsiChung Liew
a21d0c2cc9 ColdFire: Add SBF support for M52277EVB
Add serial boot support

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-11-03 09:45:58 -07:00
TsiChung Liew
b202816c61 ColdFire: Use CFI driver for M5272C3
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-11-03 09:45:58 -07:00
TsiChung Liew
6e80f5aa09 ColdFire: Remove platforms mii.c file
Will use mcfmii.c driver in drivers/net rather than
keep creating new mii.c for each future platform.
Remove EB+MCF-EV123, cobra5272, idmr, M5235EVB,
M5271EVB, M5272C3, M5275EVB, M5282EVB, M5329EVB,
M5373EVB, M54451EVB, M54455EVB, M547xEVB, and M548xEVB's
mii.c

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-11-03 09:45:58 -07:00
TsiChung Liew
ac2331aee9 ColdFire: Remove linker file
Each different build for M54455EVB and M5235EVB will
create a u-boot.lds linker file. It is redundant to
keep the u-boot.lds

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-11-03 09:45:58 -07:00
Wolfgang Denk
3cbd823116 Coding Style cleanup, update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-11-02 16:14:22 +01:00
Jason Jin
c57fc28947 NAND: Add NAND support for MPC8536DS board
This patch defines 1M TLB&LAW size for NAND on MPC8536DS, assigns 0xffa00000
for CONFIG_SYS_NAND_BASE and adds other NAND supports in config file.
It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image.

Singed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-10-31 13:14:31 -05:00
Wolfgang Denk
a7faab9d11 Merge branch 'master' of git://git.denx.de/u-boot-mpc86xx 2008-10-30 20:57:46 +01:00
Dave Liu
5ba1ef5074 86xx: remove the second DDR LAW setting for mpc8641hpcn
The DDR1 LAW will precedence the DDR2 LAW, so remove
the second DDR LAW.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
2008-10-30 10:30:18 -05:00
Dave Liu
137a2dfd11 86xx: remove the unused ddr_enable_ecc in the board file
The DDR controller of 86xx processors have the ECC data init
feature, and the new DDR code is using the feature, we don't
need the way with DMA to init memory again.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Kumar Gala <kumar.gala@freescale.com>
2008-10-30 10:27:44 -05:00
Haiying Wang
c013b74975 NAND: Add support for MPC8572DS board
This patch defines 1M TLB&LAW size for NAND on MPC8572DS, assigns
0xffa00000 for CONFIG_SYS_NAND_BASE and adds other NAND supports in
config file.

It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image, to
make room for the increased code size with NAND enabled.

Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-10-29 13:08:17 -05:00
Haiying Wang
4e190b03aa Make Freescale local bus registers available for both 83xx and 85xx.
- Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
  can be shared by both 83xx and 85xx
- Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
  files which use lbus83xx_t.
- Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
  85xx can share them.

Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-10-29 11:12:53 -05:00
Kumar Gala
c2083e0e11 86xx: Convert all fsl_pci_init users to new APIs
Converted MPC8610HCPD, MPC8641HPCN, and SBC8641D to use
fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup().

With these changes the board code is a bit smaller and we get dma-ranges
set in the device tree for these boards.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
2008-10-24 17:35:48 -05:00
Kumar Gala
2dba0dea98 85xx: Convert all fsl_pci_init users to new APIs
Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS,
MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows()
and ft_fsl_pci_setup().

With these changes the board code is a bit smaller and we get dma-ranges
set in the device tree for these boards.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
2008-10-24 17:35:12 -05:00
Anton Vorontsov
3bf1be3c0c mpc83xx: add support for switching between USB Host/Function for MPC837XEMDS
With this patch u-boot can fixup the dr_mode and phy_type properties
for the Dual-Role USB controller.

While at it, also remove #ifdefs around includes, they are not needed.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-10-21 18:40:01 -05:00
Anton Vorontsov
00f7bbae92 mpc83xx: fix PCI scan hang on the standalone MPC837xE-MDS boards
The MPC837xE-MDS board's CPLD can auto-detect if the board is on the PIB,
standalone or acting as a PCI agent. User's Guide says:

- When the CPLD recognizes its location on the PIB it automatically
  configures RCW to the PCI Host.
- If the CPLD fails to recognize its location then it is automatically
  configured as an Agent and the PCI is configured to an external arbiter.

This sounds good. Though in the standalone setup the CPLD sets PCI_HOST
flag (it's ok, we can't act as PCI agents since we receive CLKIN, not
PCICLK), but the CPLD doesn't set the ARBITER_ENABLE flag, and without
any arbiter bad things will happen (here the board hangs during any config
space reads).

In this situation we must disable the PCI. And in case of anybody really
want to use an external arbiter, we provide "pci_external_aribter"
environment variable.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-10-21 18:34:14 -05:00
Anton Vorontsov
1da83a63d8 mpc83xx: add SGMII riser module support for the MPC8378E-MDS boards
This involves configuring the SerDes and fixing up the flags and
PHY addresses for the TSECs.

For Linux we also fix up the device tree.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-10-21 18:34:08 -05:00
Anton Vorontsov
55c531984d mpc83xx: fix serdes setup for the MPC8378E boards
MPC837xE specs says that SerDes1 has:

— Two lanes running x1 SGMII at 1.25 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.

And for SerDes2:

— Two lanes running x1 PCI Express at 2.5 Gbps;
— One lane running x2 PCI Express at 2.5 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.

The spec also explicitly states that PEX options are not valid for
the SD1.

Nevertheless MPC8378 RDB and MDS boards configure the SD1 for PEX,
which is wrong to do.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-10-21 18:33:25 -05:00
Anton Vorontsov
5c2ff323a9 mpc83xx: mpc8360emds: rework LBC SDRAM setup
Currently 64M of LBC SDRAM are mapped at 0xF0000000 which makes
it difficult to use (b/c then the memory is discontinuous and
there is quite big memory hole between the DDR/SDRAM regions).

This patch reworks LBC SDRAM setup so that now we dynamically
place the LBC SDRAM near the DDR (or at 0x0 if there isn't any
DDR memory).

With this patch we're able to:

- Boot without external DDR memory;
- Use most "DDR + SDRAM" setups without need to support for
  sparse/discontinuous memory model in the software.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-10-21 18:31:07 -05:00
Kumar Gala
1836881190 85xx: Fix compile warning in mpc8536ds.c
mpc8536ds.c: In function 'is_sata_supported':
mpc8536ds.c:615: warning: unused variable 'devdisr'

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-10-21 11:27:08 +02:00
Wolfgang Denk
8ed44d91c8 Cleanup: fix "MHz" spelling
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-10-21 11:25:39 +02:00
Jason Jin
2e26d837f1 Enabled the Freescale SGMII riser card on 8536DS
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2008-10-18 21:54:08 +02:00
Liu Yu
7e183cad0c Enabled the Freescale SGMII riser card on 8572DS
This patch based on Andy's work.
Including command 'pixis_set_sgmii' support.

Signed-off-by: Liu Yu <yu.liu@freescale.com>
2008-10-18 21:54:07 +02:00
Liu Yu
bff188baf9 Make pixis_set_sgmii more general to support MPC85xx boards.
The pixis sgmii command depend on the FPGA support on the board, some 85xx
boards support SGMII riser card but did not support this command, define
CONFIG_PIXIS_SGMII_CMD for those boards which support the sgmii command.

Not like 8544, 8572 has 4 eTsec so that the other two's pixis bits
are not supported by 8544. Therefor, define PIXIS_VSPEED2_MASK and
PIXIS_VCFGEN1_MASK in header file for both boards.

Signed-off-by: Liu Yu <yu.liu@freescale.com>
2008-10-18 21:54:07 +02:00
Ed Swarthout
86be510f7b mpc8572 additional end-point mode
mpc8572 supports all pcie controllers as end-points with cfg_host_agent=0.
Include host_agent == 0 decode for end-point determination.

This is not needed for the ds reference board since pcie3 will be a host
in order to connect to the uli chip.  Include it here as a reference for
other mpc8572 boards.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2008-10-18 21:54:05 +02:00
Ed Swarthout
f7fecc3e25 pixis do not print long help if not configured
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2008-10-18 21:54:05 +02:00
Haiying Wang
c21617fd26 Add DDR options setting on MPC8641HPCN board
* Add board specific parameter table to choose correct cpo, clk_adjust,
write_data_delay based on board ddr frequency and n_ranks.

* Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2008-10-18 21:54:05 +02:00
Haiying Wang
4ca06607d6 Add ddr interleaving suppport for MPC8572DS board
* Add board specific parameter table to choose correct cpo, clk_adjust,
write_data_delay, 2T based on board ddr frequency and n_ranks.

* Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#.

* Set memory controller interleaving mode to bank interleaving, and disable
bank(chip select) interleaving mode by default, because the default on-board
DDR DIMMs are 2x512MB single-rank.

* Change CONFIG_ICS307_REFCLK_HZ from 33333333 to 33333000.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2008-10-18 21:54:05 +02:00
Haiying Wang
dfb49108e4 Pass dimm parameters to populate populate controller options
Because some dimm parameters like n_ranks needs to be used with the board
frequency to choose the board parameters like clk_adjust etc. in the
board_specific_paramesters table of the board ddr file, we need to pass
the dimm parameters to the board file.

* move ddr dimm parameters header file from /cpu to /include directory.
* add ddr dimm parameters to populate board specific options.
* Fix fsl_ddr_board_options() for all the 8xxx boards which call this function.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2008-10-18 21:54:04 +02:00
Kumar Gala
7c0d4a7508 85xx: Improve flash remapping on MPC8572DS & MPC8536DS
Changing the flash from cacheable to cache-inhibited was taking a significant
amount of time due to the fact that we were iterating over the full 256M of
flash.  Instead we can just flush the L1 d-cache and invalidate the i-cache.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-10-18 21:54:04 +02:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Heiko Schocher
374b903829 Fix compiler warning in lib_ppc/board.c
Fix compiler warning introduced by commit 0f8cbc18

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-10-15 10:38:14 +02:00
Jason Jin
0f8cbc1829 Do not init SATA when disabled on 8536DS.
SGMII and SATA share the serdes on MPC8536 CPU, When SATA disabled and the
driver still try to access the SATA registers, the cpu will hangup.
This patch try to fix this by reading the serdes status before the SATA
initialize.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2008-10-14 17:57:27 +02:00
Nikita V. Youshchenko
ec4d8c1c1d fsl_diu: fix alignment error that caused malloc corruption
When aligning malloc()ed screen_base, invalid offset was added.
This not only caused misaligned result (which did not cause hardware
misbehaviour), but - worse - caused screen_base + smem_len to
be out of malloc()ed space, which in turn caused breakage of
futher malloc()/free() operation.

This patch fixes screen_base alignment.

Also this patch makes memset() that cleans framebuffer to be executed
on first initialization of diu, not only on re-initialization. It looks
correct to clean the framebuffer instead of displaying random garbage;
I believe that was disabled only because that memset caused breakage
of malloc/free described above - which no longer happens with the fix
described above.

Signed-off-by: Nikita V. Youshchenko <yoush@debian.org>
2008-10-14 15:29:37 +02:00
Wolfgang Denk
1f7bab0832 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2008-10-12 23:12:44 +02:00
Rafal Czubak
e46c7bfb8b FSL: Fix get_cpu_board_revision() return value.
get_cpu_board_revision() returned board revision based on information stored
in global static struct eeprom. It should instead use one from local struct
board_eeprom, to which the data is actually read from EEPROM. The bug led to
system hang after printing L1 cache information on U-Boot startup. The problem
was observed on MPC8555CDS system and possibly affects other Freescale MPC85xx
boards using CFG_I2C_EEPROM_CCID.

The change has been successfully tested on MPC8555CDS system.

Signed-off-by: Rafal Czubak <rcz@semihalf.com>
2008-10-08 13:19:12 -05:00
Anton Vorontsov
d26154c9a6 mpc83xx: spd_sdram: fix ddr sdram base address assignment bug
The spd_dram code shifts the base address, then masks 20 bits, but
forgets to shift the base address back. Fix this by just masking the
base address correctly.

Found this bug while trying to relocate a DDR memory at the base != 0.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-09-24 09:58:33 -05:00
Jean-Christophe PLAGNIOL-VILLARD
0e8d158664 rename CFG_ENV macros to CONFIG_ENV
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:06 +02:00
Jean-Christophe PLAGNIOL-VILLARD
5a1aceb068 rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASH
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:04 +02:00
Jean-Christophe PLAGNIOL-VILLARD
0cf4fd3cf8 rename environment.c in env_embedded.c to reflect is functionality
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:01 +02:00
Timur Tabi
e8d18541c6 Update Freescale 85xx boards to sys_eeprom.c
The new sys_eeprom.c supports both the old CCID EEPROM format and the new NXID
format, and so it obsoletes board/freescale/common/cds_eeprom.c.  Freescale
86xx boards already use sys_eeprom.c, so this patch migrates the remaining
Freescale 85xx boards to use it as well.  cds_eeprom.c is deleted.

Signed-off-by: Timur Tabi <timur@freescale.com>
2008-09-09 10:13:35 +02:00
Ben Warren
10efa024b8 Moved initialization of EEPRO100 Ethernet controller to board_eth_init()
Affected boards:
	db64360
	db64460
	katmai
	taihu
	taishan
	yucca
	cpc45
	cpu87
	eXalion
	elppc
	debris
	kvme080
	mpc8315erdb
	integratorap
	ixdp425
	oxc
	pm826
	pm828
	pm854
	pm856
	ppmc7xx
	sc3
	sc520_spunk
	sorcery
	tqm8272
	tqm85xx
	utx8245

Removed initialization of the driver from net/eth.c
Also, wrapped contents of pci_eth_init() by CONFIG_PCI.

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:19 -07:00
Ben Warren
ccdd12f83e Moved initialization of TSI108 Ethernet controller to board_eth_init()
Affected boards:
	mpc7448hpc2

Removed initialization of the driver from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:16 -07:00
Ben Warren
0b252f50ae Moved initialization of RTL8139 Ethernet controller to board_eth_init()
Affected boards:
	hidden_dragon
	MPC8544DS
	MPC8610HPCN
	R2DPLUS
	TB0229

Removed initialization of the driver from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:16 -07:00
Ben Warren
89973f8a82 Introduce netdev.h header file and remove externs
This addresses all drivers whose initializers have already
been moved to board_eth_init()/cpu_eth_init().

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:16 -07:00
Andy Fleming
5a8a163ac3 Add pixis_set_sgmii command
The 8544DS and 8572DS platforms support an optional SGMII riser card to
expose ethernet over an SGMII interface.  Once the card is in, it is also
necessary to configure the board such that it uses the card, rather than
the on-board ethernet ports.  This can either be done by flipping dip switches
on the motherboard, or by modifying registers in the pixis.  Either way
requires a reboot.

This adds a command to allow users to choose which ports are routed through
the SGMII card, and which through the onboard ports.  It also allows users
to revert to the current switch settings.

This code does not work on the 8572, as the PIXIS is different.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:15 -07:00
Andy Fleming
216f2a7156 Add SGMII support for the 8544 DS
The 8544 DS has an optional SGMII Riser card, which uses different PHY
addresses.  Check if we are in SGMII mode, and invoke the SGMII Riser
setup code if so.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:15 -07:00
Andy Fleming
652f7c2eef Add support for Freescale SGMII Riser Card
The 8544DS and 8572DS systems have an optional SGMII riser card which
exposes new ethernet ports which are connected to the eTSECs via an
SGMII interface.  The SGMII PHYs for this board are offset from the standard
PHY addresses, so this code modifies the passed in tsec_info structure to
use the SGMII PHYs on the card, instead.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:15 -07:00
TsiChung Liew
f78ced3028 ColdFire: Multiple fixes for MCF5445x platforms
Add FEC pin set and mii reset in __mii_init(). Change
legacy flash vendor from 2 to AMD LEGACY (0xFFF0),
change cfi_offset to 0, and change CFG_FLASH_CFI to
CONFIG_FLASH_CFI_LEGACY. Correct M54451EVB and
M54455EVB env settings in configuration file.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-28 09:16:54 -06:00
Wolfgang Denk
0ba6bfef06 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2008-08-28 00:26:52 +02:00
Kumar Gala
9490a7f1a9 mpc85xx: Add support for the MPC8536DS reference board
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Dejan Minic <minic@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:54 -05:00
Kumar Gala
129ba616b3 mpc85xx: Add support for the MPC8572DS reference board
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:53 -05:00
Kumar Gala
1167a2fd56 FSL DDR: Convert MPC8544DS to new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:50 -05:00
Jon Loeliger
e6f5b35b41 FSL DDR: Convert MPC8568MDS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:50 -05:00
Jon Loeliger
e31d2c1e2b FSL DDR: Convert MPC8548CDS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:50 -05:00
Jon Loeliger
aa11d85cf3 FSL DDR: Convert MPC8541CDS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:50 -05:00
Jon Loeliger
2b40edb10d FSL DDR: Convert MPC8555ADS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:49 -05:00
Jon Loeliger
8b625114e8 FSL DDR: Convert MPC8560ADS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:49 -05:00
Kumar Gala
9617c8d49a FSL DDR: Convert MPC8540ADS to new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:48 -05:00
Ben Warren
65d3d99c28 Moved initialization of ULI526X Ethernet driver to board code.
The only board using this driver is the Freescale MPC8610HPCD board.
Removed initialization for the driver from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-26 22:17:45 -07:00
Jon Loeliger
39aa1a7348 FSL DDR: Convert MPC8610HPCD to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:06:03 +02:00
Kumar Gala
6a8e569293 FSL DDR: Convert MPC8641HPCN to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:06:02 +02:00
Randy Vinson
20220d22b9 mpc7448hpc2: Fix PCI I/O space mapping.
PCI I/O space is currently mapped 1:1 at 0xFA000000. Linux requires
PCI I/O space to start at 0 on the PCI bus. This patch maps PCI I/O
space such that 0xFA000000 in the processor's address space maps to 0
on the PCI I/O bus.

Signed-off-by Randy Vinson <rvinson@mvista.com>
Acked-by: Roy Zang <tie-fei.zang@freescale.com>
2008-08-26 23:23:49 +02:00
Ira W. Snyder
447ad5768a MPC8349EMDS: Add PCI Agent (PCISLAVE) support
Add the ability for the MPC8349EMDS to run in PCI Agent mode, acting as a
PCI card rather than a host computer.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-08-25 17:04:36 -05:00
Ira W. Snyder
162338e1fc MPC8349EMDS: use 83XX_GENERIC_PCI setup code
Change the MPC8349EMDS board to use the generic PCI initialization code
for the mpc83xx cpu.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-08-25 17:04:24 -05:00
Kim Phillips
ce0eb70333 Merge branch 'next' 2008-08-25 17:02:10 -05:00
Kumar Gala
fcd69a1a57 Clean up usage of icache_disable/dcache_disable
There is no point in disabling the icache on 7xx/74xx/86xx parts and not
also flushing the icache.  All callers of invalidate_l1_instruction_cache()
call icache_disable() right after.  Make it so icache_disable() calls
invalidate_l1_instruction_cache() for us.

Also, dcache_disable() already calls dcache_flush() so there is no point
in the explicit calls of dcache_flush().

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-19 00:57:28 +02:00
TsiChung Liew
4cb4e654ca ColdFire: Multiple fixes for M5282EVB
Incorrect CFG_HZ value, change 1000000 to 1000.
Rename #waring to #warning. RAMBAR1 uses twice
in start.S, rename the later to FLASHBAR. Insert
nop for DRAM setup. And, env_offset in linker file.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:31:56 -06:00
TsiChung Liew
10db3a17a2 ColdFire: Move m5282evb from board to board/freescale
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:31:56 -06:00
TsiChung Liew
56df091d39 ColdFire: Move m5272c3 from board to board/freescale
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:31:56 -06:00
TsiChung Liew
659e9bad62 ColdFire: Move m5271evb from board to board/freescale
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:31:56 -06:00
TsiChung Liew
05316f8ece ColdFire: Add M54451EVB platform support for MCF5445x
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:31:56 -06:00
TsiChung Liew
9f75155145 ColdFire: Implement SBF feature for M5445EVB
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:31:55 -06:00
TsiChung Liew
b2d022d1ac ColdFire: Use CFI Flash driver for M54455EVB
Remove non-common flash driver in
board/freescale/m54455evb/flash.c. The non-cfi flash will
use CONFIG_FLASH_CFI_LEGACY to configure the flash
attribute.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:30:10 -06:00
TsiChung Liew
6d33c6acfa ColdFire: Add M5253DEMO platform support for MCF5253
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:30:10 -06:00
TsiChung Liew
d361307e73 ColdFire: Fix M5253EVB dram bring up issue
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:30:10 -06:00
Wolfgang Denk
28ac671910 Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2008-08-14 11:26:22 +02:00
Scott Wood
f64cb652a8 m5373evb: Update NAND driver to new API.
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-13 17:53:48 -05:00
Jean-Christophe PLAGNIOL-VILLARD
f5acb9fd9b mx31: move freescale's mx31 boards to vendor board dir
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-13 01:40:09 +02:00
Scott Wood
e4c0950854 NAND boot: MPC8313ERDB support
Note that with older board revisions, NAND boot may only work after a
power-on reset, and not after a warm reset.  I don't have a newer board
to test on; if you have a board with a 33MHz crystal, please let me know
if it works after a warm reset.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:31 -05:00
William Juul
cfa460adfd Update MTD to that of Linux 2.6.22.1
A lot changed in the Linux MTD code, since it was last ported from
Linux to U-Boot. This patch takes U-Boot NAND support to the level
of Linux 2.6.22.1 and will enable support for very large NAND devices
(4KB pages) and ease the compatibility between U-Boot and Linux
filesystems.

This patch is tested on two custom boards with PPC and ARM
processors running YAFFS in U-Boot and Linux using gcc-4.1.2
cross compilers.

MAKEALL ppc/arm has some issues:
 * DOC/OneNand/nand_spl is not building (I have not tried porting
   these parts, and since I do not have any HW and I am not familiar
   with this code/HW I think its best left to someone else.)

Except for the issues mentioned above, I have ported all drivers
necessary to run MAKEALL ppc/arm without errors and warnings. Many
drivers were trivial to port, but some were not so trivial. The
following drivers must be examined carefully and maybe rewritten to
some degree:
 cpu/ppc4xx/ndfc.c
 cpu/arm926ejs/davinci/nand.c
 board/delta/nand.c
 board/zylonite/nand.c

Signed-off-by: William Juul <william.juul@tandberg.com>
Signed-off-by: Stig Olsen <stig.olsen@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:15 -05:00
Kumar Gala
c11528083e mpc85xx: workaround old binutils bug
The recent change to move the .bss outside of the image gives older
binutils (ld from eldk4.1/binutils-2.16) some headache:

ppc_85xx-ld: u-boot: Not enough room for program headers (allocated 3, need 4)
ppc_85xx-ld: final link failed: Bad value

We workaround it by being explicit about the program headers and not
assigning the .bss to a program header.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-10 22:41:12 +02:00
TsiChung Liew
35d3bd3cc3 Fix compilation error for MCF5275
Rename OBJ to COBJ in board/platform/Makefile

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-01 12:33:59 +02:00
Kumar Gala
f0ff885ca6 mpc85xx: Update linker scripts for Freescale boards
* Move to using absolute addressing always.  Makes the scripts a bit more
  portable and common
* Moved .bss after the end of the image.  These allows us to have more
  room in the resulting binary image for code and data.
* Removed .text object files that aren't really needed
* Make sure _end is 4-byte aligned as the .bss init code expects this.
  (Its possible that the end of .bss isn't 4-byte aligned)

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-31 11:33:23 +02:00
Anton Vorontsov
021f6df6e9 83xx: mpc8315erdb: fix silly thinko in fdt_tsec1_fixup
The thinko was quite silly indeed, I messed with !ptr. Normally this
would trigger some fault, but in U-Boot NULL pointer is equal to phys
0, so the code was working still, just didn't actually test mpc8315erdb
environment variable value. Heh.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-07-16 14:16:44 -05:00
Anton Vorontsov
25f5f0d49a 83xx: mpc8315erdb: add support for switching between ULPI/UTMI USB PHYs
Freescale ships MPC8315E-RDB boards either with TSEC1 and USB UTMI
support, or without TSEC1 but with USB ULPI PHY support in addition.
With this patch user can specify desired USB PHY.

Also, it seems that we can't distinguish the two boards in software, so
user have to set `mpc8315erdb' environment variable to either 'tsec1'
(TSEC1 enabled) or `ulpi' (board with ULPI PHY, TSEC1 disabled), so that
Linux will not probe for TSEC1.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-07-16 14:16:44 -05:00
Wolfgang Denk
699f051255 Prepare v1.3.4-rc1: Code cleanup, update CHANGELOG, sort Makefile
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-15 22:22:44 +02:00
Wolfgang Denk
508548371e Merge branch 'master' of git://git.denx.de/u-boot-mpc86xx 2008-07-15 21:39:07 +02:00
Timur Tabi
e2d31fb345 Update Freescale sys_eeprom.c to handle CCID formats
Update the sys_eeprom.c file to handle both NXID and CCID EEPROM formats.  The
NXID format replaces the older CCID format, but it's important to support both
since most boards out there still use the CCID format.  This change is in
preparation for using one file to handle both formats.  This will also unify
EEPROM support for all Freescale 85xx and 86xx boards.

Also update the 86xx board header files to use the standard CFG_I2C_EEPROM_ADDR
instead of ID_EEPROM_ADDR.

Signed-off-by: Timur Tabi <timur@freescale.com>
2008-07-15 10:59:27 -05:00
Kumar Gala
630d9bfcb5 MPC8544DS: Add ATI Video card support
Add support for using a PCIe ATI Video card on PCIe2.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14 20:21:11 -05:00
Kumar Gala
e5852787f0 MPC8544DS: Report board id, board version and fpga version.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14 20:15:22 -05:00
Andy Fleming
ab5cda9f88 Remove LBC_CACHE_BASE from 8544 DS
The 8544 DS doesn't have any cacheable Local Bus memories set up.  By mapping
space for some anyway, we were allowing speculative loads into unmapped space,
which would cause an exception (annoying, even if ultimately harmless).
Removing LBC_CACHE_BASE, and using LBC_NONCACHE_BASE for the LBC LAW solves the
problem.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-07-14 11:21:33 -05:00
Wolfgang Denk
0740ac26f4 Merge branch 'master' of git://git.denx.de/u-boot-coldfire 2008-07-13 14:44:04 +02:00
Wolfgang Denk
bde6358762 Fix some more printf() format issues.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-11 22:56:11 +02:00
Wolfgang Denk
184f1b404a Fixed some out-of-tree build issues
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-11 22:55:31 +02:00
TsiChung Liew
ab4860b255 ColdFire: Fix power up issue for MCF5235
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-11 10:45:58 -06:00
Wolfgang Denk
9b55a25369 Fix some more print() format errors.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-11 01:16:00 +02:00
Jon Loeliger
859f24350e Merge commit 'wd/master' 2008-07-10 12:05:32 -05:00
Matvejchikov Ilya
0e6989b9fa FDT memory and pci node fixes for MPC8260ADS
Signed-off-by: Matvejchikov Ilya <matvejchikov@gmail.com>
2008-07-09 23:57:59 +02:00
Wolfgang Denk
c8a3b109f0 Cleanup out-or-tree building for some boards (.depend)
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-02 23:49:18 +02:00
Wolfgang Denk
a30cc5a340 Cleanup: fix out-of-tree building for some boards
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-02 23:38:50 +02:00
Wolfgang Denk
461fa68d20 Cleanup: replace hard-wired $(AR) 'crv' settings by $(ARFLAGS)
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-02 23:00:14 +02:00
Ben Warren
f8cc312bbe Move conditional compilation of MPC8XXX SPI driver to Makefile
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-07-01 21:02:11 +02:00
Wolfgang Grandegger
b4fe1a7109 MPC8360ERDK: adapt NAND interface for the re-written FSL NAND UPM driver
This patch is based on the following patch sent a few minutes ago:
"NAND FSL UPM: driver re-write using the hwcontrol callback"
It is untested, of course. Anton, could you please give it a try.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-06-19 22:54:45 +02:00
Kumar Gala
a036b04436 MPC8610HPCD: Report board id, board version and fpga version.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-19 08:32:18 -05:00
Kumar Gala
7de8c21f14 MPC8641HPCN: Report board id, board version and fpga version.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-19 08:32:13 -05:00
Becky Bruce
9973e3c614 Change initdram() return type to phys_size_t
This patch changes the return type of initdram() from long int to phys_size_t.
This is required for a couple of reasons: long int limits the amount of dram
to 2GB, and u-boot in general is moving over to phys_size_t to represent the
size of physical memory.  phys_size_t is defined as an unsigned long on almost
all current platforms.

This patch *only* changes the return type of the initdram function (in
include/common.h, as well as in each board's implementation of initdram).  It
does not actually modify the code inside the function on any of the platforms;
platforms which wish to support more than 2GB of DRAM will need to modify
their initdram() function code.

Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc
MPC8641HPCN.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-12 08:50:18 +02:00
Wolfgang Denk
cdeb62e20d Merge branch 'master' of git://www.denx.de/git/u-boot-fdt 2008-06-11 22:30:47 +02:00
Wolfgang Denk
5ea67393b8 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx
Conflicts:

	include/asm-ppc/fsl_lbc.h

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-06-11 21:33:16 +02:00
Kumar Gala
859a86a25c 85xx/86xx: Move to dynamic mgmt of LAWs
With the new LAW interface (set_next_law) we can move to letting the
system allocate which LAWs are used for what purpose.  This makes life
a bit easier going forward with the new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-11 01:52:23 -05:00
Kumar Gala
ddde74a159 85xx: remove dummy board_early_init_f
A number of board ports have empty version of board_early_init_f
for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-11 00:36:02 -05:00
Kumar Gala
978e81604c 85xx: Remove unused and unconfigured memory test code.
Remove unused and unconfigured DDR test code from FSL 85xx boards.
Besides, other common code exists.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-11 00:35:52 -05:00
Gerald Van Baren
fec6d9ee7c Remove the deprecated CONFIG_OF_FLAT_TREE
Use CONFIG_OF_LIBFDT instead to support flattened device trees.  It is
cleaner, has better functionality, and is better supported.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2008-06-09 21:13:35 -04:00
Gerald Van Baren
589c04271d Convert mpc7448hpc2 to CONFIG_OF_LIBFDT
This was configured to use the deprecated CONFIG_OF_FLAT_TREE, change
to CONFIG_OF_LIBFDT.

WARNING: This conversion is untested because I do not have a board to
test it on.

NOTE: The FDT blob (DTS) must have an /aliases/ethernet0 and (optionally)
/aliases/ethernet1 property for the ethernet to work.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2008-06-09 21:13:24 -04:00
Jon Loeliger
1a247ba7fa Merge commit 'wd/master' 2008-06-06 10:48:31 -05:00
Haavard Skinnemoen
d255bb0e78 SPI API improvements
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.

Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
  * spi_cs_activate(): Activates the chipselect for a given slave
  * spi_cs_deactivate(): Deactivates the chipselect for a given slave
  * spi_cs_is_valid(): Determines if the given bus/chipselect
    combination can be activated.

Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)

To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.

Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.

spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.

This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.

I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.

But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?

Changed in v4:
  - Build fixes for various boards, drivers and commands
  - Provide common struct spi_slave definition that can be extended by
    drivers
  - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
  - Make default bus and mode build-time configurable
  - Override default SPI bus ID and mode on mx32ads and imx31_litekit.

Changed in v3:
  - Add opaque struct spi_slave for controller-specific data associated
    with a slave.
  - Add spi_claim_bus() and spi_release_bus()
  - Add spi_free_slave()
  - spi_setup() is now called spi_setup_slave() and returns a
    struct spi_slave
  - soft_spi now supports four SPI modes (CPOL|CPHA)
  - Add bus parameter to spi_setup_slave()
  - Convert the new i.MX32 SPI driver
  - Convert the new MC13783 RTC driver

Changed in v2:
  - Convert the mpc8xxx_spi driver and the mpc8349emds board to the
    new API.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
2008-06-03 20:28:50 +02:00
York Sun
a48ff68d23 Replace DPRINTF with debug
Remove DPRINTF macro and replace it with generic debug macro.

Signed-off-by: York Sun <yorksun@freescale.com>
2008-05-21 00:54:36 +02:00
York Sun
3b80c5f574 Move pixel clock setting to board file
The clock divider has different format in 5121 and 8610. This patch moves it to
board specific code.

Signed-off-by: York Sun <yorksun@freescale.com>
2008-05-21 00:54:36 +02:00
Wolfgang Denk
53677ef18e Big white-space cleanup.
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).

Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-21 00:14:08 +02:00
Jon Loeliger
2c289e320d mpc86xx: Removed unused and unconfigured memory test code.
Besides, other common code exists.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-05-19 09:47:25 -05:00
Andy Fleming
66f5fa9263 85xx: Limit CPU2 workaround to parts that have the errata
Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-05-07 16:54:31 -05:00
Kumar Gala
4d77f5102d MPC8610HPCD: Drop -O2 from the build flags
Make the flags use -Os like all other boards

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-05-03 20:49:10 +02:00
Kumar Gala
45239cf415 85xx/86xx: Rename ext_refrec to timing_cfg_3 to match docs
All the 85xx and 86xx UM describe the register as timing_cfg_3
not as ext_refrec.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-29 11:44:29 -05:00
Ed Swarthout
f97abbfb47 MPC8544DS: decode pcie3 end-point configuration correctly.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-26 00:25:30 +02:00
Jason Wessel
3d36be0300 Remove all the search paths from the .lds files.
The cross compiler is responsible for providing the correct libraries
and the logic to find the linking libraries.

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
2008-04-17 23:57:32 -07:00
Wolfgang Denk
1aeed8d71a Coding Style cleanup; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-13 09:59:26 -07:00
Dave Liu
5fb5a689d8 mpc83xx: Fix the bug of serdes initialization
Currently the serdes will not be initializated due to the
partid's error.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-04-11 17:46:18 -05:00
Jean-Christophe PLAGNIOL-VILLARD
1ac4f320bf mpc837xerdb: Fix warning: implicit declaration of function 'fdt_fixup_dr_usb'
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-04-11 17:46:17 -05:00
Wolfgang Denk
2c78febd11 Merge branch 'master' of git://www.denx.de/git/u-boot-coldfire 2008-04-08 00:10:17 +02:00
TsiChung Liew
bae61eefe1 ColdFire: Add dspi and serial flash support for MCF5445x
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
2008-03-31 15:10:29 -06:00
Matthew Fettke
545c8e0a7c ColdFire: Added M5275EVB support.
Signed-off-by: Matthew Fettke <mfettke@videon-central.com>
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
2008-03-31 15:10:11 -06:00
TsiChung Liew
77878f16ce ColdFire: Fix second memory Chipselect for M5475EVB
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
2008-03-31 15:17:10 -05:00
Michael Barkowski
5b2793a3f3 mpc8323erdb: fix EEPROM page size and get MAC from EEPROM
This patch fixes eeprom page size so that you can now write more than
64 bytes at a time.

It also makes the board take MAC addresses, if found, from EEPROM.

User should place up to 4 addresses at offset 0x7f00, for
eth{,1,2,3}addr.  Any unused addresses should be zero.  This group of
four six-byte values should have it's CRC at the end.  crc32 and
eeprom commands can be used to accomplish this.

If CRC fails, MAC addresses come from the environment.  If CRC
succeeds, the environment is overwritten at startup.

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 16:02:27 -05:00
Kim Phillips
e5c4ade4db mpc83xx: cleanup System Part and Revision ID Register (SPRIDR) code
in the spirit of commit 1ced121600,
85xx's "Update SVR numbers to expand support", simplify SPRIDR processing
and processor ID display.  Add REVID_{MAJ,MIN}OR macros to make
REVID dependent code simpler.  Also added PARTID_NO_E and IS_E_PROCESSOR
convenience macros.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 16:01:06 -05:00
Dave Liu
6f8c85e8d1 mpc83xx: initialize serdes for MPC837xEMDS boards
This patch is stolen from Anton Vorontsov's patch
for mpc837xerdb boards.

The reference clk and xcorevdd voltage of serdes1/2
is same between mpc837xemds and mpc837xerdb.

8377E: LYNX1- 2 SATA	LYNX2- 2 PCIE
8378E: LYNX1- 2 SGMII	LYNX2- 2 PCIE
8379E: LYNX1- 2 SATA	LYNX2- 2 SATA

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 14:11:51 -05:00
Jon Loeliger
25eedb2c19 FSL: Clean up board/freescale/common/Makefile
Each file that can be built here now follows some
CONFIG_ option so that they are appropriately built
or not, as needed.  And CONFIG_ defines were added
to various board config files to make sure that happens.

The other board/freescale/*/Makefiles no longer need
to reach up and over into ../common to build their
individually needed files any more.

Boards that are CDS specific were renamed with cds_ prefix.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-03-26 11:43:04 -05:00
Kumar Gala
f69766e4b5 85xx: Add the concept of CFG_CCSRBAR_PHYS
When we go to 36-bit physical addresses we need to keep the concept of
the physical CCSRBAR address seperate from the virtual one.

For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:03 -05:00
Anton Vorontsov
18e69a35ef 83xx/fdt_support: let user specifiy FSL USB Dual-Role controller role
Linux understands "host" (default), "peripheral" and "otg" (broken).
Though, U-Boot doesn't restrict dr_mode variable to these values (think
of renames in future).

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:19:39 -05:00
Anton Vorontsov
d47d49cc37 mpc83xx: MPC8360E-RDK: configure pario pins for AD7843 and FHCI
This patch adds qe pario pins configuration for AD7843 ADC/Touchscreen
controller and FHCI (QE USB).

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:47 -05:00
Anton Vorontsov
7ad9594909 mpc83xx: MPC8360E-RDK: add support for NAND
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:46 -05:00
Anton Vorontsov
2bd7460e92 83xx: initialize serdes for MPC837XRDB boards
On the MPC8377ERDB: 2 SATA and 2 PCI-E.
On the MPC8378ERDB: 2 PCI-E
On the MPC8379ERDB: 4 SATA

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:45 -05:00
Timur Tabi
89c7784ed9 83xx: Add Vitesse VSC7385 firmware uploading
Update the MPC8349E-mITX, MPC8313E-RDB, and MPC837XE-RDB board files to upload
the Vitesse VSC7385 firmware.  Changed CONFIG_VSC7385 to CONFIG_VSC7385_ENET.
Cleaned up the board header files to make selecting the VSC7385 easier to
control.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:16:43 -05:00
Jon Loeliger
aa3511e422 FSL: Move board/mpc8266ads under board/freescale
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-03-25 23:00:40 +01:00
Jon Loeliger
7f1d846e5c FSL: Move board/mpc7448hpc2 under board/freescale
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-03-25 23:00:36 +01:00
Jon Loeliger
b7e24d283e FSL: Move board/mpc8260ads under board/freescale
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-03-25 23:00:00 +01:00
Jon Loeliger
a30a549a35 Remove erroneous or extra spd.h #includers.
Many of the spd.h #includers don't need it,
and wanted to have spd_sdram() declared instead.
Since they didn't get that, some also had open
coded extern declarations of it instead or as well.
Fix it all up by using spd_sdram.h where needed.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-03-05 00:17:43 +01:00
Jon Loeliger
a551cee99a 86xx: Fix GUR PCI config registers properly.
Back in commit 975a083a5e where
I tried to "8610HPCD: Fix typos in two PCI setup registers", I
botched it due to not realizing that 8610 and 8641 had different
Global Utility Register defintions, one of which was like 85xx,
and the other wasn't.  Correct this problem by introducing two
symbols, one for each 86xx SoC, but neither of which is named
anything like 85xx.

My bad.  Lovely Wednesday with git bisect.  You know.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-02-20 14:45:09 -06:00
Jon Loeliger
975a083a5e 8610HPCD: Fix typos in two PCI setup registers.
The two symbols MPC86xx_PORDEVSR_IO_SEL and MPC86xx_PORBMSR_HA
were erroneously present as 85xx names and values, leftover from
the clone wars.  Fix this by removing the 85xx cruft from the
86xx codebase.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-02-19 12:31:08 -06:00
Jon Loeliger
13f5433f70 86xx: Convert sbc8641d to use libfdt.
This is the proper fix for a missing closing brace in the function
ft_cpu_setup() noticed by joe.hamman <at> embeddedspecialties.com.
The ft_cpu_setup() function in mpc8641hpcn.c should have been
removed earlier as it was under the obsolete CONFIG_OF_FLAT_TREE,
but was missed.  Only, the sbc8641d was nominally still using it.
It all got ripped out, and the funcality that was in ft_board_setup()
was refactored to remove the CPU portions into the new file
cpu/mpc86xx/fdt.c instead.  Make sbc8641d use this now.

Based loosely on an original patch from joe.hamman@embeddedspecialties.com

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-02-18 14:01:56 -06:00
Jon Loeliger
3f2ac8f928 86xx: Fix compilation warning in sys_eprom.c
sys_eeprom.c:82:9: warning: unknown escape sequence '\/'

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-02-14 13:58:53 -06:00
Becky Bruce
9cd32426f2 86xx: Remove old-style law setup code
This includes mpc8610hpcd, mpc8641hpcn, and sbc8641d.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-01-24 12:12:40 -06:00
Becky Bruce
031976f636 86xx: Convert mpc8610hpcd to new law setup method.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-01-24 12:12:33 -06:00
Becky Bruce
4933b91f8a 86xx: Support new law setup method and convert mpc8641
Adds the support code in cpu/mpc86xx for the new law setup code
recently created fsl_law.c, and changes the MPC8641HPCN config
to use this code.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-01-24 12:12:30 -06:00
Wolfgang Denk
e57ed96bac Merge branch 'master' of git://www.denx.de/git/u-boot-coldfire 2008-01-23 14:23:13 +01:00
Wolfgang Denk
ed3afca32e Merge branch 'master' of git://www.denx.de/git/u-boot-mpc86xx 2008-01-23 14:18:18 +01:00
Wolfgang Denk
39166b5c9e Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx 2008-01-23 13:56:55 +01:00
TsiChungLiew
1aee111135 ColdFire: MCF547x_8x - Add M547xEVB and M548xEVB board
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Signed-off by: John Rigby <jrigby@freescale.com>
2008-01-17 14:59:42 -06:00
TsiChungLiew
1552af70ec ColdFire: Add MCF5227x cpu and M52277EVB support-1
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Signed-off by: John Rigby <jrigby@freescale.com>
2008-01-17 14:59:41 -06:00
TsiChungLiew
1ac559d4aa ColdFire: Add M5373EVB platform support - 1
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Signed-off by: John Rigby <jrigby@freescale.com>
2008-01-17 14:59:40 -06:00
TsiChungLiew
320d61991f ColdFire: Update FlexBus CS for MCF532x
Definition update and change from 16bit to 32bit

Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Signed-off by: John Rigby <jrigby@freescale.com>
2008-01-17 14:59:40 -06:00
Kim Phillips
2956acd5ef codingstyle cleanup for spi driver
..and rm unused CONFIG_FSL_SPI define

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-17 14:01:59 -06:00
Haiying Wang
d59feffb42 FSL: Fix common EEPROM_data structure definition
- Fix EEPROM_data structure definition according to System EEPROM Data Format.
- Read MAC addresses from EEPROM to ethXaddr before saving ethXaddr to
  bd->bi_ethaddr.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2008-01-17 12:26:56 -06:00
Ben Warren
80ddd22626 Implement hard SPI driver on MPC8349EMDS
This patch implements the fsl_spi driver on the MPC8349EMDS evaluation board.
This board has an ST M25P40 4Mbit EEPROM on its SPI bus

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-17 11:02:33 -06:00
Kumar Gala
73aa9ac2b4 85xx: Convert MPC8568 MDS to new TLB setup
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-17 02:08:53 -06:00
Kumar Gala
0db37dc2ee 85xx: Convert MPC8541/MPC8555/MPC8548 CDS to new TLB setup
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-17 02:08:24 -06:00
Kumar Gala
219a81b98d 85xx: Convert MPC8540/MPC8560 ADS to new TLB setup
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-17 02:06:53 -06:00
Kumar Gala
0f7a3dc95c 85xx: Convert MPC8544 DS to new TLB setup
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-17 02:05:35 -06:00
Kumar Gala
c8c41d4a80 85xx: Use proper defines for PCI addresses
We should be using the _MEM_PHYS for LAW and TLB setup and not _MEM_BASE.
While _MEM_BASE & _MEM_PHYS are normally the same, _MEM_BASE should only
be used for configuring the PCI ATMU.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-16 23:21:56 -06:00
Kumar Gala
4d3521cc79 85xx: convert remaining 85xx boards over to use new LAW init code
Converted ATUM8548, MPC8568 MDS, MPC8540 EVAL, and TQM85xx boards over
to use new LAW init code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-16 23:21:56 -06:00
Kumar Gala
2cfaa1aa1a 85xx: convert MPC8541/MPC8555/MPC8548 CDS over to use new LAW init code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-16 23:21:55 -06:00
Kumar Gala
7232a2724c 85xx: convert MPC8540/MPC8560 ADS over to use new LAW init code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-16 23:21:55 -06:00
Kumar Gala
4bcae9c92a 85xx: convert MPC8544 DS over to use new LAW init code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-16 23:21:55 -06:00
Wolfgang Denk
4c9e98ace7 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc86xx 2008-01-16 22:06:51 +01:00
Kim Phillips
5e918a98c2 Add support for the MPC837xERDB
MPC837xERDB board support includes:
* DDR2 330MHz hardcoded (soldered on the board)
* Local Bus NOR Flash
* I2C, UART and RTC
* eTSEC RGMII (TSEC0 - RTL8211B with MII;
*	       TSEC1 - VSC7385 local bus, hardcoded, requires seperate firmware
*		       load)

Signed-off-by: Kevin Lam <kevin.lam@freescale.com>
Signed-off-by: Joe D'Abbraccio <joe.d'abbraccio@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-16 12:32:39 -06:00
James Yang
16c3cde050 FSL: Generalize PIXIS reset command parsing.
Before, the order of arguments to the pixis_reset
command needed to be supplied in a hard-coded order.
Generalize the command parsing to allow any order.

Signed-off-by: James Yang <james.yang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
2008-01-16 12:08:54 -06:00
Jon Loeliger
ad8f8687b7 FSL: Convert board/freescale/common/Makefile to use CONFIG_
Convert the board/freescale/common/Makefile to use
CONFIG_* options to select which files to conditionally
compile into the board/freescale/common library rather
than conditionally compiling entire files.

Now handles::
    CONFIG_FSL_PIXIS
    CONFIG_FSL_DIU_FB
    CONFIG_PQ_MDS_PIB

CONFIG_ID_EEPROM is introduced until CFG_ID_EEPROM is gone.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-01-16 12:05:05 -06:00
Kim Phillips
363eea9ff7 mpc83xx: clean up mpc8360emds.c warnings
mpc8360emds.c: In function 'ft_board_setup':
mpc8360emds.c:327: warning: assignment makes pointer from integer without a cast
mpc8360emds.c:329: warning: passing argument 2 of 'fdt_getprop' makes integer from pointer without a cast
mpc8360emds.c:334: warning: passing argument 2 of 'fdt_setprop' makes integer from pointer without a cast
mpc8360emds.c:341: warning: assignment makes pointer from integer without a cast
mpc8360emds.c:343: warning: passing argument 2 of 'fdt_getprop' makes integer from pointer without a cast
mpc8360emds.c:348: warning: passing argument 2 of 'fdt_setprop' makes integer from pointer without a cast

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-16 12:00:50 -06:00
Kim Phillips
f09880ea72 mpc83xx: fix phy-connection-type fixup code
use tree passed to us in local blob, not global fdt.

Also use fdt_path_offset to convert to relative offset, since absolute
reference is needed to check for rgmii-id mode string value.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-16 12:00:50 -06:00
Kumar Gala
2b4c952be7 mpc83xx: fix mpc8313/mpc8315/mpc8349itx Makefiles for silent build (with -s)
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-16 12:00:50 -06:00
Dave Liu
8bd522ce4a mpc83xx: Add the support for MPC8315ERDB board
The features list:
- Boot from NOR Flash
- DDR2 266MHz hardcoded configuration
- Local bus NOR Flash R/W operation
- I2C, UART, MII and RTC
- eTSEC0/1 support
- PCI host

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-16 12:00:49 -06:00
Wolfgang Denk
89967841e3 MPC8544DS: fix board Makefile for silent build (with -s)
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-01-13 19:57:08 +01:00
Wolfgang Denk
64134f0112 Fix linker scripts: add NOLOAD atribute to .bss/.sbss sections
With recent toolchain versions, some boards would not build because
or errors like this one (here for ocotea board when building with
ELDK 4.2 beta):
ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab]

For many boards, the .bss section is big enough that it wraps around
at the end of the address space (0xFFFFFFFF), so the problem will not
be visible unless you use a 64 bit tool chain for development. On
some boards however, changes to the code size (due to different
optimizations) we bail out with section overlaps like above.

The fix is to add the NOLOAD attribute to the .bss and .sbss
sections, telling the linker that .bss does not consume any space in
the image.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-01-12 20:31:39 +01:00
Wolfgang Denk
14c14db193 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xx 2008-01-12 00:04:01 +01:00
Anton Vorontsov
fab6f556bb mpc83xx: add support for the MPC8360E-RDK
This is MPC8360E based board with:
- 256MB fixed SDRAM;
- 8MB Intel Strata NOR flash;
- StMICRO 64MiB NAND flash;
- two 10/100/1000 ethernet ports connected via Broadcom
  BCM5481 PHYs;
- two 10/100 ethernet ports connected via National
  DP83848 PHYs;
- one PCI and one miniPCI slots;
- four serial ports (two NS16550-compatible, two UCCs);
- four USB ports working through MPC8360E "FHCI" USB controller;
- Fujitsu MB86277 graphics controller;
- Analog to Digital Converter/Touchscreen controller, AD7843
  connected to SPI.

Features not supported in this patch are:
- StMICRO 64MiB NAND flash (patch sent);
- MINT framebuffer initialization (patch is pending);
- Fetching production information from the EEPROM via I2C;
- FHCI USB;
- Two slow UCCs used as RS-485 UARTs.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-10 20:52:58 -06:00
Jon Loeliger
bb66f56136 Merge commit 'wd/master' 2008-01-10 14:28:18 -06:00
Anton Vorontsov
64d4bcb087 MPC8568E-MDS: set up QE pario for UART1
To use UART1 on the MPC8568E-MDS, QE pario pins PC[0:3] should
be set up appropriately.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-01-09 16:25:03 -06:00
Anton Vorontsov
ad162249cb MPC8568E-MDS: reset UCCs to use them reliably
In order to use GETH1 and GETH2 on the MPC8568E-MDS, we should reset
UCCs.

p.s Similar code exists in the Linux kernel board file (for capability
reasons with older U-Boots), but should be removed some day.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-01-09 16:25:03 -06:00
Kumar Gala
2146cf5682 Reworked FSL Book-E TLB macros to be more readable
The old macros made it difficult to know what WIMGE and perm bits
were set for a TLB entry.  Actually use the bit masks for these items
since they are only a single bit.

Also moved the macros into mmu.h out of e500.h since they aren't specific
to e500.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-09 16:25:03 -06:00
Jon Loeliger
1df170f8b2 Convert MPC8610HPCD to use libfdt.
Assumes the presence of the aliases node in the DTS to
locate the pci and serial nodes for fixups.

Use consistent fdtaddr and fdtfile in environment variables.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-01-09 10:47:31 -06:00
Jon Loeliger
c9974ab0a4 8610: Fix lingering compile warnings.
Turn off DEBUG.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-01-09 10:47:30 -06:00
Wolfgang Denk
435dc8fcdb Coding Style cleanup, update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-01-09 11:36:21 +01:00
Kim Phillips
6775c68683 mpc83xx: fix missed pci_hose -> hose conversion for new libfdt code
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-08 09:59:49 -06:00
Kim Phillips
94fab25f5f mpc83xx: rm remaining FLAT_TREE code
..in board pci.c files

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-08 09:56:42 -06:00
Kim Phillips
b3458d2cd5 mpc83xx: remove FLAT_TREE code
need to rm it from pci code, too!

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-08 09:56:42 -06:00
Kim Phillips
5b8bc606c6 mpc83xx: convert to using do_fixup_*()
convert to using simpler mpc85xx style fdt update code; streamline by
eliminating macros OF_SOC, OF_CPU, etc. which allows us to rm
the old school FLAT_TREE code from 83xx (since the sbc8349 was just
converted over to using libfdt).

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-08 09:56:42 -06:00
Kim Phillips
f602082b4b mpc83xx: supress compiler warning
mpc8360emds.c: In function ‘ft_board_setup’:
mpc8360emds.c:335: warning: assignment discards qualifiers from pointer target type
mpc8360emds.c:345: warning: assignment discards qualifiers from pointer target type

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-08 09:55:41 -06:00
Kim Phillips
c16e44fa83 mpc83xx: fix remaining fdt_find_node_by_path references
rename to fdt_path_offset

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-08 09:55:40 -06:00
Kim Phillips
24f868433b mpc83xx: mpc8360 rev.2.1 erratum 2: replace rgmii-id with rgmii-rxid
u-boot itself uses GMII mode on the 8360.  Fix up UCC phy-connection-type
properties in the device tree so the PHY gets configured for internal delay on
RX only by the OS, as prescribed by mpc8360 rev. 2.1 pb mds erratum #2.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-08 09:55:40 -06:00
Dave Liu
19580e660c mpc83xx: Add the support of MPC837xEMDS board
The MPC837xEMDS board support:
* DDR2 400MHz hardcoded and SPD init
* Local bus NOR Flash
* I2C, UART, MII and RTC
* eTSEC RGMII
* PCI host

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-01-08 09:55:39 -06:00
Anton Vorontsov
651d96f7e4 MPC8360E-MDS: configure and enable second UART
Despite user manual, BCSR9.7 is negated (high) on HRST, so
UART2 is disabled. Fix that and configure QE pins properly.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-01-08 09:55:39 -06:00
Jon Loeliger
5c740711f0 8610: Move include of config.h earlier.
Include config.h earlier in the set of #includes
so as to avoid a incidental and duplicate definition
of CFG_CACHELINE_SIZE.

Signed-off-by: Jon Loeliger
2008-01-03 10:41:04 -06:00
Jon Loeliger
ea9f7395ec Convert MPC8641HPCN to use libfdt.
Assumes the presence of the aliases node in the DTS to
locate the ethernet, pci and serial nodes for fixups.

Use consistent fdtaddr and fdtfile in environment variables.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-01-03 10:27:03 -06:00
Jon Loeliger
2c3536425d Merge commit 'wd/master' 2008-01-03 09:46:55 -06:00
Kumar Gala
415a613bab Move the MPC8541/MPC8555/MPC8548 CDS board under board/freescale.
Minor path corrections needed to ensure buildability.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:20 -06:00
Kumar Gala
c2d943ffbf Move the MPC8540 ADS board under board/freescale.
Minor path corrections needed to ensure buildability.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:20 -06:00
Kumar Gala
870ceac5b3 Move the MPC8560 ADS board under board/freescale.
Minor path corrections needed to ensure buildability.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:20 -06:00
Kumar Gala
acbca876fb Move the MPC8568 MDS board under board/freescale.
Minor path corrections needed to ensure buildability.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:20 -06:00
Kumar Gala
a853d56c59 Use standard LAWAR_TRGT_IF_* defines for LAW setup on 85xx
We already had defines for LAWAR_TRGT_IF_* that we should use
rather than creating new ones.  Also, added some missing defines for
PCIE targets.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:20 -06:00
Kumar Gala
04db400892 Stop using immap_t on 85xx
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_*_ADDR as the base of the registers
instead of getting it via &immap.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:20 -06:00
Kumar Gala
f59b55a5b8 Stop using immap_t for guts offset on 85xx
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_GUTS_ADDR as the base of the guts registers
instead of getting it via &immap->im_gur.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:19 -06:00
Kumar Gala
addce57e2e Update MPC8544DS to use libfdt
Updated the MPC8544DS config to use libfdt and assume use of aliases for
ethernet, pci, and serial for the various fixups that are done.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:19 -06:00
Jon Loeliger
f743931f9b Merge commit 'wd/master' 2007-12-06 11:27:32 -06:00
Kumar Gala
8d04f02f62 Update libfdt from device tree compiler (dtc)
Update libfdt to commit 8eaf5e358366017aa2e846c5038d1aa19958314e from
the device tree compiler (dtc) project.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-11-21 14:04:05 -06:00
Jon Loeliger
74f89faa9d Move 8610 DIU interface structure definitions to header file.
These two structures are still needed during the
initialization and setup of the DIU hardware.
So move them to the fsl_diu_fb.h file for now.
Official "blah".

Noticed-by: York Sun <yorksun@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-11-20 15:00:53 -06:00
Jon Loeliger
890e9413c0 Merge commit 'remotes/wd/master' 2007-11-20 14:34:57 -06:00
Wolfgang Denk
409ecdc0bb Fix compiler warnings for PPC systems. Update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-11-18 16:36:27 +01:00
Wolfgang Denk
a75e1a3dda Merge branch 'master' of git://www.denx.de/git/u-boot-coldfire 2007-11-17 02:28:26 +01:00
Jason Jin
db74b3c1c9 Unify pixis_reset altbank across board families
Basically, refactor the CFG_PIXIS_VBOOT_MASK values
into the separate board config files.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-11-17 00:57:51 +01:00
TsiChungLiew
225a24b5e0 ColdFire: MCF5445x - Update correct RAMBAR and missing linker files
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-11-07 18:00:54 -06:00
Jon Loeliger
f1cd7aabbb Merge branch 'mpc8610' 2007-11-07 14:17:05 -06:00
York Sun
070ba56115 8610: Add console frame buffer support to FSL 8610 DIU driver.
Add cfb console support to FSL 8610 DIU driver.
Inspect board version from PIXIS to obtain correct pixel format.

Use #define CONFIG_VIDEO in config file to enable fb console.

To switch monitor, set monitor variable to
0 - DVI, 1 - Single link LVDS, 2 - Double link LVDS
followed by "diufb init".

Preserve logo bitmap at the top of the fb console.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-11-07 14:09:09 -06:00
York Sun
a877880c69 8610: Add 8610 DIU display driver
1280x1024 and 1024x768 @ 32 bpp are supported now.
DVI, Single-link LVDS, Double-link LVDS are all supported.

Environmental variable "monitor" is used to specify monitor port.

A new command "diufb" is introduced to reinitialize monitor
and display a BMP file in the memory. So far, 1-bit, 4-bit,
8-bit and 24-bit BMP formats are supported.

    diufb init
        - initialize the diu driver
    Enable the port specified in the environmental variable "monitor"

    diufb addr
        - display bmp file in memory.
    The bmp image should be no bigger than the resolution, 1280x1024
    for DVI and double-link LVDS, 1024x768 for single-link LVDS.

Note, this driver allocate memory but doesn't free it after use
It is written on purpose -- to avoid a failure of reallocation
due to memory fragement.

ECC of DDR is disabled for DIU performance. L2 data cache is also disabled.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Jon loeliger <jdl@freescale.com>
2007-11-07 14:09:09 -06:00
York Sun
52e5ddfecd FSL: Add a freescale bitmap logo.
This Freescale logo is a 340 x 128 x 4bpp BMP file
that can be displayed by the DIU Framebuffer driver.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-11-07 14:09:08 -06:00
Jason Jin
9f23ca334a Unify pixis_reset altbank across board families
Basically, refactor the CFG_PIXIS_VBOOT_MASK values
into the separate board config files.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-11-07 14:08:45 -06:00
Jon Loeliger
3cac27c1d4 Merge commit 'remotes/wd/master' 2007-11-02 15:22:01 -05:00
TsiChungLiew
e8ee8f3ade ColdFire 54455: Fix correct boot location for atmel and intel
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-10-25 17:16:22 -05:00
Tony Li
d2646554f5 mpc83xx: pq-mds-pib.c typo error
Correct to val8 from val.

Signed-off-by: Tony Li <tony.li@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-10-18 10:05:34 -05:00
Jon Loeliger
3dd2db53ce Initial mpc8610hpcd board files.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Mahesh Jade <mahesh.jade@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-10-17 15:01:33 -05:00
Liew Tsi Chung-r5aahp
dcb8863029 ColdFire: fix build error becasue of bad type of mii_init()
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-09-15 21:04:27 +02:00
Liew Tsi Chung-r5aahp
314d5b6ce5 ColdFire: Fix build error caused by pixis.c
Moved the #include <asm/cache.h> inside the #ifdef CONFIG_FSL_PIXIS.

Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-09-15 21:03:09 +02:00
Wolfgang Denk
1218abf1b5 Fix cases where DECLARE_GLOBAL_DATA_PTR was not declared as global
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-09-15 20:48:41 +02:00
Kumar Gala
56a9270521 Fix ULI RTC support on MPC8544 DS
The RTC on the M1575 ULI chipset requires a dummy read before
we are able to talk to the RTC.  We accomplish this by adding a
second memory region to the PHB the ULI is on and read from it.

The second region is added to maintain compatiabilty with Linux's
view of the PCI memory map.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-04 16:00:48 -05:00
Ed Swarthout
f75e89e9b5 ft_board_setup update 85xx/86xx of pci/pcie bus-range property.
pcie is now differentiated from pci.  Add 8641 bus-range updates.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2007-09-04 16:00:41 -05:00
Kim Phillips
7608d75f9c support board vendor-common makefiles
if a board/$(VENDOR)/common/Makefile exists, build it.

also add the first such case, board/freescale/common/Makefile, to
handle building board-shared EEPROM, PIXIS, and MDS-PIB code, as
dictated by board configuration.

thusly get rid of alternate build dir errors such as:

FATAL: can't create /work/wd/tmp/u-boot-ppc/board/freescale/mpc8360emds/../common/pq-mds-pib.o: No such file or directory

by putting the common/ mkdir command in its proper place (the common
Makefile). Common bits from existing individual board Makefiles have
been removed.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-29 02:15:46 +02:00
Wolfgang Denk
909627dca4 Merge with /home/wd/git/u-boot/custodian/u-boot-coldfire 2007-08-18 21:56:57 +02:00
Wolfgang Denk
8f22b671eb Merge with /home/wd/git/u-boot/custodian/u-boot-mpc85xx 2007-08-18 21:50:01 +02:00
Stefan Roese
8280f6a1c4 Coding style cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-18 14:33:02 +02:00
TsiChungLiew
4a442d3186 ColdFire: Add M5235EVB Platform for MCF523x
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-17 11:36:29 -06:00
Kim Phillips
e58fe95784 mpc83xx: move freescale boards to boards/freescale
includes build fixes.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-16 23:12:31 -05:00
Kim Phillips
5aa4ad8d8e mpc83xx: suppress unused variable 'val8' warning
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-16 23:12:26 -05:00
Kim Phillips
bbea46f76f mpc83xx: implement board_add_ram_info
add board_add_ram_info, to make memory diagnostic output more
consistent. u-boot banner output now looks like:

DRAM:  256 MB (DDR1, 64-bit, ECC on)

and for boards with SDRAM on the local bus, a line such as this is
added:

SDRAM: 64 MB (local bus)

also replaced some magic numbers with their equivalent define names.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-16 23:12:24 -05:00
Tony Li
14778585d1 mpc83xx: Split PIB init code from pci.c and add Qoc3 ATM card support
The patch split the PIB init code from pci.c to a single file board/freescale/common/pq-mds-pib.c
And add Qoc3 ATM card support for MPC8360EMDS and MPC832XEMDS board.

Signed-off-by Tony Li <tony.li@freescale.com>
2007-08-16 23:12:11 -05:00
TsiChungLiew
8ae158cd87 ColdFire: Add M54455EVB for MCF5445x
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 17:43:23 -06:00
TsiChungLiew
a1436a8426 ColdFire: Add M5253EVBE platform for MCF52x2
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 17:43:21 -06:00
TsiChungLiew
a605aacd83 ColdFire: Add M5249EVB platform for MCF52x2
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 17:43:20 -06:00
TsiChungLiew
ab77bc547b ColdFire: MCF5329 Update and cleanup
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 17:43:19 -06:00
John Rigby
81735b2568 Merge branch 'denx-coldfire' into coldfire-aug2007 2007-08-16 17:40:03 -06:00
Kumar Gala
d64ee908a1 Update MPC8544 DS PCI memory map
The PCIe bus that the ULI M1575 is connected to has no possible way of
needing more than the fixed amount of IO & Memory space needed by the ULI.

So make it use far less IO & memory space and have it use the shared LAW.  This
free's up a LAW for PCIe1 IO space.  Also reduce the amount of IO space needed
by each bus.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-08-16 16:18:45 -05:00
Kumar Gala
ea5877e31e Fix up some fdt issues on 8544DS
It looks like we had a merge issue that duplicated a bit of code
in ft_board_setup.  Also, we need to set CONFIG_HAS_ETH0 to get
the MAC address properly set in the device tree on boot for TSEC1

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-08-16 16:18:21 -05:00
Kim Phillips
3fde9e8b22 mpc83xx: migrate remaining freescale boards to libfdt
this adds libfdt support code for the freescale
mpc8313erdb, mpc832xemds, mpc8349emds, mpc8349itx,
and gp boards.

Boards remain compatible with OF_FLAT_TREE.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-15 22:36:33 -05:00
Kim Phillips
6a16e0dfcc mpc83xx: move common /memory node update mechanism to cpu.c
also adds common prototypes to include/common.h.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-15 22:36:33 -05:00
Jon Loeliger
4ce917742b Move the MPC8641HPCN board under board/freescale.
Minor path corrections needed to ensure buildability.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-08-15 12:20:40 -05:00
Stefan Roese
d61ea14885 Merge with git://www.denx.de/git/u-boot.git 2007-08-15 14:51:27 +02:00
Ed Swarthout
837f1ba05c 8544ds PCIE support
PCI1 LAW mapping should use CFG_PCI1_MEM_PHY and not _BASE address.

Enable LBC and ECM errors and clear error registers.

Add tftpflash env var to get uboot from tftp server and flash it.

Add pci/pcie convenience env vars to display register space:
  "run pcie3regs" to see all pcie3 ccsr registers
  "run pcie3cfg" to see all cfg registers
Whitespace cleanup and MPC8544DS.h

Enable CONFIG_INTERRUPTS.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2007-08-14 01:38:40 -05:00
Kim Phillips
1c274c4e05 mpc83xx: add support for the MPC8323E RDB
MPC8323E based board with 64MB fixed SDRAM, 16MB flash,
five 10/100 ethernet ports connected via an ICPlus IP175C
switch, one PCI slot, and serial.  Features not supported
in this patch are SD card interface, 2 USB ports, and the
two phone ports.

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-10 01:12:25 -05:00
Stefan Roese
3ba4c2d68f Coding style cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-08 09:54:26 +02:00
TsiChungLiew
1a33ce65a4 Added NAND support
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-08 09:47:43 +02:00
TsiChungLiew
6fde84a44b Moved sync() from board file to include/asm-m68k/io.h
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-08 09:47:16 +02:00
TsiChungLiew
9e737d8476 Declared attributes of void __mii_init(void) as an alias for int mii_init(void)
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-08 09:47:10 +02:00
Wolfgang Denk
46919751ea Merge with /home/wd/git/u-boot/custodian/u-boot-mpc85xx 2007-08-06 00:55:51 +02:00
Wolfgang Denk
cdd917a43d Fix build errors and warnings / code cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-08-02 00:48:45 +02:00
Stefan Roese
c883f6ea32 Coding style cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16 13:11:12 +02:00
Ed Swarthout
bfb37b32d1 8544ds: Fix Makefile after moving pixis to board/freescale.
The OBJTREE != SRCTREE build scenario was broken.
This fixes it.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-11 18:19:06 -05:00
TsiChungLiew
3b635492c9 Update for flash.o and mii.o
Removed flash.o and added mii.o

Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-07-10 14:29:09 -06:00
TsiChungLiew
c5ded275d8 MII functions calls.
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-07-10 14:29:09 -06:00
TsiChungLiew
427c814104 Removed MII functions and replaced immap_5329.h and m5329.h with immap.h.
The removed MII routines will be placed in mii.c.

Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-07-10 14:29:08 -06:00
TsiChungLiew
01a793fda0 Duplicate code
There is a Common Flash Interface Driver existed. To use the CFI driver, define CFG_FLASH_CFI in configuration file.

Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-07-10 14:29:08 -06:00
TsiChung Liew
8e585f02f8 Added M5329AFEE and M5329BFEE Platforms
Added board/freescale/m5329evb, cpu/mcf532x, drivers/net,
drivers/serial,  immap_5329.h, m5329.h, mcfrtc.h,
include/configs/M5329EVB.h, lib_m68k/interrupts.c, and
rtc/mcfrtc.c

Modified CREDITS, MAKEFILE, Makefile, README, common/cmd_bdinfo.c,
common/cmd_mii.c, include/asm-m68k/byteorder.h, include/asm-m68k/fec.h,
include/asm-m68k/io.h, include/asm-m68k/mcftimer.h,
include/asm-m68k/mcfuart.h, include/asm-m68k/ptrace.h,
include/asm-m68k/u-boot.h, lib_m68k/Makefile, lib_m68k/board.c,
lib_m68k/time.c, net/eth.c and rtc/Makefile

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2007-06-18 15:17:56 -06:00
Wolfgang Denk
2f15278c2e Coding stylke cleanup; update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-05-05 18:23:11 +02:00
Jon Loeliger
25d83d7f4a Add MPC8544DS basic port board files.
Add board port under new board/freescale directory
structure and reuse existing PIXIS FPGA support there.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-04-23 19:58:28 -05:00
Haiying Wang
3d98b85800 Add PIXIS FPGA support for MPC8641HPCN board.
Move the 8641HPCN's PIXIS code to the new directory
board/freescale/common/ as it will be shared by
future boards not in the same processor family.

Write a "pixis_reset" command that utilizes the FPGA
reset sequencer to support alternate soft-reset options
such as using the "alternate" flash bank, enabling
the watch dog, or choosing different CPU frequencies.

Add documentation for the pixis_reset to README.mpc8641hpcn.

Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-04-09 14:25:05 -05:00