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85xx: Improve flash remapping on MPC8572DS & MPC8536DS
Changing the flash from cacheable to cache-inhibited was taking a significant amount of time due to the fact that we were iterating over the full 256M of flash. Instead we can just flush the L1 d-cache and invalidate the i-cache. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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parent
54e091d3b6
commit
7c0d4a7508
4 changed files with 10 additions and 14 deletions
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@ -25,6 +25,7 @@
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#include <pci.h>
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#include <asm/processor.h>
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#include <asm/mmu.h>
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#include <asm/cache.h>
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#include <asm/immap_85xx.h>
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#include <asm/immap_fsl_pci.h>
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#include <asm/fsl_ddr_sdram.h>
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@ -441,7 +442,6 @@ pci_init_board(void)
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int board_early_init_r(void)
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{
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unsigned int i;
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const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
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const u8 flash_esel = 1;
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@ -450,11 +450,9 @@ int board_early_init_r(void)
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* so that flash can be erased properly.
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*/
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/* Invalidate any remaining lines of the flash from caches. */
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for (i = 0; i < 256*1024*1024; i+=32) {
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asm volatile ("dcbi %0,%1": : "b" (flashbase), "r" (i));
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asm volatile ("icbi %0,%1": : "b" (flashbase), "r" (i));
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}
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/* Flush d-cache and invalidate i-cache of any FLASH data */
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flush_dcache();
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invalidate_icache();
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/* invalidate existing TLB entry for flash + promjet */
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disable_tlb(flash_esel);
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@ -54,7 +54,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
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/* W**G* - Flash/promjet, localbus */
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/* This will be changed to *I*G* after relocation to RAM. */
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SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE,
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MAS3_SX|MAS3_SW|MAS3_SR, MAS2_W|MAS2_G,
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MAS3_SX|MAS3_SR, MAS2_W|MAS2_G,
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0, 1, BOOKE_PAGESZ_256M, 1),
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/* *I*G* - PCI */
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@ -25,6 +25,7 @@
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#include <pci.h>
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#include <asm/processor.h>
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#include <asm/mmu.h>
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#include <asm/cache.h>
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#include <asm/immap_85xx.h>
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#include <asm/immap_fsl_pci.h>
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#include <asm/fsl_ddr_sdram.h>
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@ -359,7 +360,6 @@ void pci_init_board(void)
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int board_early_init_r(void)
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{
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unsigned int i;
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const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
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const u8 flash_esel = 2;
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@ -368,11 +368,9 @@ int board_early_init_r(void)
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* so that flash can be erased properly.
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*/
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/* Invalidate any remaining lines of the flash from caches. */
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for (i = 0; i < 256*1024*1024; i+=32) {
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asm volatile ("dcbi %0,%1": : "b" (flashbase), "r" (i));
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asm volatile ("icbi %0,%1": : "b" (flashbase), "r" (i));
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}
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/* Flush d-cache and invalidate i-cache of any FLASH data */
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flush_dcache();
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invalidate_icache();
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/* invalidate existing TLB entry for flash + promjet */
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disable_tlb(flash_esel);
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@ -59,7 +59,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
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/* W**G* - Flash/promjet, localbus */
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/* This will be changed to *I*G* after relocation to RAM. */
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SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE,
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MAS3_SX|MAS3_SW|MAS3_SR, MAS2_W|MAS2_G,
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MAS3_SX|MAS3_SR, MAS2_W|MAS2_G,
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0, 2, BOOKE_PAGESZ_256M, 1),
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/* *I*G* - PCI */
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