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MX5: mx51evk: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
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parent
a4adedd439
commit
753fc2ebf9
2 changed files with 6 additions and 13 deletions
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@ -22,6 +22,7 @@
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#include <common.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/mx5x_pins.h>
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#include <asm/arch/iomux.h>
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@ -180,7 +181,6 @@ static void setup_iomux_spi(void)
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static void power_init(void)
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{
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unsigned int val;
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unsigned int reg;
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struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE;
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/* Write needed to Power Gate 2 register */
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@ -249,13 +249,7 @@ static void power_init(void)
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pmic_reg_write(REG_MODE_1, val);
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udelay(200);
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reg = readl(GPIO2_BASE_ADDR + 0x0);
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reg &= ~0x4000; /* Lower reset line */
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writel(reg, GPIO2_BASE_ADDR + 0x0);
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reg = readl(GPIO2_BASE_ADDR + 0x4);
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reg |= 0x4000; /* configure GPIO lines as output */
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writel(reg, GPIO2_BASE_ADDR + 0x4);
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gpio_direction_output(46, 0);
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/* Reset the ethernet controller over GPIO */
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writel(0x1, IOMUXC_BASE_ADDR + 0x0AC);
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@ -267,9 +261,7 @@ static void power_init(void)
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udelay(500);
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reg = readl(GPIO2_BASE_ADDR + 0x0);
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reg |= 0x4000;
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writel(reg, GPIO2_BASE_ADDR + 0x0);
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gpio_set_value(46, 1);
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}
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#ifdef CONFIG_FSL_ESDHC
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@ -278,9 +270,9 @@ int board_mmc_getcd(u8 *cd, struct mmc *mmc)
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struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR)
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*cd = readl(GPIO1_BASE_ADDR) & 0x01;
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*cd = gpio_get_value(0);
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else
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*cd = readl(GPIO1_BASE_ADDR) & 0x40;
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*cd = gpio_get_value(6);
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return 0;
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}
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@ -60,6 +60,7 @@
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*/
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#define CONFIG_MXC_UART
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#define CONFIG_SYS_MX51_UART1
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#define CONFIG_MXC_GPIO
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/*
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* SPI Configs
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