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powerpc/corenet_ds: display the RCW at boot
Display the 64-byte Reset Configuration Word (RCW) during boot, so that there's no confusion as to what RCW U-boot is using. Reset Configuration Word (RCW): 00000000: 4a500000 00000000 18181818 00008888 00000010: 28402400 00002000 fe800000 01200000 00000020: 00000000 00000000 00000000 000b0000 00000030: 00000000 00000000 00000000 00000000 Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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1 changed files with 15 additions and 0 deletions
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@ -45,6 +45,8 @@ int checkboard (void)
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{
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u8 sw;
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struct cpu_type *cpu = gd->cpu;
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ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
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unsigned int i;
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printf("Board: %sDS, ", cpu->name);
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printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
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@ -66,6 +68,19 @@ int checkboard (void)
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puts("36-bit Addressing\n");
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#endif
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/* Display the RCW, so that no one gets confused as to what RCW
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* we're actually using for this boot.
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*/
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puts("Reset Configuration Word (RCW):");
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for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
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u32 rcw = in_be32(&gur->rcwsr[i]);
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if ((i % 4) == 0)
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printf("\n %08x:", i * 4);
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printf(" %08x", rcw);
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}
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puts("\n");
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/* Display the actual SERDES reference clocks as configured by the
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* dip switches on the board. Note that the SWx registers could
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* technically be set to force the reference clocks to match the
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