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https://github.com/AsahiLinux/u-boot
synced 2024-11-11 07:34:31 +00:00
powerpc/85xx: Cleanup SGMII detection and reporting
Use new is_serdes_configured to determine if TSECs are in SGMII mode and report that on the various boards that use or can be configured in SGMII mode in board_eth_init() instead of in the PCI init code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
parent
5d27e02c04
commit
058d7dc7ba
6 changed files with 40 additions and 58 deletions
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@ -194,7 +194,7 @@ void pci_init_board(void)
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{
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ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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struct fsl_pci_info pci_info[4];
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u32 devdisr, pordevsr, io_sel, sdrs2_io_sel;
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u32 devdisr, pordevsr, io_sel;
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u32 porpllsr, pci_agent, pci_speed, pci_32, pci_arb, pci_clk_sel;
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int first_free_busno = 0;
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int num = 0;
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@ -205,18 +205,8 @@ void pci_init_board(void)
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pordevsr = in_be32(&gur->pordevsr);
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porpllsr = in_be32(&gur->porpllsr);
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io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
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sdrs2_io_sel = (pordevsr & MPC85xx_PORDEVSR_SRDS2_IO_SEL) >> 27;
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debug(" pci_init_board: devdisr=%x, sdrs2_io_sel=%x, io_sel=%x\n",
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devdisr, sdrs2_io_sel, io_sel);
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if (sdrs2_io_sel == 7)
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printf("Serdes2 disalbed\n");
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else if (sdrs2_io_sel == 4) {
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printf("eTSEC1 is in sgmii mode.\n");
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printf("eTSEC3 is in sgmii mode.\n");
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} else if (sdrs2_io_sel == 6)
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printf("eTSEC1 is in sgmii mode.\n");
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debug(" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
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puts("\n");
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#ifdef CONFIG_PCIE3
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@ -354,14 +344,12 @@ int board_eth_init(bd_t *bis)
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{
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#ifdef CONFIG_TSEC_ENET
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struct tsec_info_struct tsec_info[2];
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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int num = 0;
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uint sdrs2_io_sel =
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(gur->pordevsr & MPC85xx_PORDEVSR_SRDS2_IO_SEL) >> 27;
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#ifdef CONFIG_TSEC1
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SET_STD_TSEC_INFO(tsec_info[num], 1);
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if ((sdrs2_io_sel == 4) || (sdrs2_io_sel == 6)) {
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if (is_serdes_configured(SGMII_TSEC1)) {
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puts("eTSEC1 is in sgmii mode.\n");
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tsec_info[num].phyaddr = 0;
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tsec_info[num].flags |= TSEC_SGMII;
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}
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@ -369,7 +357,8 @@ int board_eth_init(bd_t *bis)
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#endif
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#ifdef CONFIG_TSEC3
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SET_STD_TSEC_INFO(tsec_info[num], 3);
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if (sdrs2_io_sel == 4) {
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if (is_serdes_configured(SGMII_TSEC3)) {
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puts("eTSEC3 is in sgmii mode.\n");
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tsec_info[num].phyaddr = 1;
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tsec_info[num].flags |= TSEC_SGMII;
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}
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@ -382,8 +371,10 @@ int board_eth_init(bd_t *bis)
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}
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#ifdef CONFIG_FSL_SGMII_RISER
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if ((sdrs2_io_sel == 4) || (sdrs2_io_sel == 6))
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if (is_serdes_configured(SGMII_TSEC1) ||
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is_serdes_configured(SGMII_TSEC3)) {
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fsl_sgmii_riser_init(tsec_info, num);
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}
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#endif
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tsec_eth_init(bis, tsec_info, num);
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@ -119,12 +119,6 @@ void pci_init_board(void)
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debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
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if (io_sel & 1) {
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if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
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printf("eTSEC1 is in sgmii mode.\n");
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if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
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printf("eTSEC3 is in sgmii mode.\n");
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}
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puts("\n");
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#ifdef CONFIG_PCIE3
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@ -324,20 +318,22 @@ int board_eth_init(bd_t *bis)
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{
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#ifdef CONFIG_TSEC_ENET
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struct tsec_info_struct tsec_info[2];
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
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int num = 0;
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#ifdef CONFIG_TSEC1
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SET_STD_TSEC_INFO(tsec_info[num], 1);
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if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
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if (is_serdes_configured(SGMII_TSEC1)) {
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puts("eTSEC1 is in sgmii mode.\n");
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tsec_info[num].flags |= TSEC_SGMII;
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}
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num++;
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#endif
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#ifdef CONFIG_TSEC3
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SET_STD_TSEC_INFO(tsec_info[num], 3);
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if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
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if (is_serdes_configured(SGMII_TSEC3)) {
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puts("eTSEC3 is in sgmii mode.\n");
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tsec_info[num].flags |= TSEC_SGMII;
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}
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num++;
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#endif
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@ -347,8 +343,10 @@ int board_eth_init(bd_t *bis)
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return 0;
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}
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if (io_sel & 1)
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if (is_serdes_configured(SGMII_TSEC1) ||
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is_serdes_configured(SGMII_TSEC3)) {
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fsl_sgmii_riser_init(tsec_info, num);
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}
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tsec_eth_init(bis, tsec_info, num);
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@ -177,15 +177,6 @@ void pci_init_board(void)
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debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
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if (!(pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
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printf("eTSEC1 is in sgmii mode.\n");
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if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
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printf("eTSEC2 is in sgmii mode.\n");
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if (!(pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
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printf("eTSEC3 is in sgmii mode.\n");
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if (!(pordevsr & MPC85xx_PORDEVSR_SGMII4_DIS))
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printf("eTSEC4 is in sgmii mode.\n");
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puts("\n");
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#ifdef CONFIG_PCIE3
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pcie_configured = is_serdes_configured(PCIE3);
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@ -289,31 +280,38 @@ int board_early_init_r(void)
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int board_eth_init(bd_t *bis)
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{
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struct tsec_info_struct tsec_info[4];
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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int num = 0;
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#ifdef CONFIG_TSEC1
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SET_STD_TSEC_INFO(tsec_info[num], 1);
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if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
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if (is_serdes_configured(SGMII_TSEC1)) {
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puts("eTSEC1 is in sgmii mode.\n");
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tsec_info[num].flags |= TSEC_SGMII;
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}
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num++;
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#endif
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#ifdef CONFIG_TSEC2
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SET_STD_TSEC_INFO(tsec_info[num], 2);
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if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
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if (is_serdes_configured(SGMII_TSEC2)) {
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puts("eTSEC2 is in sgmii mode.\n");
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tsec_info[num].flags |= TSEC_SGMII;
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}
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num++;
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#endif
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#ifdef CONFIG_TSEC3
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SET_STD_TSEC_INFO(tsec_info[num], 3);
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if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
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if (is_serdes_configured(SGMII_TSEC3)) {
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puts("eTSEC3 is in sgmii mode.\n");
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tsec_info[num].flags |= TSEC_SGMII;
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}
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num++;
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#endif
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#ifdef CONFIG_TSEC4
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SET_STD_TSEC_INFO(tsec_info[num], 4);
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if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII4_DIS))
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if (is_serdes_configured(SGMII_TSEC4)) {
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puts("eTSEC4 is in sgmii mode.\n");
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tsec_info[num].flags |= TSEC_SGMII;
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}
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num++;
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#endif
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@ -26,6 +26,7 @@
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#include <asm/mmu.h>
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#include <asm/cache.h>
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#include <asm/immap_85xx.h>
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#include <asm/fsl_serdes.h>
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#include <asm/io.h>
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#include <miiphy.h>
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#include <libfdt.h>
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@ -166,10 +167,8 @@ int board_early_init_r(void)
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int board_eth_init(bd_t *bis)
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{
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struct tsec_info_struct tsec_info[4];
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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int num = 0;
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char *tmp;
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u32 pordevsr;
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unsigned int vscfw_addr;
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#ifdef CONFIG_TSEC1
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@ -182,9 +181,10 @@ int board_eth_init(bd_t *bis)
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#endif
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#ifdef CONFIG_TSEC3
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SET_STD_TSEC_INFO(tsec_info[num], 3);
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pordevsr = in_be32(&gur->pordevsr);
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if (!(pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
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if (is_serdes_configured(SGMII_TSEC3)) {
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puts("eTSEC3 is in sgmii mode.\n");
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tsec_info[num].flags |= TSEC_SGMII;
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}
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num++;
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#endif
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if (!num) {
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@ -53,9 +53,6 @@ void pci_init_board(void)
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devdisr = in_be32(&gur->devdisr);
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pordevsr = in_be32(&gur->pordevsr);
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if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
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printf("eTSEC2 is in sgmii mode.\n");
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puts("\n");
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#ifdef CONFIG_PCIE2
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pcie_configured = is_serdes_configured(PCIE2);
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@ -204,11 +204,6 @@ void pci_init_board(void)
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debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
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if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
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printf("eTSEC2 is in sgmii mode.\n");
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if (!(pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
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printf("eTSEC3 is in sgmii mode.\n");
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puts("\n");
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#ifdef CONFIG_PCIE2
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pcie_configured = is_serdes_configured(PCIE2);
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@ -318,7 +313,6 @@ int board_early_init_r(void)
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int board_eth_init(bd_t *bis)
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{
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struct tsec_info_struct tsec_info[4];
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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int num = 0;
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#ifdef CONFIG_TSEC1
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@ -327,14 +321,18 @@ int board_eth_init(bd_t *bis)
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#endif
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#ifdef CONFIG_TSEC2
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SET_STD_TSEC_INFO(tsec_info[num], 2);
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if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
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if (is_serdes_configured(SGMII_TSEC2)) {
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puts("eTSEC2 is in sgmii mode.\n");
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tsec_info[num].flags |= TSEC_SGMII;
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}
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num++;
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#endif
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#ifdef CONFIG_TSEC3
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SET_STD_TSEC_INFO(tsec_info[num], 3);
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if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
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if (is_serdes_configured(SGMII_TSEC3)) {
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puts("eTSEC3 is in sgmii mode.\n");
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tsec_info[num].flags |= TSEC_SGMII;
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}
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num++;
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#endif
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