Commit graph

1173 commits

Author SHA1 Message Date
Tetsuyuki Kobayashi
4306abda00 arm: rmobile: kzm9g: enable reset command
Do soft power on reset in U-Boot reset command.

Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03 02:04:23 +02:00
Tetsuyuki Kobayashi
a12633122c arm: rmobile: kzm9g: Adjust low level hardware setting
Adjust low level hardware setting in s_init.

Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03 02:04:22 +02:00
Nobuhiro Iwamatsu
8d811ca36a arm: rmobile: Add supoprt for KMC KZM-A9-GT board
The KZM-A9-GT board has Renesas R-Mobile SH73A0, 512MB DDR2-SDRAM,
USB, Ethernet, and more.

This patch supports the following functions:
	- 512MB DDR2-SDRAM
	- 16MB NOR Flash memory
	- Serial console (SCIF)
	- Ethernet (SMSC)
	- I2C

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03 02:04:22 +02:00
Nobuhiro Iwamatsu
b045a23773 arm: rmobile: Add support PFC of Renesas SH73A0
Renesas SH73A0 has GPIO based PFC. This privode framework of PFC.
The code included in this base from linux kernel.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03 02:04:22 +02:00
Nobuhiro Iwamatsu
1cdf2482d1 arm: rmobile: Add support Renesas SH73A0
Renesas SH73A0 is CPU with Cortex-A9.
This supports the basic register definition and GPIO.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03 02:04:22 +02:00
Nobuhiro Iwamatsu
4fb44e22ec arm: rmobile: Add basic support for Renesas R-Mobile
This patch adds minimum support for R-Mobile. Only minimal support with timer.
This CPU can uses the peripheral of Renesas SuperH.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03 02:04:22 +02:00
Nobuhiro Iwamatsu
a6cd85aad2 ARMv7: Add register definition of global timer
ARMv7 has global timer. This provides the register definition of this timer.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03 02:04:22 +02:00
Joel A Fernandes
90207b6268 am33xx: Fix fetching of mmc1 bootmode from bootrom for AM33XX
U-boot should not ignore getting the bootmode passed on from the bootrom.
With this, U-boot SPL knows it was loaded from MMC1 and use this info to
read full U-boot from MMC1 as well.

Cc: pprakash@ti.com
Cc: trini@ti.com
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-01 10:02:15 -07:00
Ilya Yanok
7ac2fe2da2 OMAP: networking support for SPL
This patch adds support for networking in SPL. Some devices are
capable of loading SPL via network so it makes sense to load the
main U-Boot binary via network too. This patch tries to use
existing network code as much as possible. Unfortunately, it depends
on environment which in turn depends on other code so SPL size
is increased significantly. No effort was done to decouple network
code and environment so far.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-01 10:02:14 -07:00
Albert ARIBAUD
1c27059a2f Merge remote-tracking branch 'u-boot/master' 2012-09-30 23:49:17 +02:00
Albert ARIBAUD
8f0732ac3d Merge remote-tracking branch 'u-boot-imx/master' 2012-09-29 11:12:34 +02:00
Tom Rini
3f7f2414ef ARM: SPL: Convert davinci to CONFIG_SPL_FRAMEWORK
- Convert the non-relocation part of board_init_f to spl_board_init, turn on CONFIG_SPL_BOARD_INIT in the configs.
- Remove duplicated code.
- Add spl_boot_device() that returns the statically chosen boot device.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 11:20:10 -07:00
Tom Rini
6507f133f3 SPL: Create arch/arm/lib/spl.c for board_init_f and jump_to_image_linux
In SPL (CONFIG_SPL_FRAMEWORK) board_init_f must setup the stack pointer,
clear the BSS and call board_init_r.  We mark this as weak as some
platforms may need to perform additional initalization at this point.
We provide a gd that we know will be in a usable location, once the BSS
has been cleared to help with this as well.  Finally, we no longer call
relocate_code so remove that from the armv7 version.

Next, both board_init_f and jump_to_image_linux are going to be
inherently arch-specific, so move these versions to arch/arm/lib/spl.c

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:49:59 -07:00
Tom Rini
47f7bcae8c SPL: Move the omap SPL framework to common/spl
Add a new flag, CONFIG_SPL_FRAMEWORK to opt into the common/spl SPL
framework, enable on all of the previously using boards.  We move the
spl_ymodem.c portion to common/ and spl_mmc.c to drivers/mmc/.  We leave
the NAND one in-place as we plan to replace it later in this series.

We use common/spl to avoid linker problems with respect to merging
constant strings in objects.   Otherwise all strings in common/ will be
linked in and kept which grows SPL in size too much.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:49:59 -07:00
Tom Rini
d4c4e0e117 ARM: SPL: Start hooking in the current SPI SPL support
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:49:58 -07:00
Tom Rini
f0881250f9 ARM: SPL: Make spl_mmc.c more generic
Move the default omap/related-centric board_mmc_init to
arch/arm/cpu/armv7/omap-common/boot-common.c and move the type defines
to <asm/spl.h>.  Also use mmc->read_bl_len rather than MMCSD_SECTOR_SIZE

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:49:58 -07:00
Tom Rini
55cdbb8d4e ARM: SPL: Add <asm/spl.h> and <asm/arch/spl.h>
Move the SPL prototypes from <asm/omap_common.h> into <asm/spl.h> and
add <asm/arch/spl.h> for arch specific portions of CONFIG_SPL_FRAMEWORK.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:49:57 -07:00
Tom Rini
8082fda9fc ARM: SPL: Remove NAND_MODE_HW_ECC from spl_nand.c
This detection code doesn't (and can't) do anything currently, so
remove.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:48:39 -07:00
Tom Rini
37189a1958 ARM: SPL: Rename omap_boot_mode to spl_boot_mode()
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:48:39 -07:00
Tom Rini
8e1b836ec5 ARM: SPL: Rename omap_boot_device to spl_boot_device
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:48:38 -07:00
Tom Rini
861a86f460 omap-common: SPL: Add CONFIG_SPL_DISPLAY_PRINT / spl_display_print()
Only omap4/5 currently have a meaningful set of display text and overo
had been adding a function to display nothing.  Change how this works to
be opt-in and only turned on for omap4/5 now.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:48:38 -07:00
Benoît Thébaudeau
362635bd50 mx51evk: Add CONFIG_REVISION_TAG
FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG
information.

If this data is not present, the kernel misconfigures the TZIC, which results in
the timer interrupt handler never being called, so the kernel deadlocks while
calibrating its delay.

Suggested-by: Greg Topmiller <Greg.Topmiller@jdsu.com>
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-09-23 19:55:06 +02:00
Tom Rini
495dbd72dd Merge branch 'master' of git://git.denx.de/u-boot-arm 2012-09-21 14:53:13 -07:00
Albert ARIBAUD
d193c1b6eb Merge remote-tracking branch 'u-boot-imx/master' 2012-09-21 00:26:19 +02:00
Marek Vasut
535c74f80c ARM: Remove apollon board
This board is the only board that still sticks to OneNAND IPL.
Remove this board, since we have SPL around for a while and
OneNAND is well supported in the SPL framework. The board can
be revived if necessary.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Tom Rini <trini@ti.com>
2012-09-18 12:01:51 -07:00
Tom Rini
037e9d33db Merge branch 'master' of git://git.denx.de/u-boot-i2c 2012-09-17 11:39:03 -07:00
Stefano Babic
19f59ea6db MX6: drop binary constants from iomux header
Constants set with binary value (0b...) are not compiled
from old toolchain when used by the clrsetbits_le32 macro.
Replaces them with the corresponding hex value.

The error reported (for example with the mx6qsabrelite board)
is something like:

mx6qsabrelite.c:369:1: error: invalid suffix "b101" on integer constant
mx6qsabrelite.c:369:1: error: invalid suffix "b10010" on integer constant
mx6qsabrelite.c:369:1: error: invalid suffix "b0000" on integer constant
mx6qsabrelite.c:369:1: error: invalid suffix "b10001" on integer constant

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-17 13:17:06 +02:00
Tom Warren
29f3e3f248 Tegra: Change Tegra20 to Tegra in common code, prep for T30
Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate.
Convert tegra20_ source file and function names to tegra_, also.

Upcoming Tegra30 port will use common code/defines/names where possible.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2012-09-10 13:01:24 -07:00
Jim Lin
312693c3dd tegra: nand: Add Tegra NAND driver
A device tree is used to configure the NAND, including memory
timings and block/pages sizes.

If this node is not present or is disabled, then NAND will not
be initialized.

Signed-off-by: Jim Lin <jilin@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:31 -07:00
Simon Glass
35e1132c88 tegra: Add NAND support to funcmux
Add selection of NAND flash pins to the funcmux.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:30 -07:00
Benoît Thébaudeau
0dc7b82e4e mx31: Define default SoC input clock frequencies
Define default SoC input clock frequencies for i.MX31 in order to get rid of
duplicated definitions.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Helmut Raiger <helmut.raiger@hale.at>
2012-09-06 14:23:30 +02:00
Benoît Thébaudeau
9c6c5c0676 mx35: Define default SoC input clock frequencies
Define default SoC input clock frequencies for i.MX35 in order to get rid of
duplicated definitions.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-06 11:05:17 +02:00
Benoît Thébaudeau
1b2080f338 mx25: Define default SoC input clock frequencies
Define default SoC input clock frequencies for i.MX25 in order to get rid of
duplicated definitions.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Matthias Weisser <weisserm@arcor.de>
2012-09-06 11:05:09 +02:00
Benoît Thébaudeau
82e1b543b5 mx35: Fix clock dividers
The clock dividers that were used do not match at all the reference manual. They
were either completely broken, or came from an early silicon revision
incompatible with the current one.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-09-06 11:05:01 +02:00
Benoît Thébaudeau
9ba81baabb mx35: Add definitions for clock gate values
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-09-06 11:04:53 +02:00
Koen Kooi
a532278074 omap4 i2c: add support for i2c bus 4
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
2012-09-06 06:01:09 +02:00
Jaehoon Chung
8458e0283f mmc: s5p_sdhci: fixed wrong function argument
Useless code is removed, and get buswidth value.
buswidth value will be used to choice the 4bit or 8bit.
(Now used 4bit mode in sdhci.c by default)

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05 17:33:26 -05:00
Stefano Babic
fb380bfa8c OMAP3: video: add macros to set display parameters
Add a common macros to set the registers for horizontal
and vertical timing.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04 17:05:39 -07:00
Stefano Babic
baee780013 video: drop duplicate set of DISPC_CONFIG register
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04 17:05:39 -07:00
Arnout Vandecappelle (Essensium/Mind)
4aaf06415f OMAP3: add definition of CTRL_WKUP_CTRL register
AM/DM37x SoCs add the CTRL_WKUP_CTRL register.  It contains the
GPIO_IO_PWRDNZ bit, which is required to be set to enable the I/O pads
of gpio_126, gpio_127 and gpio_129.

Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
Cc: Tom Rini <trini@ti.com>
2012-09-04 17:05:38 -07:00
Valentin Longchamp
8203b201ea kw_spi: fix clock prescaler computation
The computation was not correct with low clock values: setting a 1MHz
clock would result in an overlap that would then configure a 25Mhz
clock.

This patch implements a correct computation method according to the
kirkwood functionnal spec. table 600 (Serial Memory Interface
Configuration Register).

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2012-09-03 17:28:51 +05:30
Wolfgang Denk
7cdcaef0b2 Merge branch 'master' of git://git.denx.de/u-boot-usb
* 'master' of git://git.denx.de/u-boot-usb:
  MUSB driver: Timeout is never detected as the while loop does not end
  usb: fix ulpi_set_vbus prototype
  pxa25x: Add UDC registers definitions
  USB: Fix strict aliasing in ohci-hcd
  usb: Optimize USB storage read/write
  ehci: Optimize qTD allocations
  usb_stor_BBB_transport: Do not delay when not required
  usb_storage: Remove EHCI constraints
  usb_storage: Restore non-EHCI support
  ehci-hcd: Boost transfer speed
  ehci: cosmetic: Define used constants
  ehci: Fail for multi-transaction interrupt transfers
  arm:trats: Enable g_dnl composite USB gadget with embedded DFU function on TRATS
  arm:trats: Support for USB UDC driver at TRATS board.
  dfu:cmd: Support for DFU u-boot command
  dfu: MMC specific routines for DFU operation
  dfu: DFU backend implementation
  dfu:usb: DFU USB function (f_dfu) support for g_dnl composite gadget
  dfu:usb: Support for g_dnl composite download gadget.
  ehci: cosmetic: Define the number of qt_buffers

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-09-02 16:38:48 +02:00
Łukasz Dałek
a6a78be025 pxa25x: Add UDC registers definitions
Signed-off-by: Łukasz Dałek <luk0104@gmail.com>
2012-09-01 16:21:53 +02:00
Benoît Thébaudeau
8e99ecd74b mxc: Define architecture identifier
Define ARCH_MXC for i.MX devices. This is useful to identify features or
behaviors common to all i.MX SoCs.

The i.MX28 is omitted because its architecture is a bit different (like imx/mxc
vs. mxs in Linux).

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Kim Phillips <kim.phillips@freescale.com>
2012-09-01 14:58:30 +02:00
fabio.estevam@freescale.com
a123312f4d mxs: Convert timeout parameter to 'unsigned int'
For representing a timeout value, it makes more sense to pass it as
'unsigned int'.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:30 +02:00
Marek Vasut
615a4ad0f6 MX28: DMA: Align the struct mxs_dma_desc
Align this structure to DMA alignment size.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:29 +02:00
trem
e71c39def6 gpio: add gpio api support to mx27 (v4)
The gpio api has been tested on an armadeus apf27.

Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:29 +02:00
Matt Sealey
af369d9831 mx5: add iomux-mx51.h include
Allow usage of the imx-common/iomux-v3.h framework by including pad settings
for the i.MX51. The content of the file is taken from Linux kernel at
commit 5d23b39 plus the required changes to make it work in U-Boot.

The contained pad settings are the minimum required to make an Efika MX boot
and get all the currently-implemented peripherals working in U-Boot.

It is recommended that this file not be just a dumping ground for pins but
only contain the settings required for all the boards using it.

Changes for v2:
 * reference commit id from Linux kernel
 * additionally roll in the USB pads
 * removed GPIO_NUMBER define

Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:29 +02:00
Otavio Salvador
72f8ebf17e mxs: Rename 'mx28_dram_init' to 'mxs_dram_init'
The DRAM initialization, after SPL has complete, is exactly the same
for all mxs SoCs so we should name it accordinly.

The following boards has been changed:

 * apx4devkit
 * m28evk
 * mx28evk
 * sc_sps_1

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
2012-09-01 14:58:28 +02:00
Otavio Salvador
6e829b672e mxs: Replace i.MX233 by i.MX23 on copyright header
All other header are going to use i.MX23 so we change this for
consistency.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:28 +02:00
Benoît Thébaudeau
483920f273 mx35: Remove declaration of non-existing function
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:28 +02:00
Benoît Thébaudeau
7c80326d34 mx35: Move clock enums to clock.h
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:28 +02:00
Benoît Thébaudeau
d365e2d7c3 mx35: Remove declaration of non-existing function
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:28 +02:00
Benoît Thébaudeau
fe24d6143d mx35: Fix broken pin definitions
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:28 +02:00
Benoît Thébaudeau
4311c1ab6a mx5: Undeclare imx_decode_pll()
The imx_decode_pll() function does not exist for mx5, so remove its declaration.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:27 +02:00
Stefano Babic
5fecb36ca0 MX: Set a common gpio.h for all i.MX
Each i.MX has its own gpio.h, defining the same structure.
The internal GPIO controller has the same layout
(at least for the register used by u-boot) and can be shared.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Tested-by: Matt Sealey <matt@genesi-usa.com>
2012-09-01 14:58:27 +02:00
Fabio Estevam
c55068e5b8 mxs: Use correct function name to initialize dram
commit d92591a (mxs: Convert sys_proto.h prefixes to 'mxs') introduced
a mxs_dram_init() function, which is not used anywhere.

Fix it, so that the following warning goes away:

mx28evk.c: In function ‘dram_init’:
mx28evk.c:67:2: warning: implicit declaration of function ‘mx28_dram_init’ [-Wimplicit-function-declaration]

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:27 +02:00
Troy Kisky
124a06d7fb imx-common/cmd_bmode.c: add imx bmode (bootmode) command
This is useful for forcing the ROM's
usb downloader to activate upon a watchdog reset.
Or, you can boot from either SD Card.

Currently, support added for MX53 and MX6Q
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>

Note: MX53 support untested.
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:26 +02:00
Troy Kisky
d1c679a46d iomux: move IOMUX_GPR13_xxx defines
Move mx6 specific defines to arch-mx6 directory.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:26 +02:00
Benoît Thébaudeau
83209cb785 mx35: Remove duplicate GPIO3_BASE_ADDR
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:26 +02:00
Benoît Thébaudeau
f2d3ae0739 mx3: Fix typo on IPU_CONF_CSI_EN
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:26 +02:00
Benoît Thébaudeau
34a31bf52b mx35: Fix typo on EDIO
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:26 +02:00
trem
78befb695d rtc: add support of mx27 rtc
This driver has been tested on board armadeus apf27.

Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:25 +02:00
Otavio Salvador
fa7a51cb82 mxs: Convert sys_proto.h prefixes to 'mxs'
The sys_proto.h functions (except the boot modes) are compatible with
i.MX233 and i.MX28 so we use 'mxs' prefix for its methods.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:25 +02:00
Otavio Salvador
af963ba8f4 mxs: rename regs-clkctrl.h to regs-clkctrl-mx28.h
The CLKCTRL registers are SoC specific so we ought to have it clear on
filename.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:25 +02:00
Donghwa Lee
6fff52b93a video: support exynos pwm backlight driver
This patch support exynos pwm backlight driver. It can control backlight
power and brightness by using pwm.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-09-01 14:58:24 +02:00
Donghwa Lee
a29c832263 video: exynos fb driver supports display port feature
If dp_enabled was set, exynos fb driver support display port feature.
This patch depends on [PATCH] video: support exynos fimd driver
for various exynos series.

http://marc.info/?l=u-boot&m=134119605104467&w=2

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-09-01 14:58:24 +02:00
Donghwa Lee
d2a6982f9b video: support exynos display port drivers
This patch set supports exynos display port drivers.

DisplayPort is an industry standard device to accommodate the increasing board
adoption of digital display technology within the PC and consumer electronics.
The interface supports internal chip-to-chip and external box-to-box digital
display connections.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-09-01 14:58:24 +02:00
Donghwa Lee
c401505000 EXYNOS5: add display port base address
This patch add display port base address for EXYNOS5. In case of EXYNOS4,
use DEVICE_NOT_AVAILABLE macro because DP is not supported.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-09-01 14:58:24 +02:00
Donghwa Lee
b6516677c0 EXYNOS5: support display port phy control function
This patch support display port phy control function.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-09-01 14:58:24 +02:00
Donghwa Lee
ee93dcfa2e video: support exynos fimd driver for various exynos series
This patch supports exynos fimd driver for various exynos series different from
existing it supports only exynos4 chip.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-09-01 14:58:24 +02:00
Rajeshwari Shinde
fd8ef01452 EXYNOS5 : Modify pinnumx settings as per Exynos5250 Rev 1.0
This patch modifies the pinmux settings of MMC and UART as per
Exynos5250 Rev 1.0.
It also corrects the gpio offset calculations.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-09-01 14:58:23 +02:00
Rajeshwari Shinde
10bc1a7f49 EXYNOS5: CLOCK: Add BPLL support
This patch adds support for BPLL clock.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-09-01 14:58:23 +02:00
Rajeshwari Shinde
6071bcaec1 EXYNOS5: CLOCK: Modify MPLL clock out for Exynos5250 Rev 1.0
MPLL clock-out of Exynos5250 Rev 1.0 is always at 1.6GHz.
Adjust the divisor value to get 800MHz as needed by devices
like UART etc

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-09-01 14:58:23 +02:00
Rajeshwari Shinde
87f2e079db Exynos5: DDR3: Add DDR3 memory setup for Exynos5250 Rev 1.0
The patch adds the memory initialization sequence of DDR3.

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-09-01 14:58:23 +02:00
Rajeshwari Shinde
526b570699 EXYNOS5: CLOCK: define additional clock registers for Exynos5250 Rev 1.0
Define additional registers for clock control in Exynos5250 Rev 1.0

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-09-01 14:58:23 +02:00
Rajeshwari Shinde
589c397169 ARCH: SPL: Add parametric board initializer
Add a structure for table-driven configuration mechanism such that no recompilation
is needed to update the configuration parameters, rather than hard-coding
board initialization parameters.

Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-09-01 14:58:22 +02:00
Allen Martin
c037c93bf9 ARM: add tegra20 support to arm720t
Add support for tegra20 arm7 boot processor.  This processor is used
to power on the Cortex A9 and transfer control to it.  In tegra this
processor is an ARM7TDMI not an ARM720T, but since we don't use cache
it was easier to just reuse the ARM720T code as the processors are
otherwise identical except for cache and MMU.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-01 14:58:22 +02:00
Allen Martin
00a2749d7b tegra20: rename tegra2 -> tegra20
This is make naming consistent with the kernel and devicetree and in
preparation of pulling out the common tegra20 code.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-01 14:58:21 +02:00
Stephen Warren
efad6cf881 ARM: add basic support for the Broadcom BCM2835 SoC
This SoC is used in the Raspberry Pi, for example.

For more details, see:
http://www.broadcom.com/products/BCM2835
http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf.

Initial support is enough to boot to a serial console, execute a minimal
set of U-Boot commands, download data over a serial port, and boot a
Linux kernel. No storage or network drivers are implemented.

GPIO driver originally by Vikram Narayanan <vikram186@gmail.com>
with many fixes from myself.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2012-09-01 14:58:21 +02:00
Mathieu J. Poirier
75dfe964cb u8500: Enabling power to MMC device on AB8500 V2
Register mapping has changed on power control chip between
the first and second revision.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:20 +02:00
Mathieu J. Poirier
1e37322e5a u8500: Moving processor-specific functions to cpu area.
Functions such as providing power to the MMC device and reading
the processor version register should be in the cpu area for
access by multiple u8500-based boards.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:20 +02:00
Mathieu J. Poirier
b95f9ec7d8 snowball: applying power to LAN and GBF controllers
LAN and GBF need to be powered explicitely, doing so with
interface to AB8500 companion chip.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
2012-09-01 14:58:20 +02:00
Mathieu J. Poirier
101a769d75 snowball: Moving to ux500.v2 addess scheme for PRCMU access
Addresses between ux500.v1 and ux500.v2 have changed slightly,
hence mandating a review of the PRCMU access methods.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
2012-09-01 14:58:20 +02:00
Mathieu J. Poirier
81637e26b3 snowball: Adding CPU clock initialisation
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
2012-09-01 14:58:20 +02:00
Mathieu J. Poirier
9652de7c48 snowball: Adding architecture dependent initialisation
Enabling timers and clocks in PRCMU and cleaning up mailbox.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
2012-09-01 14:58:19 +02:00
Mathieu J. Poirier
42cb8fb6cb u8500: Moving prcmu to cpu directory
This is to allow the prcmu functions to be used by multiple
u8500-based processors.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
2012-09-01 14:58:19 +02:00
Mathieu J. Poirier
84dee301c3 snowball: Add support for ux500 based snowball board
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>

Conflicts:

	drivers/gpio/Makefile
2012-09-01 14:58:19 +02:00
Satyanarayana, Sandhya
6995a28937 am33xx evm: Update secure_emif_sdram_config during ddr init
This patch updates secure_emif_sdram_config with the
same value written to sdram_config during ddr3 initialization.

During suspend/resume, this value is copied into sdram_config.
With this, a write to sdram_config at the end of resume sequence
which triggers an init sequence can be avoided.

Without this register write in place, the DDR_RESET line goes
low for a few cycles during resume which is a violation of the
JEDEC spec.

Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
2012-09-01 14:58:19 +02:00
Sughosh Ganu
25f8bf6eff da8xx/hawkboard: Add support for ohci host controller
Also enable the ohci port on hawkboard. These additions result in an
increased u-boot size -- adjust the same accordingly in the board's
config.

Move the usb header for da8xx platforms under arch-davinci.

Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
2012-09-01 14:58:19 +02:00
Tom Rini
41aebf8106 omap4/5/am33xx: Make lowlevel_init available to all armv7 platforms
Make the lowlevel_init function that these platforms have which just
sets up the stack and calls a C function available to all armv7
platforms.  As part of this we change some of the macros that are used
to be more clear.  Previously (except for am335x evm) we had been
setting CONFIG_SYS_INIT_SP_ADDR to a series of new defines that are
equivalent to simply referencing NON_SECURE_SRAM_END.  On am335x evm we
should have been doing this initially and do now.

Cc: Sricharan R <r.sricharan@ti.com>
Tested-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:19 +02:00
Tom Rini
0689a2ef19 am33xx: Correct MMC1, remove MMC2 support
- Correct the MMC1 base offset
- Remove MMC2 (that area is reserved and not MMC2).
- Add the real BOOT_DEVICE_MMC2 value

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:18 +02:00
Otavio Salvador
1e0cf5c34b mxs: Reowork SPL to use 'mxs' prefix for methods
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:17 +02:00
Otavio Salvador
9c471142bc mxs: prefix register structs with 'mxs' prefix
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:17 +02:00
Otavio Salvador
ddcf13b152 mxs: prefix register acessor macros with 'mxs' prefix
As the register accessing mode is the same for all i.MXS SoCs we ought
to use 'mxs' prefix intead of 'mx28'.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:17 +02:00
Otavio Salvador
3a0398d7b9 mxs: reorganize source directory for easy sharing of code in i.MXS SoCs
Most code can be shared between i.MX23 and i.MX28 as both are from
i.MXS family; this source directory structure makes easy to share code
among them.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:17 +02:00
Otavio Salvador
b0261b1212 MX28: extend print_cpuinfo() to use chip information
The information now is gathered from HW_DIGCTL_CHIPID register and
includes the chip modem and revision on the output.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:16 +02:00
Bo Shen
f7fa2f3740 arm : Atmel : add at91sam9x5ek board support
Add at91sam9x5ek board support, this board support the following SoCs
  AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, AT91SAM9X25, AT91SAM9X35

Using at91sam9x5ek_nandflash to configure for the board
Now only supports NAND with software ECC boot up

Signed-off-by: Bo Shen <voice.shen@atmel.com>
[move MAINTAINERS entry to right place]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 14:58:14 +02:00
Laurence Withers
de9d2e3d60 DaVinci DA8xx: replace magic number for DDR speed
Replace a magic number for the DDR2/mDDR PHY clock ID with a proper
definition. In addition, don't request this clock ID on DA830 hardware,
which does not have a DDR2/mDDR PHY (or associated PLL controller).

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Cc: Tom Rini <trini@ti.com>
Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>
2012-09-01 14:58:14 +02:00
Laurence Withers
88ac6b9d14 DaVinci DA850: UART2 clock ID comes from ASYNC3
On the DA830, UART2's clock is derived from PLL controller 0 output 2.
On the DA850, it is in the ASYNC3 group, and may be switched between PLL
controller 0 or 1. Fix the definition of the ID to match.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Cc: Tom Rini <trini@ti.com>
Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>
2012-09-01 14:58:14 +02:00
Laurence Withers
8a54aa0da7 DaVinci DA8xx: tidy up clock ID definition
Tidy up the clock IDs defined for the DA8xx SOCs. With this new structure in
place, it is clear how to define new clock IDs, and how these map to the
numbers presented in the technical reference manual.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Cc: Tom Rini <trini@ti.com>
Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:13 +02:00
Tom Rini
db7dd8109c am33xx: Rework pinmux functions
- Move definition of the EEPROM contents to <asm/arch/sys_proto.h>
  - Make some defines a little less generic now.
- Pinmux must be done by done by SPL now.
- Create 3 pinmux functions, uart0, i2c0 and board.
- Add pinmux specific to Starter Kit EVM for MMC now.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:13 +02:00
Tom Rini
65d750be59 am33xx: Add support for TI AM335x StarterKit EVM
- Board requires gpio0 #7 to be set to power DDR3.
- Board uses DDR3, add a way to determine which DDR type to call
  config_ddr with.
- Both of the above require filling in the header structure early, move
  it into the data section.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:13 +02:00
Tom Rini
d4898ea896 am33xx: Add DDR3 (Micron MT41J128M16JT-125) timings and support
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:13 +02:00
Tom Rini
a74f0c7cb5 am33xx: Correct and clean up ddr_regs struct
The ddr_regs struct was incorrectly offset after the dt0wiratio0 entry.
Correct this by documenting a missing register that will be used at some
point in the future (when write leveling is supported).  Further, the
cmdNcs{force,delay} fields are undocumented and we have been setting
them to zero, remove.  Next, setting of the
'DATAn_REG_PHY_USE_RANK0_DELAYS field belongs with the rest of the
ddr_data entries, so program it there.  Finally, comment on how we are
configuring the DATA1 registers that correspond to the DATA0 (dt0)
registers defined in the struct.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:13 +02:00
Tom Rini
82afcc9efd am33xx: Do not touch 'ratio1' fields
The various ratio1 fields are not documented in any of the documentation
I can find.  Removing these and testing has yielded success, so remove
the code that sets them and move their locations into the reserved
fields.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:12 +02:00
Tom Rini
5ac3b7ada1 am33xx: Rework config_io_ctrl slightly
This function sets a number of related registers to the same value (the
registers in question all have the same field descriptions and are
related in operation).  Rather than defining a struct and setting the
value repeatedly, just pass in the value.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:12 +02:00
Tom Rini
ff7ec0f945 am33xx: Use emif_regs struct for storing initialization values
Rather than defining our own structs to note what to use when
programming the EMIF and related re-use the emif_regs struct.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:12 +02:00
Tom Rini
87a1acbb69 am33xx: Turn a number of 'int' functions to 'void'
A number of memory initalization functions were int and always returned
0.  Further it's not feasible to be doing error checking here, so simply
turn them into void functions.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:12 +02:00
Tom Rini
c48c895433 am33xx: Document what we're doing with ddrctrl->ddrckectrl
- Remove the call to set ddrctrl->ddrioctrl as it's all zeros.
- Comment what we're really setting in ddrctrl->ddrckectrl which is that
  we're operating in the normal mode where EMIF/PHY clock is controlled
  by the PHY.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:12 +02:00
Vaibhav Bedia
7d8a961d31 am335x: ddr_defs: Update EMIF parameters
EMIF parameters are calculated based on the AC timing
parameters from the SDRAM datasheet and the DDR frequency.

Current values for these paramters in AM335x U-Boot code,
though reliable, are not fully optimal. The most optimal
settings can be derived based on the guidelines published
at [1]. A pre-computed set of values with the most optimum
settings for AM335x EVM and BeagleBone can be found at [2].

[1] http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips
[2] http://processors.wiki.ti.com/index.php/OMAP_and_Sitara_CCS_support#AM335x

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:12 +02:00
Tom Rini
c8da4a587c am33xx: Clean up unused DDR defines, prefix more with 'DDR2'
- Remove a handful of unused defines.
- Prefix more values with 'DDR2' as DDR3 will require different values.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:12 +02:00
Tom Rini
b971dfad6a am33xx: Move the call to ddr_pll_config, make it take the frequency
Depending on if we have DDR2 or DDR3 on the board we will need to call
ddr_pll_config with a different value.  This call can be delayed
slightly to the point where we know which type of memory we have.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:12 +02:00
Tom Rini
fda35eb982 am33xx: Pass to config_ddr the type of memory that is connected
We need to pass in the type of memory that is connected to the board.
The only reliable way to do this is to know what type of board we are
running on (which later will be knowable in s_init()).  For now, pass in
the value of DDR2.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:12 +02:00
Tom Rini
bce58fece5 am33xx: Make config_cmd_ctrl / config_ddr_data take const structs
Rework the EMIF4/DDR code slightly to setup the structs that
config_cmd_ctrl and config_ddr_data take to be setup at compile time and
mark them as const.  This lets us simplify the calling path slightly as
well as making it easier to deal with DDR3.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:12 +02:00
Tom Rini
7d5eb34908 am33xx: Convert to using <asm/emif.h> to describe the EMIF
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:11 +02:00
Tom Rini
79b3e6b75b am33xx: Remove DMM_BASE define
The am33xx does not have a DMM, so don't define the base.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:11 +02:00
Javier Martinez Canillas
41708a5db4 OMAP3: mem: Add Numonyx OneNAND 200MHz timing information
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
2012-09-01 14:58:11 +02:00
Chandan Nath
89017e150e am33xx: pin mux defintions for CPSW switch
This patch adds pin mux settings for CPSW switch found on
TI AM335X based boards (MII and RGMII modes).

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
[Ilya: split pinmux into separate patch]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-09-01 14:58:11 +02:00
Chandan Nath
e79cd8eb9b am33xx: CPSW init and definitions
This patch adds platform-specific initialization for CPSW
switch on TI AM33XX SoCs.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
[Ilya: split init out of original patch]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-09-01 14:58:11 +02:00
Mikhail Kshevetskiy
680866a502 arm/davinci/da850: add uart0 pinmux
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
Tested-by: Sughosh Ganu <urwithsughosh@gmail.com>
2012-09-01 14:58:10 +02:00
Mikhail Kshevetskiy
89473d233f arm/davinci: fix DDR2/mDDR memory controller initialization for Omap L138
follow section 15.2.13.1 (Initializing Following Device Power Up or Reset) of
OMAP-L138 DSP+ARM Processor Technical Reference Manual

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>
Tested-by: Christian Riesch <christian.riesch@omicron.at>
2012-09-01 14:58:10 +02:00
Lad, Prabhakar
ecc98ec18c da850/omap-l138: Add MMC support for DA850/OMAP-L138
This patch adds support for MMC/SD on DA850/OMAP-L138.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
2012-09-01 14:58:09 +02:00
Steve Sakoman
3b97152b63 omap: am33xx: enable gpio support
This patch uses the code in omap-common to support gpio modules 1-3
on am33xx based boards.

It adds base address and register definitions, enables clocks to the
modules, and enables building the common gpio code for CONFIG_AM33XX
as well as CONFIG_OMAP

Signed-off-by: Steve Sakoman <steve@sakoman.com>
2012-09-01 14:58:09 +02:00
Mike Frysinger
47fde91f0c global_data: unify global flag defines
All the global flag defines are the same across all arches.  So unify them
in one place, and add a simple way for arches to extend for their needs.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-08-09 21:46:32 +02:00
Rajeshwari Shinde
91dffb16ff I2C: Move struct s3c24x0_i2c to a common place.
struct s3c24x0_i2c is being moved to common local header file so that
the same can be used by s3c series and exynos series SoCs.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-07-31 08:02:41 +02:00
Rajeshwari Shinde
c65c05f57f EXYNOS: PINMUX: Add pinmux support for I2C
This patch adds pinmux code for I2C.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-07-31 08:02:28 +02:00
Rajeshwari Shinde
8da3eb1b22 EXYNOS5: define EXYNOS5_I2C_SPACING
This patch defined EXYNOS5_I2C_SPACING used to calculate I2C channel
base address.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-07-31 08:02:07 +02:00
Rajeshwari Shinde
1a758aec3d EXYNOS: Add I2C base address.
This patch adds the base address for I2C.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-07-31 08:01:56 +02:00
Rajeshwari Shinde
989feb8c52 EXYNOS: CLK: Add i2c clock
This adds i2c clock information for EXYNOS5.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-07-31 08:01:32 +02:00
Troy Kisky
cc54a0f7cc imx-common: add i2c.c for bus recovery support
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-07-31 08:00:57 +02:00
Troy Kisky
df369dcdb0 i.mx53: add definition for I2C3_BASE_ADDR
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-07-31 08:00:44 +02:00
Troy Kisky
af2a35fb1f i.mx: iomux-v3.h: move to imx-common include directory
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-07-31 08:00:19 +02:00
Ashok
6b8ac524e7 mx6: Make pad name macro consistent with the datasheet
Use the same name as defined in the datasheet.
DSP_CLK -> DISP_CLK

Signed-off-by: Ashok Kumar Reddy Kourla <ashokkourla2000@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-07-20 23:03:28 +02:00
Wolfgang Denk
66714b1a6d Merge branch 'next' of git://git.denx.de/u-boot-video
* 'next' of git://git.denx.de/u-boot-video:
  ipu_common: Add ldb_clk for use in parenting the pixel clock
  ipu_common: Do not hardcode the ipu_clk frequency
  ipu_common: Rename MXC_CCM_BASE
  ipu_common: Let clk_ipu_enable/disable only run on MX51 and MX53
  ipu_common: Only apply the erratum to MX51
  video: Rename CONFIG_VIDEO_MX5
  mx6: Allow mx6 to access the IPUv3 registers
  common lcd: minor coding style changes

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-18 10:47:03 +02:00
Troy Kisky
de6f604de2 mxc_i2c: specify i2c base address in config file
The following platforms had their config files changed
flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd
and mx53loco.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-11 10:54:29 +02:00
Fabio Estevam
05d4df1d8a mx6: Allow mx6 to access the IPUv3 registers
Adjust the IPUv3 registers, so that the IPUv3 driver can be extended for mx6 as well.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-10 11:35:38 +02:00
Wolfgang Denk
895f3e0542 Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
  tegra: define fdt_load/fdt_high variables
  tegra: enable bootz command
  tegra: usb: Fix device enumeration problem of USB1
  tegra: trimslice: set up serial flash pinmux
  tegra: add pin_mux_spi() board initialization function
  tegra: add GMC/GMD funcmux entry for SFLASH
  tegra: bootcmd: start USB only when needed
  tegra: bootcmd enhancements
  tegra: add enterrcm command
  tegra: enable CONFIG_ENV_VARS_UBOOT_CONFIG
  Add env vars describing U-Boot target board
  tegra: usb: fix wrong error check
  tegra: add ULPI on USB2 funcmux entry
  tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches
  tegra: Add Tamonten Evaluation Carrier support
  tegra: Use SD write-protect GPIO on Tamonten
  tegra: Implement gpio_early_init() on Tamonten
  tegra: Allow boards to perform early GPIO setup
  tegra: plutux: Add device tree support
  tegra: medcom: Add device tree support
  tegra: Rework Tamonten support
  beagle: add eeprom expansion board info for bct brettl4

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-10 08:54:41 +02:00
Jim Lin
8b3f7bf7ec tegra: usb: Fix device enumeration problem of USB1
A known hardware issue of USB1 port where bit 1 (connect status
change) of PORTSC register will be set after issuing Port Reset
(like "usb reset" in u-boot command line).
This will be treated as an error and stops later device enumeration.

Therefore we clear that bit after Port Reset in order to proceed
later device enumeration.

Signed-off-by: Jim Lin <jilin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09 22:44:34 +02:00
Stephen Warren
a016e144ed tegra: add GMC/GMD funcmux entry for SFLASH
This is used on TrimSlice.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09 22:44:33 +02:00
Lucas Stach
f97daaa231 tegra: add ULPI on USB2 funcmux entry
This is needed as a prerequisite for Tegra USB ULPI support
within U-Boot.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Tom Warren <twarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09 22:44:33 +02:00
Rajeshwari Shinde
86d74d0339 EXYNOS5: USB: Fix incorrect USB base addresses
This patch corrects the base addresses for USB_PHY and USB_OTG.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Chander Kashyap <chander.kashyap@linaro.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
2012-07-09 18:27:55 +02:00
Rajeshwari Shinde
c48ac11322 EXYNOS: Add power Enable/Disable for USB-EHCI
This patch adds functions to enable/disable the power of USB
host controller for EXYNOS5.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
2012-07-09 18:27:55 +02:00
Rajeshwari Shinde
71045da812 USB: EXYNOS: Set USB 2.0 HOST Link mode
This patch adds a function to set usb host mode to USB 2.0 HOST Link
for EXYNOS5

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
2012-07-09 18:27:55 +02:00
Rajeshwari Shinde
f9c4e04be7 EXYNOS5: Add structure for PMU registers
This patch adds power mananagement registers structure for exynos5 SoC.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Chander Kashyap <chander.kashyap@linaro.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
2012-07-09 18:27:55 +02:00
Rajeshwari Shinde
775b6f728d EXYNOS5: Fix system register structure
This patch corrects the SYSREG structure.
We have removed the sysreg.h added in the previous patchset
version as the sysreg structure is already defined in system.h.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
2012-07-09 18:27:54 +02:00
Rajeshwari Shinde
7590d3cece USB: EXYNOS: Incorporate EHCI review comments
This patch incorates the review comments given by Minkyu Kang for
EHCI support on EXYNOS

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
2012-07-09 18:27:54 +02:00
Fabio Estevam
d519b4bc0a ARM: introduce arch_early_init_r()
Introduce arch_early_init_r() function, which can be useful for doing
early initialization after relocation has happened.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-07 14:07:44 +02:00
Stefan Roese
4ae8bc4392 SPL: ARM: spear: Add SPL support for SPEAr600 platform
This patch adds SPL support for SPEAr600. Currently only SNOR
(Serial NOR) flash support is included. Other boot devices
(NAND, MMC, USB ...) may be added with later patches.

Tested on the STM SPEAr600 evaluation and x600 SPEAr600 boards.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
2012-07-07 14:07:43 +02:00
Stefan Roese
2cb06a4fda GPIO: Add SPEAr GPIO driver
Tested on x600 (SPEAr600).

Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:42 +02:00
Amit Virdi
bc0bdf4c22 cleanup/SPEAr: Remove unnecessary parenthesis
In SPEAr configuration files, unnecessary paranthesis are used in some
\#defines. Remove them as they serve no purpose

Signed-off-by: Amit Virdi <amit.virdi@st.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:42 +02:00
Shiraz Hashim
f28e5c946d SPEAr: Correct SoC ID offset in misc configuration space
SoC Core ID offset is 0x30 in miscellaneous configuration address
space. It was wrongly mentioned as periph2 clk enable.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:42 +02:00
Shiraz Hashim
7c885a0e55 SPEAr: explicitly select clk src for UART
UART in u-boot intends to run on 48MHz clock supplied by USB PLL.
Explicitly select the intended clock source.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:42 +02:00
Vipin KUMAR
962d026b6a SPEAr: Add basic arch related support for SPEAr SoCs
Earlier, architecture specific init code was mixed with board initialization
code in board/spear/... This patch updates architecture support for SPEAr in
latest u-boot and prints the SoC information.

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:40 +02:00
Vipin KUMAR
8eb0ee6a64 SPEAr: Add macb driver support for spear310 and spear320
SPEAr310 and SPEAr320 SoCs have an extra ethernet controller. The
driver for this device is already supported by u-boot, so configuring
board configuration file and defining base addresses etc to make use
of the common driver

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:40 +02:00
Vipin KUMAR
deb0056227 SPEAr: Configure network support for spear SoCs
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:40 +02:00
Amit Virdi
70fdbefc6c SPEAr: Eliminate dependency on Xloader table
Xloader table was used primarily to inform u-boot about the DDR size. However,
now the ddr size is calculated at runtime which eliminates any need for the
Xloader table. So removing this unnecessary code.

Signed-off-by: Amit Virdi <amit.virdi@st.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:40 +02:00
Vipin KUMAR
f3fcf92d59 st_smi: Add support for SPEAr SMI driver
SMI is the serial memory interface controller provided by ST.

Earlier, a driver exists in the u-boot source code for the SMI IP. However, it
was specific to spear platforms. This commit converts the same driver to a more
generic driver. As a result, the driver files are renamed to st_smi.c and
st_smi.h and moved into drivers/mtd folder for reusability by other platforms
using smi controller peripheral.

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:38 +02:00
Vipin KUMAR
0def98e7be mtd/NAND: Remove obsolete SPEAr specific NAND drivers
Since, SPEAr platform uses generic FSMC driver now, so spear specific files
drivers/mtd/nand/spr_nand.c, arch/arm/include/asm/arch-spear/spr_nand.h are
removed

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
2012-07-07 14:07:38 +02:00
Vipin KUMAR
1fa943b99d SPEAr: Configure FSMC driver for NAND interface
Since FSMC is a standard IP and it supports different memory interfaces, it
is supported independent of spear platform and spear is configured to use that
driver for interfacing with the NAND device

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
2012-07-07 14:07:38 +02:00
SRICHARAN R
254763822e ARM: OMAP4+: Move external phy initialisations to arch specific place.
The external phy is present in the case OMAP5 soc is currently
configured in emif-common.c. This results in having dummy structures
for those Socs which do not have a external phy. So by having a weak
function in emif-common and overriding it in OMAP5, avoids the use
of dummy structures.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-07-07 14:07:35 +02:00
Steve Sakoman
f2b37a6533 omap: am33xx: accomodate input clocks other than 24 Mhz
The PLL setup values currently assume a 24 Mhz input clock.

This patch uses V_OSCK from the board config file to support boards
with different input clock rates.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
2012-07-07 14:07:35 +02:00
Lokesh Vutla
38f25b125e OMAP4+: Force DDR in self-refresh after warm reset
Errata ID:i727

Description: The refresh rate is programmed in the EMIF_SDRAM_REF_CTRL[15:0]
REG_REFRESH_RATE parameter taking into account frequency of the device.
When a warm reset is applied on the system, the OMAP processor restarts
with another OPP and so frequency is not the same. Due to this frequency
change, the refresh rate will be too low and could result in an unexpected
behavior on the memory side.

Workaround:
The workaround is to force self-refresh when coming back from the warm reset
with the following sequence:
• Set EMIF_PWR_MGMT_CTRL[10:8] REG_LP_MODE to 0x2
• Set EMIF_PWR_MGMT_CTRL[7:4] REG_SR_TIM to 0x0
• Do a dummy read (loads automatically new value of sr_tim)
This will reduce the risk of memory content corruption, but memory content
can't be guaranteed after a warm reset.

This errata is impacted on
OMAP4430: 1.0, 2.0, 2.1, 2.2, 2.3
OMAP4460: 1.0, 1.1
OMAP4470: 1.0
OMAP5430: 1.0

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
2012-07-07 14:07:35 +02:00
Lokesh Vutla
702395073f ARM: OMAP3+: Detect reset type
Certain modules are not affected by means of
a warm reset and need not be configured again.
Adding an API to detect the reset reason warm/cold.

This will be used to skip the module configurations
that are retained across a warm reset.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-07-07 14:07:34 +02:00
Valentin Longchamp
dacc8c6f79 arm/kirkwood: protect the ENV_SPI #defines
So that they can be redefined by some boards specific values.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2012-07-07 14:07:33 +02:00
Valentin Longchamp
ac486e3ba1 kw_spi: support spi_claim/release_bus functions
These two function nows ensure that the MPP is configured correctly for
the SPI controller before any SPI access, and restore the initial
configuration when the access is over.

Since the used pins for the SPI controller can differ (2 possibilities
for each signal), the used pins are configured with CONFIG_SYS_KW_SPI_MPP.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2012-07-07 14:07:32 +02:00
Valentin Longchamp
8f5d7a0398 kirkwood: add save functionality kirkwood_mpp_conf function
If a second non NULL argument is given to the kirkwood_mpp_conf
function, it will be used to store the current configuration of the MPP
registers. mpp_save  must be a preallocated table of the same size as
mpp_list and it must be zero terminated as well.

A later call to kirkwood_mpp_conf function with this saved list as first
(mpp_conf) argment will set the configuration back.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2012-07-07 14:07:31 +02:00
Bo Shen
2b3b1c668b ATMEL/PIO: Enable new feature of PIO on Atmel device
Enable new PIO feature supported by Atmel SoC.
Using CPU_HAS_PIO3 micro to enable PIO new feature.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-07-07 14:07:30 +02:00
Otavio Salvador
8b8d81047d MX28: Fix a typo in mx28_reg_8 macro
The macro mistakenly referred to 32bit struct instead of 8bit one.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
2012-07-07 14:07:27 +02:00
Jason Liu
0d952e5d2e i.mx: i.mx6x: NO_MUX_I/NO_PAD_I not set correctly
If one PAD does not have mux or pad config register, we need
set the NO_MUX_I/NO_PAD_I to 0, the old value is not correct

Signed-off-by: Jason Liu <jason.hui@linaro.org>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-07 14:07:25 +02:00
Rajeshwari Shinde
c5e3710a18 EXYNOS5: PINMUX: Added default pinumx settings
This patch performs the pinmux configuration in a common file.
As of now only EXYNOS5 pinmux for SDMMC, UART and Ethernet is
supported.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Chander Kashyap <chander.kashyap@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-07-07 14:07:25 +02:00
Minkyu Kang
7775831dd3 Exynos: fix cpuinfo and cpu detecting
Since Exynos architecture have new SoCs,
need to fix cpuinfo correctly.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Chander Kashyap <chander.kashyap@linaro.org>
2012-07-07 14:07:25 +02:00
SRICHARAN R
e423a8f76d ARM: OMAP4: Correct the lpddr2 io settings register value.
To meet certain timing requirements on the lpddr2 cmd and data phy
interfaces ,lpddr iopads have to be configured as differential buffers
and a Vref has to be internally generated and provided to these buffers.

Correcting the above settings here.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-07-07 14:07:24 +02:00
Lokesh Vutla
7fd5b9bfe4 OMAP5: Change voltages for omap5432
Change voltages for OMAP5432

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-07-07 14:07:24 +02:00
Lokesh Vutla
753bae8c5d OMAP5: DPLL core lock for OMAP5432
No need to Unlock DPLL initially.
DDR3 can work at normal OPP from initialozation

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-07-07 14:07:24 +02:00
Lokesh Vutla
784ab7c545 OMAP5: EMIF: Add support for DDR3 device
In OMAP5432 EMIF controlller supports DDR3 device.
This patch adds support for ddr3 device intialization and configuration.
Initialization sequence is done as specified in JEDEC specs.
This also adds support for ddr3 leveling.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-07-07 14:07:24 +02:00
Lokesh Vutla
43037d7631 OMAP5: ADD precalculated timings for ddr3
Adding precalculated timings for ddr3 with 1cs
adding required registers for ddr3

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-07-07 14:07:23 +02:00
Lokesh Vutla
eb4e18e89e OMAP5: Configure the io settings for omap5432 uevm board
This patch adds the IO settings required for OMAP5432 uevm's DDR3 pads

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-07-07 14:07:23 +02:00
Lokesh Vutla
0a0bf7b217 OMAP5: ADD chip detection for OMAP5432 SOC
This patch adds chip detection for OMAP5432

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-07-07 14:07:23 +02:00
Lokesh Vutla
851bebd68c OMAP5: Adding correct Control id code for OMAP5430
Control id code for omap5430 ES1.0 is hard coded with a wrong value.
This patch corrects the value

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-07-07 14:07:23 +02:00
Tom Rini
65c206b688 am33xx: Fix i2c sampling rate typo
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
2012-07-07 14:07:22 +02:00
Tom Rini
d88bc0425b am33xx: Fill in more cm_wkuppll / cm_perpll
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
2012-07-07 14:07:22 +02:00
Tom Rini
fe4f97b98f am335x: Correct i2c sysc offset
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
2012-07-07 14:07:22 +02:00
SRICHARAN R
e843d0f7ee ARM: OMAP5: Correct the DRAM_ADDR_SPACE_END macro.
OMAP5 evm board has 2GB of memory. So correct the
macro to take in to account of the full dram size.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-07-07 14:07:22 +02:00
Tom Rini
2ab2810375 am33xx: Do not call init_timer twice
We do not need to call init_timer both in SPL and U-Boot itself, just
SPL needs to initialize the timer.

Signed-off-by: Tom Rini <trini@ti.com>
2012-07-07 14:07:21 +02:00
Tom Warren
76e350b7a3 arm: Tegra: Use ODMDATA from BCT in IRAM
Walk the BIT and BCT to find the ODMDATA word in the
CustomerData field and put it into Scratch20 reg for
use by kernel, etc.

Built all Tegra builds OK; Booted on Seaboard and saw
ODMDATA in PMC scratch20 was the same as the value in my
burn-u-boot.sh file (0x300D8011). NOTE: All flash utilities
will have to specify the odmdata (nvflash --odmdata n) on
the command line or via a cfg file, or built in to their
BCT.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2012-07-07 14:07:21 +02:00
Tom Warren
52a8b82074 gpio: tegra2: rename tegra2_gpio.* to tegra_gpio.*
In anticipation of Tegra3 support, continue removing/renaming
Tegra2-specific files. No functional changes (yet).
Updated copyrights to 2012.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:20 +02:00
Tom Warren
edffa63d3d spi: tegra2: rename tegra2_spi.* to tegra_spi.*
In anticipation of Tegra3 support, start removing/renaming
Tegra2-specific files. No functional changes (yet).
Also updated copyright to 2012.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:20 +02:00
Simon Glass
27c4a3318f tegra: Correct PLL access in ap20.c and clock.c
Correct this warning seen by Albert:

ap20.c:44:18: warning: array subscript is above array bounds

There is a subtle bug here which currently causes no errors, but might
in future if people use PCI or the 32KHz clock. So take the opportunity
to correct the logic now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:19 +02:00
Stephen Warren
d1e4607901 tegra: add SDMMC1 on SDIO1 funcmux entry
This will be used on TrimSlice.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:18 +02:00
Lucas Stach
a2cfe63eeb tegra: add SDIO1 funcmux entry for UARTA
This is based on top of:
tegra: add alternate UART1 funcmux entry
tegra: add UART1 on GPU funcmux entry

v2: remove enum change

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Tom Warren <twarren@nvidia.com>
CC: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:18 +02:00
Lucas Stach
ffec1eb9c7 tegra: sync SDIO1 pingroup enum name with TRM
Signed-off-by: Lucas Stach <dev@lynxeye.de>
CC: Tom Warren <twarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:18 +02:00
Stephen Warren
e21649be56 tegra: add UART1 on GPU funcmux entry
TrimSlice uses UART1 on the GPU pingroup.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:18 +02:00
Stephen Warren
b9607e7061 tegra: add alternate UART1 funcmux entry
(In at least some configurations) Whistler uses UART1 on pingroups
UAA, UAB.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:17 +02:00
Tom Warren
078078cfa9 spi: Tegra2: Seaboard: fix UART corruption during SPI transactions
Simon Glass's proposal to fix this on Seaboard was NAK'd, so I
removed his NS16550 references and added a small delay before
SPI/UART muxing. Tested on my Seaboard with large SPI reads/writes
and saw no corruption (crc's matched) and no spurious comm chars.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Jimmy Zhang <jimmzhang@nvidia.com>
2012-07-07 14:07:17 +02:00
Jeroen Hofstee
8da2efb661 omap3_dss: cosmetic changes
Remove unnecessary brackets.
Unwrap lines which are below 80 chars.
Single line comment as single line (as the rest).
Moved init values to the source code.

cc: s-paulraj@ti.com
cc: khasim@ti.com
Signed-off-by: Jeroen Hofstee <jhofstee@victronenergy.com>
2012-05-25 15:35:25 +02:00
Jeroen Hofstee
d9c13aac14 omap3_dss: add optional framebuffer
The beagle board uses the background color to show an orange screen during
startup. This patch adds the ability to add a frame buffer, with the
intention not to break the beagle board use case (I don't have one).
videomodes.c is not used. Scrolling depends on this patch:

http://patchwork.ozlabs.org/patch/155662/

cc: trini@ti.com
cc: s-paulraj@ti.com
cc: khasim@ti.com
Signed-off-by: Jeroen Hofstee <jhofstee@victronenergy.com>
2012-05-25 15:34:18 +02:00
Fabio Estevam
fff6ef72b3 mx53: Allow IPUv3 driver to also work on mx53
Adjust the IPU base registers so that ipuv3 driver can work on both mx51 and
mx53 SoCs.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-05-25 10:36:29 +02:00
Donghwa Lee
3d02408665 LCD: support another s6e8ax0 panel type
s6e8ax0 panel has many panel of types. This patch support another panel
on TIZEN lunchbox board(HWREVISION 2). This panel has reversed panel
display type. So, I had added necessary command.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2012-05-25 09:15:09 +02:00
Wolfgang Denk
2ab5be7af0 Merge branch 'master' of git://git.denx.de/u-boot-usb
* 'master' of git://git.denx.de/u-boot-usb:
  USB: S5P: Add ehci support
  usb:udc:samsung Add functions for storing private gadget data in UDC driver
  usb:gadget:composite: Support for composite at gadget.h
  usb:gadget:composite USB composite gadget support
  usb:udc:samsung:cleanup Replace DEBUG_* macros with debug_cond() calls
  usb:udc: Remove duplicated USB definitions from include/linux/usb/ch9.h file
  USB: Document the QH and qTD antics in EHCI-HCD
  USB: Drop cache flush bloat in EHCI-HCD
  USB: Drop ehci_alloc/ehci_free in ehci-hcd
  USB: Align buffers at cacheline
  usb: use noinline define
2012-05-20 22:51:41 +02:00
Wolfgang Denk
8bd07c9aaf Merge branch 'master' of git://git.denx.de/u-boot-net
* 'master' of git://git.denx.de/u-boot-net:
  net: move bootfile init into eth_initialize
  net: punt bd->bi_ip_addr
  net: cosmetic: netconsole.c checkpatch compliance
  net: cosmetic: tftp.* checkpatch compliance
  net: cosmetic: sntp.* checkpatch compliance
  net: cosmetic: rarp.* checkpatch compliance
  net: cosmetic: nfs.* checkpatch compliance
  net: cosmetic: net.c checkpatch compliance
  net: cosmetic: eth.c checkpatch compliance
  net: cosmetic: bootp.* checkpatch compliance
  net: cosmetic: net.h checkpatch compliance
  net: Remove volatile from net API
2012-05-20 22:33:44 +02:00
Wolfgang Denk
ee3a55fdf0 Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: (167 commits)
  OMAP4/5: Change omap4_sdp, omap4_panda, omap5_evm maintainer
  ARM: omap3: Add CONFIG_SPL_BOARD_INIT for CONFIG_SPL_MMC_SUPPORT
  ARM: omap3: Set SPL stack size to 8KB, image to 54KB.
  arm, omap3: fix warm reset serial output on OMAP36xx/AM/DM37xx
  OMAP4: Set fdt_high for OMAP4 devices to enable booting with Device Tree
  omap4: do not enable auxiliary cores
  omap4: do not enable fs-usb module
  omap4: panda: disable uart2 pads during boot
  igep00x0: change mpurate from 500 to auto
  igep00x0: enable the use of a plain text file
  tegra2: trivially enable 13 mhz crystal frequency
  tegra: Enable keyboard for Seaboard
  tegra: Switch on console mux and use environment for console
  tegra: Add tegra keyboard driver
  tegra: fdt: Add keyboard definitions for Seaboard
  tegra: fdt: Add keyboard controller definition
  tegra: Add keyboard support to funcmux
  input: Add support for keyboard matrix decoding from an fdt
  input: Add generic keyboard input handler
  input: Add linux/input.h for key code support
  fdt: Add fdtdec functions to read byte array
  tegra: Enable LP0 on Seaboard
  tegra: fdt: Add EMC data for Tegra2 Seaboard
  tegra: i2c: Add function to find DVC bus
  fdt: tegra: Add EMC node to device tree
  tegra: Add EMC settings for Seaboard
  tegra: Turn off power detect in board init
  tegra: Set up warmboot code on Nvidia boards
  tegra: Setup PMC scratch info from ap20 setup
  tegra: Add warmboot implementation
  tegra: Set up PMU for Nvidia boards
  tegra: Add PMU to manage power supplies
  tegra: Add EMC support for optimal memory timings
  tegra: Add header file for APB_MISC register
  tegra: Add tegra_get_chip_type() to detect SKU
  tegra: Add flow, gp_padctl, fuse, sdram headers
  tegra: Add crypto library for warmboot code
  tegra: Add functions to access low-level Osc/PLL details
  tegra: Move ap20.h header into arch location
  Add AES crypto library
  i2c: Add TPS6586X driver
  Add abs() macro to return absolute value
  fdt: Add function to return next compatible subnode
  fdt: Add function to locate an array in the device tree
  i.MX28: Avoid redefining serial_put[cs]()
  i.MX28: Check if WP detection is implemented at all
  i.MX28: Add battery boot components to SPL
  i.MX28: Reorder battery status functions in SPL
  i.MX28: Add LRADC init to i.MX28 SPL
  i.MX28: Add LRADC register definitions
  i.MX28: Shut down the LCD controller before reset
  i.MX28: Add LCDIF register definitions
  i.MX28: Implement boot pads sampling and reporting
  i.MX28: Improve passing of data from SPL to U-Boot
  M28EVK: Add SD update command
  M28EVK: Implement support for new board V2.0
  FEC: Abstract out register setup
  MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged
  i.MX28: Add delay after CPU bypass is cleared
  spi: mxs: Allow other chip selects to work
  spi: mxs: Introduce spi_cs_is_valid()
  mx53loco: Remove unneeded gpio_set_value()
  mx53loco: Add CONFIG_REVISION_TAG
  mx53loco: Turn on VUSB regulator
  mx53loco: Add mc34708 support and set mx53 frequency at 1GHz
  pmic: dialog: Avoid name conflicts
  imx: Add u-boot.imx as target for ARM9 i.MX SOCs
  i.MX2: Include asm/types.h in arch-mx25/imx-regs.h
  imx: usb: There is no such register
  i.MX25: usb: Set PORTSCx register
  imx: nand: Support flash based BBT
  i.MX25: This architecture has a GPIO4 too
  i.MX25: esdhc: Add mxc_get_clock infrastructure
  i.MX6: mx6q_sabrelite: add SATA bindings
  i.MX6: add enable_sata_clock()
  i.MX6: Add ANATOP regulator init
  mx28evk: add NAND support
  USB: ehci-mx6: Fix broken IO access
  M28: Scan only first 512 MB of DRAM to avoid memory wraparound
  Revert "i.MX28: Enable additional DRAM address bits"
  M28: Enable FDT support
  mx53loco: Add support for 1GHz operation for DA9053-based boards
  mx53loco: Allow to print CPU information at a later stage
  mx5: Add clock config interface
  imx-common: Factor out get_ahb_clk()
  i.MX6Q: mx6qsabrelite: Add keypress support to alter boot flow
  mx31pdk: Allow booting a zImage kernel
  mx6qarm2: Allow booting a zImage kernel
  mx6qsabrelite: Allow booting a zImage kernel
  mx28evk: Allow booting a zImage kernel
  m28evk: Allow to booting a dt kernel
  mx28evk: Allow to booting a dt kernel
  mx6qsabrelite: No need to set the direction for GPIO3_23 again
  pmic: Add support for the Dialog DA9053 PMIC
  MX53: mx53loco: Add SATA support
  MX53: Add support to ESG ima3 board
  SATA: add driver for MX5 / MX6 SOCs
  MX53: add function to set SATA clock to internal
  SATA: check for return value from sata functions
  MX5: Add definitions for SATA controller
  NET: fec_mxc.c: Add a way to disable auto negotiation
  Define UART4 and UART5 base addresses
  EXYNOS: Change bits per pixel value proper for u-boot.
  EXYNOS: support TRATS board display function
  LCD: support S6E8AX0 amoled driver based on EXYNOS MIPI DSI
  EXYNOS: support EXYNOS MIPI DSI interface driver.
  EXYNOS: support EXYNOS framebuffer and FIMD display drivers.
  LCD: add data structure for EXYNOS display driver
  EXYNOS: add LCD and MIPI DSI clock interface.
  EXYNOS: definitions of system resgister and power management registers.
  SMDK5250: fix compiler warning
  misc:pmic:samsung Convert TRATS target to use MAX8997 instead of MAX8998
  misc:pmic:max8997 MAX8997 support for PMIC driver
  TRATS: modify the trats's configuration
  ARM: Exynos4: ADC: Universal_C210: Enable LDO4 power line for ADC measurement
  EXYNOS: Rename exynos5_tzpc structure to exynos_tzpc
  arm: ea20: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT
  arm: cam_enc_4xx: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT
  cm-t35: add I2C multi-bus support
  include/configs: Remove CONFIG_SYS_64BIT_STRTOUL
  include/configs: Remove CONFIG_SYS_64BIT_VSPRINTF
  omap3: Introduce weak misc_init_r
  omap730p2: Remove empty misc_init_r
  omap5912osk: Remove empty misc_init_r
  omap4+: Remove CONFIG_ARCH_CPU_INIT
  omap4: Remove CONFIG_SYS_MMC_SET_DEV
  OMAP3: pandora: drop console kernel argument
  OMAP3: pandora: revise GPIO configuration
  ...
2012-05-20 21:31:26 +02:00
Rajeshwari Shinde
5f0ffea455 USB: S5P: Add ehci support
This patch adds ehci driver support for s5p.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
2012-05-20 08:32:33 +02:00
Mike Frysinger
50a47d0523 net: punt bd->bi_ip_addr
This field gets read in one place (by "bdinfo"), and we can replace
that with getenv("ipaddr").  After all, the bi_ip_addr field is kept
up-to-date implicitly with the value of the ipaddr env var.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2012-05-15 17:32:05 -05:00
Simon Glass
e31c1e50ac tegra: i2c: Add function to find DVC bus
Add tegra_i2c_get_dvc_bus_num() to obtain the I2C bus number of DVC bus.
This allows us to talk to the PMU.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:39 +02:00
Yen Lin
6570438a70 tegra: Add warmboot implementation
Add code to set up the warm boot area in the Tegra CPU ready for a
resume after suspend.

Signed-off-by: Yen Lin <yelin@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:38 +02:00
Jimmy Zhang
6860b4a1cc tegra: Add PMU to manage power supplies
Power supplies must be adjusted in line with clock frequency. This code
provides a simple routine to set the voltage to allow operation at maximum
frequency.

- Split PMU code into separate TPS6586X driver

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:38 +02:00
Jimmy Zhang
0e35ad053f tegra: Add EMC support for optimal memory timings
Add support for setting up the memory controller parameters. Boards
can set up an appropriate table in the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:38 +02:00
Simon Glass
1d5dba604c tegra: Add header file for APB_MISC register
Add a basic header file for this register, to be filled in as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:37 +02:00
Simon Glass
d515362d4d tegra: Add tegra_get_chip_type() to detect SKU
We want to know which type of chip we are running on - the Tegra
family has several SKUs. This can be determined by reading a
fuse register, so add this function to ap20.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:37 +02:00
Yen Lin
f6f767a404 tegra: Add flow, gp_padctl, fuse, sdram headers
These headers provide access to additional Tegra features.

flow - start/stop CPUs
sdram - parameters for SDRAM
fuse - access to on-chip fuses / security settings
gp_padctl - pad control and general purpose registers

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Yen Lin <yelin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:37 +02:00
Simon Glass
ffc76482c2 tegra: Add functions to access low-level Osc/PLL details
Add clock_ll_read_pll() to read PLL parameters and clock_get_osc_bypass()
to find out if the Oscillator is bypassed. These are needed by warmboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:37 +02:00
Simon Glass
f9f3e1b8df tegra: Move ap20.h header into arch location
We want to include this from board code, so move the header into
an easily-accessible location.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:37 +02:00
Marek Vasut
ec4836be6e i.MX28: Add LRADC register definitions
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2012-05-15 08:31:36 +02:00
Marek Vasut
cfe96f7820 i.MX28: Add LCDIF register definitions
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2012-05-15 08:31:36 +02:00
Marek Vasut
f8c4a86b5e i.MX28: Implement boot pads sampling and reporting
This patch implements code that samples i.MX28 boot pads and reports boot mode
accordingly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2012-05-15 08:31:35 +02:00
Marek Vasut
0239c2fb4a i.MX28: Improve passing of data from SPL to U-Boot
Pass memory size from SPL via structure located in SRAM instead of SCRATCH
registers. This allows passing more data about boot from SPL to U-Boot, like the
boot mode pads configuration.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2012-05-15 08:31:35 +02:00
Stefano Babic
c4559daa91 MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged
After an update to the MX51 reference manual (Rev. 5), the
values of the PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH
are now clearly wrong:

"Bit 13:
High / Low Output Voltage Range. This bit selects the output voltage mode for
SD2_CMD. 0 High output voltage mode
1 Low output voltage mode"

The values are currently negated in code - fixed.

Reported-by: David Jander <david.jander@protonic.nl>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: David Jander <david.jander@protonic.nl>
Acked-by: David Jander <david.jander@protonic.nl>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
2012-05-15 08:31:35 +02:00
Fabio Estevam
54cd1dee8f mx53loco: Add CONFIG_REVISION_TAG
FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG information.

The kernel uses this data to distinguish between Dialog versus mc34708 based boards,
and also to distinguish between revA and revB of the mc34708 based boards.

Suggested-by: Yu Li <yk@magniel.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:34 +02:00
Timo Ketola
8f385e958d i.MX2: Include asm/types.h in arch-mx25/imx-regs.h
types.h must be included in imx-regs.h if one wants to include
imx-regs.h in a board configuration file. That for one's part is
necessary, if one wants to use addresses defined in imx-regs.h.

For example, fsl_esdhc.c needs CONFIG_SYS_FSL_ESDHC_ADDR defined and
a proper thing is to define it with IMX_MMC_SDHCx_BASE in board
configuration file. This patch fixes the build in that case.

Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:34 +02:00
Timo Ketola
42d25327f5 i.MX25: esdhc: Add mxc_get_clock infrastructure
Defining CONFIG_FSL_ESDHC brings in a call to get_clocks, so let's
implement get_clocks function. This is how it seems to be implemented
elsewhere.

Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:33 +02:00
Eric Nelson
64e7cdb5e8 i.MX6: add enable_sata_clock()
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:33 +02:00
Dirk Behme
cac833a98c i.MX6: Add ANATOP regulator init
Init the core regulator voltage to 1.2V. This is required for the correct
functioning of the GPU and when the ARM LDO is set to 1.225V. This is a
workaround to fix some memory clock jitter.

Note: This should be but can't be done in the DCD. The bootloader
      prevents access to the ANATOP registers.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Jason Chen <b02280@freescale.com>
CC: Jason Liu <r64343@freescale.com>
CC: Ranjani Vaidyanathan <ra5478@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <festevam@gmail.com>
2012-05-15 08:31:33 +02:00
Fabio Estevam
1fc56f1cb0 mx53loco: Allow to print CPU information at a later stage
Print CPU information within board_late_init().

This is in preparation for adding 1GHz support, which requires programming a PMIC
via I2C. As I2C is only available after relocation, print the CPU information
later at board_late_init(), so that the CPU frequency can be printed correctly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:32 +02:00
Fabio Estevam
70cc86a630 mx5: Add clock config interface
mx5: Add clock config interface

Add clock config interface support, so that we
can configure CPU or DDR clock in the later init

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-05-15 08:31:32 +02:00
Fabio Estevam
6a376046ef imx-common: Factor out get_ahb_clk()
get_ahb_clk() is a common function between mx5 and mx6.

Place it into imx-common directory.

Cc: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-05-15 08:31:32 +02:00
Stefano Babic
8c38b5d03d MX53: add function to set SATA clock to internal
The MX53 SATA interface can use an internal clock (USB PHY1)
instead of an external clock. This is an undocumented feature, but used
on most Freescale's evaluation boards, such as MX53-loco.

As stated by Freescale's support:

Fuses (but not pins) may be used to configure SATA clocks.
Particularly the i.MX53 Fuse_Map contains the next information
about configuring SATA clocks :
	SATA_ALT_REF_CLK[1:0] (offset 0x180C)

'00' - 100MHz (External)
'01' - 50MHz (External)
'10' - 120MHz, internal (USB PHY)
'11' - Reserved

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
2012-05-15 08:31:30 +02:00
Stefano Babic
d87c85ce43 MX5: Add definitions for SATA controller
Add base address and MXC_SATA_CLK to return
the clock used for the SATA controller.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Dirk Behme <dirk.behme@de.bosch.com>
2012-05-15 08:31:30 +02:00
Stefano Babic
4a9677e53f Define UART4 and UART5 base addresses
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:30 +02:00
Donghwa Lee
2c7396cb1a EXYNOS: support EXYNOS MIPI DSI interface driver.
EXYNOS SoC platform has MIPI-DSI controller and MIPI-DSI
based LCD Panel could be used with it. This patch supports MIPI-DSI driver
based Samsung SoC chip.

LCD panel driver based MIPI-DSI should be registered to MIPI-DSI driver at
board file and LCD panel driver specific function registered to mipi_dsim_ddi
structure at lcd panel init function called system init.
In the MIPI-DSI driver, find lcd panel driver by using registered
lcd panel name, and then initialize lcd panel driver.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
2012-05-15 08:31:30 +02:00
Donghwa Lee
6d4339f622 EXYNOS: support EXYNOS framebuffer and FIMD display drivers.
This patch support EXYNOS FB and FIMD display drivers.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
2012-05-15 08:31:29 +02:00
Donghwa Lee
37835d4ba8 EXYNOS: add LCD and MIPI DSI clock interface.
To sets up lcd and mipi clock in EXYNOS display driver, added clock interface.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-05-15 08:31:29 +02:00
Donghwa Lee
283591f171 EXYNOS: definitions of system resgister and power management registers.
This is definitions of system registers and power mananagement registers for EXYNOS SoC.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-05-15 08:31:29 +02:00
Chander Kashyap
90005092fc EXYNOS: Rename exynos5_tzpc structure to exynos_tzpc
TZPC IP is common across Exynos based SoC'c. Renaming exynos5_tzpc
in arch/arm/include/asm/arch-exynos/tzpc.h to exynos_tzpc will allow generic
usase of tzpc.

Also modify board/samsung/smdk5250/tzpc_init.c to use exynos_tzpc.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-05-15 08:31:28 +02:00
Grazvydas Ignotas
10cd73bf87 OMAP3: pandora: pin mux updates for DM3730 board variant
DM3730 needs some additional pin mux configuration for GPIOs
126-129 to work, add it.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
2012-05-15 08:31:27 +02:00
Aneesh V
03f69dc6fd omap4+: Avoid using __attribute__ ((__packed__))
Avoid using __attribute__ ((__packed__)) unless it's
absolutely necessary. "packed" will remove alignment
requirements for the respective objects and may cause
alignment issues unless alignment is also enforced
using a pragma.

Here, these packed attributes were causing alignment
faults in Thumb build.

Signed-off-by: Aneesh V <aneesh@ti.com>
2012-05-15 08:31:26 +02:00
Aneesh V
7245536d19 arm: adapt asm/linkage.h from Linux
This will add ARM specific over-rides for the defines
from linux/linkage.h

Signed-off-by: Aneesh V <aneesh@ti.com>
Tested-by: Mike Frysinger <vapier@gentoo.org>
2012-05-15 08:31:26 +02:00
SRICHARAN R
d417d1db5f OMAP3+: reset: Create a common reset layer.
The reset.S has the function to do a warm reset on OMAP
based socs. Moving this to a reset.c file so that this
acts a common layer to add any reset related functionality
for the future.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:25 +02:00
Balaji T K
dd23e59d59 omap5: pbias ldo9 turn on
Add omap5 pbias configuration for mmc1/sd lines
and set voltage for sd data i/o lines

Signed-off-by: Balaji T K <balajitk@ti.com>
2012-05-15 08:31:25 +02:00
Balaji T K
f75231b79a arm: omap5: correct boot device mode7 for eMMC
In OMAP5 Boot device mode of 6 and 7 should be mapped to mmc2/eMMC

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-05-15 08:31:25 +02:00
SRICHARAN R
aaec44874f OMAP4/5: emif: Correct the emif power mgt shadow register bit fields.
PD_TIM bit field which specifies the power down timing is defined
to occupy bits 8-11, where as it is actually from 12-15 bits.
So correcting this.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:25 +02:00
SRICHARAN R
c1fa3c37af OMAP4/5: device: Add support to get the device type.
Add support to identify the device as GP/EMU/HS.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:24 +02:00
SRICHARAN R
002a2c0c66 OMAP4/5: Make the sysctrl structure common
Make the sysctrl structure common, so that it can
be used in generic functions across socs.
Also change the base address of the system control module, to
include all the registers and not simply the io regs.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:24 +02:00
SRICHARAN R
47c50143aa OMAP5: SRAM: Change the SRAM base address.
The full internal SRAM of size 128kb is public in the case of OMAP5 soc.
So change the base address accordingly.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:24 +02:00
SRICHARAN R
087189fb54 OMAP4/5: Make the silicon revision variable common.
The different silicon revision variable names was defined for OMAP4 and
OMAP5 socs. Making the variable common so that some code can be
made generic.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:24 +02:00
SRICHARAN R
8de17f4617 OMAP5: palmas: Configure nominal opp vdd values
The nominal opp vdd values as recommended for
ES1.0 silicon is set for mpu, core, mm domains using palmas.

Also used the right sequence to enable the vcores as per
a previous patch from Nishant Menon, which can be dropped now.
	http://lists.denx.de/pipermail/u-boot/2012-March/119151.html

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:23 +02:00
SRICHARAN R
f40107345c OMAP5: emif/ddr: Change emif settings as required for ES1.0 silicon.
The OMAP5 silicon has new DDR PHY design, which includes a external PHY
as well. So configuring the ext PHY parameters here. Also the EMIF timimg
registers and a couple of DDR mode registers needs to be updated based on
the testing from the actual silicon.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:23 +02:00
SRICHARAN R
6ad8d67de8 OMAP5: io: Configure the io settings for omap5430 sevm board.
The control module provides options to set various signal
integrity parameters like the output impedance, slew rate,
load capacitance for different pad groups. Configure these
as required for the omap5430 sevm board.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:23 +02:00
SRICHARAN R
84b16af29f OMAP5: board: Add pinmux data for omap5_evm board.
Adding the full pinmux data for OMAP5430 sevm board.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:23 +02:00
SRICHARAN R
5f14d9197e OMAP5: clocks: Change clock settings as required for ES1.0 silicon.
Aligning all the clock related settings like the dpll frequencies, their
respective clock outputs, etc to the ideal values recommended for
OMAP5430 ES1.0 silicon.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:23 +02:00
Nishanth Menon
3acb553439 OMAP4460: TPS Ensure SET1 is selected after voltage configuration
TPS SET0/SET1 register is selected by a GPIO pin on OMAP4460 platforms.
Currently we control this pin with a mux configuration as part of
boot sequence.
Current configuration results in the following voltage waveform:
                           |---------------| (SET1 default 1.4V)
                           |               --------(programmed voltage)
                           | <- (This switch happens on mux7,pullup)
vdd_mpu(TPS)         -----/ (OPP boot voltage)
                                             --------- (programmed voltage)
vdd_core(TWL6030)    -----------------------/ (OPP boot voltage)
Problem 1)                |<----- Tx ------>|
   timing violation for a duration Tx close to few milliseconds.
Problem 2) voltage of MPU goes beyond spec for even the highest of MPU OPP.

By using GPIO as recommended as standard procedure by TI, the sequence
changes to:
                                  -------- (programmed voltage)
vdd_mpu(TPS)         ------------/ (Opp boot voltage)
                                   --------- (programmed voltage)
vdd_core(TWL6030)    -------------/ (OPP boot voltage)

NOTE: This does not attempt to address OMAP5 - Aneesh please confirm

Reported-by: Isabelle Gros <i-gros@ti.com>
Reported-by: Jerome Angeloni <j-angeloni@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2012-05-15 08:31:22 +02:00
Nishanth Menon
a78274b205 OMAP3+: Introduce generic logic for OMAP voltage controller
OMAP Voltage controller is used to generically talk to
PMICs on OMAP3,4,5 over I2C_SR. Instead of replicating code
in multiple SoC code, introduce a common voltage controller
logic which can be re-used from elsewhere.

With this change, we replace setup_sri2c with omap_vc_init which
has the same functionality, and replace the voltage scale
replication in do_scale_vcore and do_scale_tps62361 with
omap_vc_bypass_send_value. omap_vc_bypass_send_value can also
now be used with any configuration of PMIC.

NOTE: Voltage controller controlling I2C_SR is a write-only data
path, so no register read operation can be implemented.

Reported-by: Isabelle Gros <i-gros@ti.com>
Reported-by: Jerome Angeloni <j-angeloni@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2012-05-15 08:31:22 +02:00
Jonathan Solnit
bbbc1ae921 ARM:OMAP+:MMC: Add parameters to MMC init
Add parameters to the OMAP MMC initialization function so the board can
mask host capabilities and set the maximum clock frequency.  While the
OMAP supports a certain set of MMC host capabilities, individual boards
may be more restricted and the OMAP may need to be configured to match
the board.  The PRG_SDMMC1_SPEEDCTRL bit in the OMAP3 is an example.

Signed-off-by: Jonathan Solnit <jsolnit@gmail.com>
2012-05-15 08:31:22 +02:00
Vladimir Zapolskiy
cc35fdbc4d serial: add LPC32X0 high-speed UART devices support
This change adds an implementation of high-speed UART found on NXP
LPC32X0 SoCs. Such UARTs are enumerated as UART1, UART2 and UART7.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
2012-05-15 08:31:21 +02:00
Vladimir Zapolskiy
52f69f818c arm926ejs: add NXP LPC32x0 cpu series support
This change adds initial support for NXP LPC32x0 SoC series.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
2012-05-15 08:31:21 +02:00
Jaehoon Chung
442d55685e mmc: support the sdhci instead of s5p_mmc for samsung-soc
In driver mmc, generic s5p_sdhci code is implemented.
s5p_mmc file  is dupulicated.
we are good that use the generic sdhci.
This patch supported the sdhci  for Samsung-SoC.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Lei Wen<leiwen@marvell.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
2012-05-08 18:02:22 -05:00
Vipin KUMAR
031ed2fa74 i2c: Add support for designware i2c controller
Earlier, a driver exists in the u-boot source for designware i2c interface. That
driver was specific to spear platforms. This patch implements the i2c controller
as a generic driver which can be used by multiple platforms

The driver files are now renamed to designware_i2c.c and designware_i2c.h and
these are moved into drivers/i2c folder for reusability by other
platforms

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
2012-04-24 09:56:37 +02:00
Marek Vasut
96666a39ae DMA: Split the APBH DMA init into block and channel init
This fixes the issue where mxs_dma_init() was called either twice or never,
without introducing any new init hooks.

The idea is to allow each and every device using the APBH DMA block to
configure and request only the channels it uses, instead of making it call init
for all the channels as is now.

The common DMA block init part, which only configures the block, is then called
from CPUs arch_cpu_init() call.

NOTE: This patch depends on:

	http://patchwork.ozlabs.org/patch/150957/

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-04-16 14:53:59 +02:00
Vikram Narayanan
a9407f2bc5 imx: Remove unneeded/repititive definitions from imx headers
Remove gpio related unused/repititive definitions from imx headers.

Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-04-16 14:53:59 +02:00
Eric Nelson
c415919d57 i.MX6: define CACHELINE_SIZE
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-04-16 14:53:58 +02:00
Yen Lin
96a78ac0c4 tegra: i2c: Add I2C driver
Add basic i2c driver for Tegra2 with 8- and 16-bit address support.
The driver requires CONFIG_OF_CONTROL to obtain its configuration
from the device tree.

(Simon Glass: sjg@chromium.org modified for upstream)

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-03-29 08:12:50 +02:00
Simon Glass
2e33559f3d tegra: Enhance clock support to handle 16-bit clock divisors
I2C ports have a 16-bit clock divisor. Add code to handle this special
case so that I2C speeds below 150KHz are supported.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-03-29 08:12:50 +02:00
Simon Glass
f4589a7d6f tegra: Rename NV_PA_PMC_BASE to TEGRA2_PMC_BASE
Change this name to fit with the current convention in the Tegra
header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-03-29 08:12:49 +02:00
Simon Glass
87f938c9f7 tegra: usb: Add support for Tegra USB peripheral
This adds basic support for the Tegra2 USB controller. Board files should
call board_usb_init() to set things up.

Configuration is performed through the FDT, with aliases used to set the
order of the ports, like this fragment:

        aliases {
		/* This defines the order of our USB ports */
                usb0 = "/usb@0xc5008000";
                usb1 = "/usb@0xc5000000";
        };

drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-03-29 08:12:48 +02:00
Simon Glass
ed2974493e tegra: fdt: Add function to return peripheral/clock ID
A common requirement is to find the clock ID for a peripheral. This is the
second cell of the 'clocks' property (the first being the phandle itself).

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-03-29 08:12:48 +02:00
Chander Kashyap
95c2fb371a EXYNOS: Add structure for Exynos4 DMC
Add exynos4_dmc structure in dmc.h for exynos4 dram controllor(DMC).

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-03-27 22:08:28 +02:00
Simon Schwarz
0a672d494d arm: Add Prep subcommand support to bootm
Adds prep subcommand to bootm implementation of ARM. When bootm is called
with the subcommand prep the function stops right after ATAGS creation and
before announce_and_cleanup.

This is used in command "cmd_spl export"

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
2012-03-27 22:05:29 +02:00
Simon Schwarz
379c19ab70 omap-common/spl: Add linux boot to SPL
This adds Linux booting to the SPL

This depends on CONFIG_MACH_TYPE patch by Igor Grinberg
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/105809)

Related CONFIGs:
CONFIG_SPL_OS_BOOT
	Activates/Deactivates the OS booting feature
CONFIG_SPL_OS_BOOT_KEY
	defines the IO-pin number u-boot switch - if pressed u-boot is
	booted
CONFIG_SYS_NAND_SPL_KERNEL_OFFS
	Offset in NAND of direct boot kernel image to use in SPL
CONFIG_SYS_SPL_ARGS_ADDR
	Address where the kernel boot arguments are expected - this is
	normaly RAM-begin + 0x100

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
CC: Tom Rini <tom.rini@gmail.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Wolfgang Denk <wd@denx.de>
2012-03-27 22:05:28 +02:00
Simon Schwarz
9e70c08b6f devkit8000/spl: init GPMC for dm9000 in SPL
Linux crashes if the GPMC isn't configured for the dm9000.

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
CC: Tom Rini <tom.rini@gmail.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Wolfgang Denk <wd@denx.de>
2012-03-27 22:05:28 +02:00
Fabio Estevam
a768386746 mx6: Read silicon revision from register
Instead of hardcoding the mx6 silicon revision, read it in run-time.

Also, besides the silicon version print the mx6 variant type: quad,dual/solo
or solo-lite.

Tested on a mx6qsabrelite, where it shows:

CPU:   Freescale i.MX6Q rev1.0 at 792 MHz

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <r64343@freescale.com>
2012-03-27 09:41:16 +02:00
Fabio Estevam
334bd0e225 mx6: Remove duplicate definition of ANATOP_BASE_ADDR
Remove duplicate definition of ANATOP_BASE_ADDR.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-03-27 09:41:16 +02:00
Marek Vasut
cd207cde94 IXP: Fix GPIO_INT_ACT_LOW_SET()
The GPIO_INT_ACT_LOW_SET was incorrectly handling interrupt lines higher than 7.
This is due to the fact that there are two registers for total of 16 lines.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Bryan Hundven <bryanhundven@gmail.com>
Cc: Michael Schwingen <rincewind@discworld.dascon.de>
2012-03-26 23:09:26 +02:00
Matt Porter
24de357a30 SPL: Add YMODEM over UART load support
Adds support for loading U-Boot from UART using YMODEM protocol.
If YMODEM support is enabled in SPL and the romcode indicates
that SPL loaded via UART then SPL will wait for start of a
YMODEM transfer via the console port.

Signed-off-by: Matt Porter <mporter@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-03-26 23:09:25 +02:00
Robert Delien
56df16f25a Fix erroneous 32-bit access to hw_clkctrl_frac0 and hw_clkctrl_frac1 registers
This patch fixes erroneous 32-bit access to registers
hw_clkctrl_frac0 and hw_clkctrl_frac1.

Signed-off-by: Robert Delien <robert@delien.nl>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
2012-03-26 23:09:24 +02:00
Robert Delien
531bb825fd Introducing 8-bit wide register, mx28_register_8
This patch introduces an 8-bit register, mx28_register_8, in order to
prepare for fixing erroneous 32-bit wide access of registers
hw_clkctrl_frac0 and hw_clkctrl_frac1.

Signed-off-by: Robert Delien <robert@delien.nl>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
2012-03-26 23:09:24 +02:00
Robert Delien
b228e14e96 Renamed mx28_register to mx28_register_32 to prepare for mx28_register_8
This patch renames mx28_register to mx28_register_32 in order to
prepare for the introduction of an 8-bit register, mx28_register_8.

Signed-off-by: Robert Delien <robert@delien.nl>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
2012-03-26 23:09:24 +02:00
Wolfgang Grandegger
3f467529ca usb/ehci: Add USB support for the MX6Q
Currently, only USB Host 1 is supported.

Cc: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
2012-03-26 23:09:23 +02:00
Robert Delien
c67d9c5e58 i.mx28: Added register definitions for DIGCTL registers
This patch adds register definitions for the registers of the DIGCTL
IP-block.

Signed-off-by: Robert Delien <robert@delien.nl>
2012-03-26 23:09:23 +02:00
Ajay Bhargav
54cb00486e USB: Armada100: EHCI Driver for Armada100 SOCs
This patch adds support for USB EHCI driver for Armada100 SOCs.

Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
2012-03-19 00:08:26 +01:00
Ajay Bhargav
732c7c2446 USB: Armada100: Add UTMI PHY interface driver
This patch adds USB host controller's UTMI PHY interface driver for
Armada100 SOCs.

Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
2012-03-19 00:08:26 +01:00
Helmut Raiger
d1300f7686 tt01: add video support
The video setup for the Epson display is provided. Addtionally
some extra info is displayed next to the Linux logo.
Make get_cpu_rev() publicly available (added to sys_proto.h).

Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
2012-02-27 21:19:25 +01:00
Troy Kisky
28774cbaac net: fec_mxc: add 1000 Mbps selection
Define FEC_QUIRK_ENET_MAC and add to
arch-mx6/imx-regs.h

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2012-02-27 21:19:24 +01:00
Chase Maupin
0e35bde7b1 am33xx: ddr_defs.h: Change DDR timings
* For cold silicon the DDR timings need to be relaxed in order for
  the device to boot with DDR at 266MHz
* Fix proposed by James Doublesin

Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
2012-02-27 21:19:24 +01:00
Eric Nelson
d5c37c9cc4 mx6q: Add support for ECSPI through mxc_spi driver
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
2012-02-27 21:19:23 +01:00
Eric Nelson
08c61a589b mxc_spi: move machine specifics into CPU headers
Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU

Introduce two new macros to control conditional setup
     MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x)
     MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x)

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
2012-02-27 21:19:23 +01:00
Eric Nelson
4b3a30e9ae mx6q: define GPIO macros for translating between ordinals and port:index
The interface to the mxc_gpio driver uses integer (ordinal) values to
refer to all GPIOs on the i.MX processors. The registers themselves
and much of the i.MX documentation are banked in groups of 32, and these
macros allow the use of the port:index numbering for clarity.

GPIO_NUMBER() converts to ordinal value from port:index
GPIO_PORT() returns the port of an ordinal value
GPIO_INDEX() returns the index or offset of the ordinal.

Discussion on the mailing list at
	http://lists.denx.de/pipermail/u-boot/2012-January/116927.html

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-02-27 21:19:23 +01:00
Tom Rini
a7778f8fbe omap_hsmmc: Wait for CMDI to be clear
Before we can send a command we need both the DATI (command inhibit on
mmc_dat line) bit and CMDI (command inhibit on mmc_cmd line) are clear.
The previous behavior of only checking on DATI was insufficient on some
cards and incorrect behavior in any case.  This makes the code check
for both bits being clear and makes the error print more clear as
to what happened.  DATI_CMDDIS is removed as it was unused elsewhere
in the code and stood for 'DATI is set, cmds are disabled still'.

Fix originally spotted by Peter Bigot.

Tested-by: Peter A. Bigot <bigotp@acm.org>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Tom Rini <trini@ti.com>
Tested-by: Andreas Müller <schnitzeltony@googlemail.com>
2012-02-15 17:42:22 -06:00
Sughosh Ganu
6b873dcabd Changes to move hawkboard to the new spl infrastructure
This patch moves hawkboard to the new spl infrastructure from the
older nand_spl one.

Removed the hawkboard_nand_config build option -- The spl code now
gets compiled with hawkboard_config, after building the main u-boot
image, using the CONFIG_SPL_TEXT_BASE. Modified the README.hawkboard
to reflect the same.

Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Christian Riesch <christian.riesch@omicron.at>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>
2012-02-12 10:11:33 +01:00
Peter Barada
9540c7e900 ARMV7: Fix duplicate use of "b" parameter in ACTIM_CTRLA definition
ACTIM_CTRLA macro errently passes "b" parameter to ACTIM_CTRLA_TRAS()
instead of "c".  To make usage more clear, replace all single-letter
macro parameters with more descriptive parameter names.

Signed-off-by: Peter Barada <peter.barada@logicpd.com>
2012-02-12 10:11:32 +01:00
Hadli, Manjunath
8f5d468721 davinci: add support for printing clock frequency
add support for printing various clock frequency info found
in SOC such as ARM core frequency, DSP core frequency and DDR
frequency as part of bdinfo command.

Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Cc: Tom Rini <trini@ti.com>
2012-02-12 10:11:32 +01:00
Schuyler Patton
c8e5ba8034 AM3517: Changed default clock rate for AM3517
AM3517: Changed default clock rate for AM3517

Changed #define MPU_M_13_ES2 from 0x1F4 to 0x258, this allows
the AM3517 to boot up at 600MHz instead of 500 MHz

Signed-off-by: Schuyler Patton <spatton@ti.com>
CC: Tom Rini <tom.rini@gmail.com>
CC: Simon Schwarz <simonschwarzcor@gmail.com>
CC: Stefano Babic <sbabic@denx.de>
2012-02-12 10:11:31 +01:00
Govindraj.R
95f8791042 OMAP3+: Clock: Adding ehci clock enabling
Adding ehci clock enabling mechanism part of clock framework.
When essential clocks are enabled during init phase usb host
clocks can also be enabled from clock framework.

Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Tested-by: Stefano Babic <sbabic@denx.de>
2012-02-12 10:11:31 +01:00
Govindraj.R
43b62393da ehci-omap: Clean up added ehci-omap.c
Clean up added ehci-omap.c and make it generic for re-use across
omap-soc having same ehci ip block. Also pass the modes to be configured
from board file and configure the ports accordingly. All usb layers
are not cache aligned, till then keep cache off for usb ops as ehci will use
internally dma for all usb ops.

* Add a generic common header ehci-omap.h having common ip block
  data and reg shifts.
* Rename and modify ehci-omap3 to ehci.h retain only conflicting
  sysc reg shifts remove others and move to common header file.
* pass the board data for beagle/panda accordinly to use
  ehci ports.

Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
2012-02-12 10:11:31 +01:00
Chander Kashyap
37bb6d89de ARM: EXYNOS: Add support for Exynos5 based SoCs
Samsung's ARM Cortex-A15 based SoCs are known as Exynos5 series of
SoCs. This patch adds the support for Exynos5.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-02-12 10:11:30 +01:00
Minkyu Kang
851db35e2d S5P: support generic watchdog timer
This patch adds support the generic watchdog timer for s5pc1xx and exynos4

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: HeungJun, Kim <riverful.kim@samsung.com>
2012-02-12 10:11:29 +01:00
HeungJun, Kim
77e490e225 ARMV7: Exynos4: Add supoort power for Exynos4
This patch adds power.h and SAMSUNG_BASE() macro for using Exynos4 power.

Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-02-12 10:11:29 +01:00
HeungJun, Kim
792be0aa80 ARMV7: Exynos4: Add watchdog.h for Exynos4
This patch add watchdog.h for Exynos4

Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-02-12 10:11:29 +01:00
Chander Kashyap
e619a0de93 Exynos: PWM: Add TCMPB3 field in pwm structure
Add TCMPB3 field in pwm structure, earliar this was res1.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-02-12 10:11:28 +01:00
Albert ARIBAUD
805ad7ee2d orion5x: add USB host ehci-marvell support
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2012-02-12 10:11:28 +01:00
Albert ARIBAUD
74d3442111 Remove kirkwood-specifics from marvell EHCI driver
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2012-02-12 10:11:27 +01:00
Albert ARIBAUD
a14bd41738 Rename ehci-kirkwood as ehci-marvell
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2012-02-12 10:11:27 +01:00
Helmut Raiger
fa47a28661 mmc: access mxcmmc from mx31 boards
This patch modifies mxcmmc.c to be used
not only by i.MX27 but also by i.MX31 boards.
Both use the same SD controller, but have different
clock set-ups.
The i.MX27 imx_get_XXXclock functions are made static to
generic.c and a public mxc_get_clock() function
is provided.  Pins, base address and prototypes for
an i.MX31 specific board_init_mmc() are provided.
Some of the i.MX27 clock getters are unused and marked
as such to avoid warnings (./MAKEALL -s mx27), but
the code was left in for future use.

Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-02-12 10:11:26 +01:00
Troy Kisky
4591f523df i.mx6: mx6x_pins: Fix uart txd definitions
The uart txd pad can also provide the rxd function. But it does not stop its
tx role. This could be used for a half duplex serial port.

Change names to reduce confusion.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Jason Liu <jason.hui@linaro.org>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
2012-02-12 10:11:26 +01:00
Heiko Schocher
2627c8c0a1 arm, davinci: add timer defines for tcr field
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Tom Rini <tom.rini@gmail.com>
2012-02-12 10:11:23 +01:00
Heiko Schocher
3f84108b99 arm, davinci: add workaround for not resetting DMA bus and VPSS modules
The Buffer Logic of VPSS is Not Reset by System Reset Pin, see
http://www.ti.com/lit/er/sprz316b/sprz316b.pdf chapter Advisory 1.2.1
on page 9. Add workaroundcode proposed in the errata.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Tom Rini <tom.rini@gmail.com>
2012-02-12 10:11:23 +01:00
Ben Gardiner
d652a344a0 arm, davinci: add PLL0 prediv to da850 lowlevel setup
The OMAP-L138 has a pre-divider available on PLL0.

Add support to da850_lowlevel.c for configuring PLL0's pre-divider. This is
to achieve certain OPP's -- e.g. the 372MHz OPP used also by Linux.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Cc: Christian Riesch <christian.riesch@omicron.at>
CC: Heiko Schocher <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Christian Riesch <christian.riesch@omicron.at>
2012-02-12 10:11:22 +01:00
Simon Glass
cf06b13903 tegra: Add SDMMC support to funcmux
This adds support for SDMMC ports to the funcmux. Only one
option is supported: FUNCMUXO_SDMMC_8BIT which selects an 8-bit
wide SDIO interface where available.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-02-12 10:11:22 +01:00
Simon Glass
8a1133c607 tegra: Add I2C support to funcmux
Add support to funcmux for selecting I2C functions and programming
the pinmux appropriately.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-02-12 10:11:22 +01:00
Simon Glass
2faf1863de tegra: Add enum to select from available funcmux configs
We want to give a name to each available funcmux config. For now we just
use the pin group names (even through it is verbose) since there seems
to be nothing better.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-02-12 10:11:22 +01:00
Simon Glass
d693969daa tegra: Adjust funcmux config test to permit expansion
We want to support config options other than zero, so move the test to the
end to allow intermediate code to OK such a config.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-02-12 10:11:22 +01:00
Patil, Rachna
b4116ede36 ARM: AM33XX: Add i2c support
Add i2c driver board hookup for AM335X EVM

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Patil, Rachna <rachna@ti.com>
2012-01-23 11:57:31 +01:00
Andreas Müller
137703b811 overo: add SPL support
* implementation based on ti beagleboard/omap3evm
* timing data and i2c workaround for revision 0 boards taken from x-loader
* run-tested with overo revision 0 and 1 / boot from NAND and SDcard
* run-tested with x-loader

Signed-off-by: Andreas Müller <schnitzeltony@gmx.de>
Signed-off-by: Tom Rini <trini@ti.com>
2012-01-16 08:40:13 +01:00
Andreas Müller
761ca31e47 omap_rev_string: output to stdout
* avoid potential buffer overflows
* allow SPL-build not to output "Texas Instruments Revision detection unimplemented"

Signed-off-by: Andreas Müller <schnitzeltony@gmx.de>
Signed-off-by: Tom Rini <trini@ti.com>
2012-01-16 08:40:13 +01:00
Chandan Nath
8a8f084e4f ARM:AM33XX: Add SPL support for AM335X EVM
This patch is added to support SPL feature on AM335X
platform. In this patch, MMC1 is configured as boot
device for SPL and support for other devices will be
added in the next patch series.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2012-01-16 08:40:12 +01:00
Chandan Nath
876bdd6d46 ARM:AM33XX: Add mmc/sd support
This patch add supports for mmc/sd driver on AM335X platform.
PLL and pinmux configurations for mmc/sd are configured in this
patch.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-01-16 08:40:12 +01:00
Chandan Nath
fb072a3ead ARM:AM33XX: Fix ddr and timer register offset
This patch is added to update incorrect ddr and timer
register offset.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-01-16 08:40:11 +01:00
Chandan Nath
f16da7466f ARM:AM33XX: Replace CONFIG_AM335X with CONFIG_AM33XX
This patch is added to replace CONFIG_AM335X symbol
with CONFIG_AM333XX for AM33XX platforms.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Tested-by: Thomas Weber <weber@corscience.de>
2012-01-16 08:40:11 +01:00
Aneesh V
fe7104b307 omap4: fix boot issue on ES2.0 Panda
Fix boot issue on ES2.0 Panda by tuning some
IO settings. The CONTROL_EFUSE_2 register has
to be over-ridden in software for 4430 boards.

Commit 23e9f0723e
wrongly did this for CONTROL_EFUSE_1. Reverting
this and doing it for CONTROL_EFUSE_2.

Signed-off-by: Aneesh V <aneesh@ti.com>
Tested-by: Raúl Porcel <armin76@gentoo.org>
2012-01-16 08:40:11 +01:00
Christian Riesch
a601bed065 arm, davinci: Change byte order of RTC kick register values
Now the values in the defines agree with those in the manuals.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Tom Rini <trini@ti.com>
Cc: Heiko Schocher <hs@denx.de>
2012-01-16 08:40:10 +01:00
Jason Liu
f2f7745825 imx: mx6q: add aipstz init for off platform periph
Init peripheral access control register of AIPSTZ OPACRx:

Buffer Writes(BW):      0 -> not bufferable,
Supervisor Protect(SP): 0 -> not require supervisor privilege level for accesses.
Write Protect(WP):      0 -> allows write accesses.
Trusted Protect(TP):    0 -> allows unstrusted master

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
2012-01-16 08:40:10 +01:00
Jason Liu
bd2e27c043 i.mx6:imx6q: allign MAC address with burned-in ordering
For the i.mx6q, the burned-in MAC address will be the following odering,

fuse: 0x620[7:0]   MAC_ADDR[7:0]     ---> mac[5]
fuse: 0x620[15:8]  MAC_ADDR[15:8]    ---> mac[4]
fuse: 0x620[23:16] MAC_ADDR[23:16]   ---> mac[3]
fuse: 0x620[31:24] MAC_ADDR[31:24]   ---> mac[2]
fuse: 0x630[7:0]   MAC_ADDR[39:32]   ---> mac[1]
fuse: 0x630[15:8]  MAC_ADDR[47:40]   ---> mac[0]

This patch also fix the error caculation for the fuse bank[0] address

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
2012-01-16 08:40:09 +01:00
Fabio Estevam
5bcc6a8901 mx28: Let dram_init be common for mx28
Let dram_init function be a common function, so that other mx28 boards
can reuse it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
2012-01-16 08:40:09 +01:00
Fabio Estevam
be252b654a net: imx: Add multi-FEC support for imx_get_mac_from_fuse
Add multi-FEC support for imx_get_mac_from_fuse by passing dev_id as a parameter.

This feature is important on mx28 SoC for example that has two FEC ports.

Cc: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-01-16 08:40:09 +01:00
Joe Hershberger
365d607033 gpio: Replace ARM gpio.h with the common API in include/asm-generic
ARM boards should use the generic GPIO API
This means changing gpio to unsigned type
Remove the unused gpio_toggle() function which is not part of the API
Comment that free should not modify pin state

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>

fixed merge conflict in da8xx_gpio.c, tegra2_gpio.c, and
extended to the new mxs_gpio.c.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2012-01-09 20:10:32 -06:00
Simon Glass
bb6997f840 tegra: Add support for UART init in cpu board.c
We add a way of initialising the selected of UARTs prior to relocation.
Boards can use the board_init_uart_f() instead of repeating this code
themselves.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-24 10:23:32 +01:00
Simon Glass
b5a5b35197 tegra: Add a function mux feature
funcmux permits selection of config options for particular peripherals,
such as the pins that are used for that peripheral, if there are several
options.

Add UART selection to start with.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-24 10:23:32 +01:00
Simon Glass
8442fd3c6a tegra: add clock_ll_start_uart() to enable UART prior to reloc
Most boards will want to enable a UART early. This function provides
that feature in Tegra architecture code so the code does not need to be
copied on every board.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-24 10:23:32 +01:00
Thierry Reding
977a39e600 tegra2: Move tegra2_mmc_init() prototype to public header.
tegra2_mmc_init() is implemented by the Tegra2 MMC driver. Since most of
the Tegra2-based boards will need to call it, this commit exports it in
the new public asm/arch/mmc.h header file to prevent each board from
providing its own prototype.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-24 10:23:31 +01:00
Simon Glass
cb93481268 tegra2: Implement SPI / UART GPIO switch
The Tegra2 Seaboard has the unfortunate feature that SPI and the console
UART are multiplexed on the same pins. We need to switch between one
and the other during SPI and console activity.

This new file implements a switch and keeps track of which peripheral
owns the pins. It also flips over the controlling GPIO as needed

Since we are adding a second file to board/nvidia/common, we create
a proper Makefile there and remove the direct board.o include from
board/nvidia/seaboard/Makefile

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-24 10:23:31 +01:00
Tom Warren
9112ef8d89 tegra2: spi: Add SPI driver for Tegra2 SOC
This driver supports SPI on Tegra2, running at 48MHz.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-12-24 10:23:30 +01:00
Chris Lalancette
df65a3fe35 omap4_panda: Initialize the USB phy
During misc_init_r, make sure to setup the clocks
properly for the USB hub on the pandaboard.  With
this in place, the USB hub and the ethernet works
on the pandaboard.

Signed-off-by: Chris Lalancette <clalancette@gmail.com>
Acked-by: Aneesh V <aneesh@ti.com>
2011-12-19 17:52:44 +01:00
Wolfgang Denk
6b62b9a31d Coding Style cleanup
Fix trailing white space, indentation by spaces instead of TABs,
excessive blank lines, trailing blank lines.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-12-19 12:03:40 +01:00
Lukasz Majewski
ddc7e541ae usb:gadget:s5p Enable the USB Gadget framework at Exynos4210 (C210 Universal)
This commit enables support for USB Gadgets on the Exynos4210 (C210 Universal)
reference target.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
CC: Remy Bohmer <linux@bohmer.net>
2011-12-16 21:37:17 +01:00
Wolfgang Grandegger
5d2947a3fc USB: MX5: add helper functions to enable USB clocks
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Jason Liu <r64343@freescale.com>

V2: Fix spacing in crm_regs.h
2011-12-11 14:49:25 +01:00
Lukasz Majewski
a954da2902 usb:gadget:s5p Enable the USB Gadget framework at GONI
This commit enables support for USB Gadgets on the GONI
reference target.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Remy Bohmer <linux@bohmer.net>
2011-12-11 14:44:49 +01:00
Stefan Herbrechtsmeier
bdbcdc897f pxa: convert pxa27x_udc to use read and write functions
Signed-off-by: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Remy Bohmer  <linux@bohmer.net>
2011-12-11 14:41:14 +01:00
Stefan Herbrechtsmeier
1c0a14ebb7 pxa: fix usb host register mismatch
Signed-off-by: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Remy Bohmer  <linux@bohmer.net>
2011-12-11 14:40:54 +01:00
Marek Vasut
c944a3ef82 i.MX28: Move SPL to arch/arm/cpu/arm926ejs/mx28
This moves SPL to common location so it can be reused by multiple boards. Also,
this commit adjusts M28 SoM to avoid breakage due to the move.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2011-12-09 17:30:10 +01:00
Jason Liu
23608e23fd i.mx: add the initial support for freescale i.MX6Q processor
i.MX6Q is freescale quad core processors with ARM cortex_a9 complex.
This patch is to add the initial support for this processor.

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc:Stefano Babic <sbabic@denx.de>
2011-12-09 17:30:10 +01:00
Chander Kashyap
393cb36199 S5PC2XX: Rename S5pc2XX to exynos
As per new naming convention for Samsung SoC's, all Cortex-A9 and Cortex-A15
based SoC's will be classified under the name Exynos. Cortex-A9 and Cortex-A15
based SoC's will be sub-classified as Exynos4 and Exynos5 respectively.

In order to better adapt and reuse code across various upcoming Samsung Exynos
based boards, all uses of s5pc210 prefix/suffix/directory-names are renamed in
this patch. s5pc210 is renamed as exynos4210 and S5PC210/s5pc210 suffix/prefix
are renamed as exynos4/EXYNOS4.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-12-09 17:30:09 +01:00
Simon Glass
80433c9ac6 arm: Move CP15 init out of cpu_init_crit()
Some SOCs have do not start up with their 'main' CPU. The first U-Boot
code may then be executed with a CPU which does not have a CP15, or not a
useful one.

Here we split the initialization of CP15 into a separate call, which can
be performed later if required.

Once the main CPU is running, you should call cpu_init_cp15() to perform
this init as early as possible.

Existing ARMv7 boards which define CONFIG_SKIP_LOWLEVEL_INIT should not
need to change, this CP15 init is still skipped in that case. The only
impact for these boards is that the cpu_init_cp15() will be available
even if it is never used on these boards.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-09 17:30:09 +01:00
Anatolij Gustschin
e8f473548a arch/arm/include/asm/arch-omap5/clocks.h: Fix GCC 4.2 warnings
Fix:
clocks.c: In function 'setup_post_dividers':
clocks.c:175: warning: comparison is always true due to limited range of
data type
clocks.c:177: warning: comparison is always true due to limited range of
data type
clocks.c:179: warning: comparison is always true due to limited range of
data type
clocks.c:181: warning: comparison is always true due to limited range of
data type
clocks.c:183: warning: comparison is always true due to limited range of
data type
clocks.c:185: warning: comparison is always true due to limited range of
data type
clocks.c:187: warning: comparison is always true due to limited range of
data type
clocks.c:189: warning: comparison is always true due to limited range of
data type

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: sricharan <r.sricharan@ti.com>
Cc: Tom Rini <trini@ti.com>
2011-12-06 23:59:40 +01:00
Stefano Babic
40f6fffee5 MX: serial_mxc: cleanup removing nasty #ifdef
The serial driver for iMX SOCs is continuosly changed if a
new SOC or not yet used port is used. CONFIG_SYS_<SOC>_<UART Port>
defines were used only to find the base address for the selected UART.
Instead of that, move the base address to the board configuration
file and drop all #ifdef from driver.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Helmut Raiger <helmut.raiger@hale.at>
CC: John Rigby <jcrigby@gmail.com>
CC: Matthias Weisser <weisserm@arcor.de>
CC: Jason Liu <jason.hui@linaro.org>
Acked-by: Jason Liu <jason.hui@linaro.org>
2011-12-06 23:59:40 +01:00
Marek Vasut
aa72e43bb7 MXS: Add static annotations to dma driver
Some functions were internal to the apbh dma driver, so annotate them static.
Some of the functions weren't used at all so drop them. This makes the U-Boot
binary smaller by about 1500 bytes.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-12-06 23:59:40 +01:00
Tom Rini
ee08a8260a OMAP3: Add SPL_BOARD_INIT hook
Add an SPL_BOARD_INIT hook and for OMAP3 have it turn on i2c.  OMAP4
doesn't need i2c enabled in SPL.  Enable SPL_BOARD_INIT on devkit8000.

Cc: Frederik Kriewitz <frederik@kriewitz.eu>
Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:39 +01:00
Tom Rini
673283f3fc OMAP3: Add SPL support to omap3_evm
Add Hynix 200MHz timing information to <asm/arch-omap3/mem.h>.
This also changes CONFIG_SYS_TEXT_BASE to 0x80100000.

Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:38 +01:00
Tom Rini
75c57a3570 OMAP3: Add SPL support to Beagleboard
This introduces 200MHz Micron parts timing information based on x-loader
to <asm/arch-omap3/mem.h> and Numonyx MCFG calculation.  The memory init
logic is also based on what x-loader does in these cases.  Note that
while previously u-boot would be flashed in with SW ECC in this case it
now must be flashed with HW ECC.  We also change CONFIG_SYS_TEXT_BASE to
0x80100000.

Cc: Dirk Behme <dirk.behme@gmail.com>
Beagleboard rev C5, xM rev A:
Tested-by: Tom Rini <trini@ti.com>
Beagleboard xM rev C:
Tested-by: Matt Ranostay <mranostay@gmail.com>
Beagleboard rev B7, C2, xM rev B:
Tested-by: Matt Porter <mporter@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:38 +01:00
Tom Rini
4e647e1207 OMAP3 SPL: Add identify_nand_chip function
A number of boards are populated with a PoP chip for both DDR and NAND
memory.  Other boards may simply use this as an easy way to identify
board revs.  So we provide a function that can be called early to reset
the NAND chip and return the result of NAND_CMD_READID.  All of this
code is put into spl_id_nand.c and controlled via CONFIG_SPL_OMAP3_ID_NAND.

Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:38 +01:00
Tom Rini
9ae0d55074 OMAP3 SPL: Rework memory initalization and devkit8000 support
This changes to making the board be responsible for providing the
memory initialization timings in SPL and converts the devkit8000
to this framework.  In SPL we try and initialize both CS0 and CS1.

Cc: Frederik Kriewitz <frederik@kriewitz.eu>
Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:38 +01:00
Tom Rini
fc41ba1e2b OMAP3: Suffix all Micron memory timing parts with their speed
Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:38 +01:00
Tom Rini
1be1433b83 OMAP3: Add optimal SDRC autorefresh control values
This adds the optimal SDRC autorefresh control register values for
100Mhz, 133MHz, 165MHz and 200MHz clocks.  We switch to using this
to provide the default 165MHz value.

Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:38 +01:00
Tom Rini
14ca3dee80 omap3: mem: Add MCFG helper macro
This adds an MCFG macro to calculate the correct value, similar to
the ACTIMA/ACTIMB macros and adds a comment that all of the potential
values here are documented in the TRM.  Then we convert the Micron
value to use this macro.

Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:38 +01:00
Tom Rini
50e7ff0369 OMAP3: Remove get_mem_type prototype
This function doesn't exist for omap3

Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:38 +01:00
Tom Rini
b7eb9e7895 omap3: mem: Comment enable_gpmc_cs_config more
Expand the "enable the config" comment to explain what the bit shifts
are and define out two of the magic numbers.

Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:37 +01:00
Heiko Schocher
7f34b1163a arm, davinci, da850: add uart1 tx rx pinmux config
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Tom Rini <trini@ti.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Christian Riesch <christian.riesch@omicron.at>
2011-12-06 23:59:37 +01:00
Heiko Schocher
b5ce18a235 arm, davinci: move davinci_rtc struct to hardware.h
move struct davinci_rtc to arch/arm/include/asm/arch-davinci/hardware.h
and add RTC_KICK0R_WE, RTC_KICK1R_WE defines,
so they are global useable.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
2011-12-06 23:59:37 +01:00
Christian Riesch
516fb1c4c0 arm, da850: Add pinmux configurations to the arch tree
Up to now nearly every davinci board has separate code for the
definition of pinmux configurations. This patch adds pinmux
configurations for the DA850 SoCs to the arch tree which may later
be used for all DA850 based boards.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Acked-by: Heiko Schocher <hs@denx.de>
2011-12-06 23:59:36 +01:00
Christian Riesch
964930bcfd arm, davinci: Move pinmux functions from board to arch tree
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Syed Mohammed Khasim <sm.khasim@gmail.com>
Cc: Sughosh Ganu <urwithsughosh@gmail.com>
Cc: Nick Thompson <nick.thompson@ge.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Nick Thompson <nick.thompson@ge.com>
2011-12-06 23:59:36 +01:00
Ilya Yanok
ad2a7909a1 AM3517: move AM3517 specific mux defines to generic header
AM3517 specific CONTROL_PADCONF_* defines moved from board-specific
files to <asm/arch-omap3/mux.h>

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2011-12-06 23:59:36 +01:00
Ilya Yanok
b9e65a797b AM35xx: add EMAC support
AM35xx has DaVinci-compatible EMAC.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2011-12-06 23:59:36 +01:00
Ilya Yanok
7c587d320d davinci_emac: move arch-independent defines to separate header
DaVinci EMAC is found not only on DaVinci SoCs but on some OMAP3 SoCs
also. This patch moves common defines from arch-davinci/emac_defs.h to
drivers/net/davinci_emac.h

DaVinci specific PHY drivers hacked to include the new header. We might
want to switch to phylib in future.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2011-12-06 23:59:35 +01:00
Aneesh V
9404758e9b omap4460: add ES1.1 identification
Signed-off-by: Aneesh V <aneesh@ti.com>
2011-12-06 23:59:34 +01:00
Aneesh V
e4fce34e7a start.S: remove omap3 specific code from start.S
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Aneesh V <aneesh@ti.com>
Acked-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:34 +01:00
Marek Vasut
f68d2a222f PXA: Rename pxa_dram_init to pxa2xx_dram_init
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-12-06 23:59:33 +01:00
Marek Vasut
77b04c578c PXA: Export cpu_is_ and pxa_dram_init functions
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-12-06 23:59:32 +01:00
Marek Vasut
abc20aba18 PXA: Rename CONFIG_PXA2[57]X to CONFIG_CPU_PXA2[57]X
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-12-06 23:59:32 +01:00
Christian Riesch
581a811c3f hawkboard: Replace HAWKBOARD_KICK{0, 1}_UNLOCK defines
This patch replaces the HAWKBOARD_KICK{0,1}_UNLOCK defines by
DV_SYSCFG_KICK{0,1}_UNLOCK.

The kick register values are not hawkboard specific but may be used
for all davinci boards. In commit f3c149d6c6
new defines for these values wer introduced.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Syed Mohammed Khasim <sm.khasim@gmail.com>
Cc: Sughosh Ganu <urwithsughosh@gmail.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-29 15:43:40 +01:00
Stelian Pop
c9e798d35a Fix Stelian's email address
Change my old email address which is no longer valid.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-11-29 15:43:38 +01:00
Heiko Schocher
75acc4d7c1 arm, davinci: add DAVINCI_MMC_CLKID
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-15 22:25:51 +01:00
Heiko Schocher
f3c149d6c6 arm, davinci: da850/dm365 lowlevel cleanup
- Cleanup a lot of fix values, and use defines instead.
- Also make some values configurable through the board config
  file.
- delete the NAND_SPL code for da850, as it is not used actually
- remove the asm code

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-15 22:25:51 +01:00
Sricharan
78f455c055 omap4/5: Add support for booting with CH.
Configuration header(CH) is 512 byte header attached to an OMAP
boot image that will help ROM code to initialize clocks, SDRAM
etc and copy U-Boot directly into SDRAM. CH can help us in
by-passing SPL and directly boot U-boot, hence it's an alternative
for SPL. However, we intend to support both CH and SPL for OMAP4/5.

Initialization done through CH is limited and is not equivalent
to that done by SPL. So U-Boot has to distinguish between the
two cases and handle them accordingly. This patch takes care
of doing this.

Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-15 22:25:50 +01:00
Sricharan
bb772a5944 omap5: emif: Add emif/ddr configurations required for omap5 evm
Add the emif configurations required for omap5 soc.Add the
correct ddr part configurations required for omap5 evm board.
EDB8164B3PH from ELPIDA is the part used on the board.

Also changes are done to retain some part of the code
common for OMAP4/5 and keep only the remaining in the Soc
specific directories.

Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-15 22:25:50 +01:00
Sricharan
2e5ba48928 omap5: clocks: Add clocks support for omap5 platform.
Adding the correct configurations required for
dplls, clocks, for omap5 Soc.

Also changes are done to retain some part of the code common
for OMAP4/5 and move only the remaining to the Soc specific
directories.

Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-15 22:25:50 +01:00
Sricharan
508a58fa8e omap5: Add minimal support for omap5430.
This patch adds the minimal support for OMAP5. The platform and machine
specific headers and sources updated for OMAP5430.

OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture.
It's a dual core SOC with GIC used for interrupt handling and SCU for cache
coherency.

Also moved some part of code from the basic platform support that can be made
common for OMAP4/5. Rest is kept out seperately. The same approach is followed
for clocks and emif support in the subsequent patches.

Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-15 22:25:50 +01:00
Sricharan
933efe641a omap: Checkpatch fixes
Fixing them here so that when the files are reused in
subsequent patches for omap5, avoids new checkpatch
warnings.

Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-15 22:25:50 +01:00
Marek Vasut
237ce0fe97 PXA: Cleanup serial_pxa
* Cleanup register definitions by introducing new regs-uart.h, compliant with
  rest of U-Boot.
* Remove old register definitions from pxa-regs.h
* Convert serial_pxa to new regs-uart.h
* Cleanup serial_pxa

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-11-15 22:24:50 +01:00
Fabio Estevam
ce93dc9bce mx31: Use proper IO accessor for GPR register
Use proper IO accessor for GPR register.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-11-11 11:36:58 +01:00
Marek Vasut
b2d20161f7 iMX28: Add USB and USB PHY register definitions
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
2011-11-11 11:36:58 +01:00
Marek Vasut
31650d64a8 iMX28: Add APBH DMA driver
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
2011-11-11 11:36:57 +01:00
Marek Vasut
6b6440def8 iMX28: Add GPIO control
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
2011-11-11 11:36:57 +01:00
Marek Vasut
d91a672b6d iMX28: Add PINMUX control
Taken from Linux kernel with minor modifications:

commit bf985969e27b507f734435a99df8bf745a3dbb2b
Author: Shawn Guo <shawn.guo@freescale.com>
Date:   Mon Dec 20 22:57:43 2010 +0800

    ARM: mxs: Add iomux support

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
2011-11-11 11:36:57 +01:00
Marek Vasut
71a758e158 iMX28: Add SSP MMC driver
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Acked-by: Andy Fleming <afleming@gmail.com>
2011-11-11 11:36:56 +01:00
Marek Vasut
6e9a0a3967 iMX28: Initial support for iMX28 CPU
This patch supports:
- Timers
- Debug UART
- Clock

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
2011-11-11 11:36:56 +01:00
Christian Riesch
effea9d18c arm, davinci: Rename AM1808 lowlevel functions to DA850
Rename arch/arm/cpu/arm926ejs/davinci/am1808_lowlevel.c and
arch/arm/include/asm/arch-davinci/am1808_lowlevel.h to da850_lowlevel.c
and da850_lowlevel.h since they apply not only to the AM1808 SoC
but to all DA850 chips. The function names and #defines are changed
likewise.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-08 08:55:07 -05:00
Prabhakar Lad
3f0d4edcdb da8xxevm: fix build error
This patch fixes following compile error for da8xx evm

da830evm.c: In function 'board_init':
da830evm.c:222: error: 'DAVINCI_SYSCFG_SUSPSRC_UART2' undeclared (first use in this function)
da830evm.c:222: error: (Each undeclared identifier is reported only once
da830evm.c:222: error: for each function it appears in.)
make[2]: *** [da830evm.o] Error 1

similarly for da850evm.

introduced through commit:
f9fc237f1f

Signed-off-by: Prabhakar Lad <prabhakar.csengg@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-08 08:55:03 -05:00
Sanjeev Premi
2c5b87561a omap3: mem: Move comments next to definitions
Calculations for ACTIM_CTRLA amd ACTIM_CTRLB values
are defined in 'header' style comments.

Moved them along with definitions. Should help maintain
consistency between comments and code if any of these
are tweaked in future.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-04 13:39:25 -04:00
Sanjeev Premi
f883c5d8fa omap3: mem: Clean-up whitespaces
Consistent use of TABs and align definitions with
neighbouring code.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-04 13:39:21 -04:00
Sanjeev Premi
e3596e35f5 omap3: mem: Define and use common macros
Define common macros to arrive at the values of registers
SDRC_ACTIM_CTRLA and SDRC_ACTIM_CTRLB for different memory
types.

This doesn't make any real change in the execution but
helps readability.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-04 13:39:16 -04:00
Stefano Babic
134028682f VIDEO: davinci: add framebuffer to da8xx
The patch is a port from the framebuffer driver
of the Linux driver drivers/video/da8xx-fb.c, used
on davinci da8xx and OMAP-L138 boards.

As base for the port, the following commit (last changes
for this driver at the moment in the Linux kernel tree)
was taken:

commit 1db41e032d563eb47deab40dc5595be306b143ba
Author: axel lin <axel.lin@gmail.com>
Date:   Tue Feb 22 01:52:42 2011 +0000

    video: da8xx-fb: fix section mismatch warning

    Signed-off-by: Axel Lin <axel.lin@gmail.com>
    Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-03 22:56:26 +01:00
Stefano Babic
829f917854 ARM: Davinci: added missing registers to hardware.h
The hardware base address for ther LCD configuration
registers is missing, as well as some syscfg registers.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-03 22:56:26 +01:00
Bastian Ruppert
ca1646b85d Davinci: ea20: set GPIOs to hold MII-Phy in reset and set UART0-Switch for console
Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: dzu@denx.de
CC: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-03 22:56:25 +01:00
Bastian Ruppert
f9fc237f1f Davinci: ea20: set console on UART0
Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-03 22:56:25 +01:00
Heiko Schocher
8bfe325c74 arm926ejs, davinci: add missing spi defines for dm365
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-03 22:56:25 +01:00
Heiko Schocher
29b0bef54c arm926ejs, davinci: add cpuinfo for dm365
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-03 22:56:25 +01:00
Heiko Schocher
53d3b2ceed arm, davinci: add lowlevel function for dm365 soc
used for booting (for example) from NAND using spl code.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-03 22:56:25 +01:00
Heiko Schocher
4e28ede208 arm, davinci: add header files for dm365
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-03 22:56:25 +01:00
Christian Riesch
fab19c142e arm, davinci: Add function lpsc_syncreset()
This patch adds a function lpsc_syncreset that allows setting a
lpsc module into Sync Reset state.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-03 22:56:23 +01:00
Lei Wen
abbbbdd7e1 armada100: define CONFIG_SYS_CACHELINE_SIZE
By default, on Armada100 SoC DCache Lnd ICache line
lengths are 32 bytes long

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-11-03 22:56:22 +01:00
Lei Wen
0caac5f415 pantheon: define CONFIG_SYS_CACHELINE_SIZE
By default, on Pantheon SoC DCache Lnd ICache line
lengths are 32 bytes long

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-11-03 22:56:22 +01:00
Michael Walle
f779d739d6 kirkwood: define CONFIG_SYS_CACHELINE_SIZE
By default, on Kirkwood SoC DCache Lnd ICache line
lengths are 32 bytes long

Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2011-11-03 22:56:22 +01:00
Tom Rini
35b541c835 am335x: Drop board_sysinfo struct
This isn't used presumably should be a typedef if needed later.

Signed-off-by: Tom Rini <trini@ti.com>
2011-11-03 22:56:21 +01:00
Helmut Raiger
a6d9de436c mx31: add ESD control registers
This allows to initialize DDR memory in C code.
Currently all mx31 boards use assembler code (lowlevel_init.S)

Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-11-03 22:56:20 +01:00
Helmut Raiger
d121d20195 mx31: define pins and init for UART2 and CSPI3
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-11-03 22:56:20 +01:00
Fabio Estevam
6d0fb3dbcc mx31: Introduce mx31_set_gpr function
Introduce mx31_set_gpr function for setting the GPR (General Purpose Register) on MX31.

This function can be useful for setting a group of pins into tied to some specific peripherals.

Reuse this function from the linux kernel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-11-03 22:56:18 +01:00
Stefano Babic
f6dc192e14 MX35: Drop unnecessary prototypes from imx-regs.h
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-11-03 22:56:18 +01:00
Stefano Babic
324a131e7c MX35: factorize common assembly code
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-11-03 22:56:18 +01:00
Stefano Babic
e0a83cc1f5 MX35: add pins definition for UART3
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-11-03 22:56:17 +01:00
Stefano Babic
9d940442d3 MX35: added ESDC structure to imx-regs
The structure and PLL defines are added to
the imx-regs.h file and dropped from board
header files.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-11-03 22:56:17 +01:00
Marek Vasut
07133f2e7b PXA: Add MMC driver using the generic MMC framework
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-11-03 02:14:58 -05:00
Lei Wen
3d90a2adcb ARM: pantheon: add mmc definition
Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-10-27 21:56:37 +02:00
Chandan Nath
62d7fe7c91 ARM:AM33XX: Add emif/ddr support
This patch adds AM33xx emif/ddr support along with board specific
defines.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:36 +02:00
Chandan Nath
f87fa62af9 ARM:AM33XX: Add clock definitions
This patch adds basic clock definition of am33xx SoC.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:36 +02:00
Chandan Nath
5655108a82 ARM:AM33XX: Added support for AM33xx
This patch adds basic support for AM33xx which is based on ARMV7
Cortex A8 CPU.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:36 +02:00
Ilya Yanok
40b95c8956 omap3/emif4: fix registers definition
Fix EMIF4 registers definition.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:36 +02:00
Manjunath Hadli
fb1d6332b5 davinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUM
remove macro CONFIG_EMAC_MDIO_PHY_NUM and depending macro EMAC_MDIO_PHY_NUM
as they are no longer needed with the support for more than 1 PHYs in davinci
emac driver.

Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:36 +02:00
Tom Rini
cc3f705843 OMAP3 SPL: Provide weak omap_rev_string
We add an weak version of omap_rev_string in omap-common/spl.c
and while at it drop the omap3 version.  Move the prototype over
to <asm/omap_common.h> with the other SPL functions.

Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:35 +02:00
Simon Schwarz
4c4bb19d05 omap3: Add interface for omap3 DMA
Adds an interface to use the OMAP3 DMA.

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:34 +02:00
Simon Schwarz
7b646a6d12 omap3: Add DMA register accessors
Adding the register definitions for omap3 DMA controller to cpu.h

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:34 +02:00
Simon Schwarz
9c60c55be8 omap3: Add Base register for DMA
Adding the base register address of OMAP3 DMA controller.

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:34 +02:00
Heiko Schocher
2bc3acb10a arm, davinci: add missing LSPC define for MMC/SD1
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:34 +02:00
Sergei Shtylyov
9e2538e11f DaVinci: correct MDSTAT.STATE mask
MDSTAT.STATE occupies bits 0..5 according to all available documentation, so fix
the mask which previously was leaving out the intermediate state indicator bit.

While at it, introduce two #define's for that mask -- unfortunately, we can't
use a single #define as the assembly code can't include <asm/arch/hardware.h>
due to C-specfic constructs in it.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:34 +02:00
Ricardo Salveti de Araujo
8f6a027f62 omap4: adding revision detection for 4460 ES1.1
Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@linaro.org>

 2 files changed, 17 insertions(+), 1 deletions(-)
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:33 +02:00
Ricardo Salveti de Araujo
20033c9f87 omap4: replacing OMAP4_CONTROL with OMAP4430_CONTROL
OMAP4460 has a different set of values for the ID code, so moving the
old ones to be related just with 4430.

Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@linaro.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:33 +02:00
Lei Wen
5ff8b35412 ARM: orion5x: reduce dependence of including platform file
For files like the drivers/serial/serial.c, it must include the
platform file, as the CONFIG_SYS_NS16550_COM1 must reference to
the definition in the platform definition files.

Include the platform definition file in the config file, so that it
would decouple the dependence for the driver files.

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-10-27 21:56:33 +02:00
Lei Wen
a7efd719f4 ARM: kirkwood: reduce dependence of including platform file
For files like the drivers/serial/serial.c, it must include the
platform file, as the CONFIG_SYS_NS16550_COM1 must reference to the
definition in the platform definition files.

Include the platform definition file in the config file, so that it
would decouple the dependence for the driver files.

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-10-27 21:56:33 +02:00
Lei Wen
ab1b955211 ARM: armada100: reduce dependence of including platform file
For files like the drivers/serial/serial.c, it must include the
platform file, as the CONFIG_SYS_NS16550_COM1 must reference to the
definition in the platform definition files.

Include the platform definition file in the config file, so that it
would decouple the dependence for the driver files.

Updated cpu.h to remove build errors for gplugd board (by prafulla)

Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2011-10-27 21:56:33 +02:00
Lei Wen
0c0d9b708b ARM: pantheon: reduce dependence of including platform file
For files like the drivers/serial/serial.c, it must include the platform
file, as the CONFIG_SYS_NS16550_COM1 must reference to the definition in
the platform definition files.

Include the platform definition file in the config file, so that it
would decouple the dependence for the driver files.

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-10-27 21:56:33 +02:00
Ajay Bhargav
daa4b2f7f5 Armada100: Add SPI support for Marvell gplugD
This patch add SPI driver support for Marvell gplugD

Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
2011-10-27 21:56:32 +02:00
Ajay Bhargav
51100cfcca SPI: Add SPI driver support for Marvell Armada100
This patch provides support for SPI emulated over SSP for Marvell
Armada100 SOC.

Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
2011-10-27 21:56:32 +02:00
Fabio Estevam
77f11a99e1 imx: fix coding style
Fix checkpatch warning and errors in several i.MX related files.

While at it also address a checkpatch warning at arch/arm/cpu/armv7/mx5/soc.c
regarding the usage of extern in a C file.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-10-27 21:56:32 +02:00
Helmut Raiger
47c5455a48 mx31: provide readable WEIM CS accessor
setup_weimcs() and some macros are added to support the setup
for i.MX31 WEIM chip selects. As a compromise between verbosity
and readability an ASCII-art'ish bit comment is used instead of
bitfields.
All i.MX31 boards have been patched to use this approach using a
helper program to verify the changes.

Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-10-27 21:56:30 +02:00
Marek Vasut
47af6f61bc ARM: Update mach-types
This commit updates the mach-types based on the latest in Linus's head

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
2011-10-27 21:56:30 +02:00
Simon Glass
20e18e051f tegra2: Add more pinmux functions
This adds support for changing pinmux functions of pin groups. This is done
by defining a PMUX_FUNC_... enum which can be used to select the function for
each group using pinmux_set_func(). It is also possible to enable
pullup/pulldown, and the existing tristate functionality is retained.

Also provided is a means of configuring a list of pingroups by providing a
configuration table to pinmux_config_table().

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
2011-10-27 21:56:29 +02:00
Simon Glass
c3cf49d247 tegra2: Rename PIN_ to PINGRP_
The pin groupings are better named PINGRP, since on Tegra2 they refer to
multiple pins.

Sorry about this, but better to get it right now when there is only a small
amount of code affected.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
2011-10-27 21:56:29 +02:00
Simon Glass
4ed59e70e4 tegra2: Add more clock functions
This adds most of the clock functions required by board and driver code:

-query and adjust peripheral clocks
-query and adjust PLLs
-reset and enable control

These functions are plumbed in as required.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
2011-10-27 21:56:29 +02:00
Simon Glass
03c609f69b tegra2: Rename CLOCK_PLL_ID to CLOCK_ID
Rename CLOCK_PLL_ID to CLOCK_ID which takes account of the fact that the
code now deals with both PLL clocks and source clocks.

This also tidied up the assert() to match the one sent upstream, and fixes
an error in the PWM id.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
2011-10-27 21:56:29 +02:00
Simon Glass
45ba8077f3 fdt: ARM: Add device tree control of U-Boot (CONFIG_OF_CONTROL)
This adds a device tree pointer to the global data. It can be set by
board code. A later commit will add support for making a device
tree binary blob available to U-Boot for run-time configuration.

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-10-26 21:37:17 +02:00
Anton Staaf
44d6cbb6a7 arm: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-10-23 20:50:42 +02:00
Helmut Raiger
f00291985b mx31: make HSP clock for mx3fb driver available
This additionally updates mx31/generic.c by
- replacing __REG() macro accesses with readl() and writel()
- providing macros for PDR0 and PLL bit accesses

Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-10-13 12:27:24 +02:00
Mike Frysinger
31a4f1e5b6 board configs: drop NET_MULTI references
Now that none of the core checks CONFIG_NET_MULTI, there's not much point
in boards defining it.  So scrub all references to it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-05 22:22:16 +02:00
Mike Frysinger
476af299b0 image: push default arch values to arch headers
This pushes the ugly duplicated arch ifdef lists we maintain in various
image related files out to the arch headers themselves.

Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-05 22:22:15 +02:00
Valentin Longchamp
79843950b2 POST: add post_log_res field for post results in global data
The current post_log_word in global data is currently split into 2x
16 bits: half for the test start, half for the test success.
Since we alredy have more than 16 POST tests defined and more could
be defined, this may result in an overflow and the post_output_backlog
would not work for the tests defined further of these 16 positions.

An additional field is added to global data so that we can now support up
to 32 (depending of architecture) tests. The post_log_word is only used
to record the start of the test and the new field post_log_res for the
test success (or failure). The post_output_backlog is for this change
also adapted.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2011-10-05 22:03:10 +02:00
Valentin Longchamp
ea3681a6e4 POST/arm: adaptations needed for POST on ARM to work
For post to run on ARM, 3 things are needed:
- post_log_word to be defined in gd
- a post.h include in arch/arm/lib/board.c

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-10-05 22:03:10 +02:00
Graeme Russ
9558b48af0 console: Implement pre-console buffer
Allow redirection of console output prior to console initialisation to a
temporary buffer.

To enable this functionality, the board (or arch) must define:
 - CONFIG_PRE_CONSOLE_BUFFER - Enable pre-console buffer
 - CONFIG_PRE_CON_BUF_ADDR - Base address of pre-console buffer
 - CONFIG_PRE_CON_BUF_SZ - Size of pre-console buffer (in bytes)

The pre-console buffer will buffer the last CONFIG_PRE_CON_BUF_SZ bytes
Any earlier characters are silently dropped.
2011-10-05 22:03:09 +02:00
Marek Vasut
bf2eaf5112 MX5: Modify the PLL decoding algorithm
The PLL decoding algorithm didn't take into account many configuration bits.
Adjust it according to Linux kernel. Also, add PLL4 for MX53.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jason Hui <jason.hui@linaro.org>
Tested-by: Jason Liu <Jason.hui@linaro.org>
2011-09-30 22:01:05 +02:00
Marek Vasut
8edcc6f221 FEC: Move imx_get_mac_from_fuse() definition to fec_mxc.h
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
2011-09-30 22:01:03 +02:00
Fabio Estevam
610b53e29b MX31: Disable watchdog during low-power modes
Turn on the watchdog WDZST bit so that watchdog timer does not count during low power modes.

Prior to applying this patch mx31pdk board got watchdog resets because when it booted in the Linux prompt
and there was no activity, the system entered into idle mode while watchdog timer was still active.

Fix this by disabling watchdog timer during idle mode.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-30 22:01:00 +02:00
Fabio Estevam
e6d9b9785c MX25: tx25: Avoid the usage of extern in C file
Avoid the usage of extern in C file as pointed out by checkpatch.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-30 22:01:00 +02:00
Fabio Estevam
986d0d1bc5 ARM: mx25: Print the silicon revison
Print the silicon revison during boot.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-30 22:00:59 +02:00
Heiko Schocher
310ae55efe arm, davinci, am1808: add lowlevel functions for booting from NOR
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:59 +02:00