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pantheon: define CONFIG_SYS_CACHELINE_SIZE

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By default, on Pantheon SoC DCache Lnd ICache line
lengths are 32 bytes long

Signed-off-by: Lei Wen <leiwen@marvell.com>
This commit is contained in:
Lei Wen 2011-11-01 16:25:56 +05:30 • committed by Albert ARIBAUD
parent f779d739d6
commit 0caac5f415
1 changed files with 2 additions and 0 deletions
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2
arch/arm/include/asm/arch-pantheon/config.h
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@ -28,6 +28,8 @@
#include <asm/arch/pantheon.h>
#define CONFIG_ARM926EJS 1 /* Basic Architecture */
/* default Dcache Line length for pantheon */
#define CONFIG_SYS_CACHELINE_SIZE 32
#define CONFIG_SYS_TCLK (14745600) /* NS16550 clk config */
#define CONFIG_SYS_HZ_CLOCK (3250000) /* Timer Freq. 3.25MHZ */