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EXYNOS5: support display port phy control function
This patch support display port phy control function. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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2 changed files with 26 additions and 0 deletions
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@ -74,3 +74,24 @@ void set_usbhost_phy_ctrl(unsigned int enable)
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if (cpu_is_exynos5())
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exynos5_set_usbhost_phy_ctrl(enable);
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}
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static void exynos5_dp_phy_control(unsigned int enable)
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{
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unsigned int cfg;
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struct exynos5_power *power =
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(struct exynos5_power *)samsung_get_base_power();
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cfg = readl(&power->dptx_phy_control);
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if (enable)
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cfg |= EXYNOS_DP_PHY_ENABLE;
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else
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cfg &= ~EXYNOS_DP_PHY_ENABLE;
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writel(cfg, &power->dptx_phy_control);
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}
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void set_dp_phy_ctrl(unsigned int enable)
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{
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if (cpu_is_exynos5())
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exynos5_dp_phy_control(enable);
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}
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@ -859,4 +859,9 @@ void set_usbhost_phy_ctrl(unsigned int enable);
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#define POWER_USB_HOST_PHY_CTRL_EN (1 << 0)
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#define POWER_USB_HOST_PHY_CTRL_DISABLE (0 << 0)
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void set_dp_phy_ctrl(unsigned int enable);
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#define EXYNOS_DP_PHY_ENABLE (1 << 0)
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#endif
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