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USB: EXYNOS: Incorporate EHCI review comments

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This patch incorates the review comments given by Minkyu Kang for
EHCI support on EXYNOS

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
This commit is contained in:
Rajeshwari Shinde 2012-05-21 16:38:03 +05:30 committed by Marek Vasut
parent 58e22f8a15
commit 7590d3cece
4 changed files with 18 additions and 15 deletions
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3
arch/arm/include/asm/arch-exynos/cpu.h
View file

@ -46,6 +46,7 @@
#define EXYNOS4_USBOTG_BASE 0x12480000
#define EXYNOS4_MMC_BASE 0x12510000
#define EXYNOS4_SROMC_BASE 0x12570000
#define EXYNOS4_USB_HOST_EHCI_BASE 0x12580000
#define EXYNOS4_USBPHY_BASE 0x125B0000
#define EXYNOS4_UART_BASE 0x13800000
#define EXYNOS4_ADC_BASE 0x13910000
@ -69,6 +70,7 @@
#define EXYNOS5_DMC_CTRL_BASE 0x10DD0000
#define EXYNOS5_GPIO_PART1_BASE 0x11400000
#define EXYNOS5_MIPI_DSIM_BASE 0x11D00000
#define EXYNOS5_USB_HOST_EHCI_BASE 0x12110000
#define EXYNOS5_MMC_BASE 0x12200000
#define EXYNOS5_SROMC_BASE 0x12250000
#define EXYNOS5_USBOTG_BASE 0x12480000
@ -159,6 +161,7 @@ SAMSUNG_BASE(swreset, SWRESET)
SAMSUNG_BASE(timer, PWMTIMER_BASE)
SAMSUNG_BASE(uart, UART_BASE)
SAMSUNG_BASE(usb_phy, USBPHY_BASE)
SAMSUNG_BASE(usb_ehci, USB_HOST_EHCI_BASE)
SAMSUNG_BASE(usb_otg, USBOTG_BASE)
SAMSUNG_BASE(watchdog, WATCHDOG_BASE)
SAMSUNG_BASE(power, POWER_BASE)

10
arch/arm/include/asm/arch-exynos/ehci-s5p.h → arch/arm/include/asm/arch-exynos/ehci.h
View file

@ -1,5 +1,5 @@
/*
* SAMSUNG S5P USB HOST EHCI Controller
* SAMSUNG EXYNOS USB HOST EHCI Controller
*
* Copyright (C) 2012 Samsung Electronics Co.Ltd
* Vivek Gautam <gautam.vivek@samsung.com>
@ -20,8 +20,8 @@
* MA 02110-1301 USA
*/
#ifndef __ASM_ARM_ARCH_EXYNOS5_EHCI_S5P_H__
#define __ASM_ARM_ARCH_EXYNOS5_EHCI_S5P_H__
#ifndef __ASM_ARM_ARCH_EHCI_H__
#define __ASM_ARM_ARCH_EHCI_H__
#define CLK_24MHZ 5
@ -43,7 +43,7 @@
#define EHCICTRL_ENAINCR16 (1 << 26)
/* Register map for PHY control */
struct s5p_usb_phy {
struct exynos_usb_phy {
unsigned int usbphyctrl0;
unsigned int usbphytune0;
unsigned int reserved1[2];
@ -63,4 +63,4 @@ struct s5p_usb_phy {
/* Switch on the VBUS power. */
int board_usb_vbus_init(void);
#endif /* __ASM_ARM_ARCH_EXYNOS5_EHCI_S5P_H__ */
#endif /* __ASM_ARM_ARCH_EHCI_H__ */

2
drivers/usb/host/Makefile
View file

@ -42,6 +42,7 @@ COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-mpc512x.o
else
COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o
endif
COBJS-$(CONFIG_USB_EHCI_EXYNOS) += ehci-exynos.o
COBJS-$(CONFIG_USB_EHCI_MXC) += ehci-mxc.o
COBJS-$(CONFIG_USB_EHCI_MXS) += ehci-mxs.o
COBJS-$(CONFIG_USB_EHCI_MX5) += ehci-mx5.o
@ -51,7 +52,6 @@ COBJS-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
COBJS-$(CONFIG_USB_EHCI_IXP4XX) += ehci-ixp.o
COBJS-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
COBJS-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
COBJS-$(CONFIG_USB_EHCI_S5P) += ehci-s5p.o
COBJS-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
COBJS-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o

18
drivers/usb/host/ehci-s5p.c → drivers/usb/host/ehci-exynos.c
View file

@ -1,5 +1,5 @@
/*
* SAMSUNG S5P USB HOST EHCI Controller
* SAMSUNG EXYNOS USB HOST EHCI Controller
*
* Copyright (C) 2012 Samsung Electronics Co.Ltd
* Vivek Gautam <gautam.vivek@samsung.com>
@ -23,12 +23,12 @@
#include <common.h>
#include <usb.h>
#include <asm/arch/cpu.h>
#include <asm/arch/ehci-s5p.h>
#include <asm/arch/ehci.h>
#include "ehci.h"
#include "ehci-core.h"
/* Setup the EHCI host controller. */
static void setup_usb_phy(struct s5p_usb_phy *usb)
static void setup_usb_phy(struct exynos_usb_phy *usb)
{
clrbits_le32(&usb->usbphyctrl0,
HOST_CTRL0_FSEL_MASK |
@ -61,7 +61,7 @@ static void setup_usb_phy(struct s5p_usb_phy *usb)
}
/* Reset the EHCI host controller. */
static void reset_usb_phy(struct s5p_usb_phy *usb)
static void reset_usb_phy(struct exynos_usb_phy *usb)
{
/* HOST_PHY reset */
setbits_le32(&usb->usbphyctrl0,
@ -79,12 +79,12 @@ static void reset_usb_phy(struct s5p_usb_phy *usb)
*/
int ehci_hcd_init(void)
{
struct s5p_usb_phy *usb;
struct exynos_usb_phy *usb;
usb = (struct s5p_usb_phy *)samsung_get_base_usb_phy();
usb = (struct exynos_usb_phy *)samsung_get_base_usb_phy();
setup_usb_phy(usb);
hccr = (struct ehci_hccr *)(EXYNOS5_USB_HOST_EHCI_BASE);
hccr = (struct ehci_hccr *)samsung_get_base_usb_ehci();
hcor = (struct ehci_hcor *)((uint32_t) hccr
+ HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
@ -101,9 +101,9 @@ int ehci_hcd_init(void)
*/
int ehci_hcd_stop()
{
struct s5p_usb_phy *usb;
struct exynos_usb_phy *usb;
usb = (struct s5p_usb_phy *)samsung_get_base_usb_phy();
usb = (struct exynos_usb_phy *)samsung_get_base_usb_phy();
reset_usb_phy(usb);
return 0;