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net: fec_mxc: add 1000 Mbps selection

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Define FEC_QUIRK_ENET_MAC and add to
arch-mx6/imx-regs.h

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
This commit is contained in:
Troy Kisky 2012-02-07 14:08:46 +00:00 • committed by Albert ARIBAUD
parent 7c0e483d3f
commit 28774cbaac
3 changed files with 22 additions and 2 deletions
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1
arch/arm/include/asm/arch-mx6/imx-regs.h
View file

@ -163,6 +163,7 @@
#define CHIP_REV_1_0 0x10
#define IRAM_SIZE 0x00040000
#define IMX_IIM_BASE OCOTP_BASE_ADDR
#define FEC_QUIRK_ENET_MAC
#define GPIO_NUMBER(port, index) ((((port)-1)*32)+((index)&31))
#define GPIO_TO_PORT(number) (((number)/32)+1)

21
drivers/net/fec_mxc.c
View file

@ -379,13 +379,14 @@ static int fec_set_hwaddr(struct eth_device *dev)
static int fec_open(struct eth_device *edev)
{
struct fec_priv *fec = (struct fec_priv *)edev->priv;
int speed;
debug("fec_open: fec_open(dev)\n");
/* full-duplex, heartbeat disabled */
writel(1 << 2, &fec->eth->x_cntrl);
fec->rbd_index = 0;
#if defined(CONFIG_MX6Q)
#ifdef FEC_QUIRK_ENET_MAC
/* Enable ENET HW endian SWAP */
writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_DBSWAP,
&fec->eth->ecntrl);
@ -428,9 +429,25 @@ static int fec_open(struct eth_device *edev)
#endif
miiphy_wait_aneg(edev);
miiphy_speed(edev->name, fec->phy_id);
speed = miiphy_speed(edev->name, fec->phy_id);
miiphy_duplex(edev->name, fec->phy_id);
#ifdef FEC_QUIRK_ENET_MAC
{
u32 ecr = readl(&fec->eth->ecntrl) & ~FEC_ECNTRL_SPEED;
u32 rcr = (readl(&fec->eth->r_cntrl) &
~(FEC_RCNTRL_RMII | FEC_RCNTRL_RMII_10T)) |
FEC_RCNTRL_RGMII | FEC_RCNTRL_MII_MODE;
if (speed == _1000BASET)
ecr |= FEC_ECNTRL_SPEED;
else if (speed != _100BASET)
rcr |= FEC_RCNTRL_RMII_10T;
writel(ecr, &fec->eth->ecntrl);
writel(rcr, &fec->eth->r_cntrl);
}
#endif
debug("%s:Speed=%i\n", __func__, speed);
/*
* Enable SmartDMA receive task
*/

2
drivers/net/fec_mxc.h
View file

@ -198,6 +198,7 @@ struct ethernet_regs {
#define FEC_RCNTRL_FCE 0x00000020
#define FEC_RCNTRL_RGMII 0x00000040
#define FEC_RCNTRL_RMII 0x00000100
#define FEC_RCNTRL_RMII_10T 0x00000200
#define FEC_TCNTRL_GTS 0x00000001
#define FEC_TCNTRL_HBC 0x00000002
@ -207,6 +208,7 @@ struct ethernet_regs {
#define FEC_ECNTRL_RESET 0x00000001 /* reset the FEC */
#define FEC_ECNTRL_ETHER_EN 0x00000002 /* enable the FEC */
#define FEC_ECNTRL_SPEED 0x00000020
#define FEC_ECNTRL_DBSWAP 0x00000100
#define FEC_X_WMRK_STRFWD 0x00000100