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https://github.com/AsahiLinux/u-boot
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video: support exynos fimd driver for various exynos series
This patch supports exynos fimd driver for various exynos series different from existing it supports only exynos4 chip. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
Donghwa Lee
Albert ARIBAUD
parent
f8c5cfad7b
commit
ee93dcfa2e
2 changed files with 67 additions and 34 deletions
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@ -23,7 +23,7 @@
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#define __ASM_ARM_ARCH_FB_H_
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#ifndef __ASSEMBLY__
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struct exynos4_fb {
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struct exynos_fb {
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unsigned int vidcon0;
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unsigned int vidcon1;
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unsigned int vidcon2;
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@ -154,6 +154,18 @@ struct exynos4_fb {
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};
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#endif
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/* LCD IF register offset */
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#define EXYNOS4_LCD_IF_BASE_OFFSET 0x0
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#define EXYNOS5_LCD_IF_BASE_OFFSET 0x20000
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static inline unsigned int exynos_fimd_get_base_offset(void)
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{
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if (cpu_is_exynos5())
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return EXYNOS5_LCD_IF_BASE_OFFSET;
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else
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return EXYNOS4_LCD_IF_BASE_OFFSET;
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}
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/*
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* Register offsets
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*/
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@ -253,6 +265,8 @@ struct exynos4_fb {
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/* VIDTCON2 */
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#define EXYNOS_VIDTCON2_LINEVAL(x) (((x) & 0x7ff) << 11)
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#define EXYNOS_VIDTCON2_HOZVAL(x) (((x) & 0x7ff) << 0)
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#define EXYNOS_VIDTCON2_LINEVAL_E(x) ((((x) & 0x800) >> 11) << 23)
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#define EXYNOS_VIDTCON2_HOZVAL_E(x) ((((x) & 0x800) >> 11) << 22)
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/* Window 0~4 Control - WINCONx */
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#define EXYNOS_WINCON_DATAPATH_DMA (0 << 22)
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@ -330,6 +344,8 @@ struct exynos4_fb {
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#define EXYNOS_VIDOSD_TOP_Y(x) (((x) & 0x7ff) << 0)
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#define EXYNOS_VIDOSD_RIGHT_X(x) (((x) & 0x7ff) << 11)
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#define EXYNOS_VIDOSD_BOTTOM_Y(x) (((x) & 0x7ff) << 0)
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#define EXYNOS_VIDOSD_RIGHT_X_E(x) (((x) & 0x1) << 23)
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#define EXYNOS_VIDOSD_BOTTOM_Y_E(x) (((x) & 0x1) << 22)
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/* VIDOSD0C, VIDOSDxD */
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#define EXYNOS_VIDOSD_SIZE(x) (((x) & 0xffffff) << 0)
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@ -354,6 +370,8 @@ struct exynos4_fb {
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/* Buffer Size */
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#define EXYNOS_VIDADDR_OFFSIZE(x) (((x) & 0x1fff) << 13)
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#define EXYNOS_VIDADDR_PAGEWIDTH(x) (((x) & 0x1fff) << 0)
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#define EXYNOS_VIDADDR_OFFSIZE_E(x) ((((x) & 0x2000) >> 13) << 27)
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#define EXYNOS_VIDADDR_PAGEWIDTH_E(x) ((((x) & 0x2000) >> 13) << 26)
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/* WIN Color Map */
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#define EXYNOS_WINMAP_COLOR(x) ((x) & 0xffffff)
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@ -443,4 +461,9 @@ struct exynos4_fb {
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#define EXYNOS_I80START_TRIG (1 << 1)
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#define EXYNOS_I80STATUS_TRIG_DONE (1 << 2)
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/* DP_MIE_CLKCON */
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#define EXYNOS_DP_MIE_DISABLE (0 << 0)
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#define EXYNOS_DP_CLK_ENABLE (1 << 1)
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#define EXYNOS_MIE_CLK_ENABLE (3 << 0)
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#endif /* _REGS_FB_H */
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@ -41,8 +41,8 @@ void exynos_fimd_lcd_init_mem(u_long screen_base, u_long fb_size,
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static void exynos_fimd_set_dualrgb(unsigned int enabled)
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{
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struct exynos4_fb *fimd_ctrl =
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(struct exynos4_fb *)samsung_get_base_fimd();
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struct exynos_fb *fimd_ctrl =
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(struct exynos_fb *)samsung_get_base_fimd();
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unsigned int cfg = 0;
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if (enabled) {
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@ -60,8 +60,8 @@ static void exynos_fimd_set_dualrgb(unsigned int enabled)
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static void exynos_fimd_set_par(unsigned int win_id)
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{
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unsigned int cfg = 0;
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struct exynos4_fb *fimd_ctrl =
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(struct exynos4_fb *)samsung_get_base_fimd();
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struct exynos_fb *fimd_ctrl =
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(struct exynos_fb *)samsung_get_base_fimd();
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/* set window control */
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cfg = readl((unsigned int)&fimd_ctrl->wincon0 +
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@ -93,7 +93,10 @@ static void exynos_fimd_set_par(unsigned int win_id)
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EXYNOS_VIDOSD(win_id));
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cfg = EXYNOS_VIDOSD_RIGHT_X(pvid->vl_col - 1) |
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EXYNOS_VIDOSD_BOTTOM_Y(pvid->vl_row - 1);
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EXYNOS_VIDOSD_BOTTOM_Y(pvid->vl_row - 1) |
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EXYNOS_VIDOSD_RIGHT_X_E(1) |
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EXYNOS_VIDOSD_BOTTOM_Y_E(0);
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writel(cfg, (unsigned int)&fimd_ctrl->vidosd0b +
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EXYNOS_VIDOSD(win_id));
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@ -106,8 +109,8 @@ static void exynos_fimd_set_par(unsigned int win_id)
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static void exynos_fimd_set_buffer_address(unsigned int win_id)
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{
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unsigned long start_addr, end_addr;
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struct exynos4_fb *fimd_ctrl =
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(struct exynos4_fb *)samsung_get_base_fimd();
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struct exynos_fb *fimd_ctrl =
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(struct exynos_fb *)samsung_get_base_fimd();
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start_addr = (unsigned long)lcd_base_addr;
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end_addr = start_addr + ((pvid->vl_col * (NBITS(pvid->vl_bpix) / 8)) *
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@ -124,8 +127,8 @@ static void exynos_fimd_set_clock(vidinfo_t *pvid)
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unsigned int cfg = 0, div = 0, remainder, remainder_div;
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unsigned long pixel_clock;
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unsigned long long src_clock;
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struct exynos4_fb *fimd_ctrl =
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(struct exynos4_fb *)samsung_get_base_fimd();
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struct exynos_fb *fimd_ctrl =
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(struct exynos_fb *)samsung_get_base_fimd();
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if (pvid->dual_lcd_enabled) {
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pixel_clock = pvid->vl_freq *
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@ -153,9 +156,6 @@ static void exynos_fimd_set_clock(vidinfo_t *pvid)
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cfg |= (EXYNOS_VIDCON0_CLKSEL_SCLK | EXYNOS_VIDCON0_CLKVALUP_ALWAYS |
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EXYNOS_VIDCON0_VCLKEN_NORMAL | EXYNOS_VIDCON0_CLKDIR_DIVIDED);
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if (pixel_clock > MAX_CLOCK)
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pixel_clock = MAX_CLOCK;
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src_clock = (unsigned long long) get_lcd_clk();
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/* get quotient and remainder. */
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@ -180,8 +180,8 @@ static void exynos_fimd_set_clock(vidinfo_t *pvid)
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void exynos_set_trigger(void)
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{
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unsigned int cfg = 0;
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struct exynos4_fb *fimd_ctrl =
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(struct exynos4_fb *)samsung_get_base_fimd();
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struct exynos_fb *fimd_ctrl =
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(struct exynos_fb *)samsung_get_base_fimd();
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cfg = readl(&fimd_ctrl->trigcon);
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@ -194,8 +194,8 @@ int exynos_is_i80_frame_done(void)
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{
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unsigned int cfg = 0;
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int status;
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struct exynos4_fb *fimd_ctrl =
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(struct exynos4_fb *)samsung_get_base_fimd();
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struct exynos_fb *fimd_ctrl =
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(struct exynos_fb *)samsung_get_base_fimd();
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cfg = readl(&fimd_ctrl->trigcon);
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@ -209,8 +209,8 @@ int exynos_is_i80_frame_done(void)
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static void exynos_fimd_lcd_on(void)
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{
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unsigned int cfg = 0;
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struct exynos4_fb *fimd_ctrl =
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(struct exynos4_fb *)samsung_get_base_fimd();
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struct exynos_fb *fimd_ctrl =
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(struct exynos_fb *)samsung_get_base_fimd();
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/* display on */
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cfg = readl(&fimd_ctrl->vidcon0);
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@ -221,8 +221,8 @@ static void exynos_fimd_lcd_on(void)
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static void exynos_fimd_window_on(unsigned int win_id)
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{
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unsigned int cfg = 0;
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struct exynos4_fb *fimd_ctrl =
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(struct exynos4_fb *)samsung_get_base_fimd();
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struct exynos_fb *fimd_ctrl =
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(struct exynos_fb *)samsung_get_base_fimd();
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/* enable window */
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cfg = readl((unsigned int)&fimd_ctrl->wincon0 +
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@ -239,8 +239,8 @@ static void exynos_fimd_window_on(unsigned int win_id)
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void exynos_fimd_lcd_off(void)
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{
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unsigned int cfg = 0;
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struct exynos4_fb *fimd_ctrl =
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(struct exynos4_fb *)samsung_get_base_fimd();
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struct exynos_fb *fimd_ctrl =
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(struct exynos_fb *)samsung_get_base_fimd();
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cfg = readl(&fimd_ctrl->vidcon0);
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cfg &= (EXYNOS_VIDCON0_ENVID_DISABLE | EXYNOS_VIDCON0_ENVID_F_DISABLE);
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@ -250,8 +250,8 @@ void exynos_fimd_lcd_off(void)
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void exynos_fimd_window_off(unsigned int win_id)
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{
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unsigned int cfg = 0;
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struct exynos4_fb *fimd_ctrl =
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(struct exynos4_fb *)samsung_get_base_fimd();
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struct exynos_fb *fimd_ctrl =
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(struct exynos_fb *)samsung_get_base_fimd();
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cfg = readl((unsigned int)&fimd_ctrl->wincon0 +
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EXYNOS_WINCON(win_id));
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@ -264,11 +264,15 @@ void exynos_fimd_window_off(unsigned int win_id)
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writel(cfg, &fimd_ctrl->winshmap);
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}
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void exynos_fimd_lcd_init(vidinfo_t *vid)
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{
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unsigned int cfg = 0, rgb_mode;
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struct exynos4_fb *fimd_ctrl =
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(struct exynos4_fb *)samsung_get_base_fimd();
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unsigned int offset;
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struct exynos_fb *fimd_ctrl =
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(struct exynos_fb *)samsung_get_base_fimd();
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offset = exynos_fimd_get_base_offset();
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/* store panel info to global variable */
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pvid = vid;
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@ -297,25 +301,27 @@ void exynos_fimd_lcd_init(vidinfo_t *vid)
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if (!pvid->vl_dp)
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cfg |= EXYNOS_VIDCON1_IVDEN_INVERT;
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writel(cfg, &fimd_ctrl->vidcon1);
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writel(cfg, (unsigned int)&fimd_ctrl->vidcon1 + offset);
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/* set timing */
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cfg = EXYNOS_VIDTCON0_VFPD(pvid->vl_vfpd - 1);
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cfg |= EXYNOS_VIDTCON0_VBPD(pvid->vl_vbpd - 1);
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cfg |= EXYNOS_VIDTCON0_VSPW(pvid->vl_vspw - 1);
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writel(cfg, &fimd_ctrl->vidtcon0);
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writel(cfg, (unsigned int)&fimd_ctrl->vidtcon0 + offset);
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cfg = EXYNOS_VIDTCON1_HFPD(pvid->vl_hfpd - 1);
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cfg |= EXYNOS_VIDTCON1_HBPD(pvid->vl_hbpd - 1);
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cfg |= EXYNOS_VIDTCON1_HSPW(pvid->vl_hspw - 1);
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writel(cfg, &fimd_ctrl->vidtcon1);
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writel(cfg, (unsigned int)&fimd_ctrl->vidtcon1 + offset);
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/* set lcd size */
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cfg = EXYNOS_VIDTCON2_HOZVAL(pvid->vl_col - 1);
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cfg |= EXYNOS_VIDTCON2_LINEVAL(pvid->vl_row - 1);
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cfg = EXYNOS_VIDTCON2_HOZVAL(pvid->vl_col - 1) |
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EXYNOS_VIDTCON2_LINEVAL(pvid->vl_row - 1) |
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EXYNOS_VIDTCON2_HOZVAL_E(pvid->vl_col - 1) |
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EXYNOS_VIDTCON2_LINEVAL_E(pvid->vl_row - 1);
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writel(cfg, &fimd_ctrl->vidtcon2);
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writel(cfg, (unsigned int)&fimd_ctrl->vidtcon2 + offset);
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}
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/* set display mode */
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@ -331,7 +337,11 @@ void exynos_fimd_lcd_init(vidinfo_t *vid)
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exynos_fimd_set_buffer_address(pvid->win_id);
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/* set buffer size */
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cfg = EXYNOS_VIDADDR_PAGEWIDTH(pvid->vl_col * NBITS(pvid->vl_bpix) / 8);
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cfg = EXYNOS_VIDADDR_PAGEWIDTH(pvid->vl_col * NBITS(pvid->vl_bpix) / 8) |
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EXYNOS_VIDADDR_PAGEWIDTH_E(pvid->vl_col * NBITS(pvid->vl_bpix) / 8) |
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EXYNOS_VIDADDR_OFFSIZE(0) |
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EXYNOS_VIDADDR_OFFSIZE_E(0);
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writel(cfg, (unsigned int)&fimd_ctrl->vidw00add2 +
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EXYNOS_BUFFER_SIZE(pvid->win_id));
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