Wolfgang is right: It's not a good idea to set up default initial
ethernet addresses for a board, even though they belong to the local
range.
This will change the failure mode from "IT manager screams at you for
using duplicate ethernet addresses" to a nice error message explaining
that the ethernet address hasn't been set properly.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
The Haleakala is nearly identical with the Kilauea eval board. The only
difference is that the 405EXr only supports one EMAC and one PCIe
interface. This patch adds support for the Haleakala board by using
the identical image for Kilauea and Haleakala. The distinction is done
by comparing the PVR.
Signed-off-by: Stefan Roese <sr@denx.de>
On Yucca & Katmai, the inbound memory map pointed to 0x4.0000.0000, which
is the internal SRAM. Since I now ported and tested this endpoint mode
on Kilauea successfully to map to 0 (SDRAM), I also changed this for
Katmai.
Yucca will stay at internal SRAM for now. Not sure if somebody relies on
this setup.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for dynamic configuration of PCIe ports for the
AMCC PPC4xx boards equipped with PCIe interfaces. These are the PPC440SPe
boards Yucca & Katmai and the 405EX board Kilauea.
This dynamic configuration is done via the "pcie_mode" environement
variable. This variable can be set to "EP" or "RP" for endpoint or
rootpoint mode. Multiple values can be joined via the ":" delimiter.
Here an example:
pcie_mode=RP:EP:EP
This way, PCIe port 0 will be configured as rootpoint, PCIe port 1 and 2
as endpoint.
Per default Yucca will be configured as:
pcie_mode=RP:EP:EP
Per default Katmai will be configured as:
pcie_mode=RP:RP:REP
Per default Kilauea will be configured as:
pcie_mode=RP:RP
Signed-off-by: Tirumala R Marri <tmarri@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch enables the fdt support on the AMCC Kilauea eval board.
Additionally now EBC ranges fdt fixup is included to support NOR
FLASH mapping via the Linux physmap_of driver.
This Kilauea port now support booting arch/ppc and arch/powerpc
Linux kernels. The default environment "net_nfs" is for arch/ppc
and "net_nfs_fdt" is for arch/powerpc. In the long run, arch/ppc
support will be removed.
Signed-off-by: Stefan Roese <sr@denx.de>
128MB seems to be the smallest possible value for the memory size
for on PCIe port. With this change now the BAR's of the PCIe cards
are accessible under U-Boot.
One big note: This only works for PCIe port 0 & 1. For port 2 this
currently doesn't work, since the base address is now 0xc0000000
(0xb0000000 + 2 * 0x08000000), and this is already occupied by
CFG_PCIE0_CFGBASE. But solving this issue for port 2 would mean
to change the base addresses completely and this change would have
too much impact right now.
This patch adds debug output to the 4xx pcie driver too.
Signed-off-by: Stefan Roese <sr@denx.de>
With this patch PSC3 is configured as UART. This is done, because if
the pins of PSC3 are not configured at all (-> all pins are GPI),
due to crosstalk, spurious characters may be send over the RX232_2_TXD
signal line.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
With this patch PSC3 is configured as UART. This is done, because if
the pins of PSC3 are not configured at all (-> all pins are GPI),
due to crosstalk, spurious characters may be send over the RX232_2_TXD
signal line.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
The pxa255_idp being an old unmaintained board showed several issues:
1. CONFIG_INIT_CRITICAL was still defined.
2. Neither CONFIG_MAC_PARTITION nor CONFIG_DOS_PARTITION was defined.
3. Symbol flash_addr was undeclared.
4. The boards lowlevel_init function was still called memsetup.
5. The TEXT_BASE was still 0xa3000000 rather than 0xa3080000.
6. Using -march=armv5 instead of -march=armv5te resulted in lots of
'target CPU does not support interworking' warnings on recent compilers.
7. The PXA's serial driver redefined FFUART, BTUART and STUART used as
indexes rather than the register definitions from the pxa-regs header
file. Renamed them to FFUART_INDEX, BTUART_INDEX and STUART_INDEX to
avoid any ambiguities.
8. There were several redefinition warnings concerning ICMR, OSMR3,
OSCR, OWER, OIER, RCSR and CCCR in the PXA's assembly start file.
9. The board configuration file was rather outdated.
10. The part header file defined the vendor, product and revision arrays
as unsigned chars instead of just chars in the block_dev_desc_t
structure.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
New board has faster oscillator and a different Flash chip. This affects:
- CFG_MPC5XXX_CLKIN
- SDRAM timings
- Flash CS configuration (timings)
- Flash sector size, and thus MTD partition layout
- malloc() arena size (due to bigger Flash sectors)
- smaller memory test range (due to bigger malloc() arena)
This patch also enables more extensive memory testing via "mtest".
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
On the MPC85xx CDS we have two issues:
1. The device tree fixup code did not check to see if the property we are
trying to update is actually found. Its possible that it would update
random memory starting at 0.
2. Newer Linux kernel's have moved the location of the PCI nodes to be
sibilings of the soc node and not children. The explicit PATH to the PCI
node would not be found for these device trees. Add the ability to handle
both paths. In the future we shouldn't handle such fixups by explicit path.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On the MPC8568 MDS we use ttyS0, UART0, etc. as the standard configured
console. Make it so we match that config what we tell Linux as the early
STDOUT console.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Mahesh Jade <mahesh.jade@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
The BCSR status bit for the 66MHz PCI operation was correctly
addressed (MSB/LSB problem). Now the correct currently setup
PCI frequency is displayed upon bootup.
This patch also fixes this problem on Rainier & Yellowstone, since these
boards use the same souce code as Sequoia & Yosemite do.
Signed-off-by: Stefan Roese <sr@denx.de>
At 133 MHz the current SDRAM refresh rate is too fast
(measured 4 * 1.17 us).
CFG_MAMR_PTA changes from 39 to 97. This result
in a refresh rate of 4 * 7.8 us at the default clock
50 MHz. At 133 MHz the value will be then 4 * 2.9 us.
This is a compromise until a new method is found to
adjust the refresh rate.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
CFG_MEMTEST_START uses weird magic involving gd, which fails to
compile. Use hardcoded values instead (we actually know how much RAM
we have on board.)
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
/bin/bash and /bin/dash (which /bin/sh is linked to on ubuntu) handle embedded
nulls in a string differently. For example, the following statement:
echo "this is a string\0" > afile
Will produce the following with /bin/bash:
"this is a string\0"
But with /bin/dash, will produce:
"this is a string
Bug fixed by moving the embedded null out of the makefile and into the
config header. Also renamed the macro to avoid usage colision with the same
macro used by other board ports.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Updates to atstk1002 U-Boot header file:
- Changed bootargs:
* Set the bootargs for at1002 to point to the SD-card partition instead
* ... of the boot flash.
* Removing the rootfstype since that argument are not needed.
Signed-off-by: Eirik Aanonsen <eaa@wprmedical.com>
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This patch applies some clarifying comments to how the different
clocks are setup according to atstk1002.h Some of the previous
comments where stating wrongful information.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
With recent toolchains, the environment sectors were no longer aligned to
sector boundaries. The reason was a combination of two bugs:
1) common/environment.c assumed that CONFIG_TQM8xxL would be defined
for all TQM8xxL and TQM8xxM boards. But "include/common.h", where
this gets defined, is not included here (and cannot be included
without causing lots of problems).
Added a new #define CFG_USE_PPCENV for all boards which really
want to put the environment is a ".ppcenv" section.
2) The linker scripts just include environment.o, silently assuming
that the objects in that file are really in the order in which
they are coded in the C file, i. e. "environment" first, then
"redundand_environment", and "env_size" last. However, current
toolchains (GCC-4.x) reorder the objects, causing the environment
data not to start on a flash sector boundary:
Instead of: we got:
40008000 T environment 40008000 T env_size
4000c000 T redundand_environment 40008004 T redundand_environment
40010000 T env_size 4000c004 T environment
Note: this patch fixes just the first part, and cures the alignment
problem by making sure that "env_size" gets placed correctly. However,
we still have a potential issue because primary and redundant
environment sectors are actually swapped, i. e. we have now:
40008000 T redundand_environment
4000c000 T environment
40010000 T env_size
This shall be fixed in the next version.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This config option sets the default for the progress information
output behavior that can also be configured through the 'quiet'
environment variable.
The legacy NAND code does not print the current progress info
on the console. So this option is for backward compatibility for
units that are in the field and where setting the quiet variable
is not an option. With CFG_NAND_QUIET set to '1' the console
progress info is turned off. This can still be overwritten
through the environment variable.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
- update default definitions of kernel_addr and fdt_addr env. variables
- make arch/powerpc booting the default scenario
- update MTD partition layout to match the above
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
- 'pciconfighost' is set by default in order to be able to scan bridges
behind the primary host/PCIe
- 'pciscandelay' env variable is recognized to allow for user-controlled
delay before the PCIe bus enumeration; some peripheral devices require a
significant delay before they can be scanned (e.g. LSI8408E); without the
delay they are not detected
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
- correct configuration space mapping
- correct bus numbering
- better access to config space
Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the
first device on the first bus. We now allow to configure up to 16 buses;
also, scanning for devices behind the PCIe-PCIe bridge is supported, so
peripheral devices farther in hierarchy can be identified.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Affects boards: icecube (lite5200), jupiter, motionpro, tqm5200
Tested on: lite5200b
Note: the fixup functions have not been moved to a common place. This
patch is targeted for immediate merging as in solves a build issue, but
the final name/location of the fixups is still subject to debate. I
propose to merge this now, and move the fixups in the next merge window
to be usable by all targets.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The RTC on the M1575 ULI chipset requires a dummy read before
we are able to talk to the RTC. We accomplish this by adding a
second memory region to the PHB the ULI is on and read from it.
The second region is added to maintain compatiabilty with Linux's
view of the PCI memory map.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The 440EPx has a problem when the PCI_CACHE_LINE_SIZE register is
set to non-zero, because it doesn't support MRM (memory-read-
multiple) correctly. We now added the possibility to configure
this register in the board config file, so that the default value
of 8 can be overridden.
Here the details of this patch:
o drivers_pci_auto.c: introduce CFG_PCI_CACHE_LINE_SIZE to allow
board-specific settings. As an example the sequoia board requires 0.
Idea from Stefan Roese <sr@denx.de>.
o board/amcc/sequoia/init.S: add a TLB mapping at 0xE8000000 for the
PCI IO-space. Obtained from Stefan Roese <sr@denx.de>.
o include/configs/sequoia.h: turn CONFIG_PCI_PNP back on and set
CFG_PCI_CACHE_LINE_SIZE to 0.
Signed-off-by: Gary Jennejohn <garyj@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
The Linux PCF8563 RTC driver doesn't do autoprobing, so we need
to supply the RTC I2C address as bootline parameter. This patch
adds support for this rtc probing parameter to the bootargs:
"rtc-pcf8563.probe=0,0x51"
Signed-off-by: Stefan Roese <sr@denx.de>
this had slipped through the cracks, since the sbc board was added
after I wrote the original patch to remove all these symbols, and
before it was merged.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Restore CONFIG_EXTRA_ENV_SETTINGS definition which contains the
correct consoledev needed for linux boot.
Standardize on fdt{file,addr} var to hold dtb file name.
Set PCI inbound memory region from CFG_MEMORY_{BUS,PHYS}.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
if a board/$(VENDOR)/common/Makefile exists, build it.
also add the first such case, board/freescale/common/Makefile, to
handle building board-shared EEPROM, PIXIS, and MDS-PIB code, as
dictated by board configuration.
thusly get rid of alternate build dir errors such as:
FATAL: can't create /work/wd/tmp/u-boot-ppc/board/freescale/mpc8360emds/../common/pq-mds-pib.o: No such file or directory
by putting the common/ mkdir command in its proper place (the common
Makefile). Common bits from existing individual board Makefiles have
been removed.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
define there own I/O functions.
(Needed for the pcs440ep board).
- The default I/O Functions are again 8 Bit accesses.
- Added CONFIG_CMD_IDE for the pcs440ep Board.
Signed-off-by: Heiko Schocher <hs@denx.de>
Since this RTC POST test is taking quite a while to complete
it's only initiated upon special keypress same as the complete
memory POST.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the 2nd EEPROM (AT24C128) on the lwmon5
board. Now the "eeprom" command can be used to read/write from/to this
device. Additionally a new command was added "eepromwp" to en-/disable
the write-protect of this 2nd EEPROM.
The 1st EEPROM is not affected by this write-protect command.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the matrix keyboard on the lwmon5 board.
Since the implementation in the dsPCI is kind of compatible with the
"old" lwmon board, most of the code is copied from the lwmon
board directory.
Signed-off-by: Stefan Roese <sr@denx.de>
platforms wishing to display RAM diagnostics in addition to size,
can do so, on one line, in their own board_add_ram_info()
implementation.
this consequently eliminates CONFIG_ADD_RAM_INFO.
Thanks to Stefan for the hint.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
add board_add_ram_info, to make memory diagnostic output more
consistent. u-boot banner output now looks like:
DRAM: 256 MB (DDR1, 64-bit, ECC on)
and for boards with SDRAM on the local bus, a line such as this is
added:
SDRAM: 64 MB (local bus)
also replaced some magic numbers with their equivalent define names.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The patch split the PIB init code from pci.c to a single file board/freescale/common/pq-mds-pib.c
And add Qoc3 ATM card support for MPC8360EMDS and MPC832XEMDS board.
Signed-off-by Tony Li <tony.li@freescale.com>
The 85xx code now relies on CONFIG_HAS_ETH0 to determine whether
to update TSEC1's device-tree node, so we need to add it
to all the boards with TSECs. Do this for 83xx and 86xx, too,
since they will eventually do something similar.
Signed-off-by: Andy Fleming <afleming@freescale.com>
The PCIe bus that the ULI M1575 is connected to has no possible way of
needing more than the fixed amount of IO & Memory space needed by the ULI.
So make it use far less IO & memory space and have it use the shared LAW. This
free's up a LAW for PCIe1 IO space. Also reduce the amount of IO space needed
by each bus.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
It looks like we had a merge issue that duplicated a bit of code
in ft_board_setup. Also, we need to set CONFIG_HAS_ETH0 to get
the MAC address properly set in the device tree on boot for TSEC1
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Actually, fixed a large bug in the UEC for *all* platforms.
How did this ever work?
uec_init() did not follow the spec for eth_init(), and returned
0 on success. Switch it to return the link like tsec_init()
(and 0 on error)
The immap for the 8568 was defined based on MPC8568, rather than
CONFIG_MPC8568
CONFIG_QE was off
CONFIG_ETHPRIME was set to "Freescale GETH". Now is "FSL UEC0"
Fixed a comment about the ranges for CONFIG_ETHPRIME if TSEC_ENET is
enabled
Signed-off-by: Andy Fleming <afleming@freescale.com>
The tsec_info structure and array has a "flags" field for each
ethernet controller. This field is the only reason there are
settings. Switch to defining TSECn_FLAGS for each controller
in the config header, and we can greatly simplify the array, and
also simplify the addition of future boards.
Signed-off-by: Andy Fleming <afleming@freescale.com>
this enables libfdt code by default for the
freescale mpc8313erdb, mpc832xemds, mpc8349emds,
mpc8349itx and gp boards.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Merge to two at45.c files into a common file, split to at45.c and spi.c
Fix spelling error in DM9161 PHY Support.
Initialize at91rm9200 board (and set LED).
Add PIO control for at91rm9200dk LEDs and Mux.
Change dataflash partition boundaries to be compatible with Linux 2.6.
Signed-off-by: Peter Pearse <peter.pearse@arm.com>
Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
The PCI ID select values on the Arcadia main board differ depending
on the version of the hardware. The standard configuration supports
Rev 3.1. The legacy target supports Rev 2.x.
Signed-off-by Randy Vinson <rvinson@mvista.com>
This patch is against u-boot-mpc85xx.git of www.denx.com
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
Some patches had inserted warnings into the build:
* mpc8560ads declared data without using it
* cpu_init declared ecm and immap without using it in all CONFIGs
* MPC8548CDS.h had its default filenames changed so that they contained
"\m" in the paths. Made the defaults not Windows-specific (or
anything-specific)
Signed-off-by: Andy Fleming <afleming@freescale.com>
Make the early L1 cache stack region guarded to prevent speculative
fetches outside the locked range.
Use _PHYS defines, not _MEM for cpu-side PCI memory mapped regions.
init.S whitespace cleanup.
Allow TEXT_BASE value to be specified on command line. This allows it
to be set to 0xfffc0000 which cuts the uboot binary in half.
Clear and enable lbc and ecm errors.
Update last_busno in device-tree for pci and pcie.
Remove load of obsolete cpu/mpc85xx/pci.0
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
PCI1 LAW mapping should use CFG_PCI1_MEM_PHY and not _BASE address.
Enable LBC and ECM errors and clear error registers.
Add tftpflash env var to get uboot from tftp server and flash it.
Add pci/pcie convenience env vars to display register space:
"run pcie3regs" to see all pcie3 ccsr registers
"run pcie3cfg" to see all cfg registers
Whitespace cleanup and MPC8544DS.h
Enable CONFIG_INTERRUPTS.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
PCI-Express sockets 1 and 2 verified working with Intel Pro/1000 PT
adapter.
Signed-off-by: Joe Hamman <joe.hamman@embeddedspecialties.com>
Signde-off-by: Jon Loeliger <jdl@freescale.com>
The update procedure was modified to turn off the USB subsystem
before exit for MCC200 and TRAB. This is necessary as otherwise the
USB controller continues to write periodically to system memory!
MCC200-specific notes:
- the patch disables the magic key check for MCC200
- the patch contains the configuration changes made
for the new revision of the board.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Add support for Wind River's SBC8641D reference board.
Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com>
Acked-by: Wolfgang Denk <wd@denx.de>
Acked-by: Jon Loeliger <jdl@freescale.com>
Add support for the following DaVinci boards:
- DV_EVM
- SCHMOOGIE
- SONATA
Changes:
- Split into separate board directories
- Removed changes to MTD_DEBUG (or whatever it's called)
- New CONFIG_CMD party line followed
- Some cosmetic fixes, cleanup etc.
- Patches against the latest U-Boot tree as of now.
- Fixed CONFIG_CMD_NET in net files.
- Fixed CONFIG_CMD_EEPROM for schmoogie.
- Made sure it compiles and works (forceenv() link problem) on SCHMOOGIE and
DV_EVM. Can't check if it works on SONATA, don't have a board any more,
but it at least compiles.
Here is an excerpt from session log on SCHMOOGIE...
U-Boot 1.2.0-g6c33c785-dirty (Aug 7 2007 - 13:07:17)
DRAM: 128 MB
NAND: 128 MiB
In: serial
Out: serial
Err: serial
ARM Clock : 297MHz
DDR Clock : 162MHz
ETH PHY : DP83848 @ 0x01
U-Boot > iprobe
Valid chip addresses: 1B 38 3A 3D 3F 50 5D 6F
U-Boot > ping 192.168.253.10
host 192.168.253.10 is alive
U-Boot >
Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
Acked-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Zach Sadecki <Zach.Sadecki@ripcode.com>
Acked-by: Stefan Roese <sr@denx.de>
MPC8323E based board with 64MB fixed SDRAM, 16MB flash,
five 10/100 ethernet ports connected via an ICPlus IP175C
switch, one PCI slot, and serial. Features not supported
in this patch are SD card interface, 2 USB ports, and the
two phone ports.
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch add definition of the BIOS emulator and the ATI framebuffer
driver for MPC8641HPCN board.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
All of the PCI/PCI-Express driver and initialization code that
was in the MPC8641HPCN port has now been moved into the common
drivers/fsl_pci_init.c. In a subsequent patch, this will be
utilized by the 85xx ports as well.
Common PCI-E IMMAP register blocks for FSL 85xx/86xx are added.
Also enable the second PCI-Express controller on 8641
by getting its BATS and CFG_ setup right.
Fixed a u16 vendor compiler warning in AHCI driver too.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Add the ability for modules from the Schindler cm5200 family to use a
single U-Boot image:
- rename cm1_qp1 to cm5200
- add run-time module detection
- parametrize SDRAM configuration according to the module we are running on
Few minor, board-specific fixes included in this patch:
- better MAC address handling
- updated default environment ('update' command uses +{filesize} now)
- improved error messages in the auto-update code
- allow booting U-Boot from RAM (CFG_RAMBOOT)
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Changed storage type of cfg_simulate_spd_eeprom to const
Changed storage type of gpio_tab to stack storage
(Cannot access global data declarations in .bss until afer code relocation)
Improved SDRAM tests to catch problems where data is not uniquely addressable
(e.g. incorrectly programmed SDRAM row or columns)
Added CONFIG_PROG_SDRAM_TLB to support Bamboo SIMM/DIMM modules
Fixed AM29LV320DT (OpCode Flash) sector map
Signed-off-by: Eugene OBrien <eugene.obrien@advantechamt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
- Clear ECC status regs after ECC POST test
- Set dcbz for ECC generation with caches enabled as default
- Code cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
Change Lime SDRAM initialization to now support 100MHz and
133MHz (if enabled). Also the framebuffer is initialized to
display a blue rectangle with a white border.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds ECC Post test for the Lwmon5 board based
on PPC440EPx to U-Boot.
Signed-off-by: Pavel Kolesnikov <concord@emcraft.com>
Acked-by: Yuri Tikhonov <yur@emcraft.com>
Acked-by: Stefan Roese <sr@denx.de>
Made the boot commands use device trees by default.
Also moved the ramdisk to 1000000 (I think the previous address
was getting overridden during boot).
Signed-off-by: Andy Fleming <afleming@freescale.com>
* Adds code to modify CPM frequencies
* Cleans up the config file to #define TSEC and (for now) #undef FCC
* Adds the MII command for all 8560 ADS configurations
* Updates config file to provide convenience commands for booting
with a device tree
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
- now the Flash ST M29W040B is supported (not tested)
- fix the "led" command
- fix compile error, if BUILD_DIR is used
Signed-off-by: Heiko Schocher <hs@denx.de>
Enabled cache in cpu_init_f() for faster flash to mem allocation. Updated cache handling in start.S. Applied cache invalidate in fec_send() and fec_recv(). Added CFG_UNIFY_CACHE for CF V3 only.
Signed-off-by: TsiChung <tcliew@Goku.(none)>
Create new header file to include immap_5xxx.h and m5xxx.h and to share among drivers without update in driver file each processor is added. Moved peripherals base address and defines from configs file to immap.h.
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.
Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.
Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.
Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.
Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.
Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.
Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
For some reason, CONFIG_POST permeated as CONFIG_CMD_POST_DIAG
when it really means just CONFIG_CMD_DIAG. There is no CMD_POST.
Clear this mess up some.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Since ADS860.h includes "board/fads/fads.h" with ramifications
on the CONFIG_COMMAND treatment, it too has to be adjusted to
exclude already configured commands in this same commit.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
- Add optional ECC generation routine to preserve existing
RAM values. This is needed for the Linux log-buffer support
- Add optional DDR2 setup with CL=4
- GPIO50 not used anymore
- Lime register setup added
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes the CFG_PCI_PRE_INIT option completely, since
it's not needed anymore with the patch from Matthias Fuchs with
the "weak" pci_pre_init() implementation.
Signed-off-by: Stefan Roese <sr@denx.de>
- Show on the Status LEDs, some States of the board.
- Get the MAC addresses from the EEProm
- use PREBOOT
- use the CF on the board.
- check the U-Boot image in the Flash with a SHA1
checksum.
- use dynamic TLB entries generation for the SDRAM
Signed-off-by: Heiko Schocher <hs@denx.de>
