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Add some comments to clocks in atstk1002.h

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This patch applies some clarifying comments to how the different
clocks are setup according to atstk1002.h Some of the previous
comments where stating wrongful information.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This commit is contained in:
Eirik Aanonsen 2007-09-12 13:32:37 +02:00 committed by Haavard Skinnemoen
parent 696dd1307c
commit a4f3aab6df
1 changed files with 20 additions and 2 deletions
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22
include/configs/atstk1002.h
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@ -39,8 +39,10 @@
#define CFG_HZ 1000
/*
* Set up the PLL to run at 199.5 MHz, the CPU to run at 1/2 the PLL
* frequency and the peripherals to run at 1/4 the PLL frequency.
* Set up the PLL to run at 140 MHz, the CPU to run at the PLL
* frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
* PLL frequency.
* (CFG_OSC0_HZ * CFG_PLL0_MUL) / CFG_PLL0_DIV = PLL MHz
*/
#define CONFIG_PLL 1
#define CFG_POWER_MANAGER 1
@ -48,9 +50,25 @@
#define CFG_PLL0_DIV 1
#define CFG_PLL0_MUL 7
#define CFG_PLL0_SUPPRESS_CYCLES 16
/*
* Set the CPU running at:
* PLL / (2^CFG_CLKDIV_CPU) = CPU MHz
*/
#define CFG_CLKDIV_CPU 0
/*
* Set the HSB running at:
* PLL / (2^CFG_CLKDIV_HSB) = HSB MHz
*/
#define CFG_CLKDIV_HSB 1
/*
* Set the PBA running at:
* PLL / (2^CFG_CLKDIV_PBA) = PBA MHz
*/
#define CFG_CLKDIV_PBA 2
/*
* Set the PBB running at:
* PLL / (2^CFG_CLKDIV_PBB) = PBB MHz
*/
#define CFG_CLKDIV_PBB 1
/*