Coding style cleanup; update CHANGELOG.

Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
Wolfgang Denk 2007-07-10 00:01:28 +02:00
parent bf6a9ca9b2
commit 4ef218f6fd
11 changed files with 692 additions and 364 deletions

369
CHANGELOG
View file

@ -1,3 +1,133 @@
commit f1152f8c28db4a22087c21c618a3f7baa48e9a4f
Author: Wolfgang Denk <wd@denx.de>
Date: Fri Jul 6 02:50:19 2007 +0200
Code cleanup and default config update for STC GP3 SSA board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
commit b44896215a09c60fa40cae906f7ed207bbc2c492
Author: Sergei Poselenov <sposelenov@emcraft.com>
Date: Thu Jul 5 08:17:37 2007 +0200
Merged POST framework with the current TOT.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
commit f780b83316d9af1f61d71cc88b1917b387b9b995
Author: Niklaus Giger <niklausgiger@gmx.ch>
Date: Wed Jun 27 18:11:38 2007 +0200
resubmit: ppc4xx: Remove sequoia/sequioa.h. Cleanup ppc440.h for PPC440EPX
Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
commit 04e6c38b766eaa2f3287561563c9e215e0c3a0d4
Author: Stefan Roese <sr@denx.de>
Date: Wed Jul 4 10:06:30 2007 +0200
ppc4xx: Update lwmon5 board
- Add optional ECC generation routine to preserve existing
RAM values. This is needed for the Linux log-buffer support
- Add optional DDR2 setup with CL=4
- GPIO50 not used anymore
- Lime register setup added
Signed-off-by: Stefan Roese <sr@denx.de>
commit 1f2a05898658900dc5717761e27abf2052e67e13
Author: Mushtaq Khan <mushtaqk_921@yahoo.co.in>
Date: Sat Jun 30 18:50:48 2007 +0200
Fix S-ATA support.
Signed-off-by: mushtaq khan <mushtaqk_921@yahoo.co.in>
commit a5d71e290f3673269be8eefb4ec44f53412f9461
Author: Heiko Schocher <hs@pollux.denx.de>
Date: Mon Jun 25 19:11:37 2007 +0200
[PCS440EP] get rid of CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG
Signed-off-by: Heiko Schocher <hs@denx.de>
commit a1bd6200eccd3a02040a955d5f43d3ee1fc9f93b
Author: Niklaus Giger <niklaus.giger@nestal.com>
Date: Mon Jun 25 17:03:13 2007 +0200
ppc4xx: PPC440EPx Emit DDR0 registers on machine check interrupt
This patch prints the DDR status registers upon machine check
interrupt on the 440EPx/GRx. This can be useful especially when
ECC support is enabled.
I added some small changes to the original patch from Niklaus to
make it compile clean.
Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
Signed-off-by: Stefan Roese <sr@denx.de>
commit 807018fb7faceb429ce0cb47baa2073746b33a4e
Author: Niklaus Giger <niklaus.giger@nestal.com>
Date: Mon Jun 25 16:50:55 2007 +0200
ppc4xx: Fix O=buildir builds
This patch fixes the problem to assemble cpu/ppc4xx/start.S
experienced last week where building failed having specified
O=../build.sequoia.
Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
commit 466fff1a7bb5fe764a06450626f6098219f446b8
Author: Stefan Roese <sr@denx.de>
Date: Mon Jun 25 15:57:39 2007 +0200
ppc4xx: Add pci_pre_init() for 405 boards
This patch removes the CFG_PCI_PRE_INIT option completely, since
it's not needed anymore with the patch from Matthias Fuchs with
the "weak" pci_pre_init() implementation.
Signed-off-by: Stefan Roese <sr@denx.de>
commit 6f35c53166213c24a5a0e2390ed861136ff73870
Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Date: Sun Jun 24 17:41:21 2007 +0200
ppc4xx: Maintenance patch for esd's CPCI405 derivats
-add pci_pre_init() for pci interrupt fixup code
-disable phy sleep mode via reset_phy() function
-use correct io accessors
-cleanup
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
commit 5a1c9ff0c44305b57cb4d8f9369bba90bcf0e1f8
Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Date: Sun Jun 24 17:23:41 2007 +0200
ppc4xx: Add pci_pre_init() for 405 boards
This patch adds support for calling a plattform dependant
pci_pre_init() function for 405 boards. This can be used to
move the current pci_405gp_fixup_irq() function into the
board code.
This patch also makes the CFG_PCI_PRE_INIT define obsolete.
A default function with 'weak' attribute is used when
a board specific pci_pre_init() is not implemented.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
commit 1636d1c8529c006d106287cfbc20cd0a246fe1cb
Author: Wolfgang Denk <wd@denx.de>
Date: Fri Jun 22 23:59:00 2007 +0200
Coding stylke cleanup; rebuild CHANGELOG
commit 2dc64451b4c08ffd619372abfdc2506a2e2363b9
Author: Igor Lisitsin <igor@emcraft.com>
Date: Wed Apr 18 14:55:19 2007 +0400
@ -22,6 +152,34 @@ Date: Wed Mar 28 19:06:19 2007 +0400
Signed-off-by: Igor Lisitsin <igor@emcraft.com>
--
commit 566a494f592ae3b3c0785d90d4e1ba45574880c4
Author: Heiko Schocher <hs@pollux.denx.de>
Date: Fri Jun 22 19:11:54 2007 +0200
[PCS440EP] upgrade the PCS440EP board:
- Show on the Status LEDs, some States of the board.
- Get the MAC addresses from the EEProm
- use PREBOOT
- use the CF on the board.
- check the U-Boot image in the Flash with a SHA1
checksum.
- use dynamic TLB entries generation for the SDRAM
Signed-off-by: Heiko Schocher <hs@denx.de>
commit 3a1f5c81b0b9557817a789bece839905581c2205
Author: Stefan Roese <sr@denx.de>
Date: Fri Jun 22 16:58:40 2007 +0200
ppc4xx: Fix problem with extended program_tlb() funtion
The recently extended program_tlb() function had a problem when
multiple TLB's had to be setup (for example with 512MB of SDRAM). The
virtual address was not incremented. This patch fixes this issue
and is tested on Katmai with 512MB SDRAM.
Signed-off-by: Stefan Roese <sr@denx.de>
commit 02032e8f14751a1a751b09240a4f1cf9f8a2077f
Author: Rafal Jaworowski <raj@semihalf.com>
Date: Fri Jun 22 14:58:04 2007 +0200
@ -526,6 +684,14 @@ Date: Thu May 24 08:22:09 2007 +0200
Signed-off-by: Stefan Roese <sr@denx.de>
commit 822d55365bb557e084d0e33625a6dedcc866110b
Author: Jon Loeliger <jdl@freescale.com>
Date: Wed May 23 14:09:46 2007 -0500
Add LIST_86xx MAKEALL target for PowerPC builds.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 9f0077abd69f7a7c756a915b961037302be3e6f2
Author: Stefan Roese <sr@denx.de>
Date: Tue May 22 12:48:09 2007 +0200
@ -574,6 +740,17 @@ Date: Fri May 18 14:33:11 2007 +0100
Makefile permissions
commit 255a3577c848706441daee0174543efe205a77f8
Author: Kim Phillips <kim.phillips@freescale.com>
Date: Wed May 16 16:52:19 2007 -0500
Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx
For all practical u-boot purposes, TSECs don't differ throughout the
mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
commit 70124c2602ae2d4c5d3dba05b482d91548242de8
Author: Stefano Babic <sbabic@denx.de>
Date: Wed May 16 14:49:12 2007 +0200
@ -615,6 +792,109 @@ Date: Wed May 16 00:13:33 2007 +0200
Coding Style Cleanup, new CHANGELOG
commit 3162eb836903c8b247fdc7470dd39bfa6996f495
Author: Wolfgang Denk <wd@denx.de>
Date: Tue May 15 23:38:05 2007 +0200
Minor coding style cleanup.
commit 66d9dbec1cc27d6398ee6cf84639dbe14971251e
Author: mushtaq khan <mushtaq_k@procsys.com>
Date: Fri Apr 20 14:23:02 2007 +0530
Add driver for S-ATA-controller on Intel processors with South
Bridge, ICH-5, ICH-6 and ICH-7.
Implementation:
1. Code is divided in to two files. All functions, which are
controller specific are kept in "drivers/ata_piix.c" file and
functions, which are not controller specific, are kept in
"common/cmd_sata.c" file.
2. Reading and Writing from the S-ATA drive is done using PIO method.
3. Driver can be configured for 48-bit addressing by defining macro
CONFIG_LBA48, if this macro is not defined driver uses the 28-bit
addressing.
4. S-ATA read function is hooked to the File system, commands like
ext2ls and ext2load file can be used. This has been tested.
5. U-Boot command "SATA_init" is added, which initializes the S-ATA
controller and identifies the S-ATA drives connected to it.
6. U-Boot command "sata" is added, which is used to read/write, print
partition table and get info about the drives present. This I have
implemented in same way as "ide" command is implemented in U-Boot.
7. This driver is for S-ATA in native mode.
8. This driver does not support the Native command queuing and
Hot-plugging.
Signed-off-by: Mushtaq Khan <mushtaq_k@procsys.com>
commit 644e6fb4eb8be90ea04ba34b643a8bf019d680e0
Author: mushtaq khan <mushtaq_k@procsys.com>
Date: Mon Apr 30 15:57:22 2007 +0530
Fixes bug clearing the bss section for i386
Hi,
There is a bug in the code of clearing the bss section for processor
i386.(File: cpu/i386/start.S)
In the code, bss_start addr (starting addr of bss section) is put into
the register %eax, but the code which clears the bss section refers to
the addr pointed by %edi.
This patch fixes this bug by putting bss_start into %edi register.
Signed-off-by: Mushtaq Khan <mushtaq_k@procsys.com>
commit c3243cf7b490057277d61acffe4ad0946f9eb4a4
Author: Joe Hamman <joe.hamman@embeddedspecialties.com>
Date: Mon Apr 30 16:47:28 2007 -0500
Add support for BCM5464 Quad Phy
Added support for Broadcom's BCM5464 Quad Phy
Signed-off-by: Joe Hamman <joe.hamman@embeddedspecialties.com>
commit 1b305bdc754c8468e1d5d858f5dcf8a7a0a4bb7a
Author: Zang Roy-r61911 <tie-fei.zang@freescale.com>
Date: Wed May 9 08:10:57 2007 +0800
Search the exception table with linear algorithm
Search the exception table with linear algorithm instead of
bisecting algorithm.
Because the exception table might be unsorted.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
commit 5dfaa50eb819686bfba1927e8c5b8a70a4d65fd3
Author: Aubrey.Li <aubrey.adi@gmail.com>
Date: Mon May 14 11:47:35 2007 +0800
Fix compilation issues on MACOSX
Singed-off-by: Marc Hoffman <Marc.Hoffman@analog.com>
Signed-off-by: Aubrey Li <aubrey.adi@gmail.com>
commit 56fd7162985c412317bbf763a225fba23c64fd31
Author: Stephen Williams <steve@icarus.com>
Date: Tue May 15 07:55:42 2007 -0700
Fix for compile of JSE target
The attached patch fixes the compile of the JSE board in the
denx git as of 14 may 2007. It is an extremely simple patch,
it just adds the missing define of CFG_SYSTEMACE_WIDTH.
Fix to compile JSE against 20070514 git of u-boot
commit 61936667e86a250ae12fd2dc189d3588f0a59e0b
Author: Stefan Roese <sr@denx.de>
Date: Fri May 11 12:01:49 2007 +0200
@ -954,6 +1234,20 @@ Date: Sat May 5 08:29:01 2007 +0200
Signed-off-by: Stefan Roese <sr@denx.de>
commit 2f550ab976405300f5b07bf2890800840d0aa05f
Author: Timur Tabi <timur@freescale.com>
Date: Sat May 5 08:12:30 2007 +0200
5xxx: write MAC address to mac-address and local-mac-address
Some device trees have a mac-address property, some have local-mac-address,
and some have both. To support all of these device trees, ftp_cpu_setup()
should write the MAC address to mac-address and local-mac-address, if they
exist.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
commit a79886590593ba1d667c840caa4940c61639f18f
Author: Thomas Knobloch <knobloch@siemens.com>
Date: Sat May 5 07:04:42 2007 +0200
@ -1117,12 +1411,35 @@ Date: Sun Apr 29 14:13:01 2007 +0200
Signed-off-by: Stefan Roese <sr@denx.de>
commit 864aa6a6a466fcb92bf32b1d7dba79cd709b52c9
Author: Grzegorz Wianecki <grzegorz.wianecki@gmail.com>
Date: Sun Apr 29 14:01:54 2007 +0200
[PATCH] Use PVR to distinguish MPC5200B from MPC5200 in boot message
MPC5200B systems are incorrectly reported as MPC5200 in U-Boot start-up
message. Use PVR to distinguish between the two variants, and print proper CPU
information.
Signed-off-by: Grzegorz Wianecki <grzegorz.wianecki@gmail.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
commit 5c5d3242935cf3543af01142627494434834cf98
Author: Kim Phillips <kim.phillips@freescale.com>
Date: Wed Apr 25 12:34:38 2007 -0500
mpc83xx: minor fixups for 8313rdb introduction
commit ada4d40091f6ed4a4f0040e08d20db21967e4a67
Author: Ladislav Michl <ladis@linux-mips.org>
Date: Wed Apr 25 16:01:26 2007 +0200
[PATCH] simplify silent console
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Acked-by: Stefan Roese <sr@denx.de>
commit 144876a380f5756f57412caf74c1d6dc201dd796
Author: Michal Simek <monstr@monstr.eu>
Date: Tue Apr 24 23:01:02 2007 +0200
@ -1419,6 +1736,58 @@ Date: Mon Apr 16 14:31:55 2007 -0500
Signed-off-by: Scott Wood <scottwood@freescale.com>
commit 7fc4c71a143be8666d70803fb25ae60379c95622
Author: Stefan Roese <sr@denx.de>
Date: Mon Apr 23 15:39:59 2007 +0200
Fix file mode
Signed-off-by: Stefan Roese <sr@denx.de>
commit 38257988abfe74d459ca2ad748b109ca04e4efe1
Author: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Date: Mon Apr 23 15:30:39 2007 +0200
[PATCH] Avoid assigning PCI resources from zero address
If a PCI IDE card happens to get a zero address assigned to it, the Linux IDE
core complains and IDE drivers fails to work. Also, assigning zero to a BAR
was illegal according to PCI 2.1 (the later revisions seem to have excluded the
sentence about "0" being considered an invalid address) -- so, use a reasonable
starting value of 0x1000 (that's what the most Linux archs are using).
Alternatively, one might have fixed the calls to pci_set_region() individually
(some code even seems to have taken care of this issue) but that would have
been a lot more work. :-)
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Acked-by: Stefan Roese <sr@denx.de>
commit afb903a2eb9436baa9270ccc0c27082d86497d89
Author: Jeffrey Mann <mannj@embeddedplanet.com>
Date: Mon Apr 23 14:00:11 2007 +0200
[patch] setenv(...) can delete environmentalvariables
update setenv() function so that entering a NULL value for the
variable's value will delete the environmental variable
Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
Acked-by: Stefan Roese <sr@denx.de>
commit 36f104e5caa747d568eff26b369565af57c2ffa6
Author: Mike Frysinger <vapier@gentoo.org>
Date: Mon Apr 23 13:54:24 2007 +0200
[patch] use unsigned char in smc91111 driver for mac
the v_mac variable in the smc91111 driver is declared as a signed char ...
this causes problems when one of the bytes in the MAC is "signed" like 0xE0
because when it gets printed out, you get a display like:
0xFFFFFFE0 and that's no good
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
commit 323bfa8f436dc3bc57187c9b1488bc3146ff1522
Author: Stefan Roese <sr@denx.de>
Date: Mon Apr 23 12:00:22 2007 +0200

View file

@ -31,7 +31,7 @@
DECLARE_GLOBAL_DATA_PTR;
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /*cmd_boot.c*/
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /*cmd_boot.c*/
#if 0
#define FPGA_DEBUG
#endif
@ -54,8 +54,6 @@ const unsigned char fpgadata[] =
* include common fpga code (for esd boards)
*/
#include "../common/fpga.c"
#include "../common/auto_update.h"
#ifdef CONFIG_CPCI405AB
@ -88,13 +86,11 @@ au_image_t au_image[] = {
int N_AU_IMAGES = (sizeof(au_image) / sizeof(au_image[0]));
/* Prototypes */
int cpci405_version(void);
int gunzip(void *, int, unsigned char *, unsigned long *);
void lxt971_no_sleep(void);
int board_early_init_f (void)
{
#ifndef CONFIG_CPCI405_VER2
@ -113,10 +109,10 @@ int board_early_init_f (void)
/*
* First pull fpga-prg pin low, to disable fpga logic (on version 2 board)
*/
out32(GPIO0_ODR, 0x00000000); /* no open drain pins */
out32(GPIO0_TCR, CFG_FPGA_PRG); /* setup for output */
out32(GPIO0_ODR, 0x00000000); /* no open drain pins */
out32(GPIO0_TCR, CFG_FPGA_PRG); /* setup for output */
out32(GPIO0_OR, CFG_FPGA_PRG); /* set output pins to high */
out32(GPIO0_OR, 0); /* pull prg low */
out32(GPIO0_OR, 0); /* pull prg low */
/*
* Boot onboard FPGA
@ -178,51 +174,48 @@ int board_early_init_f (void)
* IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
* IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
*/
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
mtdcr(uicer, 0x00000000); /* disable all ints */
mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
mtdcr(uicer, 0x00000000); /* disable all ints */
mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
#ifdef CONFIG_CPCI405_6U
if (cpci405_version() == 3) {
mtdcr(uicpr, 0xFFFFFF99); /* set int polarities */
mtdcr(uicpr, 0xFFFFFF99); /* set int polarities */
} else {
mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
}
#else
mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
#endif
mtdcr(uictr, 0x10000000); /* set int trigger levels */
mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
mtdcr(uictr, 0x10000000); /* set int trigger levels */
mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
return 0;
}
/* ------------------------------------------------------------------------- */
int ctermm2(void)
{
#ifdef CONFIG_CPCI405_VER2
return 0; /* no, board is cpci405 */
return 0; /* no, board is cpci405 */
#else
if ((*(unsigned char *)0xf0000400 == 0x00) &&
(*(unsigned char *)0xf0000401 == 0x01))
return 0; /* no, board is cpci405 */
return 0; /* no, board is cpci405 */
else
return -1; /* yes, board is cterm-m2 */
return -1; /* yes, board is cterm-m2 */
#endif
}
int cpci405_host(void)
{
if (mfdcr(strap) & PSR_PCI_ARBIT_EN)
return -1; /* yes, board is cpci405 host */
return -1; /* yes, board is cpci405 host */
else
return 0; /* no, board is cpci405 adapter */
return 0; /* no, board is cpci405 adapter */
}
int cpci405_version(void)
{
unsigned long cntrl0Reg;
@ -235,8 +228,8 @@ int cpci405_version(void)
mtdcr(cntrl0, cntrl0Reg | 0x03000000);
out_be32((void*)GPIO0_ODR, in_be32((void*)GPIO0_ODR) & ~0x00180000);
out_be32((void*)GPIO0_TCR, in_be32((void*)GPIO0_TCR) & ~0x00180000);
udelay(1000); /* wait some time before reading input */
value = in_be32((void*)GPIO0_IR) & 0x00180000; /* get config bits */
udelay(1000); /* wait some time before reading input */
value = in_be32((void*)GPIO0_IR) & 0x00180000; /* get config bits */
/*
* Restore GPIO settings
@ -262,13 +255,11 @@ int cpci405_version(void)
}
}
int misc_init_f (void)
{
return 0; /* dummy implementation */
}
int misc_init_r (void)
{
unsigned long cntrl0Reg;
@ -432,7 +423,6 @@ int misc_init_r (void)
return (0);
}
/*
* Check Board Identity:
*/
@ -488,7 +478,7 @@ int checkboard (void)
}
#ifndef CONFIG_CPCI405_VER2
puts ("\nFPGA: ");
puts ("\nFPGA: ");
/* display infos on fpgaimage */
index = 15;
@ -515,7 +505,6 @@ long int initdram (int board_type)
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
void reset_phy(void)
{
#ifdef CONFIG_LXT971_NO_SLEEP
@ -527,7 +516,6 @@ void reset_phy(void)
#endif
}
/* ------------------------------------------------------------------------- */
#ifdef CONFIG_CPCI405_VER2
@ -550,7 +538,6 @@ void ide_set_reset(int on)
#endif /* CONFIG_IDE_RESET */
#endif /* CONFIG_CPCI405_VER2 */
#if defined(CONFIG_PCI)
void cpci405_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
{
@ -585,14 +572,13 @@ int pci_pre_init(struct pci_controller *hose)
#endif /* defined(CONFIG_PCI) */
#ifdef CONFIG_CPCI405AB
#define ONE_WIRE_CLEAR (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
#define ONE_WIRE_CLEAR (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
|= CFG_FPGA_MODE_1WIRE_DIR)
#define ONE_WIRE_SET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
#define ONE_WIRE_SET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
&= ~CFG_FPGA_MODE_1WIRE_DIR)
#define ONE_WIRE_GET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_STATUS) \
#define ONE_WIRE_GET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_STATUS) \
& CFG_FPGA_MODE_1WIRE)
/*
@ -615,7 +601,6 @@ int OWTouchReset(void)
return result;
}
/*
* Send 1 a 1-wire write bit.
* Provide 10us recovery time.
@ -641,7 +626,6 @@ void OWWriteBit(int bit)
}
}
/*
* Read a bit from the 1-wire bus and return it.
* Provide 10us recovery time.
@ -661,7 +645,6 @@ int OWReadBit(void)
return result;
}
void OWWriteByte(int data)
{
int loop;
@ -672,7 +655,6 @@ void OWWriteByte(int data)
}
}
int OWReadByte(void)
{
int loop, result = 0;
@ -687,7 +669,6 @@ int OWReadByte(void)
return result;
}
int do_onewire(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
volatile unsigned short val;
@ -728,7 +709,6 @@ U_BOOT_CMD(
NULL
);
#define CFG_I2C_EEPROM_ADDR_2 0x51 /* EEPROM CAT28WC32 */
#define CFG_ENV_SIZE_2 0x800 /* 2048 bytes may be used for env vars*/

View file

@ -197,14 +197,13 @@ void load_sernum_ethaddr (void)
* - The checksum, stored in the last 2 Bytes, is correct
*/
if ((strncmp (buf,"ATR",3) != 0) ||
((checksumcrc16 >> 8) != buf[EEPROM_LEN - 2]) ||
((checksumcrc16 & 0xff) != buf[EEPROM_LEN - 1]))
{
((checksumcrc16 >> 8) != buf[EEPROM_LEN - 2]) ||
((checksumcrc16 & 0xff) != buf[EEPROM_LEN - 1])) {
/* EEprom is not programmed */
printf("%s: EEPROM Checksum not OK\n", __FUNCTION__);
} else {
/* get the MACs */
sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x",
sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x",
buf[3],
buf[4],
buf[5],
@ -212,7 +211,7 @@ void load_sernum_ethaddr (void)
buf[7],
buf[8]);
setenv ("ethaddr", (char *) mac);
sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x",
sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x",
buf[9],
buf[10],
buf[11],
@ -378,7 +377,7 @@ static int pcs440ep_sha1 (int docheck)
org[i] = ptroff[i];
ptroff[i] = 0;
}
sha1_csum ((unsigned char *) data, len, (unsigned char *)output);
if (docheck == 2) {
@ -796,7 +795,7 @@ int do_sha1 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
unsigned char output[20];
int len;
int i;
data = (unsigned char *)simple_strtoul (argv[1], NULL, 16);
len = simple_strtoul (argv[2], NULL, 16);
sha1_csum (data, len, (unsigned char *)output);
@ -823,7 +822,7 @@ int do_sha1 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
} else {
rcode = pcs440ep_sha1 (0);
}
return rcode;
return rcode;
}
return rcode;
}
@ -861,4 +860,3 @@ void ide_set_reset (int idereset)
udelay (10000);
}
#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */

View file

@ -1222,7 +1222,7 @@ mck_return:
*/
#ifdef CONFIG_440
.globl dcache_disable
.globl icache_disable
.globl icache_disable
.globl icache_enable
dcache_disable:
icache_disable:

View file

@ -480,9 +480,9 @@
/* Offset for alternate registers */
#define CFG_ATA_ALT_OFFSET (0x0000)
/* This addresses need to be shifted one place to the left
/* These addresses need to be shifted one place to the left
* ( bus per_addr 20 -30 is connectsd on CF bus A10-A0)
* This values are shifted
* These values are shifted
*/
#define CFG_ATA_PORT_ADDR(port) ((port) << 1)

View file

@ -17,7 +17,7 @@
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301 USA
* MA 02110-1301 USA
*/
/*
* The SHA-1 standard was published by NIST in 1993.
@ -35,76 +35,76 @@ extern "C" {
#define SHA1_SUM_LEN 20
/**
* \brief SHA-1 context structure
* \brief SHA-1 context structure
*/
typedef struct
{
unsigned long total[2]; /*!< number of bytes processed */
unsigned long state[5]; /*!< intermediate digest state */
unsigned char buffer[64]; /*!< data block being processed */
unsigned long total[2]; /*!< number of bytes processed */
unsigned long state[5]; /*!< intermediate digest state */
unsigned char buffer[64]; /*!< data block being processed */
}
sha1_context;
/**
* \brief SHA-1 context setup
* \brief SHA-1 context setup
*
* \param ctx SHA-1 context to be initialized
* \param ctx SHA-1 context to be initialized
*/
void sha1_starts( sha1_context *ctx );
/**
* \brief SHA-1 process buffer
* \brief SHA-1 process buffer
*
* \param ctx SHA-1 context
* \param ctx SHA-1 context
* \param input buffer holding the data
* \param ilen length of the input data
* \param ilen length of the input data
*/
void sha1_update( sha1_context *ctx, unsigned char *input, int ilen );
/**
* \brief SHA-1 final digest
* \brief SHA-1 final digest
*
* \param ctx SHA-1 context
* \param ctx SHA-1 context
* \param output SHA-1 checksum result
*/
void sha1_finish( sha1_context *ctx, unsigned char output[20] );
/**
* \brief Output = SHA-1( input buffer )
* \brief Output = SHA-1( input buffer )
*
* \param input buffer holding the data
* \param ilen length of the input data
* \param ilen length of the input data
* \param output SHA-1 checksum result
*/
void sha1_csum( unsigned char *input, int ilen,
unsigned char output[20] );
unsigned char output[20] );
/**
* \brief Output = SHA-1( file contents )
* \brief Output = SHA-1( file contents )
*
* \param path input file name
* \param path input file name
* \param output SHA-1 checksum result
* \return 0 if successful, or 1 if fopen failed
* \return 0 if successful, or 1 if fopen failed
*/
int sha1_file( char *path, unsigned char output[20] );
/**
* \brief Output = HMAC-SHA-1( input buffer, hmac key )
* \brief Output = HMAC-SHA-1( input buffer, hmac key )
*
* \param key HMAC secret key
* \param key HMAC secret key
* \param keylen length of the HMAC key
* \param input buffer holding the data
* \param ilen length of the input data
* \param ilen length of the input data
* \param output HMAC-SHA-1 result
*/
void sha1_hmac( unsigned char *key, int keylen,
unsigned char *input, int ilen,
unsigned char output[20] );
unsigned char *input, int ilen,
unsigned char output[20] );
/**
* \brief Checkup routine
* \brief Checkup routine
*
* \return 0 if successful, or 1 if the test failed
* \return 0 if successful, or 1 if the test failed
*/
int sha1_self_test( void );

View file

@ -36,103 +36,99 @@
* 32-bit integer manipulation macros (big endian)
*/
#ifndef GET_UINT32_BE
#define GET_UINT32_BE(n,b,i) \
{ \
(n) = ( (unsigned long) (b)[(i) ] << 24 ) \
| ( (unsigned long) (b)[(i) + 1] << 16 ) \
| ( (unsigned long) (b)[(i) + 2] << 8 ) \
| ( (unsigned long) (b)[(i) + 3] ); \
#define GET_UINT32_BE(n,b,i) { \
(n) = ( (unsigned long) (b)[(i) ] << 24 ) \
| ( (unsigned long) (b)[(i) + 1] << 16 ) \
| ( (unsigned long) (b)[(i) + 2] << 8 ) \
| ( (unsigned long) (b)[(i) + 3] ); \
}
#endif
#ifndef PUT_UINT32_BE
#define PUT_UINT32_BE(n,b,i) \
{ \
(b)[(i) ] = (unsigned char) ( (n) >> 24 ); \
(b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \
(b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \
(b)[(i) + 3] = (unsigned char) ( (n) ); \
#define PUT_UINT32_BE(n,b,i) { \
(b)[(i) ] = (unsigned char) ( (n) >> 24 ); \
(b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \
(b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \
(b)[(i) + 3] = (unsigned char) ( (n) ); \
}
#endif
/*
* SHA-1 context setup
*/
void sha1_starts( sha1_context *ctx )
void sha1_starts (sha1_context * ctx)
{
ctx->total[0] = 0;
ctx->total[1] = 0;
ctx->total[0] = 0;
ctx->total[1] = 0;
ctx->state[0] = 0x67452301;
ctx->state[1] = 0xEFCDAB89;
ctx->state[2] = 0x98BADCFE;
ctx->state[3] = 0x10325476;
ctx->state[4] = 0xC3D2E1F0;
ctx->state[0] = 0x67452301;
ctx->state[1] = 0xEFCDAB89;
ctx->state[2] = 0x98BADCFE;
ctx->state[3] = 0x10325476;
ctx->state[4] = 0xC3D2E1F0;
}
static void sha1_process( sha1_context *ctx, unsigned char data[64] )
static void sha1_process (sha1_context * ctx, unsigned char data[64])
{
unsigned long temp, W[16], A, B, C, D, E;
unsigned long temp, W[16], A, B, C, D, E;
GET_UINT32_BE( W[0], data, 0 );
GET_UINT32_BE( W[1], data, 4 );
GET_UINT32_BE( W[2], data, 8 );
GET_UINT32_BE( W[3], data, 12 );
GET_UINT32_BE( W[4], data, 16 );
GET_UINT32_BE( W[5], data, 20 );
GET_UINT32_BE( W[6], data, 24 );
GET_UINT32_BE( W[7], data, 28 );
GET_UINT32_BE( W[8], data, 32 );
GET_UINT32_BE( W[9], data, 36 );
GET_UINT32_BE( W[10], data, 40 );
GET_UINT32_BE( W[11], data, 44 );
GET_UINT32_BE( W[12], data, 48 );
GET_UINT32_BE( W[13], data, 52 );
GET_UINT32_BE( W[14], data, 56 );
GET_UINT32_BE( W[15], data, 60 );
GET_UINT32_BE (W[0], data, 0);
GET_UINT32_BE (W[1], data, 4);
GET_UINT32_BE (W[2], data, 8);
GET_UINT32_BE (W[3], data, 12);
GET_UINT32_BE (W[4], data, 16);
GET_UINT32_BE (W[5], data, 20);
GET_UINT32_BE (W[6], data, 24);
GET_UINT32_BE (W[7], data, 28);
GET_UINT32_BE (W[8], data, 32);
GET_UINT32_BE (W[9], data, 36);
GET_UINT32_BE (W[10], data, 40);
GET_UINT32_BE (W[11], data, 44);
GET_UINT32_BE (W[12], data, 48);
GET_UINT32_BE (W[13], data, 52);
GET_UINT32_BE (W[14], data, 56);
GET_UINT32_BE (W[15], data, 60);
#define S(x,n) ((x << n) | ((x & 0xFFFFFFFF) >> (32 - n)))
#define S(x,n) ((x << n) | ((x & 0xFFFFFFFF) >> (32 - n)))
#define R(t) \
( \
temp = W[(t - 3) & 0x0F] ^ W[(t - 8) & 0x0F] ^ \
W[(t - 14) & 0x0F] ^ W[ t & 0x0F], \
( W[t & 0x0F] = S(temp,1) ) \
#define R(t) ( \
temp = W[(t - 3) & 0x0F] ^ W[(t - 8) & 0x0F] ^ \
W[(t - 14) & 0x0F] ^ W[ t & 0x0F], \
( W[t & 0x0F] = S(temp,1) ) \
)
#define P(a,b,c,d,e,x) \
{ \
e += S(a,5) + F(b,c,d) + K + x; b = S(b,30); \
#define P(a,b,c,d,e,x) { \
e += S(a,5) + F(b,c,d) + K + x; b = S(b,30); \
}
A = ctx->state[0];
B = ctx->state[1];
C = ctx->state[2];
D = ctx->state[3];
E = ctx->state[4];
A = ctx->state[0];
B = ctx->state[1];
C = ctx->state[2];
D = ctx->state[3];
E = ctx->state[4];
#define F(x,y,z) (z ^ (x & (y ^ z)))
#define K 0x5A827999
P( A, B, C, D, E, W[0] );
P( E, A, B, C, D, W[1] );
P( D, E, A, B, C, W[2] );
P( C, D, E, A, B, W[3] );
P( B, C, D, E, A, W[4] );
P( A, B, C, D, E, W[5] );
P( E, A, B, C, D, W[6] );
P( D, E, A, B, C, W[7] );
P( C, D, E, A, B, W[8] );
P( B, C, D, E, A, W[9] );
P( A, B, C, D, E, W[10] );
P( E, A, B, C, D, W[11] );
P( D, E, A, B, C, W[12] );
P( C, D, E, A, B, W[13] );
P( B, C, D, E, A, W[14] );
P( A, B, C, D, E, W[15] );
P( E, A, B, C, D, R(16) );
P( D, E, A, B, C, R(17) );
P( C, D, E, A, B, R(18) );
P( B, C, D, E, A, R(19) );
P (A, B, C, D, E, W[0]);
P (E, A, B, C, D, W[1]);
P (D, E, A, B, C, W[2]);
P (C, D, E, A, B, W[3]);
P (B, C, D, E, A, W[4]);
P (A, B, C, D, E, W[5]);
P (E, A, B, C, D, W[6]);
P (D, E, A, B, C, W[7]);
P (C, D, E, A, B, W[8]);
P (B, C, D, E, A, W[9]);
P (A, B, C, D, E, W[10]);
P (E, A, B, C, D, W[11]);
P (D, E, A, B, C, W[12]);
P (C, D, E, A, B, W[13]);
P (B, C, D, E, A, W[14]);
P (A, B, C, D, E, W[15]);
P (E, A, B, C, D, R (16));
P (D, E, A, B, C, R (17));
P (C, D, E, A, B, R (18));
P (B, C, D, E, A, R (19));
#undef K
#undef F
@ -140,26 +136,26 @@ static void sha1_process( sha1_context *ctx, unsigned char data[64] )
#define F(x,y,z) (x ^ y ^ z)
#define K 0x6ED9EBA1
P( A, B, C, D, E, R(20) );
P( E, A, B, C, D, R(21) );
P( D, E, A, B, C, R(22) );
P( C, D, E, A, B, R(23) );
P( B, C, D, E, A, R(24) );
P( A, B, C, D, E, R(25) );
P( E, A, B, C, D, R(26) );
P( D, E, A, B, C, R(27) );
P( C, D, E, A, B, R(28) );
P( B, C, D, E, A, R(29) );
P( A, B, C, D, E, R(30) );
P( E, A, B, C, D, R(31) );
P( D, E, A, B, C, R(32) );
P( C, D, E, A, B, R(33) );
P( B, C, D, E, A, R(34) );
P( A, B, C, D, E, R(35) );
P( E, A, B, C, D, R(36) );
P( D, E, A, B, C, R(37) );
P( C, D, E, A, B, R(38) );
P( B, C, D, E, A, R(39) );
P (A, B, C, D, E, R (20));
P (E, A, B, C, D, R (21));
P (D, E, A, B, C, R (22));
P (C, D, E, A, B, R (23));
P (B, C, D, E, A, R (24));
P (A, B, C, D, E, R (25));
P (E, A, B, C, D, R (26));
P (D, E, A, B, C, R (27));
P (C, D, E, A, B, R (28));
P (B, C, D, E, A, R (29));
P (A, B, C, D, E, R (30));
P (E, A, B, C, D, R (31));
P (D, E, A, B, C, R (32));
P (C, D, E, A, B, R (33));
P (B, C, D, E, A, R (34));
P (A, B, C, D, E, R (35));
P (E, A, B, C, D, R (36));
P (D, E, A, B, C, R (37));
P (C, D, E, A, B, R (38));
P (B, C, D, E, A, R (39));
#undef K
#undef F
@ -167,26 +163,26 @@ static void sha1_process( sha1_context *ctx, unsigned char data[64] )
#define F(x,y,z) ((x & y) | (z & (x | y)))
#define K 0x8F1BBCDC
P( A, B, C, D, E, R(40) );
P( E, A, B, C, D, R(41) );
P( D, E, A, B, C, R(42) );
P( C, D, E, A, B, R(43) );
P( B, C, D, E, A, R(44) );
P( A, B, C, D, E, R(45) );
P( E, A, B, C, D, R(46) );
P( D, E, A, B, C, R(47) );
P( C, D, E, A, B, R(48) );
P( B, C, D, E, A, R(49) );
P( A, B, C, D, E, R(50) );
P( E, A, B, C, D, R(51) );
P( D, E, A, B, C, R(52) );
P( C, D, E, A, B, R(53) );
P( B, C, D, E, A, R(54) );
P( A, B, C, D, E, R(55) );
P( E, A, B, C, D, R(56) );
P( D, E, A, B, C, R(57) );
P( C, D, E, A, B, R(58) );
P( B, C, D, E, A, R(59) );
P (A, B, C, D, E, R (40));
P (E, A, B, C, D, R (41));
P (D, E, A, B, C, R (42));
P (C, D, E, A, B, R (43));
P (B, C, D, E, A, R (44));
P (A, B, C, D, E, R (45));
P (E, A, B, C, D, R (46));
P (D, E, A, B, C, R (47));
P (C, D, E, A, B, R (48));
P (B, C, D, E, A, R (49));
P (A, B, C, D, E, R (50));
P (E, A, B, C, D, R (51));
P (D, E, A, B, C, R (52));
P (C, D, E, A, B, R (53));
P (B, C, D, E, A, R (54));
P (A, B, C, D, E, R (55));
P (E, A, B, C, D, R (56));
P (D, E, A, B, C, R (57));
P (C, D, E, A, B, R (58));
P (B, C, D, E, A, R (59));
#undef K
#undef F
@ -194,169 +190,161 @@ static void sha1_process( sha1_context *ctx, unsigned char data[64] )
#define F(x,y,z) (x ^ y ^ z)
#define K 0xCA62C1D6
P( A, B, C, D, E, R(60) );
P( E, A, B, C, D, R(61) );
P( D, E, A, B, C, R(62) );
P( C, D, E, A, B, R(63) );
P( B, C, D, E, A, R(64) );
P( A, B, C, D, E, R(65) );
P( E, A, B, C, D, R(66) );
P( D, E, A, B, C, R(67) );
P( C, D, E, A, B, R(68) );
P( B, C, D, E, A, R(69) );
P( A, B, C, D, E, R(70) );
P( E, A, B, C, D, R(71) );
P( D, E, A, B, C, R(72) );
P( C, D, E, A, B, R(73) );
P( B, C, D, E, A, R(74) );
P( A, B, C, D, E, R(75) );
P( E, A, B, C, D, R(76) );
P( D, E, A, B, C, R(77) );
P( C, D, E, A, B, R(78) );
P( B, C, D, E, A, R(79) );
P (A, B, C, D, E, R (60));
P (E, A, B, C, D, R (61));
P (D, E, A, B, C, R (62));
P (C, D, E, A, B, R (63));
P (B, C, D, E, A, R (64));
P (A, B, C, D, E, R (65));
P (E, A, B, C, D, R (66));
P (D, E, A, B, C, R (67));
P (C, D, E, A, B, R (68));
P (B, C, D, E, A, R (69));
P (A, B, C, D, E, R (70));
P (E, A, B, C, D, R (71));
P (D, E, A, B, C, R (72));
P (C, D, E, A, B, R (73));
P (B, C, D, E, A, R (74));
P (A, B, C, D, E, R (75));
P (E, A, B, C, D, R (76));
P (D, E, A, B, C, R (77));
P (C, D, E, A, B, R (78));
P (B, C, D, E, A, R (79));
#undef K
#undef F
ctx->state[0] += A;
ctx->state[1] += B;
ctx->state[2] += C;
ctx->state[3] += D;
ctx->state[4] += E;
ctx->state[0] += A;
ctx->state[1] += B;
ctx->state[2] += C;
ctx->state[3] += D;
ctx->state[4] += E;
}
/*
* SHA-1 process buffer
*/
void sha1_update( sha1_context *ctx, unsigned char *input, int ilen )
void sha1_update (sha1_context * ctx, unsigned char *input, int ilen)
{
int fill;
unsigned long left;
int fill;
unsigned long left;
if( ilen <= 0 )
return;
if (ilen <= 0)
return;
left = ctx->total[0] & 0x3F;
fill = 64 - left;
left = ctx->total[0] & 0x3F;
fill = 64 - left;
ctx->total[0] += ilen;
ctx->total[0] &= 0xFFFFFFFF;
ctx->total[0] += ilen;
ctx->total[0] &= 0xFFFFFFFF;
if( ctx->total[0] < (unsigned long) ilen )
ctx->total[1]++;
if (ctx->total[0] < (unsigned long) ilen)
ctx->total[1]++;
if( left && ilen >= fill )
{
memcpy( (void *) (ctx->buffer + left),
(void *) input, fill );
sha1_process( ctx, ctx->buffer );
input += fill;
ilen -= fill;
left = 0;
}
if (left && ilen >= fill) {
memcpy ((void *) (ctx->buffer + left), (void *) input, fill);
sha1_process (ctx, ctx->buffer);
input += fill;
ilen -= fill;
left = 0;
}
while( ilen >= 64 )
{
sha1_process( ctx, input );
input += 64;
ilen -= 64;
}
while (ilen >= 64) {
sha1_process (ctx, input);
input += 64;
ilen -= 64;
}
if( ilen > 0 )
{
memcpy( (void *) (ctx->buffer + left),
(void *) input, ilen );
}
if (ilen > 0) {
memcpy ((void *) (ctx->buffer + left), (void *) input, ilen);
}
}
static const unsigned char sha1_padding[64] =
{
0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
static const unsigned char sha1_padding[64] = {
0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
/*
* SHA-1 final digest
*/
void sha1_finish( sha1_context *ctx, unsigned char output[20] )
void sha1_finish (sha1_context * ctx, unsigned char output[20])
{
unsigned long last, padn;
unsigned long high, low;
unsigned char msglen[8];
unsigned long last, padn;
unsigned long high, low;
unsigned char msglen[8];
high = ( ctx->total[0] >> 29 )
| ( ctx->total[1] << 3 );
low = ( ctx->total[0] << 3 );
high = (ctx->total[0] >> 29)
| (ctx->total[1] << 3);
low = (ctx->total[0] << 3);
PUT_UINT32_BE( high, msglen, 0 );
PUT_UINT32_BE( low, msglen, 4 );
PUT_UINT32_BE (high, msglen, 0);
PUT_UINT32_BE (low, msglen, 4);
last = ctx->total[0] & 0x3F;
padn = ( last < 56 ) ? ( 56 - last ) : ( 120 - last );
last = ctx->total[0] & 0x3F;
padn = (last < 56) ? (56 - last) : (120 - last);
sha1_update( ctx, (unsigned char *) sha1_padding, padn );
sha1_update( ctx, msglen, 8 );
sha1_update (ctx, (unsigned char *) sha1_padding, padn);
sha1_update (ctx, msglen, 8);
PUT_UINT32_BE( ctx->state[0], output, 0 );
PUT_UINT32_BE( ctx->state[1], output, 4 );
PUT_UINT32_BE( ctx->state[2], output, 8 );
PUT_UINT32_BE( ctx->state[3], output, 12 );
PUT_UINT32_BE( ctx->state[4], output, 16 );
PUT_UINT32_BE (ctx->state[0], output, 0);
PUT_UINT32_BE (ctx->state[1], output, 4);
PUT_UINT32_BE (ctx->state[2], output, 8);
PUT_UINT32_BE (ctx->state[3], output, 12);
PUT_UINT32_BE (ctx->state[4], output, 16);
}
/*
* Output = SHA-1( input buffer )
*/
void sha1_csum( unsigned char *input, int ilen,
unsigned char output[20] )
void sha1_csum (unsigned char *input, int ilen, unsigned char output[20])
{
sha1_context ctx;
sha1_context ctx;
sha1_starts( &ctx );
sha1_update( &ctx, input, ilen );
sha1_finish( &ctx, output );
sha1_starts (&ctx);
sha1_update (&ctx, input, ilen);
sha1_finish (&ctx, output);
}
/*
* Output = HMAC-SHA-1( input buffer, hmac key )
*/
void sha1_hmac( unsigned char *key, int keylen,
unsigned char *input, int ilen,
unsigned char output[20] )
void sha1_hmac (unsigned char *key, int keylen,
unsigned char *input, int ilen, unsigned char output[20])
{
int i;
sha1_context ctx;
unsigned char k_ipad[64];
unsigned char k_opad[64];
unsigned char tmpbuf[20];
int i;
sha1_context ctx;
unsigned char k_ipad[64];
unsigned char k_opad[64];
unsigned char tmpbuf[20];
memset( k_ipad, 0x36, 64 );
memset( k_opad, 0x5C, 64 );
memset (k_ipad, 0x36, 64);
memset (k_opad, 0x5C, 64);
for( i = 0; i < keylen; i++ )
{
if( i >= 64 ) break;
for (i = 0; i < keylen; i++) {
if (i >= 64)
break;
k_ipad[i] ^= key[i];
k_opad[i] ^= key[i];
}
k_ipad[i] ^= key[i];
k_opad[i] ^= key[i];
}
sha1_starts( &ctx );
sha1_update( &ctx, k_ipad, 64 );
sha1_update( &ctx, input, ilen );
sha1_finish( &ctx, tmpbuf );
sha1_starts (&ctx);
sha1_update (&ctx, k_ipad, 64);
sha1_update (&ctx, input, ilen);
sha1_finish (&ctx, tmpbuf);
sha1_starts( &ctx );
sha1_update( &ctx, k_opad, 64 );
sha1_update( &ctx, tmpbuf, 20 );
sha1_finish( &ctx, output );
sha1_starts (&ctx);
sha1_update (&ctx, k_opad, 64);
sha1_update (&ctx, tmpbuf, 20);
sha1_finish (&ctx, output);
memset( k_ipad, 0, 64 );
memset( k_opad, 0, 64 );
memset( tmpbuf, 0, 20 );
memset( &ctx, 0, sizeof( sha1_context ) );
memset (k_ipad, 0, 64);
memset (k_opad, 0, 64);
memset (tmpbuf, 0, 20);
memset (&ctx, 0, sizeof (sha1_context));
}
static const char _sha1_src[] = "_sha1_src";
@ -365,66 +353,61 @@ static const char _sha1_src[] = "_sha1_src";
/*
* FIPS-180-1 test vectors
*/
static const char sha1_test_str[3][57] =
{
{ "abc" },
{ "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq" },
{ "" }
static const char sha1_test_str[3][57] = {
{"abc"},
{"abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"},
{""}
};
static const unsigned char sha1_test_sum[3][20] =
{
{ 0xA9, 0x99, 0x3E, 0x36, 0x47, 0x06, 0x81, 0x6A, 0xBA, 0x3E,
0x25, 0x71, 0x78, 0x50, 0xC2, 0x6C, 0x9C, 0xD0, 0xD8, 0x9D },
{ 0x84, 0x98, 0x3E, 0x44, 0x1C, 0x3B, 0xD2, 0x6E, 0xBA, 0xAE,
0x4A, 0xA1, 0xF9, 0x51, 0x29, 0xE5, 0xE5, 0x46, 0x70, 0xF1 },
{ 0x34, 0xAA, 0x97, 0x3C, 0xD4, 0xC4, 0xDA, 0xA4, 0xF6, 0x1E,
0xEB, 0x2B, 0xDB, 0xAD, 0x27, 0x31, 0x65, 0x34, 0x01, 0x6F }
static const unsigned char sha1_test_sum[3][20] = {
{0xA9, 0x99, 0x3E, 0x36, 0x47, 0x06, 0x81, 0x6A, 0xBA, 0x3E,
0x25, 0x71, 0x78, 0x50, 0xC2, 0x6C, 0x9C, 0xD0, 0xD8, 0x9D},
{0x84, 0x98, 0x3E, 0x44, 0x1C, 0x3B, 0xD2, 0x6E, 0xBA, 0xAE,
0x4A, 0xA1, 0xF9, 0x51, 0x29, 0xE5, 0xE5, 0x46, 0x70, 0xF1},
{0x34, 0xAA, 0x97, 0x3C, 0xD4, 0xC4, 0xDA, 0xA4, 0xF6, 0x1E,
0xEB, 0x2B, 0xDB, 0xAD, 0x27, 0x31, 0x65, 0x34, 0x01, 0x6F}
};
/*
* Checkup routine
*/
int sha1_self_test( void )
int sha1_self_test (void)
{
int i, j;
unsigned char buf[1000];
unsigned char sha1sum[20];
sha1_context ctx;
int i, j;
unsigned char buf[1000];
unsigned char sha1sum[20];
sha1_context ctx;
for( i = 0; i < 3; i++ )
{
printf( " SHA-1 test #%d: ", i + 1 );
for (i = 0; i < 3; i++) {
printf (" SHA-1 test #%d: ", i + 1);
sha1_starts( &ctx );
sha1_starts (&ctx);
if( i < 2 )
sha1_update( &ctx, (unsigned char *) sha1_test_str[i],
strlen( sha1_test_str[i] ) );
else
{
memset( buf, 'a', 1000 );
for( j = 0; j < 1000; j++ )
sha1_update( &ctx, buf, 1000 );
}
if (i < 2)
sha1_update (&ctx, (unsigned char *) sha1_test_str[i],
strlen (sha1_test_str[i]));
else {
memset (buf, 'a', 1000);
for (j = 0; j < 1000; j++)
sha1_update (&ctx, buf, 1000);
}
sha1_finish( &ctx, sha1sum );
sha1_finish (&ctx, sha1sum);
if( memcmp( sha1sum, sha1_test_sum[i], 20 ) != 0 )
{
printf( "failed\n" );
return( 1 );
}
if (memcmp (sha1sum, sha1_test_sum[i], 20) != 0) {
printf ("failed\n");
return (1);
}
printf( "passed\n" );
}
printf ("passed\n");
}
printf( "\n" );
return( 0 );
printf ("\n");
return (0);
}
#else
int sha1_self_test( void )
int sha1_self_test (void)
{
return( 0 );
return (0);
}
#endif

View file

@ -438,7 +438,7 @@ cache_post_test6_reloc:
blr
/* Test instructions.
*/
*/
cache_post_test_inst:
li r3, 0
li r3, -1

View file

@ -37,7 +37,7 @@ int fpu_status(void)
{
if (mfspr(ccr0) & CCR0_DAPUIB)
return 0; /* Disabled */
else
else
return 1; /* Enabled */
}

View file

@ -43,12 +43,11 @@
#include <asm/processor.h>
static struct
{
int number;
char * name;
unsigned long mask;
unsigned long value;
static struct {
int number;
char * name;
unsigned long mask;
unsigned long value;
} spr_test_list [] = {
/* Standard Special-Purpose Registers */
@ -65,7 +64,7 @@ static struct
{0x11f, "PVR", 0x00000000, 0x00000000},
/* Additional Special-Purpose Registers.
* The values must match the initialization
* The values must match the initialization
* values from cpu/ppc4xx/start.S
*/
{0x30, "PID", 0x00000000, 0x00000000},

View file

@ -84,7 +84,7 @@ int main (int argc, char **argv)
cmdname, imagefile, strerror(errno));
exit (EXIT_FAILURE);
}
/* create a copy, so we can blank out the sha1 sum */
data = malloc (len);
memcpy (data, ptr, len);
@ -93,12 +93,11 @@ int main (int argc, char **argv)
for (i = 0; i < SHA1_SUM_LEN; i++) {
ptroff[i] = 0;
}
sha1_csum ((unsigned char *) data, len, (unsigned char *)output);
printf ("U-Boot sum:\n");
for (i = 0; i < 20 ; i++)
{
for (i = 0; i < 20 ; i++) {
printf ("%02X ", output[i]);
}
printf ("\n");
@ -109,7 +108,7 @@ int main (int argc, char **argv)
cmdname, imagefile, strerror(errno));
exit (EXIT_FAILURE);
}
free (data);
(void) munmap((void *)ptr, len);
(void) close (ifd);