mirror of
https://github.com/AsahiLinux/u-boot
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Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx
This commit is contained in:
Wolfgang Denk
commit
0f8b8d0f4c
8 changed files with 38 additions and 22 deletions
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@ -37,17 +37,24 @@ static void cds_pci_fixup(void *blob)
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map = ft_get_prop(blob, "/" OF_SOC "/pci@8000/interrupt-map", &len);
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len /= sizeof(u32);
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if (!map)
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map = ft_get_prop(blob, "/" OF_PCI "/interrupt-map", &len);
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slot = get_pci_slot();
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if (map) {
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len /= sizeof(u32);
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for (i=0;i<len;i+=7) {
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/* We rotate the interrupt pins so that the mapping
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* changes depending on the slot the carrier card is in.
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*/
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map[3] = ((map[3] + slot - 2) % 4) + 1;
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slot = get_pci_slot();
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map+=7;
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for (i=0;i<len;i+=7) {
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/* We rotate the interrupt pins so that the mapping
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* changes depending on the slot the carrier card is in.
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*/
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map[3] = ((map[3] + slot - 2) % 4) + 1;
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map+=7;
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}
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} else {
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printf("*** Warning - No PCI node found\n");
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}
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}
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#endif
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@ -163,7 +163,12 @@ int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
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* Initiate hard reset in debug control register DBCR0
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* Make sure MSR[DE] = 1
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*/
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unsigned long val;
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unsigned long val, msr;
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msr = mfmsr ();
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msr |= MSR_DE;
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mtmsr (msr);
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val = mfspr(DBCR0);
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val |= 0x70000000;
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mtspr(DBCR0,val);
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@ -218,6 +218,8 @@ _start_e500:
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bdnz 0b
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/* Clear and set up some registers. */
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li r0,0
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mtmsr r0
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li r0,0x0000
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lis r1,0xffff
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mtspr DEC,r0 /* prevent dec exceptions */
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@ -266,18 +268,17 @@ _start_e500:
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*/
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lis r3,CFG_INIT_RAM_ADDR@h
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ori r3,r3,CFG_INIT_RAM_ADDR@l
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li r2,512 /* 512*32=16K */
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li r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE))
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mtctr r2
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li r0,0
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1:
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dcbz r0,r3
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dcbtls 0,r0,r3
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addi r3,r3,32
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addi r3,r3,CFG_CACHELINE_SIZE
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bdnz 1b
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/* Jump out the last 4K page and continue to 'normal' start */
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#ifdef CFG_RAMBOOT
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bl 3f
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b _start_cont
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#else
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/* Calculate absolute address in FLASH and jump there */
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@ -286,15 +287,9 @@ _start_e500:
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ori r3,r3,CFG_MONITOR_BASE@l
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addi r3,r3,_start_cont - _start + _START_OFFSET
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mtlr r3
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blr
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#endif
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3: li r0,0
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mtspr SRR1,r0 /* Keep things disabled for now */
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mflr r1
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mtspr SRR0,r1
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rfi
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isync
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.text
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.globl _start
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_start:
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@ -701,6 +696,7 @@ in8:
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.globl out8
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out8:
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stb r4,0x0000(r3)
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sync
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blr
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/*------------------------------------------------------------------------------- */
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@ -710,6 +706,7 @@ out8:
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.globl out16
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out16:
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sth r4,0x0000(r3)
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sync
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blr
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/*------------------------------------------------------------------------------- */
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@ -719,6 +716,7 @@ out16:
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.globl out16r
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out16r:
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sthbrx r4,r0,r3
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sync
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blr
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/*------------------------------------------------------------------------------- */
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@ -728,6 +726,7 @@ out16r:
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.globl out32
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out32:
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stw r4,0x0000(r3)
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sync
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blr
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/*------------------------------------------------------------------------------- */
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@ -737,6 +736,7 @@ out32:
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.globl out32r
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out32r:
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stwbrx r4,r0,r3
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sync
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blr
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/*------------------------------------------------------------------------------- */
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@ -1061,11 +1061,11 @@ unlock_ram_in_cache:
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/* invalidate the INIT_RAM section */
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lis r3,(CFG_INIT_RAM_ADDR & ~31)@h
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ori r3,r3,(CFG_INIT_RAM_ADDR & ~31)@l
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li r4,512
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li r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE))
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mtctr r4
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1: icbi r0,r3
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dcbi r0,r3
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addi r3,r3,32
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addi r3,r3,CFG_CACHELINE_SIZE
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bdnz 1b
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sync /* Wait for all icbi to complete on bus */
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isync
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@ -803,6 +803,7 @@ static void startup_tsec(struct eth_device *dev)
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/* Tell the DMA it is clear to go */
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regs->dmactrl |= DMACTRL_INIT_SETTINGS;
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regs->tstat = TSTAT_CLEAR_THALT;
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regs->rstat = RSTAT_CLEAR_RHALT;
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regs->dmactrl &= ~(DMACTRL_GRS | DMACTRL_GTS);
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}
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@ -316,6 +316,7 @@ extern unsigned long get_clock_freq(void);
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#define OF_SOC "soc8541@e0000000"
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#define OF_TBCLK (bd->bi_busfreq / 8)
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#define OF_STDOUT_PATH "/soc8541@e0000000/serial@4600"
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#define OF_PCI "pci@e0008000"
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/*
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* I2C
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@ -340,6 +340,7 @@ extern unsigned long get_clock_freq(void);
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#define OF_SOC "soc8548@e0000000"
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#define OF_TBCLK (bd->bi_busfreq / 8)
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#define OF_STDOUT_PATH "/soc8548@e0000000/serial@4600"
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#define OF_PCI "pci@e0008000"
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/*
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* I2C
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@ -316,6 +316,7 @@ extern unsigned long get_clock_freq(void);
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#define OF_SOC "soc8555@e0000000"
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#define OF_TBCLK (bd->bi_busfreq / 8)
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#define OF_STDOUT_PATH "/soc8555@e0000000/serial@4600"
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#define OF_PCI "pci@e0008000"
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/*
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* I2C
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@ -297,7 +297,7 @@ extern unsigned long get_clock_freq(void);
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#define OF_SOC "soc8568@e0000000"
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#define OF_QE "qe@e0080000"
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#define OF_TBCLK (bd->bi_busfreq / 8)
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#define OF_STDOUT_PATH "/soc8568@e0000000/serial@4600"
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#define OF_STDOUT_PATH "/soc8568@e0000000/serial@4500"
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/*
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* I2C
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