mirror of
https://github.com/AsahiLinux/u-boot
synced 2025-02-17 22:49:02 +00:00
Merge branch 'master' of /home/wd/git/u-boot/custodians
This commit is contained in:
Wolfgang Denk
commit
f0516920f6
17 changed files with 53 additions and 37 deletions
4
Makefile
4
Makefile
|
|
@ -1733,9 +1733,13 @@ M54455EVB_i66_config : unconfig
|
|||
>include/config.h ; \
|
||||
if [ "$${FLASH}" == "INTEL" ] ; then \
|
||||
echo "#undef CFG_ATMEL_BOOT" >> $(obj)include/config.h ; \
|
||||
echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54455evb/config.tmp ; \
|
||||
cp $(obj)board/freescale/m54455evb/u-boot.int $(obj)board/freescale/m54455evb/u-boot.lds ; \
|
||||
echo "... with INTEL boot..." ; \
|
||||
else \
|
||||
echo "#define CFG_ATMEL_BOOT" >> $(obj)include/config.h ; \
|
||||
echo "TEXT_BASE = 0x04000000" > $(obj)board/freescale/m54455evb/config.tmp ; \
|
||||
cp $(obj)board/freescale/m54455evb/u-boot.atm $(obj)board/freescale/m54455evb/u-boot.lds ; \
|
||||
echo "... with ATMEL boot..." ; \
|
||||
fi; \
|
||||
echo "#define CFG_INPUT_CLKSRC $${FREQ}" >> $(obj)include/config.h ; \
|
||||
|
|
|
|||
|
|
@ -22,4 +22,6 @@
|
|||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
TEXT_BASE = 0
|
||||
sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
|
||||
|
||||
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
|
||||
|
|
|
|||
|
|
@ -89,4 +89,5 @@ long int initdram (int board_type)
|
|||
/* Write to the SDRAM Mode Register */
|
||||
*(u32 *)(CFG_SDRAM_BASE + 0x400) = 0xA5A59696;
|
||||
}
|
||||
return dramsize;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -58,7 +58,7 @@ _vectors:
|
|||
.long 0x00000000 /* Flash offset is 0 until we setup CS0 */
|
||||
#if defined(CONFIG_R5200)
|
||||
.long 0x400
|
||||
#elif defined(CONFIG_M5282)
|
||||
#elif defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE)
|
||||
.long _start - TEXT_BASE
|
||||
#else
|
||||
.long _START
|
||||
|
|
@ -177,7 +177,11 @@ _after_flashbar_copy:
|
|||
* therefore no VBR to set
|
||||
*/
|
||||
#if !defined(CONFIG_MONITOR_IS_IN_RAM)
|
||||
#if defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE)
|
||||
move.l #CFG_INT_FLASH_BASE, %d0
|
||||
#else
|
||||
move.l #CFG_FLASH_BASE, %d0
|
||||
#endif
|
||||
movec %d0, %VBR
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -131,7 +131,7 @@ _start:
|
|||
movec %d0, %VBR
|
||||
|
||||
move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0
|
||||
movec %d0, %RAMBAR0
|
||||
movec %d0, %RAMBAR1
|
||||
|
||||
/* invalidate and disable cache */
|
||||
move.l #0x01000000, %d0 /* Invalidate cache cmd */
|
||||
|
|
@ -268,7 +268,7 @@ _int_handler:
|
|||
icache_enable:
|
||||
move.l #0x01000000, %d0 /* Invalidate cache cmd */
|
||||
movec %d0, %CACR /* Invalidate cache */
|
||||
move.l #(CFG_SDRAM_BASE + 0xc000 + ((CFG_SDRAM_SIZE & 0x1fe0) << 11)), %d0
|
||||
move.l #(CFG_SDRAM_BASE + 0x1c000), %d0
|
||||
movec %d0, %ACR0 /* Enable cache */
|
||||
|
||||
move.l #0x80000200, %d0 /* Setup cache mask */
|
||||
|
|
|
|||
|
|
@ -45,7 +45,7 @@ COBJS = 3c589.o 5701rls.o ali512x.o at45.o ata_piix.o \
|
|||
s3c4510b_eth.o s3c4510b_uart.o \
|
||||
sed13806.o sed156x.o \
|
||||
serial.o serial_max3100.o \
|
||||
serial_pl010.o serial_pl011.o serial_xuartlite.o \
|
||||
serial_xuartlite.o \
|
||||
sil680.o sl811_usb.o sm501.o smc91111.o smiLynxEM.o \
|
||||
status_led.o sym53c8xx.o systemace.o ahci.o \
|
||||
ti_pci1410a.o tigon3.o tqm8xx_pcmcia.o tsec.o \
|
||||
|
|
|
|||
|
|
@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
|
|||
|
||||
LIB := $(obj)libserial.a
|
||||
|
||||
COBJS := mcfuart.o
|
||||
COBJS := mcfuart.o serial_pl010.o serial_pl011.o
|
||||
|
||||
SRCS := $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
|
|
|
|||
|
|
@ -146,7 +146,7 @@
|
|||
* Please note that CFG_SDRAM_BASE _must_ start at 0
|
||||
*/
|
||||
#define CFG_SDRAM_BASE 0x00000000
|
||||
#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
|
||||
#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */
|
||||
|
||||
#ifdef CONFIG_MONITOR_IS_IN_RAM
|
||||
#define CFG_MONITOR_BASE 0x20000
|
||||
|
|
|
|||
|
|
@ -163,7 +163,7 @@
|
|||
* Please note that CFG_SDRAM_BASE _must_ start at 0
|
||||
*/
|
||||
#define CFG_SDRAM_BASE 0x00000000
|
||||
#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */
|
||||
#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
|
||||
#define CFG_FLASH_BASE 0xffe00000
|
||||
#define CFG_INT_FLASH_BASE 0xf0000000
|
||||
#define CFG_INT_FLASH_ENABLE 0x21
|
||||
|
|
|
|||
|
|
@ -175,7 +175,7 @@
|
|||
* Please note that CFG_SDRAM_BASE _must_ start at 0
|
||||
*/
|
||||
#define CFG_SDRAM_BASE 0x40000000
|
||||
#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
|
||||
#define CFG_SDRAM_SIZE 32 /* SDRAM size in MB */
|
||||
#define CFG_SDRAM_CFG1 0x53722730
|
||||
#define CFG_SDRAM_CFG2 0x56670000
|
||||
#define CFG_SDRAM_CTRL 0xE1092000
|
||||
|
|
|
|||
|
|
@ -27,8 +27,8 @@
|
|||
* board/config.h - configuration options, board specific
|
||||
*/
|
||||
|
||||
#ifndef _JAMICA54455_H
|
||||
#define _JAMICA54455_H
|
||||
#ifndef _M54455EVB_H
|
||||
#define _M54455EVB_H
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
|
|
@ -75,7 +75,7 @@
|
|||
#define CONFIG_CMD_MISC
|
||||
#define CONFIG_CMD_MII
|
||||
#define CONFIG_CMD_NET
|
||||
#define CONFIG_CMD_PCI
|
||||
#undef CONFIG_CMD_PCI
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_REGINFO
|
||||
|
||||
|
|
@ -129,8 +129,8 @@
|
|||
"u-boot=u-boot.bin\0" \
|
||||
"load=tftp ${loadaddr) ${u-boot}\0" \
|
||||
"upd=run load; run prog\0" \
|
||||
"prog=prot off 0 2ffff;" \
|
||||
"era 0 2ffff;" \
|
||||
"prog=prot off 4000000 402ffff;" \
|
||||
"era 4000000 402ffff;" \
|
||||
"cp.b ${loadaddr} 0 ${filesize};" \
|
||||
"save\0" \
|
||||
""
|
||||
|
|
@ -174,6 +174,7 @@
|
|||
#define CFG_IMMR CFG_MBAR
|
||||
|
||||
/* PCI */
|
||||
#ifdef CONFIG_CMD_PCI
|
||||
#define CONFIG_PCI 1
|
||||
|
||||
#define CFG_PCI_MEM_BUS 0xA0000000
|
||||
|
|
@ -187,6 +188,7 @@
|
|||
#define CFG_PCI_CFG_BUS 0xB0000000
|
||||
#define CFG_PCI_CFG_PHYS CFG_PCI_CFG_BUS
|
||||
#define CFG_PCI_CFG_SIZE 0x01000000
|
||||
#endif
|
||||
|
||||
/* FPGA - Spartan 2 */
|
||||
/* experiment
|
||||
|
|
@ -268,8 +270,6 @@
|
|||
/* Configuration for environment
|
||||
* Environment is embedded in u-boot in the second sector of the flash
|
||||
*/
|
||||
#define CFG_ENV_OFFSET 0x4000
|
||||
#define CFG_ENV_SECT_SIZE 0x2000
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CONFIG_ENV_OVERWRITE 1
|
||||
#undef CFG_ENV_IS_EMBEDDED
|
||||
|
|
@ -278,13 +278,17 @@
|
|||
* FLASH organization
|
||||
*/
|
||||
#ifdef CFG_ATMEL_BOOT
|
||||
# define CFG_FLASH_BASE 0
|
||||
# define CFG_FLASH_BASE CFG_CS0_BASE
|
||||
# define CFG_FLASH0_BASE CFG_CS0_BASE
|
||||
# define CFG_FLASH1_BASE CFG_CS1_BASE
|
||||
# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000)
|
||||
# define CFG_ENV_SECT_SIZE 0x2000
|
||||
#else
|
||||
# define CFG_FLASH_BASE CFG_FLASH0_BASE
|
||||
# define CFG_FLASH0_BASE CFG_CS1_BASE
|
||||
# define CFG_FLASH1_BASE CFG_CS0_BASE
|
||||
# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000)
|
||||
# define CFG_ENV_SECT_SIZE 0x20000
|
||||
#endif
|
||||
|
||||
/* M54455EVB has one non CFI flash, defined CFG_FLASH_CFI will cause the system
|
||||
|
|
@ -328,9 +332,9 @@
|
|||
* NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
|
||||
*/
|
||||
#ifdef CFG_ATMEL_BOOT
|
||||
# define CONFIG_JFFS2_DEV "nor0"
|
||||
# define CONFIG_JFFS2_DEV "nor1"
|
||||
# define CONFIG_JFFS2_PART_SIZE 0x01000000
|
||||
# define CONFIG_JFFS2_PART_OFFSET CFG_FLASH1_BASE
|
||||
# define CONFIG_JFFS2_PART_OFFSET (CFG_FLASH1_BASE + 0x500000)
|
||||
#else
|
||||
# define CONFIG_JFFS2_DEV "nor0"
|
||||
# define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x500000)
|
||||
|
|
@ -356,20 +360,20 @@
|
|||
|
||||
#ifdef CFG_ATMEL_BOOT
|
||||
/* Atmel Flash */
|
||||
#define CFG_CS0_BASE 0
|
||||
#define CFG_CS0_BASE 0x04000000
|
||||
#define CFG_CS0_MASK 0x00070001
|
||||
#define CFG_CS0_CTRL 0x00001140
|
||||
/* Intel Flash */
|
||||
#define CFG_CS1_BASE 0x04000000
|
||||
#define CFG_CS1_BASE 0x00000000
|
||||
#define CFG_CS1_MASK 0x01FF0001
|
||||
#define CFG_CS1_CTRL 0x003F3D60
|
||||
#define CFG_CS1_CTRL 0x00000D60
|
||||
|
||||
#define CFG_ATMEL_BASE CFG_CS0_BASE
|
||||
#else
|
||||
/* Intel Flash */
|
||||
#define CFG_CS0_BASE 0
|
||||
#define CFG_CS0_BASE 0x00000000
|
||||
#define CFG_CS0_MASK 0x01FF0001
|
||||
#define CFG_CS0_CTRL 0x003F3D60
|
||||
#define CFG_CS0_CTRL 0x00000D60
|
||||
/* Atmel Flash */
|
||||
#define CFG_CS1_BASE 0x04000000
|
||||
#define CFG_CS1_MASK 0x00070001
|
||||
|
|
@ -388,4 +392,4 @@
|
|||
#define CFG_CS3_MASK 0x00070001
|
||||
#define CFG_CS3_CTRL 0x00000020
|
||||
|
||||
#endif /* _JAMICA54455_H */
|
||||
#endif /* _M54455EVB_H */
|
||||
|
|
|
|||
|
|
@ -114,15 +114,10 @@
|
|||
#define CONFIG_AUTOBOOT_STOP_STR " "
|
||||
|
||||
/*
|
||||
* These are "locally administered ethernet addresses" generated by
|
||||
* ./tools/gen_eth_addr
|
||||
*
|
||||
* After booting the board for the first time, new addresses should be
|
||||
* generated and assigned to the environment variables "ethaddr" and
|
||||
* "eth1addr".
|
||||
* After booting the board for the first time, new ethernet addresses
|
||||
* should be generated and assigned to the environment variables
|
||||
* "ethaddr" and "eth1addr". This is normally done during production.
|
||||
*/
|
||||
#define CONFIG_ETHADDR 6a:87:71:14:cd:cb
|
||||
#define CONFIG_ETH1ADDR ca:f8:15:e6:3e:e6
|
||||
#define CONFIG_OVERWRITE_ETHADDR_ONCE 1
|
||||
#define CONFIG_NET_MULTI 1
|
||||
|
||||
|
|
|
|||
|
|
@ -26,6 +26,7 @@
|
|||
#include <image.h>
|
||||
#include <zlib.h>
|
||||
#include <bzlib.h>
|
||||
#include <watchdog.h>
|
||||
#include <environment.h>
|
||||
#include <asm/byteorder.h>
|
||||
|
||||
|
|
@ -36,6 +37,8 @@ DECLARE_GLOBAL_DATA_PTR;
|
|||
#define LINUX_MAX_ENVS 256
|
||||
#define LINUX_MAX_ARGS 256
|
||||
|
||||
#define CHUNKSZ (64 * 1024)
|
||||
|
||||
#ifdef CONFIG_SHOW_BOOT_PROGRESS
|
||||
# include <status_led.h>
|
||||
# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
|
||||
|
|
|
|||
11
net/bootp.c
11
net/bootp.c
|
|
@ -850,9 +850,9 @@ static void DhcpSendRequestPkt(Bootp_t *bp_offer)
|
|||
bp->bp_hlen = HWL_ETHER;
|
||||
bp->bp_hops = 0;
|
||||
bp->bp_secs = htons(get_timer(0) / CFG_HZ);
|
||||
NetCopyIP(&bp->bp_ciaddr, &bp_offer->bp_ciaddr); /* both in network byte order */
|
||||
NetCopyIP(&bp->bp_yiaddr, &bp_offer->bp_yiaddr);
|
||||
NetCopyIP(&bp->bp_siaddr, &bp_offer->bp_siaddr);
|
||||
/* Do not set the client IP, your IP, or server IP yet, since it hasn't been ACK'ed by
|
||||
* the server yet */
|
||||
|
||||
/*
|
||||
* RFC3046 requires Relay Agents to discard packets with
|
||||
* nonzero and offered giaddr
|
||||
|
|
@ -870,7 +870,9 @@ static void DhcpSendRequestPkt(Bootp_t *bp_offer)
|
|||
/*
|
||||
* Copy options from OFFER packet if present
|
||||
*/
|
||||
NetCopyIP(&OfferedIP, &bp->bp_yiaddr);
|
||||
|
||||
/* Copy offered IP into the parameters request list */
|
||||
NetCopyIP(&OfferedIP, &bp_offer->bp_yiaddr);
|
||||
extlen = DhcpExtended((u8 *)bp->bp_vend, DHCP_REQUEST, NetDHCPServerIP, OfferedIP);
|
||||
|
||||
pktlen = BOOTP_SIZE - sizeof(bp->bp_vend) + extlen;
|
||||
|
|
@ -980,3 +982,4 @@ void DhcpRequest(void)
|
|||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue