mirror of
https://github.com/AsahiLinux/u-boot
synced 2025-02-18 06:58:54 +00:00
[PCS440EP] get rid of CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG
Signed-off-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
parent
566a494f59
commit
a5d71e290f
4 changed files with 58 additions and 57 deletions
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@ -506,8 +506,6 @@ int checkboard(void)
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return (0);
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}
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#if defined(CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG)
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void spd_ddr_init_hang (void)
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{
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status_led_set (0, STATUS_LED_OFF);
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@ -520,7 +518,6 @@ void spd_ddr_init_hang (void)
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udelay (100000);
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}
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}
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#endif
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long int initdram (int board_type)
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{
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@ -70,12 +70,14 @@
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#define ONE_BILLION 1000000000
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#if defined(CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG)
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extern void spd_ddr_init_hang (void);
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#define HANG() spd_ddr_init_hang()
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#else
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#define HANG() hang()
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#endif
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/*
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* Board-specific Platform code can reimplement spd_ddr_init_hang () if needed
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*/
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void __spd_ddr_init_hang (void)
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{
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hang ();
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}
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void spd_ddr_init_hang (void) __attribute__((weak, alias("__spd_ddr_init_hang")));
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/*-----------------------------------------------------------------------------
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| Memory Controller Options 0
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@ -474,7 +476,7 @@ static void get_spd_info(unsigned long *dimm_populated,
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if (dimm_found == FALSE) {
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printf("ERROR - No memory installed. Install a DDR-SDRAM DIMM.\n\n");
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HANG();
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spd_ddr_init_hang ();
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}
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}
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@ -497,7 +499,7 @@ static void check_mem_type(unsigned long *dimm_populated,
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dimm_num);
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printf("Only DDR SDRAM DIMMs are supported.\n");
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printf("Replace the DIMM module with a supported DIMM.\n\n");
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HANG();
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spd_ddr_init_hang ();
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break;
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}
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}
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@ -517,7 +519,7 @@ static void check_volt_type(unsigned long *dimm_populated,
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if (voltage_type != 0x04) {
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printf("ERROR: DIMM %lu with unsupported voltage level.\n",
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dimm_num);
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HANG();
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spd_ddr_init_hang ();
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} else {
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debug("DIMM %lu voltage level supported.\n", dimm_num);
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}
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@ -588,7 +590,7 @@ static void program_cfg0(unsigned long *dimm_populated,
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printf("WARNING: DIMM with datawidth of %lu bits.\n",
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data_width);
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printf("Only DIMMs with 32 or 64 bit datawidths supported.\n");
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HANG();
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spd_ddr_init_hang ();
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}
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break;
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}
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@ -776,7 +778,7 @@ static void program_tr0(unsigned long *dimm_populated,
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if ((tcyc_reg & 0x0F) >= 10) {
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printf("ERROR: Tcyc incorrect for DIMM in slot %lu\n",
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dimm_num);
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HANG();
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spd_ddr_init_hang ();
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}
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cycle_time_ns_x_10[cas_index] =
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@ -856,7 +858,7 @@ static void program_tr0(unsigned long *dimm_populated,
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printf("ERROR: No supported CAS latency with the installed DIMMs.\n");
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printf("Only CAS latencies of 2.0, 2.5, and 3.0 are supported.\n");
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printf("Make sure the PLB speed is within the supported range.\n");
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HANG();
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spd_ddr_init_hang ();
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}
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/*
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@ -1168,7 +1170,7 @@ static void program_tr1(void)
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*/
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if (window_found == FALSE) {
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printf("ERROR: Cannot determine a common read delay.\n");
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HANG();
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spd_ddr_init_hang ();
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}
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/*
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@ -1318,7 +1320,7 @@ static unsigned long program_bxcr(unsigned long *dimm_populated,
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printf("ERROR: Unsupported value for the banksize: %d.\n",
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bank_size_id);
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printf("Replace the DIMM module with a supported DIMM.\n\n");
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HANG();
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spd_ddr_init_hang ();
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}
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switch (num_col_addr) {
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@ -1340,7 +1342,7 @@ static unsigned long program_bxcr(unsigned long *dimm_populated,
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printf("ERROR: Unsupported value for number of "
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"column addresses: %d.\n", num_col_addr);
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printf("Replace the DIMM module with a supported DIMM.\n\n");
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HANG();
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spd_ddr_init_hang ();
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}
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/*
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@ -129,12 +129,15 @@
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#define MY_TLB_WORD2_I_ENABLE TLB_WORD2_I_ENABLE /* disable caching on SDRAM */
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#endif
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#if defined(CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG)
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extern void spd_ddr_init_hang (void);
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#define HANG() spd_ddr_init_hang()
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#else
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#define HANG() hang()
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#endif
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/*
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* Board-specific Platform code can reimplement spd_ddr_init_hang () if needed
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*/
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void __spd_ddr_init_hang (void)
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{
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hang ();
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}
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void spd_ddr_init_hang (void) __attribute__((weak, alias("__spd_ddr_init_hang")));
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/* Private Structure Definitions */
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@ -589,7 +592,7 @@ static void get_spd_info(unsigned long *dimm_populated,
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if (dimm_found == FALSE) {
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printf("ERROR - No memory installed. Install a DDR-SDRAM DIMM.\n\n");
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HANG();
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spd_ddr_init_hang ();
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}
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}
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@ -636,42 +639,42 @@ static void check_mem_type(unsigned long *dimm_populated,
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"slot %d.\n", (unsigned int)dimm_num);
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printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n");
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printf("Replace the DIMM module with a supported DIMM.\n\n");
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HANG();
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spd_ddr_init_hang ();
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break;
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case 2:
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printf("ERROR: EDO DIMM detected in slot %d.\n",
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(unsigned int)dimm_num);
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printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n");
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printf("Replace the DIMM module with a supported DIMM.\n\n");
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HANG();
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spd_ddr_init_hang ();
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break;
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case 3:
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printf("ERROR: Pipelined Nibble DIMM detected in slot %d.\n",
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(unsigned int)dimm_num);
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printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n");
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printf("Replace the DIMM module with a supported DIMM.\n\n");
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HANG();
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spd_ddr_init_hang ();
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break;
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case 4:
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printf("ERROR: SDRAM DIMM detected in slot %d.\n",
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(unsigned int)dimm_num);
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printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n");
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printf("Replace the DIMM module with a supported DIMM.\n\n");
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HANG();
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spd_ddr_init_hang ();
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break;
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case 5:
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printf("ERROR: Multiplexed ROM DIMM detected in slot %d.\n",
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(unsigned int)dimm_num);
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printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n");
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printf("Replace the DIMM module with a supported DIMM.\n\n");
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HANG();
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spd_ddr_init_hang ();
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break;
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case 6:
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printf("ERROR: SGRAM DIMM detected in slot %d.\n",
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(unsigned int)dimm_num);
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printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n");
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printf("Replace the DIMM module with a supported DIMM.\n\n");
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HANG();
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spd_ddr_init_hang ();
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break;
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case 7:
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debug("DIMM slot %d: DDR1 SDRAM detected\n", dimm_num);
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@ -686,7 +689,7 @@ static void check_mem_type(unsigned long *dimm_populated,
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(unsigned int)dimm_num);
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printf("Only DDR1 and DDR2 SDRAM DIMMs are supported.\n");
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printf("Replace the DIMM module with a supported DIMM.\n\n");
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HANG();
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spd_ddr_init_hang ();
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break;
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}
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}
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@ -696,7 +699,7 @@ static void check_mem_type(unsigned long *dimm_populated,
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&& (dimm_populated[dimm_num] != SDRAM_NONE)
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&& (dimm_populated[dimm_num-1] != dimm_populated[dimm_num])) {
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printf("ERROR: DIMM's DDR1 and DDR2 type can not be mixed.\n");
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HANG();
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spd_ddr_init_hang ();
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}
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}
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}
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@ -771,7 +774,7 @@ static void check_frequency(unsigned long *dimm_populated,
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(unsigned int)(calc_cycle_time*10));
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printf("Replace the DIMM, or change DDR frequency via "
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"strapping bits.\n\n");
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HANG();
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spd_ddr_init_hang ();
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}
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}
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}
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@ -803,7 +806,7 @@ static void check_rank_number(unsigned long *dimm_populated,
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"slot %d is not supported.\n", dimm_rank, dimm_num);
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printf("Only %d ranks are supported for all DIMM.\n", MAXRANKS);
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printf("Replace the DIMM module with a supported DIMM.\n\n");
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HANG();
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spd_ddr_init_hang ();
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} else
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total_rank += dimm_rank;
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}
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@ -812,7 +815,7 @@ static void check_rank_number(unsigned long *dimm_populated,
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"for all slots.\n", (unsigned int)total_rank);
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printf("Only %d ranks are supported for all DIMM.\n", MAXRANKS);
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printf("Remove one of the DIMM modules.\n\n");
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HANG();
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spd_ddr_init_hang ();
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}
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}
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}
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@ -837,28 +840,28 @@ static void check_voltage_type(unsigned long *dimm_populated,
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printf("This DIMM is 5.0 Volt/TTL.\n");
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printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n",
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(unsigned int)dimm_num);
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HANG();
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spd_ddr_init_hang ();
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break;
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case 0x01:
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printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n");
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printf("This DIMM is LVTTL.\n");
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printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n",
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(unsigned int)dimm_num);
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HANG();
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spd_ddr_init_hang ();
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break;
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case 0x02:
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printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n");
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printf("This DIMM is 1.5 Volt.\n");
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printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n",
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(unsigned int)dimm_num);
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HANG();
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spd_ddr_init_hang ();
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break;
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case 0x03:
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printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n");
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printf("This DIMM is 3.3 Volt/TTL.\n");
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printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n",
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(unsigned int)dimm_num);
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HANG();
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spd_ddr_init_hang ();
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break;
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case 0x04:
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/* 2.5 Voltage only for DDR1 */
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@ -870,7 +873,7 @@ static void check_voltage_type(unsigned long *dimm_populated,
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printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n");
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printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n",
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(unsigned int)dimm_num);
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HANG();
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spd_ddr_init_hang ();
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break;
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}
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}
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@ -1013,13 +1016,13 @@ static void program_copt1(unsigned long *dimm_populated,
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if ((dimm_populated[0] != SDRAM_NONE) && (dimm_populated[1] != SDRAM_NONE)) {
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if (buf0 != buf1) {
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printf("ERROR: DIMM's buffered/unbuffered, registered, clocking don't match.\n");
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HANG();
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spd_ddr_init_hang ();
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}
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}
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if ((dimm_64bit == TRUE) && (dimm_32bit == TRUE)) {
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printf("ERROR: Cannot mix 32 bit and 64 bit DDR-SDRAM DIMMs together.\n");
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HANG();
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spd_ddr_init_hang ();
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}
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else if ((dimm_64bit == TRUE) && (dimm_32bit == FALSE)) {
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mcopt1 |= SDRAM_MCOPT1_DMWD_64;
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@ -1027,7 +1030,7 @@ static void program_copt1(unsigned long *dimm_populated,
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mcopt1 |= SDRAM_MCOPT1_DMWD_32;
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} else {
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printf("ERROR: Please install only 32 or 64 bit DDR-SDRAM DIMMs.\n\n");
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HANG();
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spd_ddr_init_hang ();
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}
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if (ecc_enabled == TRUE)
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@ -1216,7 +1219,7 @@ static void program_initplr(unsigned long *dimm_populated,
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break;
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default:
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printf("ERROR: ucode error on selected_cas value %d", selected_cas);
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HANG();
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spd_ddr_init_hang ();
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break;
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}
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@ -1248,7 +1251,7 @@ static void program_initplr(unsigned long *dimm_populated,
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break;
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default:
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printf("ERROR: write recovery not support (%d)", write_recovery);
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HANG();
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spd_ddr_init_hang ();
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break;
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}
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#else
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@ -1266,7 +1269,7 @@ static void program_initplr(unsigned long *dimm_populated,
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ods = ODS_REDUCED;
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} else {
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printf("ERROR: Unsupported number of DIMM's (%d)", total_dimm);
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HANG();
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spd_ddr_init_hang ();
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}
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mr = CMD_EMR | SELECT_MR | BURST_LEN_4 | wr | cas;
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@ -1291,7 +1294,7 @@ static void program_initplr(unsigned long *dimm_populated,
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mtsdram(SDRAM_INITPLR13, 0x80800000 | emr); /* EMR OCD Exit */
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} else {
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printf("ERROR: ucode error as unknown DDR type in program_initplr");
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HANG();
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spd_ddr_init_hang ();
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}
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}
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@ -1396,7 +1399,7 @@ static void program_mode(unsigned long *dimm_populated,
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} else {
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printf("ERROR: SPD reported Tcyc is incorrect for DIMM "
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"in slot %d\n", (unsigned int)dimm_num);
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HANG();
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spd_ddr_init_hang ();
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}
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} else {
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/* Convert from hex to decimal */
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@ -1533,7 +1536,7 @@ static void program_mode(unsigned long *dimm_populated,
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printf("ERROR: Cannot find a supported CAS latency with the installed DIMMs.\n");
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printf("Only DIMMs DDR1 with CAS latencies of 2.0, 2.5, and 3.0 are supported.\n");
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printf("Make sure the PLB speed is within the supported range of the DIMMs.\n\n");
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HANG();
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spd_ddr_init_hang ();
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}
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} else { /* DDR2 */
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debug("cas_3_0_available=%d\n", cas_3_0_available);
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@ -1556,7 +1559,7 @@ static void program_mode(unsigned long *dimm_populated,
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cas_3_0_available, cas_4_0_available, cas_5_0_available);
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printf("sdram_freq=%d cycle3=%d cycle4=%d cycle5=%d\n\n",
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sdram_freq, cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk);
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HANG();
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spd_ddr_init_hang ();
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}
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}
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@ -1665,7 +1668,7 @@ static void program_rtr(unsigned long *dimm_populated,
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printf("ERROR: DIMM %d unsupported refresh rate/type.\n",
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(unsigned int)dimm_num);
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printf("Replace the DIMM module with a supported DIMM.\n\n");
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HANG();
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spd_ddr_init_hang ();
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break;
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}
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@ -2073,7 +2076,7 @@ static void program_bxcf(unsigned long *dimm_populated,
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printf("ERROR: Unsupported value for number of "
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"column addresses: %d.\n", (unsigned int)num_col_addr);
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printf("Replace the DIMM module with a supported DIMM.\n\n");
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HANG();
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spd_ddr_init_hang ();
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}
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}
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@ -2155,7 +2158,7 @@ static void program_memory_queue(unsigned long *dimm_populated,
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printf("ERROR: Unsupported value for the banksize: %d.\n",
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(unsigned int)rank_size_id);
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printf("Replace the DIMM module with a supported DIMM.\n\n");
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HANG();
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spd_ddr_init_hang ();
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}
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if ((dimm_populated[dimm_num] != SDRAM_NONE) && (dimm_num == 1))
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@ -2700,7 +2703,7 @@ calibration_loop:
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printf("\nERROR: Cannot determine a common read delay for the "
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"DIMM(s) installed.\n");
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debug("%s[%d] ERROR : \n", __FUNCTION__,__LINE__);
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HANG();
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spd_ddr_init_hang ();
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}
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blank_string(strlen(str));
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@ -2856,7 +2859,7 @@ static void test(void)
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if (window_found == FALSE) {
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printf("ERROR: Cannot determine a common read delay for the "
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"DIMM(s) installed.\n");
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HANG();
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spd_ddr_init_hang ();
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}
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||||
|
||||
/*------------------------------------------------------------------
|
||||
|
|
|
@ -125,7 +125,6 @@
|
|||
#undef CONFIG_DDR_ECC /* don't use ECC */
|
||||
#define SPD_EEPROM_ADDRESS {0x50}
|
||||
#define CONFIG_PROG_SDRAM_TLB 1
|
||||
#define CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG 1
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
|
|
Loading…
Add table
Reference in a new issue