Commit graph

1915 commits

Author SHA1 Message Date
Marek Vasut
48f54a2d74 mmc: sh_mmcif: Add DM and DT probing support
Add MMC DM and DT probing support into the SH MMCIF driver.
This patch abstracts out the common bits of the send command
and set ios functions, so they can be used both by DM and non
DM setups and adds the DM probe support.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2018-04-21 18:33:19 +02:00
Matt Pelland
ca4e7d674e mmc: mv_sdhci: zero out sdhci_host structure
The mv_sdhci driver was not zeroing the sdhci_host structure it
allocates causing random access violations in parts of the mmc core
where the "ops" member pointers are checked and called if not NULL.

Signed-off-by: Matt Pelland <mpelland@starry.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-04-17 10:39:30 +02:00
Marek Vasut
cb0b6b035a mmc: tmio: Rename Matsushita to TMIO
Synchronize the naming with Linux, call the common code TMIO.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-14 00:03:30 +02:00
Marek Vasut
cf39f3f304 mmc: renesas-sdhi: Wait after reconfiguring pins
The IP requires some time to recuperate after the IO pin
properties were changed. Add a delay to assure this.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:12:00 +02:00
Marek Vasut
5ee7c9dc77 mmc: matsushita-common: Add missing else
Fix minor rebase omission, the else was missing which triggered
two accesses to the register on 64bit variant of the IP.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:12:00 +02:00
Marek Vasut
f23b208ebe mmc: matsushita-common: Wait for command completion
Make sure to wait for the command to complete altogether, including
the trailing 8 clock cycles. This prevents the driver for accidentally
writing the CMD register too fast before the previous command fully
completed.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:12:00 +02:00
Marek Vasut
8dc9a10e49 mmc: matsushita-common: Correctly set mode in 16bit
The HOST_MODE register must be set to 0 when the IP is operated in 16bit
mode, otherwise 16bit access to the data FIFO may fail.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:12:00 +02:00
Marek Vasut
01c0151a36 mmc: matsushita-common: Special case only select registers in 16bit
There are only a few registerse used in the 16bit mode which are
32bit internally. Special-case only those in the IO accessors and
always write both halves. Any other register access is protected
from accidentally overwriting neighboring register.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:59 +02:00
Marek Vasut
f63968ba26 mmc: renesas-sdhi: Add Renesas SDR104/HS200 tuning support
Add code for PHY tuning required for SDR104/HS200 support on Renesas RCar.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:59 +02:00
Marek Vasut
0e2bd5aa49 mmc: matsushita-common: Export register access functions
Export the matsu_sd_{read,write}l() common register access
functions, so that they can be used by other drivers sharing
the common code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:59 +02:00
Marek Vasut
e10422f108 mmc: matsushita-common: Properly handle pin voltage configuration
Factor out the regulator handling into set_ios and add support for
selecting pin configuration based on the voltage to support UHS modes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:59 +02:00
Marek Vasut
58c35b17aa mmc: matsushita-common: Always check controller version
Handle the controller version even if quirks are set. The controller in
Renesas Gen3 SoCs does provide the version register, which indicates a
controller v10 and the controller does support internal DMA and /1024
divider.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:59 +02:00
Marek Vasut
a7b7401c78 mmc: matsushita-common: Handle bus width 0
Handle bus width 0 as 1-bit bus to assure valid content of
MATSU_SD_OPTION register WIDTH field.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:58 +02:00
Marek Vasut
635ae6fefa mmc: matsushita-common: Handle DMA completion flag differences
The DMA READ completion flag position differs on Socionext and Renesas
SoCs. It is bit 20 on Socionext SoCs and using bit 17 is a hardware bug
and forbidden. It is bit 17 on Renesas SoCs and bit 20 does not work on
them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:58 +02:00
Marek Vasut
78773f1467 mmc: matsushita-common: Handle Renesas div-by-1
On the Renesas version of the IP, the /1 divider is realized by
setting the clock register [7:0] to 0xff instead of setting bit
10 of the register. Check the quirk and handle accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:58 +02:00
Marek Vasut
f98833dbe6 mmc: matsushita-common: Add Renesas RCar quirks
Add a quirk to identify that the controller is Renesas RCar variant
of the Matsushita SD IP and another quirk indicating it can support
Renesas RCar HS200/HS400/SDR104 modes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:58 +02:00
Marek Vasut
147169d9c9 mmc: matsushita-common: Use mmc_of_parse()
Drop the ad-hoc DT caps parsing in favor of common framework function.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:58 +02:00
Marek Vasut
7cf7ef81ed mmc: renesas-sdhi: Handle 16bit IP
The Renesas RCar Gen2 chips have a mix of 32bit and 16bit variants
of the IP. There is no DT property which allows discerning those,
so what Linux does is it checks the size of the register area and
if it is 0x100, the IP is 16bit, otherwise the IP is 32bit. Handle
the distinction the same way.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:57 +02:00
Marek Vasut
c769e60990 mmc: uniphier: Allow passing quirks to the probe function
Certain instances of the SD IP require more elaborate digging
in the DT to figure out which variant of the SD IP is in use.
Allow explicit passing of the quirks into the probe function.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:57 +02:00
Marek Vasut
db1266d696 mmc: uniphier: Add support for 16bit variant
Add support for 16bit mutation of the Matsushita SD IP. Since some
registers are internally 32bit, the matsu_sd_{read,write}l() has
to special-case this 16bit variant a bit.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:57 +02:00
Marek Vasut
620fd85c0b mmc: uniphier: Drop useless check
Drop useless check in matsu_sd_{read,write}q(), this is only ever
called to read the data from FIFO and only when 64bit variant of
the block is used anyway.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:57 +02:00
Marek Vasut
12a510e23f mmc: uniphier: Factor out FIFO accessors
Add macros to generate the FIFO accessors, since the code is almost
the same with only minor differences. This is done in preparation
for adding 16bit variant of the IP.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:56 +02:00
Marek Vasut
7dfddc099d mmc: renesas-sdhi: Add Renesas SDHI Kconfig entry
Add Kconfig entry for the Renesas SDHI variant of the controller
and split the Makefile entries accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:56 +02:00
Marek Vasut
e94cad93b7 mmc: uniphier: Split out SoC specific bits from the driver
Factor out common code from the uniphier SD driver, change the prefix
of the functions from uniphier_sd_ to matsu_sd_ and create separate
renesas-sdhi.c driver. Thus far, all the code is still compiled when
CONFIG_UNIPHIER_MMC is selected and there is no functional change.
This patch is a preparation for further split of the SoC specific
parts of the Matsushita SD driver, used both on Uniphier and R-Car.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:56 +02:00
Mario Six
07dea2e737 treewide: Migrate CONFIG_FSL_ESDHC to Kconfig
Migrate the CONFIG_FSL_ESDHC option to Kconfig.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-08 18:31:05 -04:00
Jonathan Gray
8ae1f82988 mmc: use core clock frequency in bcm2835 sdhost
In raspberrypi-firmware 7fdcd00e00a42a1c91e8bd6f5eb8352fe9358557 and
later start.elf now sets the EMMC clock to 200 MHz.

According to Phil Elwell in
https://github.com/raspberrypi/firmware/issues/953
the SDHost controller shares the core/VPU clock and doesn't use
the EMMC clock.

Use the core clock id when determining the frequency to allow
U-Boot to work with recent versions of raspberrypi-firmware.
Otherwise U-Boot hangs at:

U-Boot 2018.03 (Mar 14 2018 - 20:36:00 +1100)

DRAM:  948 MiB
RPI 3 Model B (0xa02082)
MMC:   mmc@7e202000: 0, sdhci@7e300000: 1
Loading Environment from FAT...

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-05 13:17:43 +02:00
Tom Rini
80a66a55fa Merge git://git.denx.de/u-boot-x86 2018-03-30 18:17:23 -04:00
Tom Rini
0ca0a546b1 Merge git://git.denx.de/u-boot-riscv 2018-03-30 18:16:56 -04:00
Bernhard Messerklinger
0851f344d7 x86: mmc: Fix mapping of BAR memory
Use dm_pci_map_bar function for BAR mapping. This has the advantage
of clearing BAR flags and and only accepting mapped memory.

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-03-30 16:05:08 +08:00
Rick Chen
bf9ba4dbb0 mmc: ftsdc010: Merge nds32_mmc to ftsdc010
nsd32_mmc was created to support ftsdc010 dm.
It is not necessary to separate both, so merge it
to ftsdc010.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30 13:13:45 +08:00
Rick Chen
095c9f35d5 mmc: ftsdc010: Migrate CONFIG_FTSDC010_SDIO to Kconfig
Convert CONFIG_FTSDC010_SDIO to Kconfig.
So CONFIG_FTSDC010_SDIO can also be
removed from config_whitelist.txt.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30 13:13:45 +08:00
Rick Chen
cf52231a93 mmc: ftsdc010: Drop non-dm code
Only three defconfig(adp-ag101p_defconfig,
adp-ae3xx_defconfig, nx25-ae250_defconfig)
set CONFIG_FTSDC010=y. And they all also
enable CONFIG_DM_MMC. So the non-dm code
of ftsdc010 can be dropped now.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30 13:13:45 +08:00
Rick Chen
7459c887c5 mmc: ftsdc010: Support High-Speed mode
ftsdc010 dm driver has been disable High-Speed mode
as default to work around Andes AE3XX platform's problem,
because of it does not support High-Speed mode in
commit id 73cd56b2df.

But other platforms or SoCs maybe support this function.
So High-Speed mode can be enabled from dts with
cap-mmc-highspeed or cap-sd-highspeed property.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:34 +08:00
Philipp Tomsich
6837c58666 rockchip: sdhci: support 8bit bus-width
The Rockchip-specific SDHCI wrapper does not process the 'bus-width'
property in the SDHCI node. Consequently, the bus is always kept in
4bit mode, even if 8bit wide operation is available, supported and
requested in the DTS.

This change adds processing of the 'bus-width' property and sets the
host capability flag for an 8bit wide bus, if set to 8. As the logic
in sdhci.c does not support clearing the 4bit capability, we assume
that 4bit operation is always supported.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:47:08 +02:00
Tom Rini
b75643ad0a Merge git://git.denx.de/u-boot-sunxi 2018-03-14 13:27:14 -04:00
Patrick Delaunay
167f2c90f6 mmc: stm32: sdmmc2: add support for st, pin-ckinsdmmc_ckin
This patch adds "st,pin-ckin" support to activate sdmmc_ckin feature.
When using an external driver (a voltage switch transceiver),
it's advised to select SDMMC_CKIN feedback clock input to sample
the received data.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrick Delaunay
a72dd8ed95 mmc: stm32: sdmmc2: add hardware flow control support
The hardware flow control functionality is used to avoid
FIFO underrun (TX mode) and overrun (RX mode) errors.
The behavior is to stop SDMMC_CK during data transfer and
freeze the SDMMC state machines.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Heinrich Schuchardt
8be4e61d01 mmc: sunxi: support cd-inverted
With CONFIG_DM_MMC the BananaPi does not detect SD cards.

The sunxi device trees use the cd-inverted property to indicate that
the card detect is inverted.

This property is documented in Linux kernel devicetree/bindings/mmc/mmc.txt
The property is not marked as deprecated.

A similar patch was posted by Tuomas but is in status "Changes Requested".
https://patchwork.ozlabs.org/patch/850377/

This patch is a stripped down version of his patch.

Suggested-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-13 20:12:31 +05:30
Tom Rini
81f077f40f Merge git://git.denx.de/u-boot-sh 2018-03-05 20:24:17 -05:00
Masahiro Yamada
b08c8c4870 libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.

This commit moves the header code:
  include/libfdt.h         -> include/linux/libfdt.h
  include/libfdt_env.h     -> include/linux/libfdt_env.h

and replaces include directives:
  #include <libfdt.h>      -> #include <linux/libfdt.h>
  #include <libfdt_env.h>  -> #include <linux/libfdt_env.h>

Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-05 10:16:28 -05:00
Marek Vasut
d6eb25c2f1 mmc: uniphier-sd: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-05 10:59:37 +01:00
Vipul Kumar
3ccc207a30 mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ
and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 16:44:10 +01:00
Vipul Kumar
5dc5a53c5e mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQ
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQ
and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 16:44:10 +01:00
Tom Rini
4bafceff0e Merge git://git.denx.de/u-boot-mmc 2018-02-25 22:28:59 -05:00
Jean-Jacques Hiblot
beac7d33d9 mmc: omap_hsmmc: use a default 52MHz max clock rate if none is specified
mmc_of_parse() doesn't set a default value if none is available in DT.
In that case, use a default 52MHz clock rate.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Jean-Jacques Hiblot
27a4b3bc4c mmc: omap_hsmmc: make it possible to compile out ADMA support
Some platforms don't have ADMA controllers. For those platforms, compiling
it out reduces the size of the binary by about 600 bytes.
Leaving the support in doesn't break things as the driver checks at runtime
if the ADMA2 controller is present.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Jean-Jacques Hiblot
c7d08d80c3 mmc: omap_hsmmc: compile out write support if not needed
This reduces the size of the binary by about 196 bytes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Jean-Jacques Hiblot
45530e3943 mmc: omap_hsmmc: do not embed struct mmc in struct omap_hsmmc_plat
The area for struct mmc can be allocated dynamically. It greatly reduces
the size of struct omap_hsmmc_plat. This is useful in cases where the board
level code declares one or two struct omap_hsmmc_plat because it doesn't
use the Driver Model.

This saves around 740 bytes for the am335x_evm SPL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Alexander Kochetkov
76584e3398 mmc: fix off-by-one bug in mmc_startup_v4()
MMC card with EXT_CSD_REV value 9 will trigger off-by-one
bug while accessing mmc_versions array. The patch fix that.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
2018-02-23 15:57:41 +09:00
Faiz Abbas
8a856db238 mmc: Drop unnecessary case for mmc_probe()
Drop the unnecessary empty function case for mmc_probe().

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-02-23 15:56:33 +09:00
Marek Vasut
0b75cc3f13 mmc: uniphier-sd: Add compatible strings for RCar Gen2
Add DT compatible strings for RCar Gen2 SoCs, so that this driver
can bind with them. Unlike Gen3, which uses 64bit FIFO, the Gen2
uses 16bit FIFO.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-02-23 00:06:05 +01:00
Jaehoon Chung
1b313aa3e3 mmc: synchronize the sequence with enum bus_mode in mmc.h
If some configs are disabled, number of freqs array will not assigned to
correct value with bus_mode.
Synchornize the ordering with enum bus_mode in mmc.h.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-21 18:04:25 +09:00
Alex Kiernan
4a41fec589 mmc: Fix uninitialised priv member
When using omap_hsmmc without the device model then the allocation
of mmc->priv ends up uninitialised.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-02-19 17:00:33 +09:00
Jean-Jacques Hiblot
ace1bed327 mmc: fix bug in mmc_startup_v4()
The correspondence between mmc versions as used in u-boot and the version
numbers reported in register EXT_CSD_REV is wrong for versions above and
including MMC_VERSION_4_41. All those versions were shifted by one:
real 4.5 hardware appeared to be MMC_VERSION_5_0.

Fix this by adding the missing version in the correspondence table.

Reported-by: eil Eilmsteiner Heribert <eil@keba.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-02-19 16:59:33 +09:00
Jean-Jacques Hiblot
a0276f3eee mmc: Fix bug in sd_set_card_speed()
After settings the speed of the sd with the switch command, a check is
done to make sure that the new speed has been set. The current check has a
masking error: speed are encoded on 4 bits only.
Fix it by masking the upper bits.

This fixes a problem seen with QEmu emulating a vexpress-a15.

Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Jonathan Gray <jsg@jsg.id.au>
2018-02-19 16:59:21 +09:00
Jean-Jacques Hiblot
04f9f8be83 mmc: omap_hsmmc: add signal voltage selection support
I/O data lines of UHS SD card operates at 1.8V when in UHS speed
mode (same is true for eMMC in DDR and HS200 modes). Add support
to switch signal voltage to 1.8V in order to support
UHS cards and eMMC HS200 and DDR modes.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
90321dce0d mmc: omap_hsmmc: allow mmc clock to be gated
mmc core has defined a new parameter *clk_disable* to gate the clock.
Disable the clock here if *clk_disable* is set.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
42182c9b9c mmc: omap_hsmmc: implement send_init_stream callback
This callback is used to send the 74 clock cycles after power up.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
3149c13ac3 mmc: omap_hsmmc: update mmc->clock with the actual bus speed
When the clock is applied, compute the actual value of the clock. It may be
slightly different from the requested value (max freq, divisor threshold)

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
bcc6bd84d4 mmc: omap_hsmmc: allow the simple HS modes to use the default pinctrl
The default configuration is usually working fine for the the HS modes.
Don't enforce the presence of a dedicated pinmux for the HS modes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
2d28eeda33 mmc: omap_hsmmc: Add support to get pinctrl values and max frequency for different hw revisions
AM572x SR1.1 requires different IODelay values to be used than that used
in AM572x SR2.0. These values are populated in device tree. Add
capability in omap_hsmmc driver to extract IOdelay values for different
silicon revision. The maximum frequency is also reduced when using a ES1.1.
To keep the ability to boot both revsions with the same dtb, those values
can be provided by the platform code.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
33c1d77f4a mmc: omap_hsmmc: Add support to set IODELAY values
The data manual of J6/J6 Eco recommends to set different IODELAY values
depending on the mode in which the MMC/SD is enumerated in order to
ensure IO timings are met.

Add support to parse mux values and iodelay values from device tree
and set these depending on the enumerated MMC mode.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
2d7482cf79 mmc: omap_hsmmc: use mmc_of_parse to populate mmc_config
Use the mmc_of_parse library function to populate mmc_config instead of
repeating the same code in host controller driver.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
a4efd73773 mmc: omap_hsmmc: Reduce the max timeout for reset controller fsm
>From OMAP3 SoCs (OMAP3, OMAP4, OMAP5, AM572x, AM571x), the DAT/CMD lines
reset procedure section in TRM suggests to first poll the SRD/SRC bit
until it is set to 0x1. But looks like that bit is never set to 1 and there
is an observable delay of 1sec everytime the driver tries to reset DAT/CMD.
(The same is observed in linux kernel).

Reduce the time the driver waits for the controller to set the SRC/SRD bits
to 1 so that there is no observable delay.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
2faa1a302b mmc: omap_hsmmc: Workaround for errata id i802
According to errata i802, DCRC error interrupts
(MMCHS_STAT[21] DCRC=0x1) can occur during the tuning procedure.

The DCRC interrupt, occurs when the last tuning block fails
(the last ratio tested). The delay from CRC check until the
interrupt is asserted is bigger than the delay until assertion
of the tuning end flag. Assertion of tuning end flag is what
masks the interrupts. Because of this race, an erroneous DCRC
interrupt occurs.

The suggested  workaround is to disable DCRC interrupts during
the tuning procedure which is implemented here.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
14761caeee mmc: omap_hsmmc: Add tuning support
HS200/SDR104 requires tuning command to be sent to the card. Use
the mmc_send_tuning library function to send the tuning
command and configure the internal DLL.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Kishon Vijay Abraham I
9b3fc21837 mmc: omap_hsmmc: Enable DDR mode support
In order to enable DDR mode, Dual Data Rate mode bit has to be set in
MMCHS_CON register. Set it here.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
8fc238bfad mmc: omap_hsmmc: set MMC mode in the UHSMS bit field
Use the timing parameter set in the MMC core to set the
mode in UHSMS  bit field. This is in preparation for
adding HS200 support in omap hsmmc driver.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Kishon Vijay Abraham I
b594481709 mmc: omap_hsmmc: add support to set default io voltage
"ti,dual-volt" is used in linux kernel to set the voltage capabilities.
For host controller dt nodes that doesn't have "ti,dual-volt",
it's assumed 1.8v is the io voltage. This is not always true (like in
the case of beagle-x15 where the io lines are connected to 3.3v).
Hence if "no-1-8-v" property is set, io voltage will be set to 3v.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Kishon Vijay Abraham I
48a2f11443 mmc: omap_hsmmc: cleanup omap_hsmmc_set_ios
No functional change. Move bus width configuration setting to a
separate function and invoke it only if there is a change in the
bus width.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
5baf543e52 mmc: omap_hsmmc: cleanup clock configuration
Add a separate function for starting the clock, stopping the clock and
setting the clock. Starting the clock and stopping the clock can
be used irrespective of setting the clock (For example during iodelay
recalibration).
Also set the clock only if there is a change in frequency.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Masahiro Yamada
d4d64889b0 mmc: use pr_* log functions
Use pr_* log functions from Linux.  They can be enabled/disabled
via CONFIG_LOGLEVEL.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-19 16:56:54 +09:00
Adam Ford
1811a928c6 Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig
config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options.  Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-08 19:09:03 -05:00
Adam Ford
99bec1aead Convert CONFIG_APBH_DMA et al to Kconfig
This converts the following to Kconfig:
   CONFIG_APBH_DMA
   CONFIG_APBH_DMA_BURST
   CONFIG_APBH_DMA_BURST8

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
[trini: Add in MMC as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-08 12:48:11 -05:00
Peng Fan
51313b49f2 mmc: fsl_esdhc: support SDR104 and HS200
Introduce SDR104 and HS200 support
The implementation takes linux kernel sdhci.c and sdhci-esdhc-imx.c
as reference.
 - Implement esdhc_change_pinstate to dynamically change pad settings
 - Implement esdhc_set_timing
 - Implement esdhc_set_voltage to switch voltage
 - Implement fsl_esdhc_execute_tuning to execute time process
 - Enlarge the cfg->f_max to 200MHz.
 - Parse fsl,tuning-step, fsl,tuning-start-tap and
   fsl,strobe-dll-delay-target from device tree.
 - Parse no-1-8-v property
 - Introduce esdhc_soc_data to indicate the flags and caps

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-04 12:00:58 +01:00
Peng Fan
59d3782cda mmc: fsl_esdhc: add strobe and tuning entry
Add entries that will be used for tuning control.
The whole layout not changed, just expand reserved3[84] and
rename other reservedx in sequence.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-04 12:00:58 +01:00
Peng Fan
eec2d43795 mmc: fsl_esdhc: support i.MX8M
Support i.MX8M in fsl esdhc driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Alexander Graf
c8a73a26d6 mmc: Add bcm2835 sdhost controller
The BCM2835 family of SoCs has 2 different SD controllers: One based on
the SDHCI spec and a custom, home-grown one.

This patch implements a driver for the latter based on the Linux driver.
This is needed so that we can make use of device trees that assume driver
presence of both SD controllers.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:32 -05:00
Tom Rini
1d12a7c8cd Merge git://git.denx.de/u-boot-spi 2018-01-26 07:46:34 -05:00
Jun Nie
2f516e4aa2 mmc: Poll for broken card detection case
Poll for broken card detection case instead of return
no card detected.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
2018-01-24 16:12:03 +09:00
Jaehoon Chung
c0fafe64a5 mmc: fix to assign to correct clock value when clock is enabling
When clock is enabling, it's assigned to 0 as mmc->clock.
Then it can't initialize any card.
Fix to assign to correct clock value as mmc->cfg->f_min or f_max.

Fixes: 9546eb92cb ("mmc: fix the wrong disabling clock")
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2018-01-24 16:08:27 +09:00
Álvaro Fernández Rojas
48263504c8 wait_bit: use wait_for_bit_le32 and remove wait_for_bit
wait_for_bit callers use the 32 bit LE version

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Benoît Thébaudeau
b9b4f146c9 mmc: fsl_esdhc: Fix i.MX53 eSDHCv3 clock
Commit 4f425280fa ("mmc: fsl_esdhc: Allow all supported prescaler
values") made it possible to set SYSCTL.SDCLKFS to 0 in SDR mode on
i.MX, thus bypassing the SD clock frequency prescaler, in order to be
able to get higher SD clock frequencies in some contexts. However, that
commit missed the fact that this value is illegal on the eSDHCv3
instance of the i.MX53. This seems to be the only exception on i.MX,
this value being legal even for the eSDHCv2 instances of the i.MX53.

Fix this issue by changing the minimum prescaler value for the single
instance of the i.MX53 eSDHCv3 controller.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-22 14:17:13 +09:00
Jaehoon Chung
9546eb92cb mmc: fix the wrong disabling clock
When power is off, clock is not disabling.
Because it's passed to 1, mmc->clock should be set to f_min value.
Some drivers can't initialize the eMMC/SD card with current status.

This patch is to fix the disabling clock value to 0.

Fixes: 2e7410d76a ("mmc: disable the mmc clock during power off")

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2018-01-22 14:15:34 +09:00
Masahiro Yamada
61f2e5ee12 mmc: sdhci: change data transfer failure into debug message
During the tuning, drivers repeat data transfer, changing timing
parameters in the controller hardware.  So, the tuning commands
(CMD19 for SD, CMD21 for eMMC) fail, and this is not a problem
at all.

Showing "Error detected..." in normal operation just make users
upset.  This should not be shown.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
dd43e2a6bd mmc: sdhci-cadence: add HS200 support
Add HS200 timing setting and the MMC tuning callback.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
4041bf7f8a mmc: sdhci-cadence: call mmc_of_parse()
This is needed to parse more capabilities such as mmc-hs200-1_8v.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
954a963146 mmc: sdhci-cadence: use bitfield access macros for cleanup
This driver is a counterpart from the one in Linux.  Follow the
clean-up I did in Linux.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
be165fbbf1 mmc: sdhci: do not overwrite host_caps in sdhci_setup_cfg()
This line overwrites host_cap that has been set by drivers and/or
helpers like mmc_of_parse().  Accumulate capabilities flags.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
4b28f7bc93 mmc: let mmc_of_parse() fail for insane bus-width value
You must fix your DT if it specifies insane bus-width, for example,
  bus-width = <3>;

debug() is not displayed in usual configuration, so people will not
even notice weirdness.  Use dev_err() instead, then let it fail.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
c42ee367fd mmc: do not overwrite cfg->f_max if "max-frequency" if missing
mmc_of_parse() in U-Boot is a pussy helper; it sets cfg->f_max to
52MHz even if DT does not provide "max-frequency" at all.  This can
overwrite cfg->f_max that may have been set to a reasonable default.

As the DT binding says, "max-frequency" is an optional property.
Do nothing if DT does not specify it.  This is the behavior of
mmc_of_parse() in Linux.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Kishon Vijay Abraham I
29171dcfaa mmc: omap_hsmmc: Fix incorrect bit operations for disabling a bit
omap_hsmmc driver uses "|" in a couple of places for disabling a bit.
While it's okay to use it in "mmc_reg_out" (since mmc_reg_out has a
_mask_ argument to take care of resetting a bit), it's incorrectly used
for resetting flags in "omap_hsmmc_send_cmd".

Fix it here by using "&= ~()" to reset a bit.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:23 -05:00
Kishon Vijay Abraham I
866bb98468 mmc: omap_hsmmc: Enable Auto command (CMD12) enable
Instead of sending STOP TRANSMISSION command from MMC core, enable
the auto command feature so that the Host Controller issues CMD12
automatically when last block transfer is completed.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:23 -05:00
Kishon Vijay Abraham I
f0d53e88a6 mmc: omap_hsmmc: Add support for DMA (ADMA2)
The omap hsmmc host controller can have the ADMA2 feature. It brings better
read and write throughput.
On most SOC, the capability is read from the hl_hwinfo register. On OMAP3,
DMA support is compiled out.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:17 -05:00
Jean-Jacques Hiblot
741726ae4c Revert "omap_hsmmc: update struct hsmmc to accommodate omap3 from DT"
This reverts commit 46831c1a4c.
This reserved area at the beginning of struct hsmm, will be used later to
support ADMA

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-18 22:04:21 -05:00
Peng Fan
db359efd59 mmc: fsl_esdhc: Fix eMMC 1.8v setting issue
Current USDHC driver will reset VSELECT to 0 (3.3v) during mmc init,
then set to 1 for 1.8v eMMC I/O. When booting from eMMC, since ROM has
already set VSELECT to 1.8v before running the u-boot. This reset in
USDHC driver causes a short 2.2v pulse on CMD pin.

Fix this issue by not reset VSELECT to 0 when 1.8v flag is set.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-13 00:08:44 +09:00
Jean-Jacques Hiblot
b7a6e2c9c3 mmc: remove hc_wp_grp_size from struct mmc if not needed
hc_wp_grp_size is needed only if hardware partitionning is used.
On ARM removing it saves about 30 bytes of code space.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
173c06dfcc mmc: don't read the size of eMMC enhanced user data area in SPL
This information is only used by the "mmc info" command.
On ARM removing this information from SPL saves about 140 of code space.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
e6fa5a5461 mmc: compile out erase and write mmc commands if write operations are not enabled
Also remove erase_grp_size and write_bl_len from struct mmc as they are
not used anymore. On ARM, removing them saves about 100 bytes of code
space in SPL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
5b2e72f327 mmc: read ssr only if MMC write support is enabled
The content of ssr is useful only for erase operations.
on ARM, removing sd_read_ssr() saves around 300 bytes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
d6400c3f85 mmc: add a Kconfig option to enable the support for MMC write operations
This allows using CONFIG_IS_ENABLED(MMC_WRITE) to compile out code
needed only if write support is required.
The option is added for u-boot and for SPL

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
58a6fb7b04 mmc: reworked version lookup in mmc_startup_v4
Using a table versus a switch() structure saves a bit of space

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
baef2070a4 mmc: compile out more code if support for UHS and HS200 is not enabled
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:23 +09:00
Jean-Jacques Hiblot
9b79dbd201 mmc: atmel: when sending a data command, use the provided block size
struct mmc_data contains the block size to use for the data transfer.
Use this information instead of using the default value or the block length
information stored in struct mmc.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:23 +09:00
Jean-Jacques Hiblot
49f89252ed dm: mmc: sandbox: Update SD card emulation
The SDcard initialization procedure does a few more things than it did earlier:
* switch the bus width even for 1-bit bus width
* check that speed has been properly set (in resp[4] of SD_CMD_SWITCH_FUNC)

Update the SD simulator to handle those requests gracefully.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
cf17789e07 mmc: make optional the support for eMMC hardware partitioning
Not all boards have an eMMC and not all users have a need for this.
Allow to compile it out. By default it is still included.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
f99c2efe56 mmc: make UHS and HS200 optional
Supporting USH and HS200 increases the code size as it brings in IO voltage
control, tuning and fatter data structures.
Use Kconfig configuration to select which of those features should be
built in.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
d8e3d42089 mmc: convert most of printf() to pr_err() and pr_warn()
This allows to compile out the log message by tweaking the LOGLEVEL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
f7d5dffc65 mmc: don't use malloc_cache_aligned()
Not using this function reduces the size of the binary. It's replaces by
a standard malloc() and the alignment requirement is handled by an
intermediate buffer on the stack.

Also make sure that the allocated buffer is freed in case of error.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
1de06b9fa5 mmc: fix for old MMCs (below version 4)
The ext_csd is allocated only for MMC above version 4. The compare will
crash or fail for older MMCs.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
1da8eb598f mmc: all hosts support 1-bit bus width and legacy timings
Make sure that those basic capabilities are advertised by the host.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
00e446fa04 mmc: Fixed a problem with old sd or mmc that do not support High speed
As the legacy modes were not added to the list of supported modes, old
cards that do not support other modes could not be used.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
7abff2c3b3 dm: mmc: update mmc_of_parse()
* convert to livetree API
* don't fail because of an invalid bus-width, instead default to 1-bit.
* recognize 1.2v DDR and 1.2v HS200 flags

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
52d241dfba mmc: dump card and host capabilities if debug is enabled
This is a useful information while debugging the initialization process or
performance issues.
Also dump this information with the other mmc info if the verbose option
is selected

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jaehoon Chung
ef1614acf8 mmc: meson_gx_mmc: fix the complie error
mmc_set_clock() is changed.
This patch is for fixing complie error.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
9215ef5ed5 dm: mmc: Add a library function to parse generic dt binding
Add a new function to parse host controller dt node and
set mmc_config. This function can be used by mmc controller
drivers to set the generic mmc_config.
This function can be extended to set other UHS mode caps
once UHS mode support is added.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
9815e3ba80 mmc: add a library function to send tuning command
HS200/SDR104 requires tuning command to be sent to the card.
Add a simple function to send tuning command and to read and
compare the received data with the tuning block pattern.
This function can be used by platform driver to perform DLL
tuning.
This patch is similar to
commit 996903de92f0 ("mmc: core: add core-level function for
sending tuning commands") added in linux kernel.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
bc1e3272ff mmc: use the right voltage level for MMC DDR and HS200 modes
HS200 only supports 1.2v and 1.8v signal voltages. DDR52 supports 3.3v/1.8v
or 1.2v signal voltages.
Select the lowest voltage available when using those modes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
83dc42271f mmc: Retry some MMC cmds on failure
With certain SD cards like Kingston 8GB/16GB UHS card, it is seen that
MMC_CMD_ALL_SEND_CID cmd fails on first attempt, but succeeds
subsequently. Therefore, retry MMC_CMD_ALL_SEND_CID cmd a few time
as done in Linux kernel.
Similarly, it is seen that MMC_CMD_SET_BLOCKLEN may fail on first
attempt, therefore retry this cmd a few times as done in kernel.

To make it clear that those are optionnal workarounds, a new Kconfig
option 'MMC_QUIRKS' is added (enabled by default).

Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
01298da31d mmc: Change mode when switching to a boot partition
Boot partitions do not support HS200. Changing to a lower performance mode
is required to access them.
mmc_select_mode_and_width() and sd_select_mode_and_width() are modified to
make it easier to call them outside of the initialization context.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
04a2ea248f mmc: disable UHS modes if Vcc cannot be switched on and off
If a power cycle cannot be done on Vcc, it is safer not to try the UHS
modes because we wouldn't be able to recover from an error occurring
during the UHS initialization.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
c10b85d6c2 mmc: Add support for UHS modes
Add UHS modes to the list of supported modes, get the UHS capabilites of
the SDcard and implement the procedure to switch the voltage (UHS modes
use 1v8 IO lines)
During the voltage switch procedure, DAT0 is used by the card to signal
when it's ready. The optional card_busy() callback can be used to get this
information from the host driver.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
634d484940 mmc: add HS200 support in MMC core
Add HS200 to the list of supported modes and introduce tuning in the MMC
startup process.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
ec841209a7 mmc: Add a execute_tuning() callback to the mmc operations.
Tuning is a mandatory step in the initialization of SDR104 and HS200 modes.
This callback execute the tuning process.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
2e7410d76a mmc: disable the mmc clock during power off
There is no point in having the mmc clock enabled during
power off. Disable the mmc clock. This is similar to how it's
programmed in Linux Kernel.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
35f6782055 mmc: add a new mmc parameter to disable mmc clock
mmc clock has to be disabled in certain cases like during
the voltage switch sequence. Modify mmc_set_clock function
to take disable as an argument that signifies if the
clock has to be enabled or disabled.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
fb7c3beb51 mmc: add power cyle support in mmc core
mmc/sd specification requires vdd to be disabled for 1 ms
and then enabled again during power cycle. Add a
function in mmc core to perform power cycle and set
the io signal to it's initial state.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
318a7a576b mmc: Add a new callback function to perform the 74 clocks cycle sequence
Add a new callback function *send_init_stream* which start a sequence of
at least 74 clock cycles.
The mmc core uses *mmc_send_init_stream* in order to invoke the callback
function. This will be used during power cycle where the specification
requires such a sequence after power up.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
aff5d3c83f mmc: Enable signal voltage to be selected from mmc core
Add a new function *mmc_set_signal_voltage* in mmc core
which can be used during mmc initialization to select the
signal voltage. Platform driver should use the set_ios
callback function to select the signal voltage.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
2a4d212f71 mmc: make mmc_set_ios() return status
set_ios callback has a return value of 'int' but the mmc_set_ios()
function ignore this. Modify mmc_set_ios() and the callers of mmc_set_ios() to
to return the error status.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
3862b85474 mmc: refactor MMC startup to make it easier to support new modes
The MMC startup process currently handles 4 modes. To make it easier to
add support for more modes, let's make the process more generic and use a
list of the modes to try.
The major functional change is that when a mode fails we try the next one.
Not all modes are tried, only those supported by the card and the host.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
d0c221fe73 mmc: refactor SD startup to make it easier to support new modes
The SDcard startup process currently handles only 2 modes. To make it
easier to add support for more modes, let's make the process more generic
and use a list of the modes to try.
The major functional change is that when a mode fails we try the next one.
Not all modes are tried, only those supported by the card and the host.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
05038576e0 mmc: use mmc modes to select the correct bus speed
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
4c9d2aaa7e mmc: Add a function to dump the mmc capabilities
This adds a simple helper function to display information (bus width and
mode) based on a capability mask. Useful for debug.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:03 +09:00
Jean-Jacques Hiblot
35f9e196f9 mmc: introduce mmc modes
no functionnal changes.
In order to add the support for the high speed SD and MMC modes, it is
useful to track this information.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:03 +09:00
Jean-Jacques Hiblot
7382e691ca mmc: add a function to read and test the ext csd (mmc >= 4)
This will be reused later in the selection of high speed and ddr modes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:03 +09:00
Jean-Jacques Hiblot
dfda9d88e5 mmc: make ext_csd part of struct mmc
The ext csd is used for comparison many times. Keep a reference content
of the ext csd in the struct mmc to avoid reading multiple times

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:03 +09:00
Jean-Jacques Hiblot
c744b6f6dc mmc: move the MMC startup for version above v4.0 in a separate function
no functionnal change. This is only to further reduce the size o
mmc_startup().

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:03 +09:00
Jean-Jacques Hiblot
8ac8a26304 mmc: split mmc_startup()
No functionnal change here. The function is really big and can be split.
The part related to bus configuration are put in 2 separate functions: one
for MMC and one for SD.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:03 +09:00
Jean-Jacques Hiblot
06ec045fee mmc: dm: get the IO-line and main voltage regulators from the dts
Get a reference to the regulator devices from the dts and store them
in the struct mmc for later use.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:03 +09:00
Heinrich Schuchardt
bb7b4ef370 mmc: sdhci: do not compare pointer to 0
data is defined as struct mmc_data *data.
So it should not be compared to 0.

Problem identified with Coccinelle.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-12 18:11:03 +09:00
Jorge Ramirez-Ortiz
713e6815d9 mmc: sdhci: don't clear SDHCI_INT_STATUS register during CMD_INHIBIT
Fixes emmc initialization regression on the db410c platform.

Clearing this register while SDHCI_PRESENT_STATE reports
SDHCI_CMD_INHIBIT leads to undefined behaviour on the db410c.

When commit 7dde50 was merged (mmc: sdhci: Wait for SDHCI_INT_DATA_END
when transferring), SDHCI transfers transitioned to wait for bit
SDHCI_INT_DATA_END before flagging transfers done.

Without this patch, the db410 platform fails to initialize its eMMC
due to all of its transfers timing out (SDHCI_INT_DATA_END is never
raised after all the blocks have been transferred).

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-12 18:11:03 +09:00
Felix Brack
339d578900 mmc: sanitize includes for DM i2c
This patch fixes some warnings when building boards that do not define
DM_I2C_COMPAT i.e. boards that entirely rely on the new i2c layer.
Signed-off-by: Felix Brack <fb@ltec.ch>
2018-01-12 18:11:03 +09:00
Suniel Mahesh
0e1746acac drivers: mmc: Avoid memory leak in case of failure
priv pointer should be freed before returning with an error value
from exynos_dwmci_get_config().

Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Signed-off-by: Raghu Bharadwaj <raghu@techveda.org>
2018-01-12 18:11:03 +09:00
Suniel Mahesh
18e7c8f6aa drivers: mmc: Change buffer type in ALLOC_CACHE_ALIGN_BUFFER macro
__be32_to_cpu() accepts argument of type __be32. This patch changes
type of the buffer in ALLOC_CACHE_ALIGN_BUFFER macro to __be32, which
is then passed to __be32_to_cpu().
This prevents sparse build warnings.
drivers/mmc/mmc.c: warning: cast to restricted __be32

Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Signed-off-by: Karthik Tummala <karthik@techveda.org>
2018-01-12 18:11:03 +09:00
Marek Vasut
af098530e5 mmc: uniphier-sd: Add R8A77995 D3 compatible
Add new compatible to the Uniphier SD driver for R8A77995 D3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:26 +01:00
Marek Vasut
6ba2382f42 mmc: uniphier-sd: Add R8A77970 V3M compatible
Add new compatible to the Uniphier SD driver for R8A77970 V3M SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:26 +01:00
Ludovic Desroches
327713a64a mmc: atmel_sdhci: not on capabilities to set gck rate
The capabilities have default values which doesn't reflect the reality
when it concerns the base clock and the mul value. Use a fixe rate
for the gck. 240 MHz is an arbitrary choice, it is a multiple of the
maximum SD clock frequency handle by the controller and it allows to
get a 400 kHz clock for the card initialisation.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-11-29 22:30:50 -05:00
Rick Chen
73cd56b2df nds32: ftsdc010: Fix SD detech fail on AE3XX.
AE3XX can not support SD high-speed mode.
SW can work-around by removing HS capibility.

Signed-off-by: Rick Chen <rick@andestech.com>
2017-11-30 10:04:36 +08:00
Rick Chen
1a9db640b4 nds32: ftsdc010: fix wait status error coding.
Bit of DATA_END and DATA_CRC_OK shall be checked for
returning pass or fail of a request.

Signed-off-by: Rick Chen <rick@andestech.com>
2017-11-30 10:04:30 +08:00
Rick Chen
252185f224 nds32: ftsdc010: Support ftsdc010 DM.
ftsdc010 support device tree flow.

Signed-off-by: Rick Chen <rick@andestech.com>
2017-11-30 10:01:50 +08:00
Rick Chen
9f678ab139 nds32: mmc: Support ftsdc010 DM.
Add nds32_mmc to support ftsdc010 dm flow.

Signed-off-by: Rick Chen <rick@andestech.com>
2017-11-30 09:59:09 +08:00
Patrice Chotard
5829fe2d59 mmc: arm_pl180_mmci: add .getcd callback
Add .getcd callback to check is MMC card is present

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-11-17 07:44:13 -05:00
Patrice Chotard
5f256fe71d mmc: arm_pl180_mmci: add clock support
Allow to get and enable MMC related clock

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-11-17 07:44:13 -05:00
Patrice Chotard
9035bb7432 mmc: arm_pl180_mmci: add bus_width DT property support
Allow to get "bus-width" property from device tree

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-11-17 07:44:13 -05:00
Patrice Chotard
3c0dbed232 mmc: arm_pl180_mmci: adapt driver to DM usage
Convert this driver to driver model.
This driver is also used by VEXPRESS platforms which doesn't
use driver model.

Tested on STM32F746 and STM32F769 platforms.

Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-11-17 07:44:13 -05:00
Patrice Chotard
cb0060e836 mmc: arm_pl180_mmci: update arm_pl180_mmci_init() prototype
Update arm_pl180_mmci_init() prototype by adding struct mmc**
param. This is needed before converting this driver to driver model
in order to use arm_pl180_mmci_init() in driver model and in none
driver model implementation

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-11-17 07:44:13 -05:00
Benoît Thébaudeau
bcfb365375 mmc: fsl_esdhc: Fix PIO timeout
The following error has been observed on i.MX25 with a high-speed SDSC
card:
    Data Write Failed in PIO Mode.

It was caused by the timeout set on PRSSTAT.BWEN, which was triggered
because this bit takes 15 ms to be set after writing the first block to
DATPORT with this card. Without this timeout, all the blocks are
properly written.

This timeout was implemented by decrementing a variable, so it was
depending on the CPU frequency. Fix this issue by setting this timeout
to a long enough absolute duration (500 ms).

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-11-07 10:26:27 +01:00
Patrice Chotard
3bc599c956 stm32: fix STMicroelectronics copyright
Uniformize STMicroelectronics copyrights headers for STM32
related code.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-11-06 09:51:01 -05:00
Patrice Chotard
fb48bc448c sti: fix STMicroelectronics copyright
Uniformize all STMicroelectronics copyrights headers for STi
related code.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-11-06 09:51:01 -05:00
Christophe Kerello
6c36e97be6 mmc: stm32_sdmmc2: increase polling status register delay
MMC commands like MMC_CMD_ALL_SEND_CID or MMC_CMD_SEND_CSD can reach
500 us. This patch increases the polling status register delay to avoid
a timeout on a command.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-10-16 09:42:51 -04:00
Patrice Chotard
53c656a85e dm: mmc: remove DM_MMC_OPS for STM32_SDMMC
Since e7881d85 "dm: mmc: Drop CONFIG_DM_MMC_OPS" DM_MMC_OPS
is no more used, remove it from STM32_SDMMC2 dependencies

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-10-08 16:19:56 -04:00
Masahiro Yamada
9b643e312d treewide: replace with error() with pr_err()
U-Boot widely uses error() as a bit noisier variant of printf().

This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:

  # define __compiletime_error(message) __attribute__((error(message)))

This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux.  (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)

Let's convert error() into now treewide-available pr_err().

Done with the help of Coccinelle, excluing tools/ directory.

The semantic patch I used is as follows:

// <smpl>
@@@@
-error
+pr_err
 (...)
// </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-10-04 11:59:44 -04:00
Masahiro Yamada
3d3108d459 mmc: sdhci-cadence: set timing mode register depending on frequency
The MMC framework in U-Boot does not support a systematic API for
timing switch like mmc_set_timing() in Linux.

U-Boot just provides a hook to change the clock frequency via
mmc_set_clock().  It is up to drivers if additional register
settings are needed.

This driver needs to set a correct timing mode into a register when
it migrates to a different speed mode.  Only increasing clock frequency
could result in setup/hold timing violation.

The timing mode should be decided by checking MMC_TIMING_* like
drivers/mmc/host/sdhci-cadence.c in Linux, but "timing" is not
supported by U-Boot for now.  Just use mmc->clock to decide the
timing mode.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-09-29 11:34:22 +09:00
Marek Vasut
9f13021f81 mmc: uniphier-sd: Add vqmmc regulator support
Add initial support for setting the vqmmc regulator. Since we do not
support 1V8 modes, set the regulator to 3V3 and enable it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-09-29 11:17:29 +09:00
Marek Vasut
d6c40031d5 mmc: uniphier-sd: Update the file to match V3 patchset
Old version of the uniphier-sd 64bit IO support patchset V1 was
applied by the maintainer, update the uniphier-sd.c with the
changes from the V3 of the patchset.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-09-29 11:14:14 +09:00
Patrice Chotard
b312c590bc mmc: Add MMC support for stm32h7 Socs
This patch adds SD/MMC support for STM32H7 SoCs.

Here is an extraction of SDMMC main features, embedded in
STM32H7 SoCs.
The SD/MMC block include the following:
 _ Full compliance with MultiMediaCard System Specification
   Version 4.51. Card support for three different databus modes:
   1-bit (default), 4-bit and 8-bit.
 _ Full compatibility with previous versions of MultiMediaCards
   (backward compatibility).
 _ Full compliance with SD memory card specifications version 4.1.
   (SDR104 SDMMC_CK speed limited to maximum allowed IO speed,
    SPI mode and UHS-II mode not supported).
 _ Full compliance with SDIO card specification version 4.0.
   Card support for two different databus modes: 1-bit (default)
   and 4-bit. (SDR104 SDMMC_CK speed limited to maximum allowed IO
   speed, SPI mode and UHS-II mode not supported).
 _ Data transfer up to 208 Mbyte/s for the 8 bit mode.
   (depending maximum allowed IO speed).
 _ Data and command output enable signals to control external
   bidirectional drivers.

The current version of the SDMMC supports only one SD/SDIO/MMC card
at any one time and a stack of MMC Version 4.51 or previous.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-28 20:23:19 +09:00
Tom Rini
78cb000b84 Merge git://git.denx.de/u-boot-mmc 2017-09-25 17:28:16 -04:00
Jean-Jacques Hiblot
8ff7763d62 regulator: pbias: Add PBIAS regulator for proper voltage switching on MMC1
In the TI SOCs a PBIAS cell exists to provide a bias voltage to the MMC1
IO cells. Without this bias voltage these I/O cells can not function
properly. The PBIAS cell is controlled by software.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-22 23:23:54 +09:00
Marek Vasut
b24633df31 mmc: uniphier-sd: Add support for R8A7795 and R7A7796
Add OF match entries and quirks for Renesas RCar Gen3 controllers
into the driver. The IP this driver handles is in fact Matsushita
one and in used both in Socionext and Renesas chips.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2017-09-22 23:23:45 +09:00
Marek Vasut
4b26d5e3ae mmc: uniphier-sd: Add support for quirks
Check if the OF match has any associated data and if so, use those
data as the controller quirks, otherwise fallback to the old method
of reading the controller version register to figure out the quirks.
This allows us to supply controller quirks on controllers which ie.
do not have version register.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2017-09-22 23:23:35 +09:00
Marek Vasut
484d9db4f9 mmc: uniphier-sd: Add support for 64bit FIFO
The Renesas RCar Gen3 contains the same controller, originally
Matsushita. This patch adds support for handling of the 64bit
FIFO on this controller.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2017-09-22 23:23:31 +09:00
Marek Vasut
1c99f68e93 mmc: uniphier-sd: Add support for 64bit controller
The Renesas RCar Gen3 contains the same controller, originally
Matsushita, yet the register addresses are shifted by 1 to the
left. The whole controller is also 64bit, including the data
FIFOs and RSP registers. This patch adds support for handling
the register IO by shifting the register offset by 1 in the IO
accessor functions.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2017-09-22 23:23:27 +09:00
Marek Vasut
3d7b1d1bc4 mmc: uniphier-sd: Factor out register IO
This patch prepares the driver to support controller(s) with registers
at locations shifted by constant. Pull out the readl()/writel() from
the driver into separate functions, where the adjustment of the register
offset can be easily contained.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2017-09-22 23:23:23 +09:00
Patrice Chotard
dca3166f55 mmc: sti_sdhci: Use reset framework
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-22 07:39:57 -04:00
Patrice Chotard
819c626bb0 mmc: sti_sdhci: Rework sti_mmc_core_config()
Use struct udevice* as input parameter. Previous
parameters are retrieved through plat and priv data.

This to prepare to use the reset framework.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-22 07:39:56 -04:00
Kever Yang
5184daddaa rockchip: sdhci: update reg map for of-platdata
After Simon's patch, the dtoc can work with 64bit address,
so we need to fix reg number for it.
Depend on Simon's patch set:
https://patchwork.ozlabs.org/cover/807266/

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18 20:40:38 +02:00
Philipp Tomsich
327b2b35c5 rockchip: sdhci: Convert to livetree
Update the Rockchip SDHCI wrapper to support a live device tree.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

Version-changes: 2
- use the dev_read_addr_ptr function in	rockchip_sdhci.c
2017-09-18 20:40:35 +02:00
Philipp Tomsich
be5f04e850 rockchip: mmc: convert to livetree
Update the Rockchip-specific wrapper for the Designware driver to
support a live device tree.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

Version-changes: 2
- use the dev_read_addr_ptr function in rockchip_dw_mmc.c
2017-09-18 20:40:34 +02:00
Masahiro Yamada
b27af39935 dma: import linux/dma-direction.h to consolidate enum dma_data_direction
Import include/linux/dma-direction.h from Linux 4.13-rc7 and delete
duplicated definitions of enum dma_data_direction.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-09-12 18:02:23 -04:00
Chen-Yu Tsai
8a647fc3ca mmc: sunxi: Only update timing mode bit when enabling new timing mode
When enabling the new mmc timing mode, we inadvertently clear all the
remaining bits in the new timing mode register. The bits cleared
include a default phase delay on the output clock. The BSP kernel
states that the default values are supposed to be used. Clearing them
results in decreased performance or transfer errors on some boards.

Fixes: de9b1771c3 ("mmc: sunxi: Support new mode")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-09-01 19:49:47 +05:30
Maxime Ripard
ead3697d7e mmc: sunxi: fix legacy MMC initialisation
The driver-model rework changed, among other things, the way the private
data were moved around. It now uses the private field in the struct mmc.

However, the mmc_create argument was changed in the process to always pass
the array we used to have to store our private structures.

The basically means that all the MMC driver instances will now have the
private data of the first instance, which obviously doesn't work very well.

Pass the proper pointer to mmc_create.

Fixes: 034e226bc7 ("dm: mmc: sunxi: Pass private data around explicitly")
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-08-28 22:38:05 +05:30
Maxime Ripard
de9b1771c3 mmc: sunxi: Support new mode
Almost all of the newer Allwinner SoCs have a new operating mode for the
eMMC clocks that needs to be enabled in both the clock and the MMC
controller.

Details about that mode are sparse, and the name itself (new mode vs old
mode) doesn't give much details, but it seems that the it changes the
sampling of the MMC clock. One side effect is also that it divides the
parent clock rate by 2.

Add support for it through a Kconfig option.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-08-28 22:36:44 +05:30
Bin Meng
a191ccaf12 mmc: Support generic PCI SD host controller
This changes pci_mmc driver to use PCI_CLASS_SYSTEM_SDHCI instead of
individual vendor id & device id pair to support generic PCI SD host
controller.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-18 15:37:38 +09:00
Angelo Dureghello
bdb6099666 cmd: mmc: add mmc partconf read capability
This patch allows to show the EXT_CSD[179] partition_config
register info, just by specifying the dev param:

  U-Boot> mmc partconf 0
  EXT_CSD[179], PARTITION_CONFIG:
  BOOT_ACK: 0x0
  BOOT_PARTITION_ENABLE: 0x0
  PARTITION_ACCESS: 0x0

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2017-08-17 17:00:11 +09:00
Simon Glass
e7881d85a9 dm: mmc: Drop CONFIG_DM_MMC_OPS
All boards which use DM_MMC have now been converted to use DM_MMC_OPS.
Drop the option and good riddance.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:59:55 +09:00
Simon Glass
b9a40c0c0a dm: mmc: Correct Kconfig condition for SPL_DM_MMC_OPS
This should depend on SPL_DM_MMC, not SPL_DM. For it and update the only
affected board's defconfig.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:44:18 +09:00
Simon Glass
5248930ebf dm: imx: cm_fx6: Enable more driver model support
Enable driver model for MMC (including BLK), SATA and USB. Note that USB
does not yet work correctly since the nodes are disabled. Hopefully this
can be resolved by the maintainer.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:44:17 +09:00
Simon Glass
653282b567 dm: mmc: fsl_esdhc: Update to support MMC operations
This driver does not currently support CONFIG_DM_MMC_OPS. Update it to
fully convert it to driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:44:17 +09:00
Simon Glass
4aac33f510 dm: mmc: fsl_esdhc: Update to support livetree
Update this driver to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:44:17 +09:00
Simon Glass
d6eb25e987 dm: mmc: fsl_esdhc: Drop mmc_init() call from fsl_esdhc_init()
We want to use fsl_esdhc_init() with driver model. Move the mmc_init() out
of this function so that we can use it for our common init.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:44:17 +09:00
Simon Glass
e88e1d9c04 dm: mmc: fsl_esdhc: Set up platform data
With driver model we want to store the mmc and configuration structure in
platform data. Set up structure up and use it for non-DM as well.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:44:17 +09:00
Simon Glass
201e828b22 dm: mmc: fsl_esdhc: Detect init failure
Since esdhc_init_common() can fail it should return an error code. Update
this and also adjust the timeout mechanism to use get_timer(), which is a
more common approach.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:44:17 +09:00
Simon Glass
446e077a21 dm: mmc: fsl_esdhc: Detect reset failure
Since esdhc_reset() can fail it should return an error code. Update this
and also adjust the timeout mechanism to use get_timer(), which is a more
common approach.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:44:17 +09:00
Simon Glass
9586aa6ea3 dm: mmc: fsl_esdhc: Set up common versions of operations
Driver model wants to use the core functions in this file but accesses the
driver-private data in a different way. Move the code into new 'common'
functions and set up stubs to call these. Also sort the operations into
alphabetical order for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:44:17 +09:00
Simon Glass
09b465fd0f dm: mmc: fsl_esdhc: Pass private data to internal functions
With driver model we will not use mmc->priv to access driver-private data.
To accomodate this, update internal functions so that we can pass the
private data directly. This will allow the caller to obtain it as it
prefers.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:44:17 +09:00
Wenyou.Yang@microchip.com
722b150e6f mmc: gen_atmel_mci: Fix wrong arguments used of bind()
The bind() method is called before the device is probed and so the
device has no private data, should use the platform data, and set up
a new struct to hold the mmc and cfg members.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-17 16:44:12 +09:00
Marek Vasut
8cd46cba53 mmc: sd_sdhi: Enable clock using clock framework
Since we now have clock driver for the RCar Gen3 , add support for
enabling the clock into the SH SDHI driver to prevent hacks in the
board files.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-17 14:38:18 +09:00
Marek Vasut
a3f0a7d5b5 mmc: sh_sdhi: Fix the ACMD handling
The command handling in this driver is awful, esp. because the driver
depends on command numbers to determine whether this is APPCMD or not.
Also, handling of command RSP response types is totally wrong.

This patch at least plucks out some of the custom command encoding and
fixes the APPCMD handling. The RSP handling still needs work, yet that
might not be needed as it turns out the uniphier-sd.c driver is in much
better shape and supports the same IP, so we might be able to just drop
this driver in favor of the uniphier one.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-17 14:38:02 +09:00
Marek Vasut
d1c18ca110 mmc: sh_sdhi: Add DM and DT probing support
Add MMC DM and DT probing support into the SH SDHI driver.
This patch abstracts out the common bits of the send command
and set ios functions, so they can be used both by DM and non
DM setups and adds the DM probe support.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-17 14:37:45 +09:00
Marek Vasut
ac5efc358b mmc: uniphier-sd: Fix long response processing
The long response entry 0..3 LSByte comes from the next response
register MSByte, not from the next response register LSByte. Fix
this to make the driver report correct values in response 136 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-17 14:36:05 +09:00
Yang Li
590e87d1a6 mmc: fsl_esdhc: not always setting esdhc fdt status to okay
We shouldn't always change the status to okay.  There could be
situations that the esdhc is intentionally disabled in the device
tree.

Signed-off-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09 09:57:32 -07:00
York Sun
9bb272e90a driver: mmc: fsl_esdhc: Fix compiling warning
Commit 4483b7eb added variable vqmmc_dev but only uses it under
CONFIG_DM_REGULATOR. Add the same macro to variable declaration to
get rid of compiling warning.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-08-09 09:11:29 -07:00
Tom Rini
07d7783822 Merge git://git.denx.de/u-boot-x86 2017-08-01 15:38:32 -04:00
Simon Glass
b7c6baef28 x86: Convert MMC to driver model
Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-01 20:17:02 +08:00
Simon Glass
dd27918c22 dm: mmc: sunxi: Add support for driver model
Add a driver-model version of this driver which mostly uses the existing
code. The old code can be removed once all boards are switched over.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-01 11:58:01 +09:00
Simon Glass
ec73d96090 dm: mmc: sunxi: Drop mmc_clk_io_on()
This function has #ifdefs in it which we want to avoid for driver model.
Instead we should use different compatible strings and the .data field.
It also uses the MMC device number which is not available in driver
model except through aliases.

Move the function's into its caller so that the driver-model version can
do things its own way.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00
Simon Glass
034e226bc7 dm: mmc: sunxi: Pass private data around explicitly
At present the driver-private data is obtained in various functions by
various means. With driver model this is provided automatically. Without
driver model it comes from a C array declared at the top of the file.

Adjust internal functions so that they are passed the private data as
a parameter, allowing the caller to obtain it using either means.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00
Simon Glass
3f5af12a5d dm: mmc: sunxi: Rename mmchost to priv
Use the driver-model naming convention for this structure. It is data
private to the driver so the local variable should be called 'priv'.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00
Simon Glass
e3c794e2fa dm: mmc: sunxi: Rename struct sunxi_mmc_host to sunxi_mmc_priv
Use the driver-model naming convention for this structure. It is data
private to the driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00
Simon Glass
c4d660d4d0 dm: mmc: Allow disabling driver model in SPL
At present if U-Boot proper uses driver model for MMC, then SPL has to
also. While this is desirable, it places a significant barrier to moving
to driver model in some cases. For example, with a space-constrained SPL
it may be necessary to enable CONFIG_SPL_OF_PLATDATA which involves
adjusting some drivers.

Add new SPL versions of the options for DM_MMC, DM_MMC_OPS and BLK. By
default these follow their non-SPL versions, but this can be changed by
boards which need it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-01 11:58:00 +09:00
Simon Glass
49cb9308c4 dm: tegra: mmc: Convert to livetree
Update the tegra mmc driver to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Beaver, Jetson-TK1
Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-28 12:02:47 -06:00
Masahiro Yamada
aae6f016a7 mmc: cadence: use fdt32_t for DT property value to fix sparse warning
DTB is encoded in big endian.  When we retrieve property values,
we need to use fdt32_to_cpu (aka be32_to_cpu) for endian conversion.
This is a bit error-prone, but sparse is useful to detect endian
mismatch.

We need to use (fdt32_t *) instead of (u32 *) for a pointer of a
property value.  Otherwise sparse warns "cast to restricted __be32".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-07-19 19:13:59 +09:00
Kever Yang
343749c425 mmc: rpmb: update size format for write_counter
According to MMC spec, the write_counter is 4-byte length,
use 'int' instead of 'long' type for the 'long' is not 4-byte
in 64 bit CPU.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-07-19 19:13:59 +09:00
Stefano Babic
552a848e4f imx: reorganize IMX code as other SOCs
Change is consistent with other SOCs and it is in preparation
for adding SOMs. SOC's related files are moved from cpu/ to
mach-imx/<SOC>.

This change is also coherent with the structure in kernel.

Signed-off-by: Stefano Babic <sbabic@denx.de>

CC: Fabio Estevam <fabio.estevam@nxp.com>
CC: Akshay Bhat <akshaybhat@timesys.com>
CC: Ken Lin <Ken.Lin@advantech.com.tw>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Heiko Schocher <hs@denx.de>
CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com>
CC: Christian Gmeiner <christian.gmeiner@gmail.com>
CC: Stefan Roese <sr@denx.de>
CC: Patrick Bruenn <p.bruenn@beckhoff.com>
CC: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Nikita Kiryanov <nikita@compulab.co.il>
CC: Otavio Salvador <otavio@ossystems.com.br>
CC: "Eric Bénard" <eric@eukrea.com>
CC: Jagan Teki <jagan@amarulasolutions.com>
CC: Ye Li <ye.li@nxp.com>
CC: Peng Fan <peng.fan@nxp.com>
CC: Adrian Alonso <adrian.alonso@nxp.com>
CC: Alison Wang <b18965@freescale.com>
CC: Tim Harvey <tharvey@gateworks.com>
CC: Martin Donnelly <martin.donnelly@ge.com>
CC: Marcin Niestroj <m.niestroj@grinn-global.com>
CC: Lukasz Majewski <lukma@denx.de>
CC: Adam Ford <aford173@gmail.com>
CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr>
CC: Boris Brezillon <boris.brezillon@free-electrons.com>
CC: Soeren Moch <smoch@web.de>
CC: Richard Hu <richard.hu@technexion.com>
CC: Wig Cheng <wig.cheng@technexion.com>
CC: Vanessa Maegima <vanessa.maegima@nxp.com>
CC: Max Krummenacher <max.krummenacher@toradex.com>
CC: Stefan Agner <stefan.agner@toradex.com>
CC: Markus Niebel <Markus.Niebel@tq-group.com>
CC: Breno Lima <breno.lima@nxp.com>
CC: Francesco Montefoschi <francesco.montefoschi@udoo.org>
CC: Jaehoon Chung <jh80.chung@samsung.com>
CC: Scott Wood <oss@buserror.net>
CC: Joe Hershberger <joe.hershberger@ni.com>
CC: Anatolij Gustschin <agust@denx.de>
CC: Simon Glass <sjg@chromium.org>
CC: "Andrew F. Davis" <afd@ti.com>
CC: "Łukasz Majewski" <l.majewski@samsung.com>
CC: Patrice Chotard <patrice.chotard@st.com>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Hans de Goede <hdegoede@redhat.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Stephen Warren <swarren@nvidia.com>
CC: Andre Przywara <andre.przywara@arm.com>
CC: "Álvaro Fernández Rojas" <noltari@gmail.com>
CC: York Sun <york.sun@nxp.com>
CC: Xiaoliang Yang <xiaoliang.yang@nxp.com>
CC: Chen-Yu Tsai <wens@csie.org>
CC: George McCollister <george.mccollister@gmail.com>
CC: Sven Ebenfeld <sven.ebenfeld@gmail.com>
CC: Filip Brozovic <fbrozovic@gmail.com>
CC: Petr Kulhavy <brain@jikos.cz>
CC: Eric Nelson <eric@nelint.com>
CC: Bai Ping <ping.bai@nxp.com>
CC: Anson Huang <Anson.Huang@nxp.com>
CC: Sanchayan Maity <maitysanchayan@gmail.com>
CC: Lokesh Vutla <lokeshvutla@ti.com>
CC: Patrick Delaunay <patrick.delaunay@st.com>
CC: Gary Bisson <gary.bisson@boundarydevices.com>
CC: Alexander Graf <agraf@suse.de>
CC: u-boot@lists.denx.de
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-07-12 10:17:44 +02:00
Peng Fan
f34ccce50a mmc: fsl_esdhc: drop CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT
CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT is not the correct method
to set I/O to 1.8. To boards that does not support vqmmc-supply,
use vs18_enable in fsl_esdhc_cfg. If regulator is supported,
use fixed 1.8V regulator for vqmmc-supply.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-07-12 09:44:22 +02:00
Peng Fan
4483b7eb88 dm: mmc: fsl_esdhc: handle vqmmc supply
Handle vqmmc supply. Some boards have a fixed I/O voltage
at 1.8V for emmc, so the usdhc also needs to be configured
as 1.8V by setting VSELECT bit. The vs18_enable is the one
that used to checking whether setting VSELECT or not in
the driver. So if vqmmc supply is 1.8V, set vs18_enable,
the driver will set VSELECT.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-07-12 09:44:22 +02:00
Peng Fan
32a9179f3a mmc: fsl_esdhc: introduce vs18_enable for 1.8V fix I/O
When using eMMC with 1.8V I/O, the VSELECT bit need to be set in
the USDHC controller when init.

This patch adds a parameter "vs18_enable" in fsl_esdhc_cfg
structure and priv data, so each controller can have different
settings.

We could not use CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT, it has problem
that it will apply to all USDHC controllers and it only set the 1.8V
at init phase. So if user does not select to the eMMC device,
the voltage on the I/O pins are not correct.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-07-12 09:44:22 +02:00
Tom Rini
d43ef73bf2 Merge branch 'master' of git://git.denx.de/u-boot-rockchip 2017-07-11 14:21:50 -04:00
Kever Yang
419b08012a Revert "mmc: dw_mmc: rockchip: select proper card clock"
The origin patch get rockchip dwmmc by name 'ciu', which lead
to the SPL not able to remove 'clock-names' node in dts.
I'm not saying this is not correct, but I would prefer to handle
this in dts or clock driver to save memory for SPL.
For example the rk3288 SPL size has out of memory if not enable
BACK_TO_BROM option, there are many other SoCs has less internal
memory than rk3288.

This reverts commit 480a9b834c.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:47 +02:00
Kever Yang
8093529809 rockchip: dwmmc: use max-frequency when OF_PLATDATA enabled
Since the 'clock-freq-min-max' is deprecated, we use max-frequency for
all rockchip SoC dwmmc controller.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:47 +02:00
Philipp Tomsich
fd1bf8df25 rockchip: mmc: dm: convert fdt_get to dev_read
With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.

This covers the dw_mmc and sdhci wrapper drivers for Rockchip.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-11 12:13:43 +02:00
Jorge Ramirez-Ortiz
fc50a6cbc0 driver: mmc: update debug info
This driver is used in another board; remove board information from
the driver debug log.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-10 14:26:03 -04:00
Tom Rini
08546df976 Merge git://git.denx.de/u-boot-x86 2017-06-27 09:33:10 -04:00
Tom Rini
821560fd8e Merge git://www.denx.de/git/u-boot-imx
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	include/configs/imx6qdl_icore_rqs.h
	include/configs/imx6ul_geam.h
	include/configs/imx6ul_isiot.h
2017-06-27 09:32:37 -04:00
Bin Meng
da2364cc14 Revert "x86: Convert MMC to driver model"
This reverts commit ddb3ac3c71.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-27 16:31:30 +08:00
Simon Glass
542b5f8567 tegra: mmc: Set the bus width correctly
The driver currently does not reset bit 5 of the hostctl register even if
the MMC stack requests it. Then means that once a bus width of 8 is
selected it is not possible to change it back to 1. This breaks
'mmc rescan' which needs to start off with a bus width of 1.

The problem was surfaced by enabling CONFIG_DM_MMC_OPS on tegra. Without
this option the MMC stack fully reinits the driver on a 'mmc rescan'.
But with this option driver model does not re-probe a driver once it has
been probed once.

Fix the driver to honour the request.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Chubb <peter.chubb@data61.csiro.au>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2017-06-20 09:47:59 -07:00
Simon Glass
9752564722 dm: mmc: Avoid probing block devices in find_mmc_device()
We do not need to probe the block device here, so avoid doing so. The MMC
device itself must be active, but the block device can come later.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 20:25:16 +09:00
Marek Vasut
0f53118511 mmc: sh_sdhi: Fix Kconfig entry
The Kconfig entry depends on RMOBILE, but this was renamed
to ARCH_RMOBILE in commit 1cc95f6e1b (ARM: Rmobile: Rename
CONFIG_RMOBILE to CONFIG_ARCH_RMOBILE) . Fix this omission.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-09 20:25:16 +09:00
Kouei Abe
a5950f8dfb mmc: sh_sdhi: Add SDHI support
R-Car Gen3 series have four SD card interfaces (SDHI0 to SDHI3),
two of which can also be used as MMC interfaces (SDHI2 and SDHI3).
This adds High-speed mode SD clock frequency between 25MHz and 50MHz,
8bit/4bit bus width, high capacity and low voltage device support.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-09 20:25:16 +09:00
Kouei Abe
91a16c3b2f mmc: sh_sdhi: Add MMC version 5.0 support
Renesas SDHI SD/MMC driver did not support MMC version 5.0 devices.
This adds MMC version 5.0 device support.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-06-09 20:25:16 +09:00
Kouei Abe
5eada1dbd0 mmc: sh_sdhi: Add 64-bit access to sd_buf support
Renesas SDHI SD/MMC driver has 16-bit width bus access to SD_BUF.
This adds 64-bit width bus access to SD_BUF.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-09 20:25:16 +09:00
Kouei Abe
3ebc62c987 mmc: sh_sdhi: Set SD_INFOx interrupt mask before command starting
When setting interrupt mask after command starting, an unintended
interrupt status sometimes occurs.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-09 20:25:16 +09:00
Simon Glass
ebf925051f samsung: mmc: Drop s3c_sdi driver
This is no-longer used in U-Boot. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-05 11:02:30 -04:00
Simon Glass
66e0ed5c17 dm: mmc: Convert uclass to livetree
Update the mmc uclass to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:13 -06:00
Simon Glass
150c5afe5b dm: gpio: Add live tree support
Add support for requesting GPIOs with a live device tree.

This involves adjusting the function signature for the legacy function
gpio_request_by_name_nodev(), so fix up all callers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes to stm32f746-disco.c:
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-01 07:03:10 -06:00
Simon Glass
911f3aef35 dm: core: Rename of_device_is_compatible()
The of_ prefix conflicts with the livetree version of this function.
Rename it to avoid problems when we add livetree support.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:06 -06:00
Simon Glass
0e513e788f tegra: Convert MMC to use driver model for operations
Enable CONFIG_DM_MMC_OPS and CONFIG_BLK for all Tegra devices. This moves
Tegra to use driver model fully for MMC.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:05 -06:00
Simon Glass
854f9a71f5 dm: mmc: Rewrite mmc_blk_probe()
This function is called when the MMC block device is being probed. There
is a recursive call in this function since find_mmc_device() itself can
cause the MMC device to be probed.

Admittedly the MMC device should already be probed, since we would not be
probing its child otherwise, but the current code is unnecessarily
convoluted.

Rewrite this to access the MMC structure directly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:05 -06:00
Simon Glass
66656020ff dm: mmc: Check that drivers have operations
When binding a new MMC device, make sure that it has the required
operations. Since for now we still support *not* having the operations
(with CONFIG_DM_MMC_OPS not enabled) it makes sense to add this check.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:05 -06:00
Simon Glass
05cbeb7c36 dm: mmc: Don't call board_mmc_power_init() with driver model
We should not call out to board code from drivers. With driver model,
mmc_power_init() already has code to use a named regulator, but the
legacy code path remains. Update the code to make this clear.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:04 -06:00
Simon Glass
da409ccc4a dm: core: Replace of_offset with accessor (part 2)
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:04 -06:00
Simon Glass
4af0d7e870 dm: Fix up inclusion of common.h
It is good practice to include common.h as the first header. This ensures
that required features like the DECLARE_GLOBAL_DATA_PTR macro,
configuration options and common types are available.

Fix up some files which currently don't do this. This is necessary because
driver model will soon start using global data and configuration in the
dm/read.h header file, included via dm.h. The gd->fdt_blob value will be
used to access the device tree and CONFIG options will be used to
determine whether to support inline functions in the header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:03 -06:00
Simon Glass
a821c4af79 dm: Rename dev_addr..() functions
These support the flat device tree. We want to use the dev_read_..()
prefix for functions that support both flat tree and live tree. So rename
the existing functions to avoid confusion.

In the end we will have:

   1. dev_read_addr...()    - works on devices, supports flat/live tree
   2. devfdt_get_addr...()  - current functions, flat tree only
   3. of_get_address() etc. - new functions, live tree only

All drivers will be written to use 1. That function will in turn call
either 2 or 3 depending on whether the flat or live tree is in use.

Note this involves changing some dead code - the imx_lpi2c.c file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:01 -06:00
Simon Glass
9d922450aa dm: Use dm.h header when driver mode is used
This header includes things that are needed to make driver build. Adjust
existing users to include that always, even if other dm/ includes are
present

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 06:57:52 -06:00
Jagan Teki
2e87c440f6 mmc: fsl_esdhc: Move non DM_MMC code in #ifndef CONFIG_DM_MMC
Don't build non DM_MMC code when DM_MMC defined so move
them into #ifndef CONFIG_DM_MMC

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-31 10:21:24 +02:00
Benoît Thébaudeau
4f425280fa mmc: fsl_esdhc: Allow all supported prescaler values
On i.MX, SYSCTL.SDCLKFS may be set to 0 in order to make the SD clock
frequency prescaler divide by 1 in SDR mode. In DDR mode, the prescaler
can divide by up to 512. Allow both of these settings.

The maximum SD clock frequency in High Speed mode is 50 MHz. On i.MX25,
this change makes it possible to get 48 MHz from the USB PLL
(240 MHz / 5 / 1) instead of only 40 MHz from the USB PLL
(240 MHz / 3 / 2) or 33.25 MHz from the AHB clock (133 MHz / 2 / 2).

Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-05-31 10:14:00 +02:00
Heiner Kallweit
f98205c7e4 mmc: meson: increase max block number per request
Number of blocks is a 9 bit field where 0 stands for a unlimited
number of blocks. Therefore the max number of blocks which can
be set is 511.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
2017-05-29 17:28:52 +09:00
Simon Glass
ddb3ac3c71 x86: Convert MMC to driver model
Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2017-05-17 17:13:06 +08:00
Wenyou Yang
b3125088a3 mmc: atmel_sdhci: Enable the quirk SDHCI_QUIRK_WAIT_SEND_CMD
To fix the timeout of sending the write command, enable the quirk
SDHCI_QUIRK_WAIT_SEND_CMD.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-16 06:29:28 +09:00
Masahiro Yamada
792f0054a4 mmc: descend into drivers/mmc only when CONFIG_MMC is enabled
This simplifies makefiles.  Also, arrange the order of objects in
drivers/mmc/Makefile so that the framework objects are listed before
drivers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-15 18:28:23 +09:00
Masahiro Yamada
4aa2ba3a34 mmc: replace CONFIG_GENERIC_MMC with CONFIG_MMC
Now CONFIG_GENERIC_MMC and CONFIG_MMC match for all defconfig.
We do not need two options for the same feature.  Deprecate the
former.

This commit was generated with the sed script 's/GENERIC_MMC/MMC/'
and manual fixup of drivers/mmc/Kconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-15 18:28:23 +09:00
Masahiro Yamada
0cacd6b755 mmc: sdhci-cadence: import updates from Linux 4.12
This driver is a counterpart of drivers/mmc/host/sdhci-cadence.c
from Linux.  Some updates for v4.12-rc1 can be imported to U-Boot.

 - Fix value of SDHCI_CDNS_HRS04_RDATA_SHIFT
 - Add polling for ACK bit to be sure that data are written to
   the PHY register
 - Retrieve PHY values from DT properties instead of fixed data

The following is the list of upstream commits:

 - Linux commit 4e03f628b464e0580abadf5161eaa38c61d20943
   mmc: sdhci-cadence: fix bit shift of read data from PHY port

 - Linux commit a0f8243229ed071c8da0ea7cedc1b7bf1b1515da
   mmc: sdhci-cadence: Fix writing PHY delay

 - Linux commit a89c472d8b55c5afc4c79e6e3d1338730034eb01
   mmc: sdhci-cadence: Update PHY delay configuration

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-15 18:28:22 +09:00
Wenyou Yang
0e0dcc1916 mmc: sdhci: Fix maximum clock for programmable clock mode
In the programmable clock mode, the SDCLK frequency is incorrectly
assigned when the maximum clock has been assigned during probe,
this causes the SDHCI not work well.

In the programmable clock mode, when calculating the SDCLK Frequency
Select, when the maximum clock has been assigned, it is the actual
value, should not be multiplied by host->clk_mul. Otherwise, the
maximum clock is multiplied host->clk_mul by the base clock achieved
from the BASECLKF field of the Capabilities 0 Register.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
2017-05-15 18:28:22 +09:00
Jean-Jacques Hiblot
b5511d6cb8 drivers: omap_hsmmc: move to DM_MMC_OPS
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-15 18:28:21 +09:00
Lokesh Vutla
cbcb170164 dm: mmc: omap_hsmmc: Add pre-reloc flag to the driver
For platforms that don't use device tree in SPL the only
way to mark this driver as 'required by relocation' is
with the DM_FLAG_PRE_RELOC flag. Add this to ensure that
the driver is bound.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-05-11 22:21:28 -04:00
Lokesh Vutla
2558c04906 dm: mmc: omap_hsmmc: Update to support of-platdata
This is to aid platforms that uses OF_PLATDATA.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-05-11 22:21:27 -04:00
Philipp Tomsich
ff71f9ac33 rockchip: mmc: handle deprecation of 'clock-freq-min-max'
The 'clock-freq-min-max' property was deprecated in the upstream
(i.e. Linux) DTS bindings in favor of the 'max-frequency' property.

With the latest RK3399 DTSI does no longer include the deprecated
property and the rockchip_dw_mmc driver requiring it to be present,
the driver doesn't bind to the node in the RK3399 DTSI any longer
(thus breaking access to the SD card on the RK3399-Q7 board).

To fix this, we implement a similar logic as in the Linux driver: if
the deprecated property is present, we issue a warning (if DEBUG is
enabled); if it is missing, we require 'max-frequency' to be set and
use it to create a min/max value-pair.

See b023030f10
for the deprecation/matching change in Linux.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-05-10 13:37:21 -06:00
Xu Ziyuan
480a9b834c mmc: dw_mmc: rockchip: select proper card clock
As you know, biu_clk is used for AMBA AHB/APB interface, ciu_clk is
used for communication between host and card devices. The real bus clock
is ciu, so let's rectify it.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Adam Ford
46831c1a4c omap_hsmmc: update struct hsmmc to accommodate omap3 from DT
This patch changes the way DM_MMC calculates offset to the base register of
MMC. Previously this was through an #ifdef but that wasn't necessary for OMAP3.

This patch will now add in the offset to the base address based on the
.compatible flags.

Signed-off-by: Adam Ford <aford173@gmail.com>

V2: Remove ifdef completely and reference offset from the omap_hsmmc_ids table.

V1: Change ifdef to ignore OMAP3
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09 20:35:35 -04:00
Simon Glass
e6c6d07e2c dm: mmc: rpi: Convert Raspberry Pi to driver model for MMC
Convert the bcm2835 SDHCI driver over to support CONFIG_DM_MMC and move
all boards over. There is no need to keep the old code since there are no
other users.

Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-09 20:20:37 -04:00
Masahiro Yamada
90d6500c0f drivers: remove Blackfin specific drivers
These drivers have no user since commit ea3310e8aa ("Blackfin:
Remove").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-04-18 10:29:14 -04:00
Alex Deymo
7dde50d707 mmc: sdhci: Wait for SDHCI_INT_DATA_END when transferring.
sdhci_transfer_data() function transfers the blocks passed up to the
number of blocks defined in mmc_data, but returns immediately once all
the blocks are transferred, even if the loop exit condition is not met
(bit SDHCI_INT_DATA_END set in the STATUS word).

When doing multiple writes to mmc, returning right after the last block
is transferred can cause the write to fail when sending the
MMC_CMD_STOP_TRANSMISSION command right after the
MMC_CMD_WRITE_MULTIPLE_BLOCK command, leaving the mmc driver in an
unconsistent state until reboot. This error was observed in the rpi3
board.

This patch waits for the SDHCI_INT_DATA_END bit to be set even after
sending all the blocks.

Test: Reliably wrote 2GiB of data to mmc in a rpi3.

Signed-off-by: Alex Deymo <deymo@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-14 15:23:14 +09:00
Jocelyn Bohr
4db2b61fcf mmc: bcm2835_sdhci: Speed up mmc writes.
The linux kernel driver for this module does not use a delay when
writing to the SDHCI_BUFFER register. This patch mimics that behavior
in order to speed up the mmc writes on the Raspberry Pi.

Signed-off-by: Alex Deymo <deymo@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-14 15:23:03 +09:00
Wenyou Yang
c86c0155dc mmc: gen_atmel_mci: add driver model support for mci
Add the driver model support for Atmel mci while retaining the
existing legacy code. This allows the driver to support boards
that have converted to driver model as well as those that have not.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-14 15:19:57 +09:00
Carlo Caione
937386204d mmc: meson: add MMC driver for Meson GX (S905)
This driver implements MMC support on Meson GX (S905) based systems.
It's based on Carlo Caione's work, changes:
- BLK support added
- general refactoring

Signed-off-by: Carlo Caione <carlo@caione.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
2017-04-14 15:16:06 +09:00
Stefan Roese
706865afe5 dm: core: Add flags parameter to device_remove()
This patch adds the flags parameter to device_remove() and changes all
calls to this function to provide the default value of DM_REMOVE_NORMAL
for "normal" device removal.

This is in preparation for the driver specific pre-OS (e.g. DMA
cancelling) remove support.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2017-04-04 20:15:10 -06:00
Tom Rini
3b19c1dbe0 Merge git://git.denx.de/u-boot-tegra 2017-04-04 16:01:02 -04:00
Marcel Ziswiler
4119b7098c mmc: tegra: allow disabling external clock loopback
Introduce CONFIG_TEGRA124_MMC_DISABLE_EXT_LOOPBACK to disable the external clock
loopback and use the internal one on SDMMC3 as per the SDMMC_VENDOR_MISC_CNTRL_0
register's SDMMC_SPARE1 bits being set to 0xfffd according to the TRM.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2017-04-01 15:45:04 -07:00
Jean-Jacques Hiblot
17c9a1c121 mmc: omap_hsmmc: add support for CONFIG_BLK
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-03-30 14:19:58 +09:00
Jean-Jacques Hiblot
3d673ffce3 mmc: omap_hsmmc: move the mmc_config to platdata when DM_MMC is used
This is a preparation work for the support of CONFIG_BLK.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-03-30 14:19:51 +09:00
Jean-Jacques Hiblot
dc09127a26 mmc: omap_hsmmc: use mmc_get_blk_desc() to get the block device desc
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-03-30 14:19:43 +09:00
Jean-Jacques Hiblot
ae000e231e mmc: omap_hsmmc: use an accessor to get the private data
For consistency, use an accessor to access the private data. Also for the
same reason, rename all priv_data to priv.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-03-30 14:19:31 +09:00
Stefan Roese
de0359c21e mmc: xenon_sdhci: Add missing host->max_clk to Xenon SDHCI driver
The Xenon SDHCI driver just missed the integration of this patch:

git ID 6d0e34bf
mmc: sdhci: Distinguish between base clock and maximum peripheral frequency

With this patch applied, the SDHCI subsystem complains now with this warning
while probing:

sdhci_setup_cfg: Hardware doesn't specify base clock frequency

This patch fixes this issue, by providing the missing host->max_clk
variable to the SDHCI subsystem.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Hu Ziji <huziji@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2017-03-21 21:06:59 +09:00
Xu Ziyuan
166c2b8fd9 mmc: drop unnecessary send_status request
It's redundant to send cmd13 after cmd9 whose response is not R1b. The
card devices will not be busy w/ cmd9.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
2017-03-21 21:04:17 +09:00
Kevin Liu
fa7720b21e mmc: sdhci: only flush cache for data command
No need to flush cache for command without data.

Signed-off-by: Kevin Liu <kevinliu@asrmicro.com>
2017-03-21 21:03:14 +09:00
Felipe Balbi
83b3248e7e mmc: tangier: Add Intel Tangier eMMC/SDHCI driver
This patch adds Intel Tangier eMMC/SDHCI driver.

Intel Tangier SoC contains a hybrid of PCI and non-PCI devices. SDHCI
controller is one of the devices which are *not* on a PCI and, hence,
cannot be enumerated by standard PCI means. This driver, allows for
SDHCI controller on Tangier SoC to work in U-Boot.

Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-03-21 21:03:14 +09:00
Felipe Balbi
b706b1c24d mmc: pci: Add CONFIG_MMC_PCI
We don't want pci_mmc to compile every time x86 compiles, only when
there's a platform that needs it. For that reason, we're adding a new
CONFIG_MMC_PCI which platforms can choose to enable.

Suggested-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-03-21 21:02:18 +09:00
Tom Rini
02ccab1908 Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	configs/bk4r1_defconfig
	configs/colibri_vf_defconfig
	configs/pcm052_defconfig
	include/configs/colibri_vf.h
	include/configs/pcm052.h
2017-03-19 15:13:38 -04:00
Tom Rini
f9515756b6 Merge git://git.denx.de/u-boot-rockchip
This includes support for rk3188 from Heiko Stübner and and rk3328 from
Kever Yang.  Also included is SPL support for rk3399 and a fix for
rk3288 to get it booting again (spl_early_init()).
2017-03-17 14:15:17 -04:00
Peng Fan
b60f14574e mmc: fsl_esdhc: support i.MX7ULP
Add compatible property for i.MX7ULP.
Add a weak init_usdhc_clk function, i.MX7ULP use this to init the clock.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
2017-03-17 09:27:08 +01:00
Kever Yang
c2868212bb rockchip: sdhci: rk3399: update driver to support of-platdata
Change some API in order to enable of-platdata.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added rockchip tag:
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-03-16 16:03:43 -06:00
Tom Rini
b504ff9f6b Xilinx changes for v2017.05
- Move to DM clk driver
 - Add clk support for zynq_sdhci
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Merge tag 'xilinx-for-v2017.05' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2017.05

- Move to DM clk driver
- Add clk support for zynq_sdhci
2017-03-16 16:44:23 -04:00
Patrice Chotard
51cb23d452 STiH410-B2260: Add device tree
This device tree has been extracted from v4.9 kernel

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-14 20:40:21 -04:00
Patrice Chotard
eee20f8132 STiH410: Add STi SDHCI driver
Add SDHCI host controller found on STMicroelectronics SoCs

On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live
inside a dedicated flashSS sub-system that provides an extend subset
of registers that can be used to configure the Arasan MMC/SD Host
Controller.

This means, that the SDHCI Arasan Controller can be configured to be
eMMC4.5 or 4.3 spec compliant.

W/o these settings the SDHCI will configure and use the MMC/SD
controller with limited features e.g. PIO mode, no DMA, no HS etc.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-03-14 20:40:20 -04:00
Stefan Herbrechtsmeier
61e745d131 mmc: zynq: Add fdt max-frequency support
The maximum supported peripheral clock frequency of the zynq depends on
the IO routing. The MIO and EMIO support a maximum frequency of 50 MHz
respectively 25 MHz. Use the max-frequency value of the device tree to
determine the maximal supported peripheral clock frequency.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-02-17 10:22:47 +01:00
Stefan Herbrechtsmeier
e0f4de1afc mmc: zynq: Determine base clock frequency via clock framework
The zynq_sdhci controller driver use CONFIG_ZYNQ_SDHCI_MAX_FREQ as base
clock frequency but this clock is not fixed and depends on the hardware
configuration. Additionally the value of CONFIG_ZYNQ_SDHCI_MAX_FREQ
doesn't match the real base clock frequency of SDIO_FREQ. Use the clock
framework to determine the frequency at run time.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-02-17 10:22:47 +01:00
Tom Rini
2a48b3a2c4 omap_hsmmc.c: Fix build warning on non-omap3
It was incorrect to always include "asm/arch-omap3/mux.h" constantly.
This introduced warnings on non-omap3 where certain values will conflict
between the various families.  Conditionally guard the inclusion in
order to correct the problem.

Fixes: 6aca17c9b7 ("drivers: mmc: omap_hsmmc: Fix IO Buffer on OMAP36xx")
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-02-09 13:41:28 -05:00
Fiach Antaw
a0269bb6e8 mmc: init mmc block devices on probe
MMC devices accessed exclusively via the driver model were not
being initialized before being exposed as block devices, causing
issues in scenarios where the MMC device is first accessed via the
uclass block interface.

Signed-off-by: Fiach Antaw <fiach.antaw@uqconnect.edu.au>
2017-02-09 20:37:06 +09:00
Adam Ford
6aca17c9b7 drivers: mmc: omap_hsmmc: Fix IO Buffer on OMAP36xx
On the OMAP36xx/37xx the CONTROL_WKUP_CTRL register has
a field (bit 6) named GPIO_IO_PWRDNZ.  If 0, the IO buffers which
are related to GPIO_126, 127 and 129 are disabled. Some boards may
need this for MMC. After the PBIAS is configured, this bit should
be set high to enable these GPIO pins.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-02-09 20:37:06 +09:00
Jaehoon Chung
d14f1d511a mmc: ftsdc021_sdhci: remove the ftsdc021_sdhci.c
ftsdc021_sdhci.c is dead file.
There is no reason to maintain this host controller.
Removes the entire ftsdc021_sdhci.c.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-02-09 20:37:05 +09:00
Jaehoon Chung
02ad33aa3a mmc: mmc-uclass: use the fixed devnum with alias node
If there are alias nodes as "mmc", use the devnum as alias index
number.
This patch is for fixing a problem of Exynos4 series.
Problem is the below thing.

Current legacy mode:
EXYNOS DWMMC: 0, SAMSUNG SDHCI: 1

After using DM:
SAMSUNG SDHCI: 0, EXYNOS DWMMC: 1

Dev index is swapped.
Then u-boot can't find the kernel image..because it is already set to 0 as mmcdev.
If change from legacy to DM, also needs to touch all exynos4 config file.
For using simply, just supporting the fixed devnum with alias node is better than it.

Usage:
alaise {
	....
	mmc0 = &sdhci2; /* eMMC */
	mmc1 = &sdhci1; /* SD */
	...
}

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-09 20:37:05 +09:00
Simon Glass
e160f7d430 dm: core: Replace of_offset with accessor
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-08 06:12:14 -07:00
Masahiro Yamada
dd3b64eb56 mmc: atmel: rename CONFIG_ATMEL_SDHCI to CONFIG_MMC_SDHCI_ATMEL
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.

While we are here, add "depends on ARCH_AT91".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-31 21:50:47 +09:00
Masahiro Yamada
1b85877060 mmc: pic32: rename CONFIG_PIC32_SDHCI to CONFIG_MMC_SDHCI_PIC32
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-31 21:50:47 +09:00
Masahiro Yamada
360c67d591 mmc: msm: rename CONFIG_MSM_SDHCI to CONFIG_MMC_SDHCI_MSM
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-31 21:50:47 +09:00
Masahiro Yamada
facc805809 mmc: rockchip: rename CONFIG_ROCKCHIP_SDHCI to CONFIG_MMC_SDHCI_ROCKCHIP
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.

While we are here, add "depends on ARCH_ROCKCHIP".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-31 21:50:47 +09:00
Masahiro Yamada
08aa0334c6 mmc: zynq: rename CONFIG_ZYNQ_SDHCI to CONFIG_MMC_SDHCI_ZYNQ
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.

While we are here, add "depends on ARCH_ZYNQ || ARCH_ZYNQMP".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-31 21:50:47 +09:00
Masahiro Yamada
a5995a5d7b mmc: sandbox: rename CONFIG, fix dependency, and use it in Makefile
[1] Rename CONFIG_SANDBOX_MMC to CONFIG_MMC_SANDBOX for consistency
    I want all MMC driver options prefixed with CONFIG_MMC_.

[2] Fix dependency
    Add necessary depends on to avoid compile error.
    Instead "depends on MMC" is unneeded because this config entry
    resides inside of "if MMC".

[3] Currently, this config symbol is not referenced at all.
    Use it to enable/disable the driver in Makefile.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-31 21:50:47 +09:00
Masahiro Yamada
54925327fa mmc: move CONFIG_GENERIC_MMC to Kconfig
Now, CONFIG_GENERIC_MMC seems equivalent to CONFIG_MMC.

Let's create an entry for "config GENERIC_MMC" with "default MMC",
then convert all macro defines in headers to Kconfig.  Almost all
of the defines will go away.

I see only two exceptions:
  configs/blanche_defconfig
  configs/sandbox_noblk_defconfig

They define CONFIG_GENERIC_MMC, but not CONFIG_MMC.  Something
might be wrong with these two boards, so should be checked later.

Anyway, this is the output of the moveconfig tool.

This commit was created as follows:

[1] create a config entry in drivers/mmc/Kconfig

[2] tools/moveconfig.py -r HEAD GENERIC_MMC

[3] manual clean-up of garbage comments in doc/README.* and
    include/configs/*.h

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-01-31 21:50:47 +09:00
Stefan Roese
b6acb5f1d9 mmc: Add Marvell Xenon SDHCI controller driver
This driver implementes platform specific code for the Xenon SDHCI
controller which is integrated in the Marvell MVEBU Armada 37xx and
Armada 7k / 8K SoCs.

History:
This driver is ported from the Marvell U-Boot version 2015.01 which is
written by Victor Gu <xigu@marvell.com> with minor changes ported from
the Linux driver which is written by Ziji Hu <huziji@marvell.com>.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-25 07:03:49 +01:00
Stefan Roese
210841c690 mmc: sdhci: Add support for optional controller specific set_ios_post()
Some SDHCI drivers might need to do some special controller configuration
after the common clock set_ios() function has been called (speed / width
configuration). This patch adds a call to the newly created function
set_ios_port() when its configured in the host driver.

This will be used by the Xenon SDHCI controller driver used on the
Marvell Armada 3700 and 7k/8k ARM64 SoCs.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-25 07:03:44 +01:00
Stefan Roese
899fb9e352 mmc: sdhci: Clear SDHCI_CLOCK_CONTROL before configuring the new value
This patch completely clears the SDHCI_CLOCK_CONTROL register before the
new value is configured instead of just clearing the 2 bits
SDHCI_CLOCK_CARD_EN and SDHCI_CLOCK_INT_EN. Without this change, some
clock configurations will lead to the "Internal clock never stabilised."
error message on the Xenon SDHCI controller used on the Marvell Armada
3700 and 7k/8k ARM64 SoCs.

The Linux SDHCI core driver also writes 0 to this register before
the new value is configured. So this patch simplifies the driver a bit
and brings the U-Boot driver more in-line with the Linux one.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-25 07:03:39 +01:00
Jagan Teki
919b485834 mmc: Print error code for mmc_complete_init failure
Print the error code for non-zero (failure case) instead
of making debug statement without any condition, this
usually gives proper clue in failure condition.

Log:
2017-01-23 15:37:42 +09:00
Stefan Herbrechtsmeier
6d0e34bf4e mmc: sdhci: Distinguish between base clock and maximum peripheral frequency
The sdhci controller assumes that the base clock frequency is fully supported by
the peripheral and doesn't support hardware limitations. The Linux kernel
distinguishes between base clock (max_clk) of the host controller and maximum
frequency (f_max) of the card interface. Use the same differentiation and allow
the platform to constrain the peripheral interface.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
2017-01-23 15:37:42 +09:00
Tom Rini
0675f992db Merge git://git.denx.de/u-boot-fsl-qoriq 2017-01-19 12:22:23 -05:00
Yangbo Lu
fce1e16c55 mmc: fsl_esdhc: move 'status' property fixup into a weak function
Move fdt fixup of 'status' property into a weak function. This allows
board to define 'status' fdt fixup by themselves.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18 09:46:30 -08:00
Yangbo Lu
a6473f8e3f mmc: fsl_esdhc: add 'fsl, esdhc' into of_match table
This patch is to add 'fsl,esdhc' into of_match table to support
driver model for QorIQ eSDHC.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18 09:28:20 -08:00
Yangbo Lu
fc8048a88e mmc: fsl_esdhc: make GPIO support optional
There would be compiling error as below when enable driver model for esdhc.
undefined reference to `dm_gpio_get_value'
undefined reference to `gpio_request_by_name_nodev'
This patch is to make GPIO support optional with CONFIG_DM_GPIO. Because
all boards of QorIQ platform don't need it and they just check register for
CD/WP status, only some boards of i.MX platform require this.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18 09:28:14 -08:00
Tom Rini
83c2f0b451 Merge branch 'master' of http://git.denx.de/u-boot-mmc 2017-01-13 09:17:21 -05:00
Masahiro Yamada
0ad178c18a mmc: sunxi: revive depends on UART0_PORT_F
Commit f401e907fc ("ARM: sunxi: remove bare default for
CONFIG_MMC") dropped "depends on UART0_PORT_F", but it is still
needed.  Revive it as a prerequisite of CONFIG_MMC_SUNXI.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-13 12:18:52 +09:00
Masahiro Yamada
2cd44e1e68 mmc: pic32_sdhci: rename {pci->pic}32_sdhci_get_cd
I suspect this is a typo.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-13 12:17:18 +09:00
Masahiro Yamada
bf9c4d1464 mmc: sdhci: fix NULL pointer access when host->ops is not set
Until recently, sdhci_ops was used only for overriding IO accessors.
(so, host->ops was not set by any drivers except bcm2835_sdhci.c)

Now, we have more optional callbacks, get_cd, set_control_reg, and
set_clock.  However, the code

    if (host->ops->get_cd)
            host->ops->get_cd(host);

... expects host->ops is set for all drivers.

Commit 5e96217f04 ("mmc: pic32_sdhci: move the code to
pic32_sdhci.c") and commit 62226b6863 ("mmc: sdhci: move the
callback function into sdhci_ops") added sdhci_ops for pic32_sdhci.c
and s5p_sdhci.c, but the other drivers still do not (need not) set
host->ops because all callbacks in sdhci_ops are optional.

host->ops must be checked to avoid the system crash caused by NULL
pointer access.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-13 12:17:03 +09:00
Kever Yang
39fbb56f84 mmc: rockchip_sdhci: add clock init for mmc
Init the clock rate to max-frequency from dts with clock driver api.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 20:23:25 -07:00
Masahiro Yamada
1d2c0506d3 mmc: move more driver config options to Kconfig
Move (and rename) the following CONFIG options to Kconfig:

  CONFIG_DAVINCI_MMC  (renamed to CONFIG_MMC_DAVINCI)
  CONFIG_OMAP_HSMMC   (renamed to CONFIG_MMC_OMAP_HS)
  CONFIG_MXC_MMC      (renamed to CONFIG_MMC_MXC)
  CONFIG_MXS_MMC      (renamed to CONFIG_MMC_MXS)
  CONFIG_TEGRA_MMC    (renamed to CONFIG_MMC_SDHCI_TEGRA)
  CONFIG_SUNXI_MMC    (renamed to CONFIG_MMC_SUNXI)

They are the same option names as used in Linux.

This commit was created as follows:

[1] Rename the options with the following command:

find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e '
s/CONFIG_DAVINCI_MMC/CONFIG_MMC_DAVINCI/g
s/CONFIG_OMAP_HSMMC/CONFIG_MMC_OMAP_HS/g
s/CONFIG_MXC_MMC/CONFIG_MMC_MXC/g
s/CONFIG_MXS_MMC/CONFIG_MMC_MXS/g
s/CONFIG_TEGRA_MMC/CONFIG_MMC_SDHCI_TEGRA/g
s/CONFIG_SUNXI_MMC/CONFIG_MMC_SUNXI/g
'

[2] Commit the changes

[3] Create entries in driver/mmc/Kconfig.
    (copied from Linux)

[4] Move the options with the following command
tools/moveconfig.py -y -r HEAD \
MMC_DAVINCI MMC_OMAP_HS MMC_MXC MMC_MXS MMC_SDHCI_TEGRA MMC_SUNXI

[5] Sort and align drivers/mmc/Makefile for readability

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2017-01-11 19:40:15 +09:00
Masahiro Yamada
ae4c81e942 mmc: move DesignWare-based drivers to Kconfig
Move (and rename) the following CONFIG options to Kconfig:

  CONFIG_EXYNOS_DWMMC  (renamed to CONFIG_MMC_DW_EXYNOS)
  CONFIG_HIKEY_DWMMC   (renamed to CONFIG_MMC_DW_K3)
  CONFIG_SOCFPGA_DWMMC (renamed to CONFIG_MMC_DW_SOCFPGA)

The "HIKEY" is a board name, so it is not suitable for the MMC
controller name.  I am following the name used in Linux.

This commit was generated as follows:

[1] Rename the config options with the following command:
find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e '
s/CONFIG_EXYNOS_DWMMC/CONFIG_MMC_DW_EXYNOS/g
s/CONFIG_HIKEY_DWMMC/CONFIG_MMC_DW_K3/g
s/CONFIG_SOCFPGA_DWMMC/CONFIG_MMC_DW_SOCFPGA/g
'

[2] Commit the changes

[3] Create the entries in drivers/mmc/Kconfig
    (with default y for EXYNOS and SOCFPGA)

[4] Run the following:
tools/moveconfig.py -y -r HEAD MMC_DW_EXYNOS MMC_DW_K3 MMC_DW_SOCFPGA

[5] Sort and align drivers/mmc/Makefile for readability

[6] Clean-up doc/README.socfpga by hand

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2017-01-11 19:40:15 +09:00
Masahiro Yamada
55ed3b4698 mmc: move CONFIG_DWMMC to Kconfig, renaming to CONFIG_MMC_DW
This commit was created as follows:

[1] Rename the option with the following command:
find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e 's/CONFIG_DWMMC/CONFIG_MMC_DW/g'

[2] create the entry for MMC_DW in drivers/mmc/Kconfig
    (the prompt and help were copied from Linux)

[3] run "tools/moveconfig.py -y MMC_DW"

[4] add "depends on MMC_DW" to the MMC_DW_ROCKCHIP entry

[5] Clean-up doc/README.socfpga by hand

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2017-01-11 19:40:14 +09:00
Masahiro Yamada
fed4408703 mmc: rename CONFIG_ROCKCHIP_DWMMC to CONFIG_MMC_DW_ROCKCHIP
I am trying to make all DesignWare-based driver options prefixed
with CONFIG_MMC_DW_.

This commit was generated as follows:

find . -name .git -prune -o -type f -print | \
xargs sed -i -e 's/ROCKCHIP_DWMMC/MMC_DW_ROCKCHIP/g'

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2017-01-11 19:40:14 +09:00
Masahiro Yamada
9c720c815b mmc: uniphier-sd: fix Kconfig dependency
Some MMC drivers describe operations with the DM_MMC_OPS form, but
there are still several drivers with older implementation.  We can
not compile drivers from different groups at the same time because
the core framework is shared with #ifdef CONFIG_DM_MMC_OPS.

Every driver should have "depends on DM_MMC_OPS" (or !DM_MMC_OPS)
explicitly to express which framework it is based on.  This will
avoid enabling drivers with incompatible interface at the same time.
It is incorrect to make a driver "select DM_MMC_OPS".

While we are here, add "depends on OF_CONTROL" as well because this
driver can be configured only by Device Tree.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-11 19:40:14 +09:00
Masahiro Yamada
e5e7a7c204 mmc: sdhci-cadence: add Cadence SD4HC support
Add a driver for the Cadence SD4HC SD/SDIO/eMMC Controller.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-11 19:40:14 +09:00
Jaehoon Chung
3fd0a9ba8c mmc: sdhci: combine the Host controller v3.0 feature into one condition
It doesn't need to seperate the condition.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 19:40:13 +09:00
Jaehoon Chung
f37b7e4f6c mmc: sdhci: remove the SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
Ther is no usage anywhere. It doesn't need to maintain this bit.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 19:40:13 +09:00
Jaehoon Chung
62226b6863 mmc: sdhci: move the callback function into sdhci_ops
callback function should be moved into sdhci_ops struct.
Other controller can use these ops for controlling clock or their own
specific register.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 19:40:13 +09:00
Jaehoon Chung
f73b33ff94 mmc: s5p_sdhci: add the s5p_set_clock function
Add the s5p_set_clock function.
It's not good that "set_mmc_clk" is assigned directly.
In future, it should be changed to use the clock framework.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 19:40:13 +09:00
Jaehoon Chung
07b0b9c00c mmc: change the set_ios return type from void to int
To maintain consistency, set_ios type of legacy mmc_ops changed to int.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 19:40:13 +09:00
Jaehoon Chung
6f88a3a5d9 mmc: sdhci: remove the SDHCI_QUIRK_NO_CD
This quirk doesn't need anymore.
It's replaced to get_cd callback function.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 19:40:12 +09:00
Jaehoon Chung
5e96217f04 mmc: pic32_sdhci: move the code to pic32_sdhci.c
This code is used for only pic32_sdhci controller.
To remove the "#ifdef", moves to pic32_sdhci.c.
And use the get_cd callback function.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 19:40:11 +09:00
Jaehoon Chung
62358a988e mmc: sdhci: remove the unused code about testing Card detect
This code is dead code..There is no usage anywhere.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 18:14:47 +09:00
Jaehoon Chung
ecd7b246f6 mmc: sdhci: disable the 8bit mode when host doesn't support it
Buswidth is depeneded on Hardware schematic.
Evne though host can support the 8bit buswidth, if hardware doesn't
support 8bit mode, it doesn't work fine.
So the buswidth mode selection leaves a matter in each SoC drivers.

On the contrary to this, hardware supports 8bit mode, but host doesn't
support it. then controller has to disable the MMC_MODE_8BIT.
(Host can check whether 8bit mode is supported or not, since V3.0)

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 18:14:47 +09:00
York Sun
c01e4a1a6f mmc: move CONFIG_SYS_FSL_ERRATUM_ESDHC* to Kconfig
Add option SYS_FSL_ERRATUM_ESDHC111, SYS_FSL_ERRATUM_ESDHC13,
SYS_FSL_ERRATUM_ESDHC135, SYS_FSL_ERRATUM_ESDHC_A001 to mmc Kconfig.
Move existing macros to related Kconfig.

Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Migrate bk4r1]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-04 19:40:44 -05:00
Masahiro Yamada
3d3a74cc8c mmc: move MMC_SDHCI_IO_ACCESSORS to Kconfig
This is a user-unconfigurable option that is selected by the
drivers that need to overwrite SDHCI IO memory accessors.
(BCM2835 SDHCI seems the only driver that needs to do so.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-12-29 13:08:17 -05:00
Masahiro Yamada
45a68fe267 mmc: move some SDHCI related options to Kconfig
While I moved the options, I also renamed them so that they are all
prefixed with MMC_SDHCI_.

This commit was created in the following steps.

[1] Rename with the following command
find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e '
s/CONFIG_MMC_SDMA/CONFIG_MMC_SDHCI_SDMA/g
s/CONFIG_BCM2835_SDHCI/CONFIG_MMC_SDHCI_BCM2835/g
s/CONFIG_KONA_SDHCI/CONFIG_MMC_SDHCI_KONA/g
s/CONFIG_MV_SDHCI/CONFIG_MMC_SDHCI_MV/g
s/CONFIG_S5P_SDHCI/CONFIG_MMC_SDHCI_S5P/g
s/CONFIG_SPEAR_SDHCI/CONFIG_MMC_SDHCI_SPEAR/g
'

[2] create the Kconfig entries in drivers/mmc/Kconfig

[3] Move the options by the following command
tools/moveconfig.py -y MMC_SDHCI_SDMA MMC_SDHCI_BCM2835 \
MMC_SDHCI_KONA MMC_SDHCI_MV MMC_SDHCI_S5P MMC_SDHCI_SPEAR

[4] Sort drivers/mmc/Makefile for readability

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-12-29 13:08:16 -05:00
Masahiro Yamada
e1ce61fbba mmc: move CONFIG_SDHCI to Kconfig, renaming to CONFIG_MMC_SDHCI
Move CONFIG_SDHCI to Kconfig and rename it to CONFIG_MMC_SDHCI.
My motivation for the rename is, ultimately, to make all the MMC
options prefixed with MMC_ and SDHCI options with MMC_SDHCI_,
like Linux.

This commit was created as follows:

[1] Rename the config option with the following command:
find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e 's/CONFIG_SDHCI/CONFIG_MMC_SDHCI/g'

[2] create the entry for MMC_SDHCI in drivers/mmc/Kconfig

[3] run "tools/moveconfig.py -y MMC_SDHCI"

[4] add "depends on MMC_SDHCI" to existing SDHCI driver entries

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-12-29 13:08:12 -05:00
Masahiro Yamada
e298c46ac3 mmc: make MMC driver entries dependent on MMC
Currently, CONFIG_MMC is not related to any other options by
"depends on" or "select".  One of big advantages of using Kconfig
is automatic dependency tracking, but the current state is lacking
it.  As the first step, make the existing MMC driver entries depend
on MMC.

This commit was created by the following steps:

[1] Run the following script:

--------------------8<--------------------
rm -f tmp.txt

for d in $(find . -path './configs/*_defconfig')
do
        if grep -q -e 'CONFIG_MSM_SDHCI=y' $d ||
           grep -q -e 'CONFIG_ATMEL_SDHCI=y' $d ||
           grep -q -e 'CONFIG_ROCKCHIP_DWMMC=y' $d ||
           grep -q -e 'CONFIG_SH_SDHI=y' $d ||
           grep -q -e 'CONFIG_PIC32_SDHCI=y' $d ||
           grep -q -e 'CONFIG_ZYNQ_SDHCI=y' $d ||
           grep -q -e 'CONFIG_ROCKCHIP_SDHCI=y' $d ||
           grep -q -e 'CONFIG_MMC_UNIPHIER=y' $d ||
           grep -q -e 'CONFIG_SANDBOX_MMC=y' $d
        then
                echo CONFIG_MMC=y >> $d
                echo ${d#./configs/} >> tmp.txt
        fi
done

tools/moveconfig.py -y -s -d tmp.txt
rm tmp.txt
--------------------8<--------------------

[2] surround MMC driver entries with "if MMC" and "endif"

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-12-29 13:08:07 -05:00
Masahiro Yamada
c27269953b mmc: complete unfinished move of CONFIG_MMC
Commit 7a777f6d6f ("mmc: Add generic Kconfig option") created
a Kconfig entry for this option without any actual moves, then
commit 44c798799f ("sunxi: Use Kconfig CONFIG_MMC") moved
instances only for SUNXI.

We generally do not like such partial moves.  This kind of work
is automated by tools/moveconfig.py, so it is pretty easy to
complete this move.

I am adding "default ARM || PPC || SANDBOX" (suggested by Tom).
This shortens the configs and will ease new board porting.

This commit was created as follows:

[1] Edit Kconfig (remove the "depends on", add the "default",
    copy the prompt and help message from Linux)

[2] Run 'tools/moveconfig.py -y -s -r HEAD MMC'

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-12-29 13:08:07 -05:00
Michal Simek
9c4132b526 mmc: Extend dependencies for zynq sdhci
There is hard dependency on BLK and DM_MMC which is also used by ATMEL
and ROCKCHIP.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-12-22 07:08:52 +09:00
Jaehoon Chung
c942fc925e mmc: spear: remove the entire spear_sdhci.c file
Remove the entire spear_sdhci.c file.
There is no use case. This is dead codes.
Also there is no place to call "spear_sdhci_init()" anywhere.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-22 07:08:52 +09:00
Lokesh Vutla
b4b060066f ARM: OMAP4+: Add support for getting pbias info from board
Palmas driver assumes it is always TPS659xx regulator on all DRA7xx based
boards to enable mmc regulator. This is not true always like in case of
DRA71x-evm. So get this information based on the board.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Delete omap4_vmmc_pbias_config from omap_hsmmc.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-12-04 13:54:51 -05:00
Nishanth Menon
3891a54f47 ARM: DRA7x/AM57xx: Get rid of CONFIG_AM57XX
CONFIG_AM57XX is just an unnecessary macro that is redundant given So,
remove the same instead of spreading through out the u-boot source
code and getting in the way to maintain common code for DRA7x family.

Acked-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-03 13:21:11 -05:00
Marek Vasut
b5b838f1a7 mmc: Tinification of the mmc code
Add new configuration option CONFIG_MMC_TINY which strips away all
memory allocation within the MMC code and code for handling multiple
cards. This allows extremely space-constrained SPL code use the MMC
framework.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2016-12-01 13:51:57 +09:00
Marek Vasut
ce9eca9438 mmc: Fix warning if debug() is not used
If debug() is not used, then the whole content of debug(...) will
be removed by the preprocessor, which will result in the following
warning. This patch adds __maybe_unused annotation to fix this.

drivers/mmc/mmc.c: In function ‘mmc_init’:
drivers/mmc/mmc.c:1685:11: warning: variable ‘start’ set but not used [-Wunused-but-set-variable]
  unsigned start;

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2016-12-01 13:51:08 +09:00
Tomas Melin
cd3d48807d mmc: add bkops-enable command
Add new command that provides possibility to enable the
background operations handshake functionality
(BKOPS_EN, EXT_CSD byte [163]) on eMMC devices.

This is an optional feature of eMMCs, the setting is write-once.
The command must be explicitly taken into use with
CONFIG_CMD_BKOPS_ENABLE.

Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
2016-12-01 11:09:44 +09:00
Seung-Woo Kim
f0ecfc5e7e mmc: s5p_sdhci: fix to check proper pinmux id
At sdhci_get_config(), there was wrong condition to check pimux
id, so this patch fixes to check proper pinmux id.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
2016-12-01 11:09:44 +09:00
Maxime Ripard
fb01318467 mmc: sunxi: Enable 8bits bus width for sun8i
The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the
support for those too.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2016-11-16 13:30:17 +09:00
Maxime Ripard
a9003dc641 mmc: Retry the switch command
Some eMMC will fail at the first switch, but would succeed in a subsequent
one.

Make sure we try several times to cover those cases. The number of retries
(and the behaviour) is currently what is being used in Linux.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-11-16 13:30:17 +09:00
Tom Rini
1df182ddf7 Merge branch 'master' of git://git.denx.de/u-boot-atmel 2016-10-28 14:14:18 -04:00
Wenyou Yang
339cb0732a mmc: atmel_sdhci: Remove unnecessary clock calling
Due to the peripheral and generated clock driver improvement,
remove the unnecessary clock calling.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-10-28 18:37:15 +02:00
Jaehoon Chung
2a1bedaa03 mmc: sdhci: assign to clk_mul when host version is upper than SD3.0
To prevent the wrong value check the SD version.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-10-28 11:02:16 +09:00
Jaehoon Chung
288db7c7c0 mmc: add the device name in debugging message for supplying vmmc
If vmmc didn't supply, we didn't know which card didn't supply vmmc.
And changed from "put" to "debug".

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2016-10-28 11:02:16 +09:00
Sylvain Lesne
f55ae19703 dm: mmc: socfpga: fix MMC_OPS support
Now that CONFIG_BLK and CONFIG_MMC_OPS are enabled by default with
CONFIG_DM_MMC, the DWMMC driver on the socfpga platform fails at
runtime.

This adds the missing fields in the driver declaration.

Signed-off-by: Sylvain Lesne <lesne@alse-fr.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-28 11:02:16 +09:00
Masahiro Yamada
dd399cb736 mmc: refactor two core functions
Drop unneeded variables and assignments.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-28 11:02:16 +09:00
Jaehoon Chung
be256cbf04 mmc: sdhci: fix the "misaligned operation at range" for cache
This pathc is fixed the below thing.
If misaligned the cache range, Just flush to CACHLINE_SIZE.
"CACHE: Misaligned operation at range [7ae55b00, 7ae55b08]"

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-10-28 11:02:16 +09:00
Peng Fan
2051aefe71 mmc: introduce mmc_power_init
In device tree, there is vmmc-supply property for SD/MMC.
Introduce mmc_power_init function to handle vmmc-supply.

mmc_power_init will first invoke board_mmc_power_init to
avoid break boards which already implement board_mmc_power_init.

If DM_MMC and DM_REGULATOR is defined, the regulator
will be enabled to power up the device.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2016-10-28 11:02:16 +09:00
Tom Rini
c69f6d04ec Merge branch 'master' of http://git.denx.de/u-boot-mmc 2016-10-13 08:13:56 -04:00
Simon Glass
252788b4ed dm: mmc: Enable DM_MMC_OPS by default with DM_MMC
These two options go together and it is best to do the conversion in one
step. So enable DM_MMC_OPS by default if DM_MMC is enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-10-11 10:17:03 -06:00
Simon Glass
57718f017b mmc: Fix cast for 64-bit compilation
Fix a cast that causes warnings on 64-bit machines.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-10-11 07:46:11 +09:00
Jaehoon Chung
2cb5d67c1a mmc: sdhci: use the generic error number
Use the generic error number instead of meaningless value.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-10 15:23:33 +09:00
Jaehoon Chung
895549a2d9 mmc: sdhci: use the host version value in sdhci_setup_cfg
"host->version" isn't a SoC specific value.
It doesn't need to get in each SoC drivers.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2016-10-10 15:23:33 +09:00
Jaehoon Chung
e5113c333b mmc: dw_mmc: remove the unnecessary arguments for dwmci_setup_cfg
Some arguments don't need to pass to dwmci_setup_cfg.
They are already included in dwmci_host structure.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-10 15:23:33 +09:00
Jaehoon Chung
7aedafd6b3 mmc: s5p_sdhci: support the Driver model for Exynos
This patch support the driver model for s5p_sdhci controller.
To support the legacy model, maintained the existing code.

Note: If use the Driver Model, it needs to modify the device-tree.
In future, will update the Device-tree and enable the configuratioin.
(CONFIG_BLK, CONFIG_DM_MMC and CONFING_DM_MMC_OPS)

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-10 15:23:32 +09:00
Simon Glass
561e624c35 dm: mmc: Support erase
At present erase is not suported with CONFIG_DM_OPS. Add it so that MMC
devices can be erased.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-10-09 21:36:27 -06:00
Tom Rini
f5fd45ff64 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2016-10-08 09:33:37 -04:00
B, Ravi
d2d9bdfcf9 spl: saveenv: adding saveenv support in SPL
By default saveenv option is not supported for SPL. This patch
enable the support for save environment variable for SPL build.

Enable save environment support in SPL after setenv. By default
the saveenv option is not provided in SPL, but some boards need
this support in 'Falcon' boot, where SPL need to boot from
different images based on environment variable set by OS. For
example OS may set "reboot_image" environment variable to
"recovery" inorder to boot recovery image by SPL. The SPL read
"reboot_image" and act accordingly and change the reboot_image
to default mode using setenv and save the environemnt.

Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Simon Glass <sig@chromium.org>

change in v1:
	- dropped SUPPORT, use CONFIG_SPL_SAVEENV
	- updates the comments in mmc_private.h
2016-10-08 09:33:36 -04:00
Peng Fan
35ae99467d dm: mmc: intialize dev when probe
Need to initialize mmc->dev when probe, or will met
"dev_get_uclass_priv: null device", when `mmc dev 1`.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-04 15:41:01 +02:00
Stephen Warren
e8adca9ecf mmc: tegra: only use new clock/reset APIs
Now that the standard clock/reset APIs are available for all Tegra SoCs,
convert the MMC driver to use them exclusively, and remove any references
to the custom Tegra-specific APIs.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-27 09:11:03 -07:00
Tom Warren
6a474db489 mmc: tegra: Add DM_MMC support to Tegra MMC driver
Convert the Tegra MMC driver to DM_MMC. Support for non-DM is removed
to avoid ifdefs in the code. DM_MMC is now enabled for all Tegra builds.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
(swarren, fixed some NULL pointer dereferences, removed extraneous
changes, rebased on various other changes, removed non-DM support etc.)
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2016-09-27 09:11:01 -07:00
Stephen Warren
f53c4e4bbd mmc: tegra: priv struct and naming cleanup
struct mmc_host is a Tegra-specific structure, but the name implies it's
something defined by core MMC code, which is confusing. Rename it to
struct tegra_mmc_priv to make its purpose more obvious. The new name is
also more appropriate for a DM driver private data structure, which will
be relevant later in this series.

Nothing needs access to this type except the MMC driver itself. Move the
definition into the driver C file.

Make sure all Tegra MMC functions are named tegra_mmc_*. Even though
they're all static, it's useful to have good naming so that symbol tables
are easy to interpret. A few functions aren't renamed by this patch since
they'll be deleted by a subsequent patch in this series.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-27 09:11:01 -07:00
Stephen Warren
6138d5b682 mmc: tegra: don't use periph_id in pad_init_mmc()
The MMC driver will soon be converted to use standard clock/reset APIs,
and so the periph_id field in the MMC device priv struct will disappear.
Rework the implementation of pad_init_mmc() to rely on this; using the
device register address is a much more direct test anyway.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-27 09:11:01 -07:00
Stephen Warren
6b83588eea mmc: tegra: move pad_init_mmc() into MMC driver
pad_init_mmc() is performing an SoC-specific operation, using registers
within the MMC controller. There's no reason to implement this code
outside the MMC driver, so move it inside the driver.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-27 09:11:01 -07:00
Stephen Warren
67748a73b1 mmc: tegra: use correct alias for SDHCI/MMC nodes
The Tegra MMC driver currently honors "sdhci" entries in /aliases. The
MMC core however uses "mmc" entries in /aliases. This difference will be
relevant once the Tegra MMC driver is converted to DM, and the MMC core
handles alias lookups. To avoid issues during that conversion, fix the
Tegra MMC driver and all Tegra DTs to use the same alias name as the MMC
core does.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-27 09:11:01 -07:00
Masahiro Yamada
5d97dff042 treewide: replace #include <asm-generic/errno.h> with <linux/errno.h>
Now, include/linux/errno.h is a wrapper of <asm-generic/errno.h>.
Replace all include directives for <asm-generic/errno.h> with
<linux/errno.h>.

<asm-generic/...> is supposed to be included from <asm/...> when
arch-headers fall back into generic implementation. Generally, they
should not be directly included from .c files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Add drivers/usb/host/xhci-rockchip.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-23 22:25:27 -04:00
Masahiro Yamada
1221ce459d treewide: replace #include <asm/errno.h> with <linux/errno.h>
Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content.  (both just wrap <asm-generic/errno.h>)

Replace all include directives for <asm/errno.h> with <linux/errno.h>.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-23 17:55:42 -04:00
Masahiro Yamada
24f5aec364 mmc: squash lines for immediate return
These functions can be much simpler by squashing lines for immediate
return.

For *_bind() callbacks, they will be a simple wrapper function of an
upper-level bind API.

For mmc_set_{boot_bus_width,part_conf}, they will be a wrapper of
mmc_switch().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-09-23 17:53:44 -04:00
Jacob Chen
2b42903397 mmc: dw_mmc: push/pop all FIFO data if any data request
When DTO interrupt occurred, there are any remaining data still in FIFO
due to RX FIFO threshold is larger than remaining data. It also
causes that dwmmc didn't trigger RXDR interrupt, so is TX.

It's responsibility of driver to read remaining bytes on seeing DTO
interrupt.

Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
2016-09-21 16:00:14 +09:00
Wenyou Yang
6dffdbc3a5 mmc: sdhci: Add the programmable clock mode support
Add the programmable clock mode for the clock generator.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
2016-09-20 06:46:01 +09:00
Peng Fan
e492dbb41e mmc: sd: optimize erase
To SD, there is no erase group, then the value erase_grp_size
will be default 1. When erasing SD blocks, the blocks will be
erased one by one, which is time consuming.

We use AU_SIZE as a group to speed up the erasing.

Erasing 4MB with a SD2.0 Card with AU_SIZE 4MB.
`time mmc erase 0x100000 0x2000`
time: 44.856 seconds (before optimization)
time: 0.335 seconds  (after optimization)

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Clemens Gruber <clemens.gruber@pqgruber.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Eric Nelson <eric@nelint.com>
Cc: Stephen Warren <swarren@nvidia.com>
2016-09-20 06:46:01 +09:00
Peng Fan
3697e5992f mmc: sd: extracting erase related information from sd status
Add function to read SD_STATUS information.
According to the information, get erase_timeout/erase_size/erase_offset.
Add a structure sd_ssr to include the erase related information.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Clemens Gruber <clemens.gruber@pqgruber.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Eric Nelson <eric@nelint.com>
Cc: Stephen Warren <swarren@nvidia.com>
2016-09-20 06:46:01 +09:00
Masahiro Yamada
65a25b2086 mmc: sdhci: drop CONFIG_ from CONFIG_SDHCI_CMD_MAX_TIMEOUT
No need for per-SoC adjustment for this parameter.  It should be
determined by the slowest hardware.  Currently, no board overrides
this CONFIG, so 3.2 sec is large enough.  (If not, we can make it
even larger.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-20 06:46:01 +09:00
Masahiro Yamada
d8ce77b28c mmc: sdhci: drop CONFIG_ from CONFIG_SDHCI_CMD_DEFAULT_TIME
This CONFIG is not configurable since it is not guarded by #ifndef.
Nobody has complained about that, so there is no need to keep it as
a CONFIG option.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-20 06:46:01 +09:00
Masahiro Yamada
15bd09959f mmc: sdhci: move SDMA capability check to sdhci_setup_cfg()
If CONFIG_BLK is enabled, add_sdhci() is never called.  Move this
quirk handling to sdhci_setup_cfg(), which is now the central place
for hardware capability checks.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-20 06:46:01 +09:00
Masahiro Yamada
3137e645e2 mmc: sdhci: move broken voltage quirk handling to sdhci_setup_cfg()
If CONFIG_BLK is enabled, add_sdhci() is never called.  Move this
quirk handling to sdhci_setup_cfg(), which is now the central place
for hardware capability checks.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-20 06:46:01 +09:00
Masahiro Yamada
6c67954c93 mmc: sdhci: move error message to more relevant place
"Hardware doesn't specify base clock frequency" may not be only the
error case of sdhci_setup_cfg().  It is better to print this where
the corresponding error is triggered.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-20 06:46:01 +09:00
Masahiro Yamada
8d549b61dc mmc: sdhci: move sdhci_reset() call to sdhci_init()
If CONFIG_BLK is enabled, add_sdhci() is never called.
So, sdhci_reset() is not called, either.  This is a problem for
my board as it needs the reset to start from a sane state.

Move the add_sdhci() call to sdhci_init(), which is visited
by both of the with/without CONFIG_BLK cases.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-20 06:46:01 +09:00
Masahiro Yamada
14f4723466 mmc: uniphier-sd: migrate to CONFIG_BLK
This is the state-of-the-art MMC driver implementation.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-09-14 22:54:19 +09:00
Masahiro Yamada
4a89a24e26 mmc: uniphier-sd: just return if already set to desired clock rate
With this, we can save unnecessary udelay().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 12:39:51 +09:00
Masahiro Yamada
8be12e2839 mmc: uniphier-sd: return error code if unsupported width is given
With the CONFIG_DM_MMC_OPS migration, the .set_ios callback can
return an integer now.  Return an appropriate error value rather
than sudden death by BUG().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 12:39:49 +09:00
Masahiro Yamada
4eb008460c mmc: uniphier-sd: move uniphier_sd_init() below
No more reason to define this function above the ops structure.
Move it near the caller.  Also, change its return type to void
because it never fails.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 12:39:48 +09:00
Masahiro Yamada
3937404f8b mmc: uniphier-sd: migrate to CONFIG_DM_MMC_OPS
Catch up with the DM migration.

As struct dm_mmc_ops does not have .init callback, call the init
function directly from the probe function.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 12:39:47 +09:00
Masahiro Yamada
4a70d26223 mmc: uniphier-sd: add static qualifiers to probe and remove callbacks
They are both only referenced in this file.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 12:39:46 +09:00
Stephen Warren
eb3f68afbc ARM: tegra: fix Tegra186 SDHCI clock/reset names
The Tegra SDHCI binding dictates that the reseet name for the Tegra SDHCI
clock be "sdhci" not "sdmmc", and that the clock is accessed by index
rather than by name. Fix the Tegra186 DT and MMC driver to honor this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-25 13:47:49 -07:00
Tom Rini
c98b171e10 Merge branch 'rmobile' of git://git.denx.de/u-boot-sh
[trini: Drop CMD_BOOTI as it's now on by default on ARM64]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-08-20 16:40:34 -04:00
masakazu.mochizuki.wd@hitachi.com
6f107e4cf6 arm: rmobile: Add BLANCHE board support
BLANCHE is development board based on R-Car V2H SoC (R8A7792)

This commit supports the following periherals:
- SCIF, Ethernet, QSPI, MMC

Signed-off-by: Masakazu Mochizuki <masakazu.mochizuki.wd@hitachi.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2016-08-17 10:25:35 +09:00
Yannick Gicquel
7593194685 mmc: rmobile: add a compiler barrier
Building w/ GCC v5.2, the SD card access is broken due to invalid data
in the response command reconstructed at the end of
sh_sdhci_get_response().

Add a memory barrier between the two main steps of this function to
ensure the resp[] table content is consistent before bits reordering.

This fix has been tested Ok on Porter board rev1.0 using v2016.03
release.

Signed-off-by: Yannick Gicquel <yannick.gicquel@iot.bzh>
2016-08-17 10:25:35 +09:00
Nobuhiro Iwamatsu
1cc95f6e1b ARM: Rmobile: Rename CONFIG_RMOBILE to CONFIG_ARCH_RMOBILE
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2016-08-17 10:25:34 +09:00
Jaehoon Chung
177381a9f9 mmc: mmc_legacy: fix the compiler error with disabled CONFIG_DM_MMC_OPS
To prevent the compiler error, split the checking condition whether
cfg->ops is NULL or not.
It's more clearly, because it's not included in mmc_config structure
when CONFIG_DM_MMC_OPS is disabled.

drivers/mmc/mmc_legacy.c: In function ‘mmc_create’:
drivers/mmc/mmc_legacy.c:118:31: error: ‘const struct mmc_config’ has no member named ‘ops’
drivers/mmc/mmc_legacy.c:118:58: error: ‘const struct mmc_config’ has no member named ‘ops’
make[1]: *** [drivers/mmc/mmc_legacy.o] Error 1

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-08-16 10:27:24 +09:00
Yangbo Lu
d188b11302 mmc: send CMD0 before CMD1 for some MMC cards
When the MMC framework was added in u-boot, the mmc_go_idle was
added before mmc_send_op_cond_iter in function mmc_send_op_cond
annotating that some cards seemed to need this. Actually, we still
need to do this in function mmc_complete_op_cond for those cards.
This has been verified on Micron MTFC4GACAECN eMMC chip.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2016-08-16 10:27:07 +09:00
Sekhar Nori
4de2de5149 drivers: mmc: omap_hsmmc: fix build breakage
structure member 'cd_inverted' of omap_hsmmc_data
is available only when OMAP_HSMMC_USE_GPIO is
defined.

When CONFIG_DM_MMC is defined, but not
CONFIG_OMAP_GPIO, this will cause build breakage
in omap_hsmmc driver of the sort:

  CC      drivers/mmc/omap_hsmmc.o
../drivers/mmc/omap_hsmmc.c: In function 'omap_hsmmc_ofdata_to_platdata':
../drivers/mmc/omap_hsmmc.c:1763:6: error: 'struct omap_hsmmc_data' has no member named 'cd_inverted'
  priv->cd_inverted = fdtdec_get_bool(fdt, node, "cd-inverted");
      ^

Fix this by accessing cd_inverted only when
OMAP_HSMMC_USE_GPIO is defined.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-08-16 10:24:10 +09:00
Tom Rini
0fcb9f07a1 Merge branch 'master' of git://git.denx.de/u-boot-atmel 2016-08-15 17:31:23 -04:00
Wenyou Yang
a0d0d86f5c mmc: atmel_sdhci: Convert to the driver model support
Convert the driver to the driver model while retaining the existing
legacy code. This allows the driver to support boards that have
converted to driver model as well as those that have not.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2016-08-15 22:58:05 +02:00
Stephen Warren
c04930762d mmc: tegra: port to standard clock/reset APIs
Tegra186 supports the new standard clock and reset APIs. Older Tegra SoCs
still use custom APIs. Enhance the Tegra MMC driver so that it can operate
with either set of APIs.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-15 10:26:13 -07:00
Stephen Warren
6e06acb732 fdt: allow fdtdec_get_addr_size_*() to translate addresses
Some code may want to read reg values from DT, but from nodes that aren't
associated with DM devices, so using dev_get_addr_index() isn't
appropriate. In this case, fdtdec_get_addr_size_*() are the functions to
use. However, "translation" (via the chain of ranges properties in parent
nodes) may still be desirable. Add a function parameter to request that,
and implement it. Update all call sites to default to the original
behaviour.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Squashed in build fix from Stephen:
Signed-off-by: Simon Glass <sjg@chromium.org>
2016-08-12 09:20:27 -06:00
Tom Rini
f2df3b6e99 zynq_sdhci.c: Fix warning in arasan_sdhci_probe
We no longer need to set 'caps' as it's not passed to sdhci_setup_cfg
anymore.

Fixes: 14bed52d27 ("mmc: sdhci: remove the unnecessary arguments for
		sdhci_setup_cfg")
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-08-05 20:55:31 -04:00
Jaehoon Chung
89f69e5173 mmc: sdhci: fix the compiler warning when disable CONFIG_MMC_SDMA
When disabled CONFIG_MMC_SDMA, variable caps didn't use.
This patch fixes the compiler error for -Wunused-but-set-variable

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-08-05 20:48:01 +09:00
Xu Ziyuan
720724d098 mmc: dw_mmc: fix data starvation by host timeout under FIFO mode
This patch fixes data starvation by host timeout(HTO) error interrupt
which occurred under FIFO mode transfer on rk3036 board.

The former implement, the actual bytes were transmitted may be less than
should be. The size will still subtract value of len in case of there is
no receive/transmit FIFO data request interrupt.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-08-05 14:04:36 +09:00
Xu Ziyuan
2990e07a33 mmc: dw_mmc: transfer proper bytes to FIFO
The former implement, dw_mmc will push and pop the redundant data to
FIFO, we should transfer it according to the real size.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-08-05 14:04:31 +09:00
Jaehoon Chung
14bed52d27 mmc: sdhci: remove the unnecessary arguments for sdhci_setup_cfg
Some arguments don't need to pass to sdhci_setup_cfg.
Generic variable can be used in sdhci_setup_cfg, and some arguments are
already included in sdhci_host struct.

It's enough that just pass the board specific things to sdhci_setup_cfg().
After removing the unnecessary arguments, it's more simpler than before.
It doesn't consider "Version" and "Capabilities" anymore in each SoC
driver.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-08-05 11:31:07 +09:00
Jaehoon Chung
6a879ec8e7 mmc: sdhci: remove the unused argument for sdhci_setup_cfg
buswidth isn't used anywhere in sdhci_setup_cfg.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-08-05 11:21:25 +09:00
Jaehoon Chung
e1ea7c44d6 mmc: sdhci: revert "mmc: sdhci: Claer high speed if not supported"
This "commit 429790026021d522d51617217d4b86218cca5750" is wrong.
SDHCI_QUIRK_NO_HISPD_BIT is for skipping to set CTRL_HISPD bit.

For example, Exynos didn't have CTRL_HISPD. But Highspeed mode
is supported.
(This quirks doesn't mean  that driver didn't support the Highseepd mode.)

Note: If driver didn't support the Highspeed Mode, use or add the other
quirks.

After applied this patch, all Exynos SoCs are just running with 25MHz.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-08-05 11:21:25 +09:00
Xu Ziyuan
1bd4f92cdb mmc: display mmc list information like mmc_legacy type
It's nicer to see this:

=> mmc list
dwmmc@ff0c0000: 0
dwmmc@ff0f0000: 1 (eMMC)

than this:

=> mmc list
dwmmc@ff0c0000: 0dwmmc@ff0f0000: 1 (eMMC)

With the former, it's much clearer which mmc devices are on.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-08-05 11:21:25 +09:00
Jaehoon Chung
915ffa5213 mmc: use the generic error number
Use the generic error number instead of specific error number.
If use the generic error number, it can debug more easier.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2016-08-05 11:21:25 +09:00
Jaehoon Chung
70f862808e mmc: fsl_esdhc: remove the duplicated header file
"mmc.h" is already included. It's duplicated.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-08-05 11:21:25 +09:00
Jaehoon Chung
ccd60a8524 mmc: dw_mmc: remove the duplicated header file
<asm-generic/errno.h> is already included in <errno.h>.
It can use <errno.h> instead of <asm-generic/errno.h>

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-08-05 11:21:24 +09:00
Jaehoon Chung
a034ec06ff mmc: s5p_sdhci: unset the SDHCI_QUIRK_BROKEN_R1B
Unset the SDHCI_QUIRK_BROKEN_R1B for exynos SoC.
(Tested on Exynos4 Boards.)

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
2016-08-05 11:21:24 +09:00
Jaehoon Chung
17ea3c8628 mmc: sdhci: set to INT_DATA_END when there are data
There is no data, it doesn't needs to wait for completing data transfer.
(It seems that it can be removed.)
Almost all timeout error is occured from stop command without data.
After applied this patch, I hope that we don't need to increase timeout value anymore.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
2016-08-05 11:21:24 +09:00
Masahiro Yamada
bae4a1fdf5 mmc: sdhci: clean up timeout detection
The current timeout detection logic is not very nice; it calls
get_timer(start) in the while() loop, and then calls it again after
the loop to check if a timeout error happened.

Because of the time difference between the two calls of get_timer(),
the timeout detected after the loop may not be true.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-08-05 11:21:24 +09:00
Kever Yang
46683f3da1 mmc-uclass: correct the device number
Not like the mmc-legacy which the devnum starts from 1, it starts from 0
in mmc-uclass, so the device number should be (devnum + 1) in get_mmc_num().

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-07-31 07:24:20 -06:00
Xu Ziyuan
02ebd42cf1 mmc: dw_mmc: reduce timeout detection cycle
It's no need to speed 10 seconds to wait the mmc device out from busy
status. 500 milliseconds enough.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-07-27 20:15:48 -06:00
Simon Glass
f1a485aa40 dm: socfpga: mmc: Support CONFIG_BLK
Update the driver to support using driver model for block devices.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-27 14:15:54 -06:00
Simon Glass
329a449f2c dm: mmc: zynq: Convert zynq to use driver model for MMC
Move zynq to the latest driver model support by enabling CONFIG_DM_MMC,
CONFIG_DM_MMC_OPS and CONFIG_BLK.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-27 14:15:54 -06:00
Jaehoon Chung
5628347f59 dm: mmc: dwmmc: use the callback functions as static
There are no places to call these functions.
It should be used the callback function.
Then it can be used as static functions.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-27 14:14:37 -06:00
Kever Yang
79c830653b mmc: rockchip: add SDHCI driver support for rockchip soc
Rockchip rk3399 using arasan sdhci-5.1 controller.
This patch add the controller support to enable mmc device
with full driver-model support, tested on rk3399 evb board.

According to my test result, this driver should be OK,
the command "part list mmc 0" can result in a right output,
but all the mmc command failed like this:
	=> mmc info
	No MMC device available
	Command failed, result=1

The result of get_mmc_num in cmd/mmc.c is always 0?

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-25 20:46:46 -06:00
Masahiro Yamada
4e3d84066e ARM: uniphier: use (devm_)ioremap() instead of map_sysmem()
This does not have much impact on behavior, but makes code look more
more like Linux.  The use of devm_ioremap() often helps to delete
.remove callbacks entirely.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-24 00:13:10 +09:00
Siva Durga Prasad Paladugu
1d405e207b mmc: sdhci: Disable internal clock enable bit
Disable internal clock by clearing the internal
clock enable bit. This bit needs to be cleared too
when we stop the SDCLK for changing the frequency
divisor. This bit should be set to zero when the
device is not using the Host controller.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-07-22 14:03:50 +02:00
Robert P. J. Day
62a3b7dd08 Various, unrelated tree-wide typo fixes.
Fix a number of typos, including:

     * "compatble" -> "compatible"
     * "eanbeld" -> "enabled"
     * "envrionment" -> "environment"
     * "FTD" -> "FDT" (for "flattened device tree")
     * "ommitted" -> "omitted"
     * "overriden" -> "overridden"
     * "partiton" -> "partition"
     * "propogate" -> "propagate"
     * "resourse" -> "resource"
     * "rest in piece" -> "rest in peace"
     * "suport" -> "support"
     * "varible" -> "variable"

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2016-07-16 09:43:12 -04:00
Tom Rini
1f9ef0dca0 Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2016-07-15 10:44:01 -04:00
Hans de Goede
ef36d9ae16 sunxi: Use BROM stored boot_media value to determine our boot-source
Now that we know that the BROM stores a value indicating the boot-source
at the beginning of SRAM, use that instead of trying to recreate the
BROM's boot probing.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-07-15 15:54:56 +02:00
Tom Rini
926fbcc083 Merge branch 'master' of git://git.denx.de/u-boot-samsung 2016-07-15 08:06:42 -04:00
Tobias Doerffel
26c0c15786 sunxi: mmc: increase status register polling rate for data transfers
With a recent bunch of SD3.0 cards in our A20-based board we
experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s
with previous cards from the same vendor (both 4 GB/class 10). By
increasing status register polling rate from 1 kHz to 1 MHz we were
able to reach the original transfer rates again. With the old cards
we now even reach about 16 MiB/s.

Signed-off-by: Tobias Doerffel <tobias.doerffel@ed-chemnitz.de>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-15 08:34:34 +02:00
Simon Glass
bfeb443e3d rockchip: mmc: Update the driver to support of-platdata
Add support for of-platdata with rk3288. This requires decoding the
of-platdata struct and setting up the device from that. Also the driver
needs to be renamed to match the string that of-platdata will search for.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-14 20:40:24 -06:00
Simon Glass
6809b04f48 rockchip: mmc: Move all DT decoding to ofdata_to_platdata()
It is more correct to avoid touching the device tree in the probe() method.
Update the driver to work this way.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-14 20:40:24 -06:00
Jaehoon Chung
3537ee879e mmc: exynos_dw_mmc: support the Driver mode for Exynos
This patch support the driver mode for exynos dwmmc controller.
To support the legacy model, maintained the existing code.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2016-07-12 14:29:10 +09:00
Jaehoon Chung
70f6d39433 mmc: exynos_dw_mmc: use the 4bit bus-width by default
If there is not "samsung,bus-width" property, use the 4bit buswidth by
default.
Almost all Exnyos SoCs support at least 4bit buswidth.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2016-07-12 14:28:58 +09:00
Jaehoon Chung
d956a67ed1 mmc: exynos_dw_mmc: clean the unused and unnecessary codes
Clean the unused and unnecessary codse.
This patch is one of them for preparing to use DM.
Because it's easy to maintain and combine DM after cleaning codes.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2016-07-12 14:28:52 +09:00
Jaehoon Chung
ce757b18fb mmc: exynos_dw_mmc: add the error control for checking index
PERIPH_ID_SDMMC4(131) is not continous value with PERIPH_ID_SDMMC0(75).
If there is no 'index' property in fdt, then dev_index should be
assigned to dev_id(Peripheral ID).
At this time, dev_index should be "56". It means Exynos SoC has "56"
numbers of DWMMC IP. To prevent this behavior, it needs to check the
maximum device index.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2016-07-12 14:28:47 +09:00
Jaehoon Chung
f565ea59cb mmc: exynos_dw_mmc: remove #ifdef for OF_CONTROL
Removed #ifdef for OF_CONTROL.
It might use 'OF_CONTROL' by default.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2016-07-12 14:28:42 +09:00
Jaehoon Chung
fb6706cfda mmc: exynos_dw_mmc: remove the unused function
This function have maintained for supporting Non-FDT.
Now, Almost all SoC are changed to fdt style.
So there are no that this function is called anywhere.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2016-07-12 14:28:37 +09:00
Simon Glass
4b00bdb7a4 dm: mmc: msmsdhic: Drop old MMC code
Now that we have fully moved to driver model, drop the old code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-11 14:06:44 -06:00
Simon Glass
12293f6d36 dm: mmc: msm_sdhci: Support CONFIG_BLK and CONFIG_DM_MMC_OPS
Add support for using driver model for block devices and MMC operations in
this driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-11 14:06:44 -06:00
Simon Glass
ef1e4eda6b dm: mmc: sdhci: Support CONFIG_BLK and CONFIG_DM_MMC_OPS
Add support for using driver model for block devices and MMC operations in
this driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-11 14:06:44 -06:00
Simon Glass
2a809093f0 dm: mmc: sdhci: Refactor configuration setup to support DM
Move the configuration setting into a separate function which can be used by
the driver-model code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-11 14:06:44 -06:00
Simon Glass
9a46bd3feb dm: sandbox: Convert to use CONFIG_CMD_MMC_OPS
Update the sandbox MMC emulation to use driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-11 14:06:44 -06:00
Simon Glass
42b37d8d46 dm: mmc: rockchip: Enable CONFIG_DM_MMC_OPS for all boards
Enable this option to move rockchip over to use driver model for MMC
operations.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-11 14:06:44 -06:00
Simon Glass
691272fe52 dm: mmc: dwmmc: Support CONFIG_DM_MMC_OPS
Add support to dwmmc for using driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-11 14:06:44 -06:00
Simon Glass
8ca51e51c1 dm: mmc: Add a way to use driver model for MMC operations
The driver model conversion for MMC has moved in small steps. The first step
was to have an MMC device (CONFIG_DM_MMC). The second was to use a child
block device (CONFIG_BLK). The final one is to use driver model for MMC
operations (CONFIG_DM_MMC_OP). Add support for this.

The immediate priority is to make all boards that use DM_MMC also use those
other two options. This will allow them to be removed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-11 14:06:44 -06:00
Simon Glass
c0c76ebae3 mmc: Move tracing code into separate functions
Move this code into separate functions so that it can be used from the uclass
also. Add static inline versions for when the option is disabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-11 14:06:44 -06:00
Simon Glass
6775e013c9 dm: mmc: rockchip: Support only CONFIG_BLK
Since all Rockchip boards use CONFIG_BLK, we can remove this old code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-11 14:06:44 -06:00
Simon Glass
c40704f4b1 mmc: Move MMC boot code into its own file
Rather than having an #ifdef in the main mmc.c file, control this feature
from the Makefile by moving the code into its own file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-11 14:06:44 -06:00
Simon Glass
5aed4cbba0 dm: mmc: Move non-CONFIG_BLK code into mmc_legacy.c
Rather than having #ifdef in mmc.c, move this code into the legacy file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-11 14:06:44 -06:00
Simon Glass
eede897e27 dm: mmc: Move CONFIG_BLK code into the mmc uclass
Rather than having #ifdef in mmc.c, move this code into the uclass file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-11 14:06:44 -06:00
Simon Glass
7dba0b9367 mmc: Add function declarations for mmc_bread() and mmc_switch_part()
These private functions are used both in the driver-model implementation and
in the legacy code. Add them to the header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-11 14:06:44 -06:00
Mateusz Kulikowski
eb9d3ca356 mmc: msm_sdhci: Set mmc->dev pointer in msm_sdc_probe()
MMC core expects (now) valid mmc->dev pointer.
During conversion in commit cffe5d86 not every driver was updated.

This patch fixes crash while accessing MMC on
boards using Qualcomm SDHCI controller.

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-08 09:57:30 -04:00
Steve Rae
d90bb43933 mmc: increase MMC SDHCI read status timeout
Otherwise,  ocassionally see errors like this:
  Flashing sparse image at offset 2078720
  Flashing Sparse Image
  sdhci_send_command: Timeout for status update!
  mmc fail to send stop cmd
  write_sparse_image: Write failed, block #2181088 [0]

This does not affect the actual writing speed, which is controlled by
the default value:
  CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT

It only increases the retries when reading:
  SDHCI_INT_STATUS
to avoid the timeout error.

Signed-off-by: Steve Rae <steve.rae@raedomain.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-07-01 17:42:57 -04:00
Tom Rini
44faff24f5 Merge git://git.denx.de/u-boot-fsl-qoriq 2016-06-28 15:59:05 -04:00
Peng Fan
1483151e84 mmc: fsl: introduce wp_enable
Introudce wp_enable. To check WPSPL, wp_enable needs to be set
to 1 in board code.

Take i.MX6UL for example, for some boards, they do not use WP singal,
so they does not configure USDHC1_WP_SELECT_INPUT, and its default
value is 0(GPIO1_IO02). However GPIO1_IO02 is muxed for i2c usage and
SION bit set. So USDHC controller can always get wp signal and WPSPL
shows write protect and blocks driver continuing. This is not what
we want to see, so add wp_enable, and if set to 0, just omit the
WPSPL checking and this does not effect normal working of usdhc
controller.

If wp-gpios is provided in dts, wp_enable is set to 1, otherwise 0.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-28 12:08:53 -07:00
Ye Li
84ecdf6da9 fsl_esdhc: Update clock enable bits for USDHC
The USDHC moves the 4 clock bits CARD_CLK_SOFT_EN, IPG_PERCLK_SOFT_EN,
HCLK_SOFT_EN, and IPG_CLK_SOFT_EN from sysctl register to vendorspec
register. The driver uses RSTA to replace the clock gate off
operation. But this is not a good solution because:
1. when using RSTA, we should wait this bit to clear by itself. This is not
   implemeneted in the code.
2. After RSTA is set, it is recommended that the Host Driver reset the
   external card and reinitialize it.

So in this patch, we change to use the vendorspec registers for these bits
operation.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-28 12:08:53 -07:00
Peng Fan
f53225cce4 mmc: fsl: reset to normal boot mode when eMMC fast boot
When booting in eMMC fast boot, MMC host does not exit from
boot mode after bootrom loading image. So the first command
'CMD0' sent in uboot will pull down the CMD line to low and
cause errors.

This patch cleans the MMC boot register in "mmc_init" to put the
MMC host back to normal mode.

Also clear DLL_CTRL delay line settings at USDHC initialization
to eliminate the pre-settings from boot rom.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-28 12:08:53 -07:00
Jaehoon Chung
ca2ec9adc9 mmc: dw_mmc: fix the wrong AND operation
These condition checking are wrong.
Original Author's intention might be "&" instead of "&&".
It can know whether receive or transmit data request with
BIT[4]/BIT[5] of RINTSTS register.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2016-06-27 09:43:26 +09:00
Stefan Wahren
1a3619cf82 mmc: add MMC_VERSION_5_1
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
2016-06-20 05:14:46 -04:00
Stephen Warren
135aa95002 clk: convert API to match reset/mailbox style
The following changes are made to the clock API:
* The concept of "clocks" and "peripheral clocks" are unified; each clock
  provider now implements a single set of clocks. This provides a simpler
  conceptual interface to clients, and better aligns with device tree
  clock bindings.
* Clocks are now identified with a single "struct clk", rather than
  requiring clients to store the clock provider device and clock identity
  values separately. For simple clock consumers, this isolates clients
  from internal details of the clock API.
* clk.h is split so it only contains the client/consumer API, whereas
  clk-uclass.h contains the provider API. This aligns with the recently
  added reset and mailbox APIs.
* clk_ops .of_xlate(), .request(), and .free() are added so providers
  can customize these operations if needed. This also aligns with the
  recently added reset and mailbox APIs.
* clk_disable() is added.
* All users of the current clock APIs are updated.
* Sandbox clock tests are updated to exercise clock lookup via DT, and
  clock enable/disable.
* rkclk_get_clk() is removed and replaced with standard APIs.

Buildman shows no clock-related errors for any board for which buildman
can download a toolchain.

test/py passes for sandbox (which invokes the dm clk test amongst
others).

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-06-19 17:05:55 -06:00
Eddy Petrișor
9702ec00e9 armv8: s32v234: Introduce basic support for s32v234evb
Add initial support for NXP's S32V234 SoC and S32V234EVB board.

The S32V230 family is designed to support computation-intensive applications
for image processing. The S32V234, as part of the S32V230 family, is a
high-performance automotive processor designed to support safe
computation-intensive applications in the area of vision and sensor fusion.

Code originally writen by:
Original-signed-off-by: Stoica Cosmin-Stefan <cosminstefan.stoica@freescale.com>
Original-signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Original-signed-off-by: Eddy Petrișor <eddy.petrisor@gmail.com>

Signed-off-by: Eddy Petrișor <eddy.petrisor@nxp.com>
2016-06-13 08:56:35 -04:00
Heiko Schocher
3d4f628d2f mmc: omap_hsmmc: enable 8bit interface for eMMC for AM33xx
Enable 8bit interface on HSMMC2 for am33xx to support 8bit eMMC chips.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-06-09 13:53:09 -04:00
Heiko Schocher
a5e27b416f mmc: revert mmc: Handle switch error status bit in MMC card status
revert patch:
commit: 6b2221b008: mmc: Handle switch error status bit in MMC card status

to get eMMC working on shc board

Signed-off-by: Heiko Schocher <hs@denx.de>
2016-06-09 13:53:08 -04:00
Tom Rini
c41c649c2f Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2016-06-04 08:49:08 -04:00
Yangbo Lu
cc634e2836 mmc: fsl_esdhc: fix check_and_invalidate_dcache_range function
In function check_and_invalidate_dcache_range(), there are incorrect
start address and end address of the dcache range calculated for
Layerscape platforms. This patch is to fix this issue.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-03 14:12:05 -07:00
Stephen Warren
39f633320c mmc: tegra: add basic Tegra186 support
Tegra186's MMC controller needs to be explicitly identified. Add another
compatible value for it.

Tegra186 will use an entirely different clock/reset control mechanism to
existing chips, and will use standard clock/reset APIs rather than the
existing Tegra-specific custom APIs. The driver support for that isn't
ready yet, so simply disable all clock/reset usage if compiling for
Tegra186. This must happen at compile time rather than run-time since the
custom APIs won't even be compiled in on Tegra186. In the long term, the
plan would be to convert the existing custom APIs to standard APIs and get
rid of the ifdefs completely.

The system's main eMMC will work without any clock/reset support, since
the firmware will have already initialized the controller in order to
load U-Boot. Hence the driver is useful even in this apparently crippled
state.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-05-31 11:22:59 -07:00
Simon Glass
e6c28073f9 dm: mmc: Use cfg directly in mmc_bind()
This small change tidies up the code slightly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-27 10:23:10 -06:00
Simon Glass
e419a3ec1a dm: mmc: Fix up mmc_bread/bwrite() prototypes for SPL
When these functions are not compiled in, we still need to declare the
correct function signature to avoid a build warnings in SPL. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-27 10:23:10 -06:00
Simon Glass
f6e41d17ab dm: rockchip: mmc: Allow use of CONFIG_BLK
Allow driver model to be used for block devices in the rockchip mmc driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-27 10:23:09 -06:00
Simon Glass
5e6ff810c3 dm: mmc: dwmmc: Support CONFIG_BLK
Add support for using driver model for block devices in this driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-27 10:23:09 -06:00
Simon Glass
19d2e34237 dm: mmc: Convert sdhci to support CONFIG_BLK
Update sdhci.c so that it works with driver model enabled for block devices.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-27 10:23:08 -06:00
Simon Glass
61fe076f0f mmc: Use byte array for multipliers
We don't need an int since no value is over 80. This saves a small amount of
SPL space (about 44 bytes).

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-26 20:50:29 -06:00
Simon Glass
e98dd20cce mmc: Drop mmc_register()
This function is no longer used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-26 20:50:29 -06:00
Simon Glass
f376a3cbbf dm: mmc: sandbox: Add an SD-card emulation
Add an emulation of an SD card to sandbox, allowing MMC to be used in tests.
The emulation is very simple, supporting only card detection and reading
test data.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
33fb211dd2 dm: mmc: Add support for driver-model block devices
Add support for enabling CONFIG_BLK with MMC. This involves changing a
few functions to use struct udevice and adding a MMC block device driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
ad27dd5e13 dm: mmc: Add a way to bind MMC devices with driver model
Binding an MMC device when CONFIG_BLK is enabled requires that a block
device be bound as a child of the MMC device. Add a function to do this.
The mmc_create() method will be used only when DM_BLK is disabled.

Add an unbind method also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
8ef761ed4c dm: mmc: Implement the MMC functions for block devices
Implement the functions in mmc_legacy.c for driver-model block devices, so
that MMC can use driver model for these. This allows CONFIG_BLK to be enabled
with DM_MMC.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
f8b7752e8f dm: sandbox: Only enable the sandbox MMC driver when valid
This driver will require generic MMC and block-device support in a future
commit. To avoid test errors, make this change now.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
fdbb139f0c dm: mmc: Adjust mmc_switch_part() to use a struct mmc
Instead of looking up the MMC device by number, just pass it in. This makes
it possible to use this function with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
c40fdca6b7 dm: mmc: Move the device list into a separate file
At present the MMC subsystem maintains its own list of MMC devices. This
cannot work with driver model, which needs to maintain this itself. Move the
list code into a separate 'legacy' file. The core MMC code remains, and will
be shared with the driver-model implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
cffe5d86cf dm: mmc: Set up the device pointer when using the MMC uclass
Update the existing drivers to set up this new pointer. This will be required
by the MMC uclass.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
69f45cd53b dm: mmc: Use the new select_hwpart() API
Avoid calling directly into the MMC code - use the new API call instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
cb5ec33d90 dm: mmc: Add a function to obtain the block device
The MMC block device is contained within struct mmc. But with driver model
this will not be the case. Add a function to obtain the block device. We
can later implement this for CONFIG_BLK.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
e17d1143c1 dm: mmc: Implement the select_hwpart() method
Implement this method so that hardware partitions will work correctly with
MMC.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
ff3882ac23 dm: mmc: Move mmc_switch_part() above its callers
This function is defined after it is used. In preparation for making it
static, move it up a little. Also drop the printf() which should not appear
in a driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
3c457f4d2e dm: mmc: Drop the get_dev() function
This function is implemented by the legacy block functions now. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
663acabdc5 dm: mmc: Add a legacy block interface for MMC
Add a legacy block interface for MMC.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Masahiro Yamada
cacd1d2f33 mmc: sdhci: add const qualifier to the name of struct sdhci_host
This allows to drop annoying (char *) casts when setting the host
name of struct sdhci_host.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-25 15:10:42 -04:00
Mugunthan V N
5cc6a2458e drivers: mmc: omap_hsmmc: request cd and wp gpios when DM_MMC is defined
Add request gpio for CD and WP gpios, so that the gpio can be
used for the respective purposes.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-18 12:29:16 -04:00
Mugunthan V N
4bc5e19e12 drivers: mmc: omap_hsmmc: Fix conversion of address to a pointer
omap_hsmmc driver directly typecasts fdt_addr_t to a pointer.
This is not strictly correct, as it gives a build warning when
fdt_addr_t is u64. So, use map_physmem for a proper typecasts.

This is inspired by commit 167efe01bc ("dm: ns16550: Use an address
instead of a pointer for the uart base")

drivers/mmc/omap_hsmmc.c: In function ‘omap_hsmmc_ofdata_to_platdata’:
drivers/mmc/omap_hsmmc.c:776:20: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  priv->base_addr = (struct hsmmc *)dev_get_addr(dev);
                      ^

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-18 12:29:15 -04:00
Marek Vasut
dafd5792a8 arm: socfpga: Nuke useless include
The dwmmc.h include was forgotten during the migration of dwmmc
probing to DM. Since the shiny DM is in place now, remove this
relic of the past.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
2016-04-10 17:19:49 +02:00
Peng Fan
96f0407b00 fsl: esdhc: support driver model
Support Driver Model for fsl esdhc driver.

1. Introduce a new structure struct fsl_esdhc_priv
2. Refactor fsl_esdhc_initialize which is originally used by board code.
   - Introduce fsl_esdhc_init to be common usage for DM and non-DM
   - Introduce fsl_esdhc_cfg_to_priv to build the bridge for non-DM part.
   - The original API for board code is still there, but we use
     'fsl_esdhc_cfg_to_priv' and 'fsl_esdhc_init' to serve it.
3. All the functions are changed to use 'struct fsl_esdhc_priv', except
   fsl_esdhc_initialize.
4. Since clk driver is not implemented, use mxc_get_clock to geth
   the clk and fill 'priv->sdhc_clk'.

Has been tested on i.MX6UL 14X14 EVK board:
"
=>dm tree
....
 simple_bus  [ + ]    |   `-- aips-bus@02100000
  mmc        [ + ]    |       |-- usdhc@02190000
  mmc        [ + ]    |       |-- usdhc@02194000
....
=> mmc list
FSL_SDHC: 0 (SD)
FSL_SDHC: 1 (SD)
"

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Yangbo Lu <yangbo.lu@nxp.com>
Cc: Hector Palacios <hector.palacios@digi.com>
Cc: Eric Nelson <eric@nelint.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Simon Glass <sjg@chromium.org>
Tested-By: Eric Nelson <eric@nelint.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-04-06 08:33:37 -07:00
Mateusz Kulikowski
9d11d12a16 mmc: Add support for Qualcomm SDHCI controller
Add support for SD/eMMC controller present on some Qualcomm Snapdragon
devices. This controller implements SDHCI 2.0 interface but requires
vendor-specific initialization.
Driver works in PIO mode as ADMA is not supported by U-Boot (yet).

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-04-01 17:18:08 -04:00
Tom Rini
40345e9ea7 Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2016-04-01 08:17:55 -04:00
Siarhei Siamashka
d96ebc468d sunxi: Add support for Allwinner A64 SoCs
The Allwinner A64 SoC is used in the Pine64. This patch adds
all bits necessary to compile U-Boot for it running in AArch64
mode.

Unfortunately SPL is not ready yet due to legal problems, so
we need to boot using the binary boot0 for now.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
[agraf: remove SPL code, move to AArch64]
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-04-01 09:52:28 +02:00
Alexander Graf
0ea5a04fbc sunxi: Explicitly cast u32 pointer conversions
Some parts of the sunxi code cast explicitly between u32 values and pointers.
This is not a problem in practice, because all 64bit SoCs today only use the
lower 32 bits for their phyical address space. But we need to make sure that
the compiler is sure this is not an accident as well.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-04-01 09:52:28 +02:00
Masahiro Yamada
4f80501b91 mmc: uniphier: use devm_get_addr() to get base address
Currently, fdtdec_get_addr_size() does not support the address
translation, so it cannot handle device trees with non-straight
"ranges" properties.  (This would be a problem with DTS for UniPhier
ARMv8 SoCs.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-01 00:17:19 +09:00
Bin Meng
7863ce5891 mmc: Print send_cmd response only when return value is zero
send_cmd response is valid only when no error happened. If an error
occured, let mmc_send_cmd() print the return value to aid debugging.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-27 09:12:24 -04:00
Bin Meng
53e8e40b47 mmc: Fix switch..case indention
Correct the indention level of switch..case statements.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-27 09:12:24 -04:00
Stephen Warren
a481a15600 mmc: bcm2835: fix 64-bit build warning
Fixes:
drivers/mmc/bcm2835_sdhci.c: In function ‘bcm2835_sdhci_init’:
drivers/mmc/bcm2835_sdhci.c:181:17: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2016-03-27 09:12:21 -04:00
Alexander Graf
9b5b8b6ee1 dwmmc: Increase retry timeout
When enable dcache on HiKey, we're running into MMC command timeouts
because our retry loop is now faster than the eMMC (or an external SD
card) can answer.

Increase the retry count to the same as the timeout value for status
reports.

The real fix is obviously to not base this whole thing on a cycle counter
but on real wall time, but that would be slightly more intrusive.

Signed-off-by: Alexander Graf <agraf@suse.de>
2016-03-15 15:13:05 -04:00
Paul Kocialkowski
fbf1b08a93 omap_hsmmc: Board-specific TWL6030 MMC power initialization
Boards using the TWL6030 regulator may not all use the LDOs the same way.
Some might also not use MMC1 at all, so VMMC would't have to be enabled.

This delegates TWL6030 MMC power initializations to board-specific functions,
that may still call twl6030_power_mmc_init for the default behavior.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2016-03-15 15:11:29 -04:00
Paul Kocialkowski
a85362fb3e power: twl6030: Device-index-specific MMC power initialization
Not every device has multiple MMC slots available, so it makes sense to enable
only the required LDOs for the available slots. Generic code in omap_hsmmc will
enable both VMMC and VAUX1, in doubt.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2016-03-15 15:10:51 -04:00
Tom Rini
88033d737d Merge git://git.denx.de/u-boot-dm 2016-03-14 19:21:44 -04:00
Stefan Roese
ecb57f69b2 lib/crc16.c: Rename cyg_crc16() to crc16_ccitt() and add crc start value
The original name of this function is unclear. This patch renames this
CRC16 function to crc16_ccitt() matching its name with its
implementation.

To make the usage of this function more flexible, lets add the CRC start
value as parameter to this function. This way it can be used by other
functions requiring different start values than 0 as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-14 19:18:42 -04:00
Simon Glass
bcce53d048 dm: block: Rename device number member dev to devnum
This is a device number, and we want to use 'dev' to mean a driver model
device. Rename the member.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2016-03-14 15:34:50 -06:00
Simon Glass
3e8bd46950 dm: part: Rename some partition functions
Rename three partition functions so that they start with part_. This makes
it clear what they relate to.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
2016-03-14 15:34:50 -06:00
Simon Glass
4101f68792 dm: Drop the block_dev_desc_t typedef
Use 'struct' instead of a typdef. Also since 'struct block_dev_desc' is long
and causes 80-column violations, rename it to struct blk_desc.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2016-03-14 15:34:50 -06:00
Masahiro Yamada
a111bfbfad mmc: uniphier: add driver for UniPhier SD/MMC host controller
Add a driver for the on-chip SD/eMMC host controller used by
UniPhier SoC family.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-29 03:50:15 +09:00
Michal Simek
ce0335f2b4 mmc: Kconfig: Add Arasan SDHCI entry
Add Arasan SDHCI entry to Kconfig and fix all references.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-02-22 16:21:02 +01:00
Simon Glass
e05ab0dae8 tegra: mmc: Fix comments in the MMC driver init
Fix the SoC names in two comments.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-16 09:17:50 -07:00
Bin Meng
a187559e3d Use correct spelling of "U-Boot"
Correct spelling of "U-Boot" shall be used in all written text
(documentation, comments in source files etc.).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2016-02-06 12:00:59 +01:00
Tom Rini
161b1fe745 Merge branch 'master' of git://git.denx.de/u-boot-atmel 2016-02-02 07:24:52 -05:00
Andrei Pistirica
102142c9e0 drivers: mmc: add driver for Microchip PIC32 SDHCI controller.
This driver implements platform specific glue and fixups for
PIC32 internal SDHCI controller.

Signed-off-by: Andrei Pistirica <andrei.pistirica@microchip.com>
Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-01 22:14:01 +01:00
Tom Rini
cd85bec36d Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2016-01-27 15:05:36 -05:00
Yangbo Lu
25503443ee mmc: fsl_esdhc: set Abort command type for CMD12
According to SD spec, CMD12, CMD52 for writing I/O abort in CCCR need
to be set an Abort command type when they are sent. So, we remove all
chip-specific #ifdefs and make it available for all platforms.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:13:13 -08:00
Yangbo Lu
e978a31b63 mmc: fsl_esdhc: increase data transaction timeout to 500ms
The MMC spec says "It is strongly recommended for hosts to implement
more than 500ms timeout value even if the card indicates the 250ms
maximum busy length."  Even the previous value of 300ms is known to
be insufficient for some cards. So, increase the timeout to 500ms.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:13:12 -08:00
Siva Durga Prasad Paladugu
b215614638 mmc: zynq_sdhci: Added qurik to disable high speed
Add quirk to disable high speed incase the high
speed was broken.This solves the issue where the
the controller is used in High Speed Mode and the
the hold time requirement for the JEDEC/MMC 4.41
specification is NOT met.
This timing issue is not on all boards and hence
provided config option to enable it when required.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Emil Lenchak <emill@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:54 +01:00
Siva Durga Prasad Paladugu
4297900260 mmc: sdhci: Clear high speed if not supported
Clear high speed bit if it was not supported by
the driver.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Emil Lenchak <emill@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:54 +01:00
Siva Durga Prasad Paladugu
a57a4a5d83 sdhci: zynq: Remove hardcoded value zero as min frequency
Remove hardcoded value zero as min frequency and
use config option CONFIG_ZYNQ_SDHCI_MIN_FREQ
defined in board config

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:54 +01:00
Gregory CLEMENT
b4670a0c2b mmc: atmel: Properly fix clock configuration
Timing issue occurs on eMMC not only when modifying the frequency but
also for all the switch command(CMD6). According to the MMC spec waiting
8 clocks after a switch command would be the thing to do.

This patch allows fixing CPU hang observed when trying to changing the
bus width on a eMMC on SAMA5D4.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Marek Vasut <marex@denx.de> # on DENX MA5D4EV
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Andreas Bießmann <andreas.devel@googlemail.com> # on atngw100
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
[fixed minor checkpatch warning]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-01-27 13:58:58 +01:00
Simon Glass
898d64395c rockchip: Use a separate clock ID for clocks
At present we use the same peripheral ID for clocks and pinctrl. While this
works it is probably better to use the device tree clock binding ID for
clocks. We can use the clk_get_by_index() function to find this.

Update the clock drivers and the code that uses them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
e1efec4e0a rockchip: mmc: Use a pwrseq device if available
Use the pwrseq uclass to find a suitable power sequence for the MMC device.
If this is enabled in the device tree, we will pick it up automatically.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
4a1db6d8ab dm: mmc: Try to honour the sequence order
At present we add driver-model MMC devices in the order we find them. The
'alias' order is not honoured.

It is difficult to fix this for the case where we have holes in the
sequence. But for the common case where the devices are numbered from 0
without any gaps, we can add the devices to the internal data structures
in this order.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-20 19:06:22 -07:00
Tom Rini
5b8031ccb4 Add more SPDX-License-Identifier tags
In a number of places we had wordings of the GPL (or LGPL in a few
cases) license text that were split in such a way that it wasn't caught
previously.  Convert all of these to the correct SPDX-License-Identifier
tag.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-01-19 08:31:21 -05:00
huang lin
6579385b46 mmc: rockchip: the non-removable property must point to emmc
the non-removable property point to sdcard before, it is wrong,
it must point to emmc, correct it.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-01-15 05:39:27 -07:00
Stephen Warren
873cc1d777 mmc: store hwpart in the block device
This will allow us to have multiple block device structs each referring
to the same eMMC device, yet different HW partitions.

For now, there is still a single block device per eMMC device. As before,
this block device always accesses whichever HW partition was most recently
selected. Clients wishing to make use of multiple block devices referring
to different HW partitions can simply take a copy of this block device
once it points at the correct HW partition, and use each one as they wish.
This feature will be used by the next patch.

In the future, perhaps get_device() could be enhanced to return a
dynamically allocated block device struct, to avoid the client needing to
copy it in order to maintain multiple block devices. However, this would
require all users to be updated to free those block device structs at some
point, which is rather a large change.

Most callers of mmc_switch_part() wish to permanently switch the default
MMC block device's HW partition. Enhance mmc_switch_part() so that it does
this. This removes the need for callers to do this. However,
common/env_mmc.c needs to save and restore the current HW partition. Make
it do this more explicitly.

Replace use of mmc_switch_part() with mmc_select_hwpart() in order to
remove duplicate code that skips the call if that HW partition is already
selected.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-01-13 21:05:19 -05:00
Stephen Warren
7c4213f6a5 block: pass block dev not num to read/write/erase()
This will allow the implementation to make use of data in the block_dev
structure beyond the base device number. This will be useful so that eMMC
block devices can encompass the HW partition ID rather than treating this
out-of-band. Equally, the existence of the priv field is crying out for
this patch to exist.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-01-13 21:05:18 -05:00
Simon Glass
4abe8e40a7 dm: Convert PCI MMC over to use DM PCI API
At present pci_mmc_init() does not correctly use the PCI function since the
list it passes is not terminated. The array size passed to pci_mmc_init() is
actually not used correctly. Fix this and adjust the pci_mmc_init() to scan
all available MMC devices.

Adjust this code to use the new driver model PCI API.

This should move over to the new MMC uclass at some point.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-12 10:19:09 -07:00
Eric Nelson
1aa2d074a7 mmc: update MMC_ERASE argument to match Linux kernel.
Table 41 of the JEDEC standard for eMMC says that bit 31 of
the command argument is obsolete when issuing the ERASE
command (CMD38) on page 115 of this document:
	http://www.jedec.org/sites/default/files/docs/jesd84-B45.pdf

The SD Card Association Physical Layer Simplified Specification also
makes no mention of the use of bit 31.
	https://www.sdcard.org/downloads/pls/part1_410.pdf

The Linux kernel distinguishes between secure (bit 31 set) and
non-secure erase, and this patch copies the macro names from
include/linux/mmc/core.h.

Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Eric Nelson <eric@nelint.com>
Tested-by: Hector Palacios <hector.palacios@digi.com>
2016-01-04 11:17:43 -05:00
Tom Rini
f1993ca066 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2016-01-03 10:32:24 -05:00
Eric Nelson
f0b5f23f32 ARM: imx: fsl_esdhc: fix usage of low 4 bits of sysctl register
The low four bits of the SYSCTL register are reserved on the USDHC
controller on i.MX6 and i.MX7 processors, but are used for clocking
operations on earlier models.

Guard against their usage by hiding the bit mask macros on those
processors.

These bits are used to prevent glitches when changing clocks on
i.MX35 et al. Use the RSTA bit instead for i.MX6 and i.MX7.

>From the i.MX6DQ RM:
	To prevent possible glitch on the card clock, clear the
	FRC_SDCLK_ON bit when changing clock divisor value(SDCLKFS
	or DVS in System Control Register) or setting RSTA bit.

Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Hector Palacios <hector.palacios@digi.com>
2016-01-03 15:21:21 +01:00
Dinh Nguyen
a1684b6105 arm: socfpga: fix up a questionable macro for SDMMC
Move the macro into the socfpga_dwmci_clksel().

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Marek Vasut <marex@denx.de>
[fix parenthesis in the sdmmc_mask]
2015-12-20 03:44:56 +01:00
Sjoerd Simons
fc011f6402 mmc: mmc: Don't use sprintf when using tiny-printf
There is no sprintf implementation in tiny-printf, so don't try to use
it when tiny-printf if used.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
2015-12-13 17:07:31 -07:00
Tom Rini
dcf4cb068e Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze 2015-12-07 08:13:02 -05:00
Michal Simek
d9ae52c8f0 zynq: sdhci: Move driver to DM
Move driver to DM

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-12-07 10:14:29 +01:00
Michal Simek
400434537b zynq: sdhci: Remove zynq_sdhci_of_init()
Prepare for using DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-12-07 10:14:29 +01:00
Siva Durga Prasad Paladugu
b8a9bebeec zynq: sdhci: Calculate minimum frequency based on max frequency
Calculate the minimum sd clock based on max clock. This will
be done by add_sdhci() if we pass minimum clock as zero.
It also does based on SD host contoller version.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-12-07 10:14:29 +01:00
Marek Vasut
c35ed77a78 mmc: dwmmc: socfpga: Convert to DM
Convert the SoCFPGA shim for registering the DWMMC driver to DM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2015-12-07 00:15:59 +01:00
huang lin
2863724831 rockchip: mmc: get the fifo mode and fifo depth property from dts
rk3036 mmc do not have internal dma, so we use fifo mode when read
and write data, we get the fifo mode and fifo depth property from
dts, pass to dw_mmc driver.

Signed-off-by: Lin Huang <hl@rock-chips.com>
2015-12-01 08:07:22 -07:00
huang lin
ace2198b7c rockchip: mmc: use non-removable property to distinguish emmc and sdcard register
emmc and sdcard have different register address, use non-removeable property
to distinguish them.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01 08:07:22 -07:00
huang lin
a65f51b978 mmc: dw_mmc: support fifo mode in dwc mmc driver
some soc(rk3036 etc) use dw_mmc but do not have internal dma,
so we implement fifo mode to read and write data.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01 08:07:22 -07:00
huang lin
f382eb833a mmc: dw_mmc: move data transfer as a separate function
the data transfer seem to long in the dwmci_send_cmd function,
so move this block as a separate funciton.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01 08:07:22 -07:00
Chin Liang See
9a41404dc6 mmc: socfpga_dw_mmc: Move drvsel and smplsel to dts
socfpga_dw_mmc driver will obtain the drvsel and
smplsel value from device tree instead of definition
in config header file.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Marek Vasut <marex@denx.de>
2015-11-30 13:30:19 +01:00
Michal Simek
f3bd72801a zynq: sdhci: Define max clock by macro
zc1571 with silicon can operate on 200MHz maximum frequency. Setup this
frequency by default and fix setting for ep108.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-19 14:03:05 +01:00
Prabhakar Kushwaha
41f7be3c78 driver: dwmmc: Fix pointer conversion warnings for hikey
Fix below compilation warings happening for hikey_defconfig

drivers/mmc/dw_mmc.c: In function ‘dwmci_set_idma_desc’:
drivers/mmc/dw_mmc.c:43:20: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
  desc->next_addr = (unsigned int)desc + sizeof(struct dwmci_idmac);
                    ^
drivers/mmc/dw_mmc.c: In function ‘dwmci_prepare_data’:
drivers/mmc/dw_mmc.c:61:35: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
  dwmci_writel(host, DWMCI_DBADDR, (unsigned int)cur_idmac);
                                   ^
drivers/mmc/dw_mmc.c:73:9: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
         (u32)bounce_buffer + (i * PAGE_SIZE));
         ^
  CC      drivers/mmc/hi6220_dw_mmc.o
drivers/mmc/hi6220_dw_mmc.c: In function ‘hi6220_dwmci_add_port’:
drivers/mmc/hi6220_dw_mmc.c:51:17: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
  host->ioaddr = (void *)regbase;

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
2015-11-12 15:59:00 -05:00
Tom Rini
60b25259a5 Merge git://git.denx.de/u-boot-samsung 2015-11-05 07:46:45 -05:00
Wenyou Yang
a3b59b1523 mmc: atmel: Add atmel sdhci support
The SDHCI is introduced by sama5d2, named as Secure Digital Multimedia
Card Controller(SDMMC). It supports the embedded MultiMedia Card (e.MMC)
Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO
V3.0 specification. It is compliant with the SD Host Controller Standard
V3.0 specification.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-11-03 14:21:31 +01:00
Wenyou Yang
79667b7b76 mmc: sdhci: Fix the SD clock stop sequence
According to the SDHC specification, stopping the SD Clock is by setting
the SD Clock Enable bit in the Clock Control register at 0, instead of
setting all bits at 0.

Before stopping the SD clock, we need to make sure all SD transactions
to complete, so add checking the CMD and DAT bits in the Presen State
register, before stopping the SD clock.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
2015-11-03 14:21:30 +01:00
Yangbo Lu
bf50be835e mmc: fsl_esdhc: enable EVDD automatic control for SD/MMC Legacy Adapter Card
When detecting SDHC Adapter Card Type 2(SD/MMC Legacy Adapter Card),
enable EVDD automatic control via SDHC_VS. This could support SD card
IO voltage switching for UHS-1 speed mode.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-02 08:50:29 -08:00
Yangbo Lu
cdc69550d2 mmc: fsl_esdhc: enable dat[4:7] for eMMC4.5 Adapter Card
If adapter card type identification is supported for platform, we would
enable dat[4:7] for eMMC4.5 Adapter Card.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-02 08:49:51 -08:00
Shaohui Xie
512bdbd46a Powerpc: eSDHC: expand a fix to T4160
commit b8e5b07225 "Powerpc: eSDHC: Fix mmc read write err in uboot of
T4240QDS board", T4160 also needs this fix.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-02 08:49:32 -08:00
Przemyslaw Marczak
96094d4c46 s5p sdhci: call pinmux for card's gpio pins before use them
The SD card detection depends on checking one pin state.
But the pin was configured after card was detected, which is wrong.

This commit fixes this, by moving call to pinmux before use the pin.

Tested-on: Odroid U3 and Odroid X2.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-11-02 10:38:14 +09:00
Marek Vasut
877807e193 mmc: atmel: Zap global 'initialized' variable
Global variables are bad. Get rid of this particular one, so we can
correctly instantiate multiple atmel mci interfaces, without having
them interfere with one another.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-11-01 22:02:15 +01:00
Marek Vasut
6b75d35949 mmc: atmel: Implement proper private data
Instead of passing just the register area as a private data, introduce
a proper struct atmel_mci_priv structure instead. This will become useful
in the subsequent patch, where we eliminate the global variable from this
driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
[fix free()]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-11-01 22:02:15 +01:00
Marek Vasut
ecfb0ff812 mmc: atmel: Fix clock configuration
After silencing the prints which were generated when reconfiguring the
clock of the SD/MMC bus, surprisingly, the driver stopped working such
that every attempt to use the SD/MMC bus caused the CPU to get totally
stuck hard. It turns out that the prints generated a short delay, which
was necessary for the CPU to reconfigure the clock without getting stuck.
Thus, this patch adds a short delay after the clock configuration instead.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-11-01 22:02:15 +01:00
Marek Vasut
b84c9c9a98 mmc: atmel: Silence debug output
This driver generates clearly debugging prints when changing clock
speed, so silence those. Furthermore, the driver generates further
prints in case a command fails to complete. The later case woud be
useful, but for eMMC, command 8 can fail and it's not an error but
a part of the specification. Thus, make this debug() as well.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
[fix checkpatch warnings]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-11-01 22:02:14 +01:00
Yangbo Lu
8ef0d5c438 armv8/ls1043ardb: esdhc: Add esdhc support for ls1043ardb
This patch adds esdhc support for ls1043ardb.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29 10:34:01 -07:00
Mugunthan V N
a9d6a7e23a drivers: mmc: omap_hsmmc: convert driver to adopt device driver model
adopt omap_hsmmc driver to device driver model

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2015-10-22 14:43:57 -04:00
Roger Quadros
3b68939fa0 ARM: k2g: add SD card and eMMC support
Add MMC support for k2g

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
2015-10-22 14:22:25 -04:00
Tom Rini
e8d124fae0 Merge git://git.denx.de/u-boot-marvell 2015-10-20 21:59:40 -04:00
Stefan Roese
5b37212a3d mmc: mv_sdhci: Configure the SDHCI MBUS bridge windows
This driver did not yet configure the SDHCI MBUS bridge registers.
Without this and with CONFIG_MMC_SDMA enabled, mmc hangs at random
times. As DMA cannot complete correctly.

Tested on db-88f6820-gp eval board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Dirk Eibach <eibach@gdsys.cc>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
2015-10-21 02:25:02 +02:00
Maxime Ripard
44c798799f sunxi: Use Kconfig CONFIG_MMC
Not all sunxi boards have an MMC embedded. Switching to the Kconfig option
will allow to enable or disable the support in each boards' defconfig.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-10-20 22:48:28 +02:00
Maxime Ripard
7a777f6d6f mmc: Add generic Kconfig option
Add a generic Kconfig option for the CONFIG_MMC option that was used before
in the configuration headers.

Since all the architectures need to be converted to that first, depend on
an non-existent config option that will be extended with architectures that
use that option.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-10-20 22:48:28 +02:00
Tobias Jakobi
2308ea7c6f exynos: more debug and cleanup in do_sdhci_init()
Add more debug printfs in do_sdhci_init() for calls
that can potentially fail.

Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-10-13 20:22:28 +09:00
Tobias Jakobi
995a54cc12 exynos: be more verbose in process_nodes()
In case sdhci_get_config() or do_sdhci_init() fail, show
the error code that was returned.

Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-10-13 20:22:28 +09:00
Tobias Jakobi
6a9fbb6e20 exynos: Fix passing of errors in exynos_mmc_init()
exynos_mmc_init() always returns zero, so for the caller
it looks like it never fails.

Correct this by returning the error code of process_nodes().
For process_nodes() do something similar and return early
when do_sdhci_init() fails.

v2: Only fail in process_nodes() if we fail on all
    available nodes.

Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-10-13 20:22:28 +09:00
Tobias Jakobi
1a9d1731f9 exynos: Properly zero initialize host in s5p_sdhci_init()
This makes sure that setting the host_caps in s5p_sdhci_core_init()
doesn't operate on potentially uninitialized memory.

Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-10-13 20:22:28 +09:00
Hans de Goede
be90974c43 sunxi: mmc: Fix clk-delay settings
In recent allwinner kernel sources the mmc/sdio clk-delay settings have
been slightly tweaked, and for sun9i they are completely different then
what we are using.

This commit brings us in sync with what allwinner does, fixing problems
accessing sdcards on some A33 devices (and likely others).

For pre sun9i hardware this makes the following changes:
-At 400Khz change the sample delay from 7 to 0 (first introduced in A31 sdk)
-At 50 Mhz change the sample delay from 5 to 4 (first introduced in A23 sdk)
-Above 50 MHz change the out delay from 2 to 1 (first introduced in A20 sdk)

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-09-29 11:50:07 +02:00
Łukasz Majewski
4d58e10e3e mmc: dw_mmc: Increase timeout to 4 minutes (as in Linux kernel)
The commit: d9dbb97be0
"mmc: dw_mmc: Zap endless timeout" removed endless loop waiting for end
of dw mmc transfer.

For some workloads - dfu test @ Odroid XU3 (sending 8MiB file) -
and SD cards (e.g. MicroSD Kingston 4GiB, Adata 4GiB)
the default timeout is to short.

The new value - 4 minutes (240 seconds) - is the same as the one used in
Linux kernel driver. Such fix should be good enough until we come up
with better fix for this issue.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@konsulko.com>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-09-28 11:03:56 -04:00
Simon Glass
cf92e05c01 Move ALLOC_CACHE_ALIGN_BUFFER() to the new memalign.h header
Now that we have a new header file for cache-aligned allocation, we should
move the stack-based allocation macro there also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 17:15:20 -04:00
Marek Vasut
129adf5bf4 mmc: dw_mmc: Probe the MMC from OF
Rework the driver to probe the MMC controller from Device Tree
and make it mandatory. There is no longer support for probing
from the ancient qts-generated header files.

This patch now also removes previous temporary workaround.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@konsulko.com>
2015-09-04 11:54:20 +02:00
Sjoerd Simons
8e3332e223 mmc: Probe DM based mmc devices in u-boot
During mmc initialize probe all devices with the MMC Uclass if build
with CONFIG_DM_MMC

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-02 21:28:24 -06:00
Simon Glass
a8cb4fb56a rockchip: Add an MMC driver
Add an MMC driver which supports RK3288, but may also support other SoCs.
It uses the Designware MMC device.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-02 21:28:24 -06:00
Simon Glass
e3563f2ec7 mmc: Support bypass mode with the get_mmc_clk() method
Some SoCs want to adjust the input clock to the DWMMC block as a way of
controlling the MMC bus clock. Update the get_mmc_clk() method to support
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2015-09-02 21:28:23 -06:00
Yousong Zhou
28f69b9a22 sunxi: mmc: set transfer timeout according to byte_cnt.
Originally a timeout value of 2 seconds was used regardless of the size
of data to be transfered.  This prevented slow devices from working
correctly while there was no much gain for faster devices, e.g. it takes
3708ms for a transfer of uImage of size 1899008 bytes.

Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-08-31 08:43:42 +02:00
Marcel Ziswiler
54a5cf81c4 arm: pxa: mmc: clean-up include file order
Cleaning up order of include files by sorting them alphabetically
keeping in mind to leave common.h on top.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2015-08-24 20:30:37 +02:00
Masahiro Yamada
0f9258228e of: clean up OF_CONTROL ifdef conditionals
We have flipped CONFIG_SPL_DISABLE_OF_CONTROL.  We have cleansing
devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear
away the ugly logic in include/fdtdec.h:

 #ifdef CONFIG_OF_CONTROL
 # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL)
 #  define OF_CONTROL 0
 # else
 #  define OF_CONTROL 1
 # endif
 #else
 # define OF_CONTROL 0
 #endif

Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute.  It refers to
CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for
SPL.

Also, we no longer have to cancel CONFIG_OF_CONTROL in
include/config_uncmd_spl.h and scripts/Makefile.spl.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-18 13:46:05 -04:00
Tom Rini
0741701acf Merge branch 'master' of git://git.denx.de/u-boot-mmc 2015-08-13 07:20:44 -04:00
Yoshinori Sato
6f67b69b15 mmc_spi: Big-endian support
Currently implement always swap for big-endian value.
So doesn't work big-endian environment.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
2015-08-13 11:24:26 +03:00
Simon Glass
760177dff4 dw_mmc: Calculate dwmmc FIFO threshold size if not provided
We can calculate this. Add code to do this if it is not provided.

panto: prefix changed to dw_mmc to make things easier to grep

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2015-08-13 11:24:26 +03:00
Nikita Kiryanov
9fbdca6056 mmc: omap_hsmmc: enable 8bit interface for eMMC for AM43xx
Enable 8bit interface on HSMMC2 for am43xx to support 8bit eMMC chips.

Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
2015-08-12 20:48:04 -04:00
Nikita Kiryanov
dce55b934d mmc: omap_hsmmc: enable proper CMD(DAT) lines reset procedure for am43xx
The CMD(DAT) lines reset procedure described in the OMAP4(AM335x,
OMAP5, DRA7xx) TRMs is also necessary for AM43XX. Enable it in the
driver.

Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
2015-08-12 20:48:04 -04:00
Peter Griffin
447da58b57 mmc: hi6220_dw_mmc: Add hi6220 glue code for dw_mmc controller.
This patch adds the glue code for hi6220 SoC which has 2x synopsis
dw_mmc controllers. This will be used by the hikey board support
in subsequent patches.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-12 20:48:01 -04:00
Simon Glass
1c87ffe8d1 mmc: dw_mmc: Avoid using printf() for errors
The dw_mmc driver uses printf() in various places.

These bloat the code and cause problems for SPL. Use debug() where possible
and try to return a useful error code instead.

panto: Small rework to make it apply against top of tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2015-08-11 21:52:43 +03:00
Marek Vasut
9042d974d2 mmc: dw_mmc: Improve handling of data transfer failure
In case the data transfer failure happens, instead of returning
immediatelly, make sure the DMA is disabled, status register is
cleared and the bounce buffer is stopped.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@konsulko.com>
2015-08-11 20:44:30 +03:00
Marek Vasut
d9dbb97be0 mmc: dw_mmc: Zap endless timeout
Endless timeouts are bad, since if we get stuck in one, we have no
way out. Zap this one by implementing proper timeout.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@konsulko.com>
2015-08-11 20:44:21 +03:00
Marek Vasut
603b2f3a74 mmc: dw_mmc: Stop bounce buffer even in case of failure
The driver didn't stop the bounce buffer in case a data transfer
failed. This would lead to memory leakage if the communication
between the CPU and the card is unreliable. Add the missing call
to stop the bounce buffer.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@konsulko.com>
2015-08-11 20:43:34 +03:00
Simon Glass
c95ed7d9e7 exynos: Correct return value in exynos_mmc_init()
This function should return 0 on success, not 1. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:14 -06:00
Tom Rini
e3d50d4292 fsl_esdhc.c: Always make check_and_invalidate_dcache_range available
This function is called from esdhc_send_cmd so we need it available to
everyone.

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-08-02 10:27:52 -04:00
Tom Rini
7a1af7a79b Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2015-08-02 07:40:37 -04:00
Tom Warren
7aaa5a60ce ARM: Tegra210: Add support to common Tegra source/config files
Derived from Tegra124, modified as appropriate during T210
board bringup. Cleaned up debug statements to conserve
string space, too. This also adds misc 64-bit changes
from Thierry Reding/Stephen Warren.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2015-07-28 10:30:20 -07:00
Thierry Reding
c39e2a75fd mmc: tegra: Build warning fixes for 64-bit
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-07-27 15:54:02 -07:00
Peng Fan
4683b22065 mmc:fsl_esdhc invalidate dcache before read
DCIMVAC is upgraded to DCCIMVAC for the individual processor
(Cortex-A7) that the DCIMVAC is executed on.

We should follow the linux dma follow. Before DMA read, first
invalidate dcache then after DMA read, invalidate dcache again.

With the DMA direction DMA_FROM_DEVICE, the dcache need be
invalidated again after the DMA completion. The reason is
that we need explicity make sure the dcache been invalidated
thus to get the DMA'ed memory correctly from the physical memory.
Any cache-line fill during the DMA operations such as the
pre-fetching can cause the DMA coherency issue, thus CPU get the stale data.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2015-07-26 12:17:20 +02:00
Daniel Kochmański
645c48f50e sunxi: Create helper function veryfing valid boot signature on MMC
This patch extracts checking for valid SD card "eGON.BT0" signature from
`board_mmc_init` into function `sunxi_mmc_has_egon_boot_signature`.

Buffer for mmc sector is allocated and freed at runtime. `panic` is
triggered on malloc failure.

Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu>
CC: Roy Spliet <r.spliet@ultimaker.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
[hdegoede@redhat.com: Small bugfix to make it work for devs other then mmc0]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-07-24 16:17:08 +02:00
Daniel Kochmański
1b26bab12e mmc: Protect mmc_initialize from initialising mmc multiple times
`mmc_initialize` might be called multiple times leading to the mmc-controllers
being initialised twice, and initialising the `mmc_devices` list head twice
which may lead to memory leaks.

Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu>
CC: Roy Spliet <r.spliet@ultimaker.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
CC: Pantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-07-24 16:17:08 +02:00
Simon Glass
8e6cc46178 dm: test: Add a test for the mmc uclass
Add a test to confirm that we can probe this device. Since there is no
MMC stack support in sandbox at present, this is as far as the test goes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:32 -06:00
Simon Glass
1169299135 mmc: Add debug() output on read errors
Allow read errors to be diagnosed more easily.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:25 -06:00
Simon Glass
e7ecf7cb5a dm: mmc: Add an MMC uclass
Add basic support for MMC, providing a uclass which can set up an MMC
device. This allows MMC drivers to move to using driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:25 -06:00
Stefan Roese
492d3223b0 mmc: sdhci.c: Add config option to use a fixed buffer for transfers
While implementing SDIO/MMC SPL booting for the Marvell Armada 38x, the
following problem occured. The SPL runs in internal SRAM which is
the L2 cache locked to memory. When the MMC buffers now are located
on the stack (or bss), the SDIO controller (SDHCI) can't write into
this L2 cache memory.

This patch introduces a method to use a fixed buffer that will be
used for all transfers by defining CONFIG_FIXED_SDHCI_ALIGNED_BUFFER.
This way, the board can use this buffer address located in SDRAM
for all transfers. This solves this SPL problem on the A38x and
should only be used in the SPL U-Boot version.

Tested for SPL booting on Marvell Armada 38x DB-88F6820-GP board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-07-10 14:54:05 +02:00
Stefan Roese
29905a451b mmc: sdhci: Use timer based timeout detection in sdhci_send_command()
The loop counter based timeout detection does not work on the Armada
38x based board (DB-88F6820-GP). At least with dcache enabled a
timeout is detected. Without dcache enabled, the timeout does not
occur. Increasing the loop counter solves this issue. But a better
solution is to use a timer based timeout detection instead. This
patch now implements this timer based detection.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-07-10 14:54:00 +02:00
Marek Vasut
9f1b4456c9 mmc: bcm2835_sdhci: Restore original delay behavior
Patch 33fe2fb8df titled
"mmc: bcm283x: Remove get_timer_us() from mmc driver"
incorrectly replaced ad-hoc get_timer_us() function
with a plain get_timer(). The get_timer() operates in
mSec units instead of uSec though, which caused very
slow operation of the driver.

Restore the original behavior of the driver, but avoid
get_timer_us() and use timer_get_us() instead. The later
is part of the standard API.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jakub Kiciński <moorray3@wp.pl>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Jakub Kicinski <kubakici@wp.pl>
2015-06-25 17:04:37 -04:00
Tom Rini
180f87fcc5 mmc_write.c: Make mmc_berase do 32bit safe 64bit math
We want to see if the requested start or total block count are
unaligned.  We discard the whole numbers and only care about the
remainder.  Update the code to use div_u64_rem here and add a comment.

Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Bernhard Nortmann <bernhard.nortmann@web.de>
Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Bernhard Nortmann <bernhard.nortmann@web.de>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2015-06-18 16:11:41 -04:00
Hans de Goede
1c09fa38e0 sunxi: mmc: Enable pull-up on card-detect gpio pin
On some boards we need to enable the internal pull-up te reliable detect
that no card is inserted.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-06-04 14:08:28 +02:00
Tom Rini
d81572c272 Merge git://git.denx.de/u-boot-mpc85xx 2015-05-05 14:57:23 -04:00
Tom Rini
ff7e9cfc33 Merge branch 'master' of git://git.denx.de/u-boot-mmc 2015-05-05 07:00:38 -04:00
Marek Vasut
33fe2fb8df ARM: mmc: bcm283x: Remove get_timer_us() from mmc driver
The get_timer_us() function is something which is no longer
existing in case we use generic timer framework, so replace
it with get_timer().

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tyler Baker <tyler.baker@linaro.org>
2015-05-05 12:29:42 +03:00
Simon Glass
707ac1ad17 tegra: mmc: Set the removable flag correctly
If the mmc device is non-removable (as indicated by the device tree), set
the flag so that users of the device know.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2015-05-05 12:29:42 +03:00
Alexander Stein
ebe78bb993 mmc: bcm2835_sdhci: Use calloc to allocate bcm2835_sdhci_host
We need to clear the allocated memory explicitly as the included
struct sdhci_host has function pointers. Those are compared to NULL to
test if this (optional) feature is supported. Leaving them undefined let
u-boot jump to arbitrary memory.

Signed-off-by: Alexander Stein <alexanders83@web.de>
2015-05-05 12:29:42 +03:00
Yangbo Lu
253d5bdd64 mmc: fsl_esdhc: update eMMC44 adapter card erase timeout
Freescale eMMC44 adapter card uses Micron N2M400FDB311A3CF eMMC
memory. According to the silicon datasheet, secure erase timeout
is 600ms. So increase erase timeout value from 250ms to 600ms.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
2015-05-05 12:29:42 +03:00
Kevin Liu
5e1c23cd39 mmc: sdhci: add timeout setting for response busy command
Timeout interrupt also work for response busy command(R1b) like
cmd38/cmd6. So need to set it accordingly. Current code only
set timeout for data command.

Signed-off-by: Kevin Liu <kliu5@marvell.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
2015-05-05 12:29:42 +03:00
Rob Herring
5a20397b00 mmc: remove the MMC_MODE_HC flag
High capacity support is not a host capability, but a device capability
that is queried via the OCR. The flag in the operating conditions
request argument can just be set unconditionally. This matches the Linux
implementation.

[panto] Hand merged and renumbering MMC_MODE_DDR_52MHz.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
2015-05-05 12:29:36 +03:00
Andrew Gabbasov
bd47c13583 mmc: Fix splitting device initialization
Starting part of device initialization sets the init_in_progress flag
only if the MMC card did not yet come to ready state and needs to continue
polling. If the card is SD or if the MMC card became ready quickly,
the flag is not set and (if using pre-initialization) the starting
phase will be re-executed from mmc_init function.

Set the init_in_progress flag in all non-error cases. Also, move flags
setting statements around so that the flags are not set in error paths.
Also, IN_PROGRESS return status becomes unnecessary, so get rid of it.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2015-05-05 11:55:46 +03:00
Andrew Gabbasov
1677eef459 mmc: Restructure polling loops to avoid extra delays
The polling loops in sd_send_op_cond and mmc_complete_op_cond functions
check the ready flag state at the end of the loop, that is after executing
a delay inside the loop, which, in case of exiting with no error,
is not needed. Also, one of these loops, as well as the loop
in mmc_send_status, have the delay just before exiting on timeout
conditions.

Restructure all these loops to check the respective conditions before making
a delay for the next loop pass, and to appropriately exit without the delay.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2015-05-05 11:55:00 +03:00
Andrew Gabbasov
cc17c01f2d mmc: Continue polling MMC card for OCR only if it is still not ready
Some MMC cards come to ready state quite quickly, so that the respective
flag appears to be set in mmc_send_op_cond already. In this case trying
to continue polling the card with CMD1 in mmc_complete_op_cond is incorrect
and may lead to unpredictable results. So check the flag before polling
and skip it appropriately.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2015-05-05 11:54:40 +03:00
Andrew Gabbasov
5289b5350b mmc: Do not pass external mmc_cmd structure to mmc_send_op_cond_iter()
The previous change to use 'ocr' structure field for storing send_op_cond
command response also stopped using command response directly
outside of mmc_send_op_cond_iter(). Now it becomes possible to use
command structure in mmc_send_op_cond_iter() locally, removing a necessity
to pass it as an argument from the caller.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2015-05-05 11:54:09 +03:00
Andrew Gabbasov
a626c8d418 mmc: Avoid extra duplicate entry in mmc device structure
The 'op_cond_response' field in mmc structure contains the response
from the last SEND_OP_COND MMC command while making iterational
polling of the card. Later it is copied to 'ocr' field, designed
to contain the OCR register value, which is actually the same
response from the same command. So, these fields have actually
the same data, just in different time periods. It's easier to use
the same 'ocr' field in both cases at once, without temporary using
of the 'op_cond_response' field.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2015-05-05 11:53:52 +03:00
Yangbo Lu
2d9ca2c72c mmc: fsl_esdhc: Add peripheral clock support
The SD clock could be generated by platform clock or peripheral
clock for some platforms. This patch adds peripheral clock
support for T1024/T1040/T2080. To enable it, define
CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-05-04 09:25:39 -07:00
Yangbo Lu
5a8dbdc6b4 mmc: fsl_esdhc: Add adapter card type identification support
Add adapter card type identification support by reading
FPGA STAT_PRES1 register SDHC Card ID[0:2] bits. To use this function,
define CONFIG_FSL_ESDHC_ADAPTER_IDENT.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
[York Sun: resolve conflicts in README.fsl-esdhc]
Reviewed-by: York Sun <yorksun@freescale.com>
2015-05-04 09:25:19 -07:00
Hans de Goede
90641f82f1 sunxi: mmc: Fix card-detect gpio handling to work with the driver-model
The driver-model gpio functions may return another value then -1 as error,
make the sunxi mmc code properly handle this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-05-04 16:51:52 +02:00
Hans de Goede
44d8ae5b69 sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool
sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i
have a various things in common, like having separate ahb reset control
registers, the SID living inside the pmic, custom pmic busses, new style
watchdog, etc.

This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be
used to check for these features avoiding the need for an ever growing list
of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more
"new style" sunxi SoCs.

Note that this commit changes the behavior of the gmac and hdmi code for
sun8i and the upcoming sun9i devices. This does not matter as sun8i does
not have gmac nor hdmi, and sun9i has new hardware-blocks for these so
the old code will not work there.

Also this is intentional as if a sun8i / sun9i variant which does use the
old hwblocks shows up then the GEN_SUN6I code paths will be the right ones
to use.

For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-05-04 16:51:51 +02:00
Siva Durga Prasad Paladugu
eddabd1662 zynqmp: sdhci: Remove the quirk SDHCI_QUIRK_NO_CD
Remove the quirk SDHCI_QUIRK_NO_CD as it is not
required.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-04-29 11:19:03 +02:00
Yangbo Lu
8b06460e55 ls2085a: esdhc: Add esdhc support for ls2085a
This patch adds esdhc support for ls2085a.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 16:46:51 -07:00
Masahiro Yamada
d6c418e4b8 ARM: bcm283x: move SoC headers to mach-bcm283x/include/mach
Move arch/arm/include/asm/arch-bcm283x/*
  -> arch/arm/mach-bcm283x/include/mach/*

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2015-03-28 09:03:09 -04:00
Rob Herring
3a48944bc9 mv_sdhci: fix warnings on 64-bit builds
Change addresses to unsigned long to be compatible with 64-bit builds.
Regardless of fixing warnings, the device is still only 32-bit capable.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
2015-03-18 09:56:17 +02:00
Rob Herring
3c1fcb770b sdhci: fix warnings on 64-bit builds
Change addresses to unsigned long to be compatible with 64-bit builds.
Regardless of fixing warnings, the device is still only 32-bit capable.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
2015-03-18 09:55:59 +02:00
Matt Reimer
e113fe3c06 mmc: sdhci: don't clobber adjacent registers
SDHCI_HOST_CONTROL is a byte-sized register, so don't write to it
as if it were a long, as that would result in clobbering the three
registers following.

Signed-off-by: Matt Reimer <mreimer@sdgsystems.com>
2015-03-18 09:53:01 +02:00
Matt Reimer
8ebde4f0b3 mmc: s5p: properly mask SELBASECLK
Properly mask SELBASECLK by using an actual mask rather than the
number of bits to shift in order to create the mask.

Signed-off-by: Matt Reimer <mreimer@sdgsystems.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2015-03-18 09:51:56 +02:00
Peng Fan
323aaaa1e3 mmc: fsl_esdhc fix register offset
Commit f022d36e8a introduces
error register offset.

Change the "char reserved3[59]" to "char reserved3[56]".

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-03-17 09:09:47 -04:00
Stefano Babic
b9cb64825b Merge branch 'master' of git://git.denx.de/u-boot 2015-03-02 09:42:53 +01:00
Volodymyr Riazantsev
0e1bf614d5 mmc: fsl_esdhc: Add support for DDR mode
Add support of the DDR mode for eSDHC driver.
Enable it for i.MX6 SoC family only.

Signed-off-by: Volodymyr Riazantsev <volodymyr.riazantsev@globallogic.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-02-24 13:11:10 -08:00
Matt Reimer
f88a429f11 mmc: sdhci: fix bus width switching on Samsung SoCs
Fix bus width switching from 8-bit mode down to 4-bit or 1-bit modes on
Samsung SoCs using SDHCI_QUIRK_USE_WIDE8.  These SoCs report controller
version 2.0 yet they support 8-bit bus widths.  If 8-bit mode was
previously enabled and then an operation like "mmc dev" caused a switch
back down to 4-bit or 1-bit mode, WIDE8 was left set, causing failures.

This problem was manifested by "mmc dev" timing out.

Signed-off-by: Matt Reimer <mreimer@sdgsystems.com>
2015-02-23 19:52:00 +02:00
Przemyslaw Marczak
34dd928492 mmc: print SD/eMMC type for inited mmc devices
Depending on the boot priority, the eMMC/SD cards,
can be initialized with the same numbers for each boot.

To be sure which mmc device is SD and which is eMMC,
this info is printed by 'mmc list' command, when
the init is done.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
2015-02-23 19:49:49 +02:00
Przemyslaw Marczak
64029f7aee mmc: exynos dwmmc: check boot mode before init dwmmc
Before this commit, the mmc devices were always registered
in the same order. So dwmmc channel 0 was registered as mmc 0,
channel 1 as mmc 1, etc.
In case of possibility to boot from more then one device,
the CONFIG_SYS_MMC_ENV_DEV should always point to right mmc device.

This can be achieved by init boot device as first, so it will be
always registered as mmc 0. Thanks to this, the 'saveenv' command
will work fine for all mmc boot devices.

Exynos based boards usually uses mmc host channels configuration:
- 0, or 0+1 for 8 bit  - as a default boot device (usually eMMC)
- 2 for 4bit - as an optional boot device (usually SD card slot)

And usually the boot order is defined by OM pin configuration,
which can be changed in a few ways, eg.
- Odroid U3     - eMMC card insertion -> first boot from eMMC
- Odroid X2/XU3 - boot priority jumper

By this commit, Exynos dwmmc driver will check the OM pin configuration,
and then try to init the boot device and register it as mmc 0.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Akshay Saraswat <akshay.s@samsung.com>
2015-02-23 19:49:22 +02:00
Hans de Goede
1f3e877def sunxi: mmc: Always declare High Capacity capability
High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this
capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13
tablet, so always set it thereby fixing this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-02-23 19:46:13 +02:00
Jaehoon Chung
5dab81cea5 mmc: exynos_dw_mmc: use the exynos specific data structure
Clksel value is exynos specific value.
It removed "clksel_val" into dwmci_host and created the
"dwmci_exynos_priv_data" structure for exynos specific data.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2015-02-23 19:39:51 +02:00
Jaehoon Chung
3a33bb1874 mmc: exynos_dw_mmc: set to clksel_val into board-init function
"clksel_val" is assigned to property of mmc or defined value.
But it doesn't write at initial sequence.
There is a reason that get the wrong source-clock value.
This patch fixed it.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2015-02-23 19:36:55 +02:00
Jaehoon Chung
afc9e2b509 mmc: dw_mmc: fixed the wrong bit control
If mode is not DDR-mode, then it needs to clear it.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2015-02-23 19:35:13 +02:00
Otavio Salvador
ee0c538951 mmc: fsl_esdhc: Add support to force VSELECT set
Some boards cannot do voltage negotiation but need to set the VSELECT
bit forcely to ensure it to work at 1.8V.

This commit adds CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT flag for this use.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-02-23 09:11:42 +01:00
Otavio Salvador
f022d36e8a mmc: fsl_esdhc: Add CMD11 support to switch to 1.8V
This adds support to switch to 1.8V in case CMD11 succeeds.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Marek Vasut <marex@denx.de>
2015-02-23 09:11:42 +01:00
Simon Glass
91785f70b9 x86: mmc: Move common FSP functions into a common file
Since these board functions seem to be the same for all boards which use
FSP, move them into a common file. We can adjust this later if future FSPs
need more flexibility.

This creates a generic PCI MMC device.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2015-02-06 12:07:36 -07:00
Tom Rini
37ffffb98d Merge branch 'master' of git://git.denx.de/u-boot-ti 2015-02-02 12:37:34 -05:00
Tom Rini
be8ddad9c8 Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2015-02-02 10:11:44 -05:00
Siarhei Siamashka
5abdb156bb sunxi: mmc: Add 'sunxi_' prefix to the static functions
This results in a much more readable callgraph, because now they
can't be confused with the function having exactly the same name
in the generic mmc code.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-02-02 14:04:28 +01:00
Simon Glass
0347960b87 dm: mmc: Remove use of fdtdec GPIO support
These functions are going away, so use the new uclass support instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-01-29 17:09:52 -07:00
Albert ARIBAUD \(3ADEV\)
5bfdd1fc97 omap3: mmc: add 1.8v bias setting for MMC1
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-01-29 12:00:50 -05:00
Tom Rini
3b95288a2a Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2015-01-23 10:22:29 -05:00
Hans de Goede
daf22636c2 sunxi: mmc: Add support for sun9i (A80)
The clocks on the A80 are hooked up slightly different, add support for this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-22 12:34:55 +01:00
Hans de Goede
5b8d7fb4fe sunxi: mmc: Use a realistic timeout when sending a mmc command
Wait 1 second for the sdcard to respond, rather then waiting for
0xfffff milliseconds.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-22 12:34:55 +01:00
Michal Simek
38cd2d9c9b mmc: zynq: Use phys_addr_t for addresses
phys_addr_t is designed for physical addresses that's why
use it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-01-21 10:30:43 +01:00
Andrew Gabbasov
fc5b32fbf3 mmc: Skip changing bus width for MMC cards earlier than version 4.0
Wider bus widths (larger than default 1 bit) appeared in MMC standard
version 4.0. So, for MMC cards of any earlier version trying to change
the bus width (including ext_csd comparison) does not make any sense.
It may work incorrectly and at least cause unnecessary timeouts.
So, just skip the entire bus width related activity for earlier versions.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Tested-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-01-19 17:41:52 +02:00
Andrew Gabbasov
bf4770731c mmc: Avoid redundant switching to 1-bit bus width for MMC cards
If all the commands switching an MMC card to 4- or 8-bit bus width fail,
and the bus width for the controller and the driver is still set
to default 1 bit, there is no need to send one more command to switch
the card to 1-bit bus width. Also, if the card or host controller do not
support wider bus widths, there is no need to send a switch command at all.

However, if one of switch commands succeeds, but the subsequent ext_csd
fields comparison fails, the card should be switched to some other bus width
(next in the list for the loop), or to default 1-bit bus width as a last
resort. That's why it would be incorrect to just remove the 1-bit bus width
case from the list, it should still be processed in some cases.

panto: Minor cosmetic edit removing superfluous parentheses.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Tested-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
2015-01-19 17:41:52 +02:00
Diego Santa Cruz
9e41a00b57 mmc: extend mmcinfo output to show partition write reliability settings
This extends the mmcinfo hardware partition info output to show
partitions with write reliability enabled with the "WRREL" string.
If the partition does not have write reliability enabled the "WRREL"
string is omitted; this is analogous to the ehhanced attribute.

Example output:

Device: OMAP SD/MMC
Manufacturer ID: fe
OEM: 14e
Name: MMC16
Tran Speed: 52000000
Rd Block Len: 512
MMC version 4.41
High Capacity: Yes
Capacity: 13.8 GiB
Bus Width: 4-bit
Erase Group Size: 8 MiB
HC WP Group Size: 16 MiB
User Capacity: 13.8 GiB ENH WRREL
User Enhanced Start: 0 Bytes
User Enhanced Size: 512 MiB
Boot Capacity: 16 MiB ENH
RPMB Capacity: 128 KiB ENH
GP1 Capacity: 64 MiB ENH WRREL
GP2 Capacity: 64 MiB ENH WRREL

Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
2015-01-19 17:41:51 +02:00
Diego Santa Cruz
8dda5b0e60 mmc: extend the mmc hardware partitioning API with write reliability
The eMMC partition write reliability settings are to be set while
partitioning a device, as per the eMMC spec, so changes to these
attributes needs to be done in the hardware partitioning API.
This commit adds such support.

Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
2015-01-19 17:41:51 +02:00
Diego Santa Cruz
ac9da0e08c mmc: add API to do eMMC hardware partitioning
This adds an API to do hardware partitioning on eMMC devices. The
new mmc_hwpart_config() function does the partitioning in one go.
As the different attributes and partitioning options on eMMC may
be interdependent validation has to be done based on the complete
partitioning configuration. The function accepts three modes:

- MMC_HWPART_CONF_CHECK: just validates that the configuration
  is valid.
- MMC_HWPART_CONF_SET: validates and sets all the fields in
  EXT_CSD but without setting the "partitioning completed" bit,
  and thus is reversible.
- MMC_HWPART_CONF_COMPLETE: does everything and is thus not
  reversible.

Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
2015-01-19 17:41:45 +02:00
Diego Santa Cruz
9cf199ebcf mmc: the ext_csd data may be used during init even if reading failed
The mmc_startup() function uses the ext_csd data even if reading it
from the mmc device failed. This bug was introduced in commit
bc897b1d4d. We now bail out if
reading it fails, this should not be a problem as ext_csd was
introduced in MMC 4.0 and this code is conditional on MMC >= 4.0.

Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
2015-01-19 17:04:48 +02:00
Diego Santa Cruz
8a0cf49010 mmc: eMMC partitioning data is not effective till partitioning completed
The eMMC spec says that partitioning is only effective after the
PARTITION_SETTING_COMPLETED is set in EXT_CSD (and a power cycle was done,
but that we cannot know). Thus the partition sizes and attributes should
be ignored when that bit is not set, otherwise the various capacities
are not coherent (e.g., the user data capacity will be that of the
unpartitioned device while partition sizes would be non-zero).

Prescence of non-zero partitioning data is nevertheless still used to
activate the high-capacity size definitions (EXT_CSD_ERASE_GROUP_DEF)
as it is necessary to set that to write any of the partitioning fields
in EXT_CSD, so having partitioning data means someone previously
activated that and we should keep it activated.

Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
2015-01-19 17:04:48 +02:00
Diego Santa Cruz
037dc0ab5d mmc: read the high capacity WP group size for eMMC
Read the eMMC high capacity write protect group size at mmc device
initialization. This is useful to correctly partition an eMMC device,
as partitions need to be aligned to this size.

Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
2015-01-19 17:02:29 +02:00
Diego Santa Cruz
a4ff9f83f5 mmc: fix erase_grp_size computation with high-capacity size definition
The erase_grp_size in struct mmc is to be a size in 512-byte sectors
but the code used to compute it for eMMC when EXT_CSD_ERASE_GROUP_DEF is
enabled computed it as bytes, leading to erase sizes and alignment
much larger than what is actually required by the mmc device.

Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
2015-01-19 17:02:29 +02:00
Diego Santa Cruz
a7f852b688 mmc: read the size of eMMC enhanced user data area
This modification reads the size of the eMMC enhanced user data area
upon initialization of an mmc device, it will be used later by
mmcinfo.

Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
2015-01-19 17:02:29 +02:00
Diego Santa Cruz
f8e89d6716 mmc: computation of eMMC GP partition size was missing 512 KiB factor
Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
2015-01-19 17:02:29 +02:00
Diego Santa Cruz
0c453bb76c mmc: incomplete test to switch to high-capacity group size definitions
The eMMC spec mandates that the high-capacity group size definitions
should be enabled when the device is partitioned (by setting
ERASE_GROUP_DEF in EXT_CSD). The current test to determine when this is
required misses a few cases. In particular a device may have been
partitioned without setting the enhanced attribute on any partition
or partitioning may be completed without creating any extra partitions.

This change moves the code to set ERASE_GROUP_DEF to after reading
all partition information. It is also enabled when
PARTITIONING_SETTING_COMPLETED is set as it is necessary to enable
ERASE_GROUP_DEF before setting that bit, so it means that the user
previously switched to the high capacity definitions.

Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
2015-01-19 17:02:29 +02:00
Diego Santa Cruz
c3dbb4f9b7 mmc: extend mmcinfo to show enhanced partition attribute
This extends the mmcinfo command's output to show which eMMC partitions
have the enhanced attribute set. Note that the eMMC spec says that
if the enhanced attribute is supported then the boot and RPMB
partitions are of the enhanced type.

The output of mmcinfo becomes:
Device: OMAP SD/MMC
Manufacturer ID: fe
OEM: 14e
Name: MMC16
Tran Speed: 52000000
Rd Block Len: 512
MMC version 4.41
High Capacity: Yes
Capacity: 13.8 GiB
Bus Width: 4-bit
User Capacity: 13.8 GiB ENH
Boot Capacity: 16 MiB ENH
RPMB Capacity: 128 KiB ENH
GP1 Capacity: 64 MiB ENH
GP2 Capacity: 64 MiB ENH

Signed-off-by: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
2015-01-19 17:01:34 +02:00
Nobuhiro Iwamatsu
72d42bad58 mmc: rmobile: Add SDHC support for Renesas rmobile ARM SoC
This adds Renesas rmobile ARM SoC's SD/MMC host support.
This drivers tested with Gose board and Koelsch board.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2015-01-19 16:24:25 +02:00
Axel Lin
b0c4ae1a51 mmc: sunxi: Fix misuse of gpio_direction_input()
It does not make sense to make gpio_direction_input() return the gpio input
status. The return value of gpio_direction_input() is inconsistent if
CONFIG_DM_GPIO is defined.
And we don't need to call gpio_direction_input() int sunxi_mmc_getcd().
Just init the gpio once in mmc_resource_init() is enough.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-14 14:56:36 +01:00
Hans de Goede
fc3a832576 sunxi: mmc: Properly setup mod-clk and clock sampling phases
The sunxi mmc controller has both an internal clock divider, as well as
the divider in the mod0-clk for the mmc controller.

The internal divider cannot be used, as it conflicts with the setting of
clock sampling phases which is done in the mod0-clk, so it must be set to
0 (divide by 1).

For some reason while the kernel has had this correct from day one, the
u-boot sunxi mmc code has been using a fixed mod0-clk and setting its
internal divider depending on the desired speed. This is something which
we've inherited from the original Allwinner u-boot sources, but while this
has been fixed in Allwinner's own u-boot code at least for the A23 and later
upstream u-boot was still doing this wrong.

This commit fixes this, thereby also fixing mmc support not working reliable
on the A23 (which seems more sensitive to this) and possible also fixes some
other sunxi mmc issues.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-14 14:56:36 +01:00
Gerald Kerma
ac0b729844 MVEBUMMC : REMOVE unnecessary delay from init
Remove unnessecary delay from mvebu_mmc_initialize

Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2015-01-06 10:10:28 +02:00
Gerald Kerma
02b2739e8f MVEBUMMC : CLEAN code
Clean mvebu_mmc_send_cmd

Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2015-01-06 10:10:23 +02:00
Gerald Kerma
86eeecafc2 MVEBUMMC : REMOVE unnecessary delays
Remove delays in mvebu_mmc_set_bus and mvebu_mmc_set_clk

Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2015-01-06 10:10:16 +02:00
Gerald Kerma
fc0f25f919 MVEBUMMC : FIX debug strings
Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2015-01-06 10:10:12 +02:00
Gerald Kerma
28d27b79e3 MVEBUMMC : Speed up access time
Get about 40x faster access on SHEEVAPLUG MMC
 Fix some SD type compatibility

 Changes in v3:
 - fix the HW_STATE (from linux mvsdio)
 - review delays and timeouts

 Changes in v2:
 - increase number of loops
 - remove initial delay

 Changes in v1:
 - review all loops, delays and timeouts

Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2015-01-06 10:10:04 +02:00
Gerald Kerma
2591fbdba3 MVEBUMMC : Change copyright date
Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2015-01-06 10:09:45 +02:00
Andrew Gabbasov
2b8a9692f9 mmc: dw_mmc: Use active DDR mode flag
The card_caps bit should denote the card capability to use DDR mode,
but we need the flag indicating that the DDR mode is active.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2014-12-12 21:09:01 +02:00
Andrew Gabbasov
5af8f45cd0 mmc: Fix block length for DDR mode
Block length for write and read commands is fixed to 512 bytes
when the card is in Dual Data Rate mode. If block length read from CSD
is different, make sure the driver will use correct length
in all further calculations and settings.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2014-12-12 21:08:38 +02:00
Andrew Gabbasov
201d5ac438 mmc: Fix Dual Data Rate capability recognition
Since the driver doesn't work in 1.2V or 1.8V signaling level modes,
Dual Data Rate mode can be supported by the driver only if it is supported
by the card in regular 3.3V mode. So, check for a particular single
bit in card type field.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2014-12-12 21:08:21 +02:00
Andrew Gabbasov
786e8f818c mmc: Fix handling of bus widths and DDR card capabilities
If the MMC_MODE_DDR_52MHz flag is set in card capabilities bitmask,
it is never cleared, even if switching to DDR mode fails, and if
the controller driver uses this flag to check the DDR mode, it can
take incorrect actions.

Also, DDR related checks in mmc_startup() incorrectly handle the case
when the host controller does not support some bus widths (e.g. can't
support 8 bits), since the host_caps is checked for DDR bit, but not
bus width bits.

This fix clearly separates using of card_caps bitmask, having there
the flags for the capabilities, that the card can support, and actual
operation mode, described outside of card_caps (i.e. bus_width and
ddr_mode fields in mmc structure). Separate host controller drivers
may need to be updated to use the actual flags. Respectively,
the capabilities checks in mmc_startup are made more correct and clear.

Also, some clean up is made with errors handling and code syntax layout.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2014-12-12 21:08:06 +02:00
Jaehoon Chung
dfcb683a31 mmc: exynos_dw-mmc: change debug message
To debug more exactly, add the index for device.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2014-12-12 20:35:30 +02:00
Markus Niebel
edab723b47 MMC: add MMC_VERSION_5_0
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2014-12-12 20:34:20 +02:00
Markus Niebel
d7b2912991 MMC: fix user capacity for partitioned eMMC card
if the card claims to be high capacity and the card
is partitioned the capacity shall still be read from
ext_csd SEC_COUNT even if the resulting capacity is
smaller than 2 GiB

Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2014-12-12 20:28:04 +02:00
Lubomir Popov
e75eaf100b mmc: Cosmetic fix for nicer, aligned device list printout
If print_mmc_devices() was called with a '\n' separator (as done
for example by the "mmc list" command), it offset the 2-nd and
all subsequent lines by one space. Fixing this.

Signed-off-by: Lubomir Popov <l-popov@ti.com>
2014-12-12 20:08:47 +02:00
Tom Rini
98d2d5e8c4 Merge branch 'master' of git://git.denx.de/u-boot-ti 2014-12-08 16:35:06 -05:00
Paul Kocialkowski
aac5450ea9 omap_hsmmc: Board-specific TWL4030 MMC power initializations
Boards using the TWL4030 regulator may not all use the LDOs the same way
(e.g. MMC2 power can be controlled by another LDO than VMMC2).
This delegates TWL4030 MMC power initializations to board-specific functions,
that may still call twl4030_power_mmc_init for the default behavior.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@ti.com>
[trini: Fix omap3_evm warning, add twl4030.h]
Signed-off-by: Tom Rini <trini@ti.com>
2014-12-04 21:28:15 -05:00
Nobuhiro Iwamatsu
9675f61077 mmc: sh_mmcif: Add support rmobile
Renesas R-Mobile/R-Car ARM SoC of MMC has the same IP that are supported by
sh_mmcif. This adds support R-Mobile/R-Car ARM SoC with the setting of the
clock support.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2014-12-05 11:16:22 +09:00
Nobuhiro Iwamatsu
7a7eb983a4 mmc: sh_mmcif: Change maximum and minimum value of MMC clock
Maximum value and the minimum value of clock for sh_mmcif instead by
base of MMC clock. This removes fixed clock, make the changes to be calculated
according to environment.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2014-12-05 11:15:52 +09:00
Nobuhiro Iwamatsu
21ea350385 mmc: sh_mmcif: Use DIV_ROUND_UP and fls instead of calculation loop
Use DIV_ROUND_UP and fls to simplify the code.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2014-12-05 11:15:11 +09:00
Paul Kocialkowski
f3e85e4825 twl4030: device-index-specific MMC power initializations, common ramp-up delay
Not every device has multiple MMC slots available, so it makes sense to enable
only the required LDOs for the available slots. Generic code in omap_hsmmc will
enable both VMMC1 and VMMC2, in doubt.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@ti.com>
2014-12-04 11:04:40 -05:00
Paul Kocialkowski
95de9ab201 mmc: Board-specific MMC power initializations
Some devices may use non-standard combinations of regulators to power MMC:
this allows these devices to provide a board-specific MMC power init function
to set everything up in their own way.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@ti.com>
2014-12-04 11:04:40 -05:00
Felipe Balbi
d11ac4b56d arm: omap: add support for am57xx devices
just add a few ifdefs around because this
device is very similar to dra7xxx.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2014-12-04 11:04:14 -05:00
Tom Rini
21008ad638 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Conflicts:
	drivers/mmc/fsl_esdhc.c

Signed-off-by: Tom Rini <trini@ti.com>
2014-11-26 11:22:29 -05:00
Tom Rini
dee332ffb7 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2014-11-24 12:02:12 -05:00
Masahiro Yamada
b41411954d linux/kernel.h: sync min, max, min3, max3 macros with Linux
U-Boot has never cared about the type when we get max/min of two
values, but Linux Kernel does.  This commit gets min, max, min3, max3
macros synced with the kernel introducing type checks.

Many of references of those macros must be fixed to suppress warnings.
We have two options:
 - Use min, max, min3, max3 only when the arguments have the same type
   (or add casts to the arguments)
 - Use min_t/max_t instead with the appropriate type for the first
   argument

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Pavel Machek <pavel@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
[trini: Fixup arch/blackfin/lib/string.c]
Signed-off-by: Tom Rini <trini@ti.com>
2014-11-23 06:48:30 -05:00
Ye.Li
a3d6e38617 mmc: fsl_esdhc: Update esdhc driver for iMX6SX
The reset value of "uSDHCx_INT_STATUS_EN" register is changed to 0
on iMX6SX. So the fsl_esdhc driver must update to set the register,
otherwise no state can be detected.

Signed-off-by: Ye.Li <B37916@freescale.com>
2014-11-20 10:44:42 +01:00
Markus Niebel
3b4b9a3377 mmc: fsl_esdhc: fix f_max retrieval during init
for multi instance API we use struct fsl_esdhc_cfg to
pass the clock rate. Do not set f_max from global data,
since this is wrong for multi instance case.

Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-19 18:17:12 -08:00
Pavel Machek
389b89c70f sort drivers/mmc/Makefile
Sort drivers/mmc makefile, as requested by wd.

Signed-off-by: Pavel Machek <pavel@denx.de>
Acked-by: Chin Liang See <clsee@altera.com>
2014-11-07 16:27:04 -05:00
Igor Grinberg
0b03a931ab omap: hsmmc: assume cd gpio is active low
Switch the default CD GPIO polarity to active low.

The current hsmmc driver assumption that the CD GPIO is active high, but
in the real hardware, usually the opposite holds.
The usual SD card socket has a mechanical switch which is grounded as
soon as a card is inserted.
Of course there might be some board logic which inverts the signal, but
as far as current users are concerned, there is no such logic.

Current U-Boot users either not using the CD functionality, or have a
different way (e.g. external to SoC GPIO controller) for checking the
card presence.

This patch also brings the polarity assumption in line with the Linux
kernel and adds appropriate comments.

This patch also might spare issues once the TWL GPIO driver will be
converted to the DM.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Dmitry Lifshitz <lifshitz@compulab.co.il>
Reviewed-by: Tom Rini <trini@ti.com>
2014-11-06 11:04:41 -05:00
Hans de Goede
967325feb2 dm: sunxi: Request card detect gpio
This is necessary for the device-model enabled builds to work properly.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-11-05 13:10:13 +01:00
Ian Campbell
ed41e62f51 sunxi: Use CONFIG_MACH_SUN?I from Kconfig instead of CONFIG_SUN?I
Mostly automatic with:
    sed -i -e 's/CONFIG_\(SUN[45678]I\)/CONFIG_MACH_\1/g' $(git grep -l CONFIG_SUN[45678]I)
followed by removing the relevant #defines from include/configs/sun?i.h by
hand.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2014-11-05 13:09:58 +01:00
Przemyslaw Marczak
3f3c13a513 mmc: s5p: set SD detection pin as input
The SD Card slot detection pin should be configured as input.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-10-27 19:20:51 -06:00
Tom Rini
d0796defbe Merge http://git.denx.de/u-boot-sunxi 2014-10-26 14:13:24 -04:00
Tom Rini
84a6df09c7 Merge git://git.denx.de/u-boot-dm
Fix a trivial conflict over adding <dm.h>

Conflicts:
	arch/arm/cpu/armv7/omap3/board.c

Signed-off-by: Tom Rini <trini@ti.com>
2014-10-26 14:03:08 -04:00
Jeroen Hofstee
74321944e6 mmc: bcm2835_sdhci: add missing include
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-10-25 15:27:35 -04:00
Jeroen Hofstee
19d7bf3d86 tegra: make local functions static
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-10-25 07:27:37 -04:00
Jeroen Hofstee
6588c78bf3 sdhci: make local functions static
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-10-25 07:02:02 -04:00
Chen-Yu Tsai
e637b30b9c mmc: sunxi: Add support for sun8i (A23)
The Allwinner A23 SoC has reset controls like the A31 (sun6i).
The FIFO address is also the same as sun6i.

Re-use code added for sun6i.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2014-10-24 09:35:39 +02:00
Hans de Goede
e79c7c8810 sunxi: When we've both mmc0 and mmc2, detect from which one we're booting
sunxi SOCs can boot from both mmc0 and mmc2, detect from which one we're
booting, and make that one "mmc dev 0" so that a single u-boot binary can
be used for both the onboard eMMC and for external sdcards.

When we're booting from mmc2, we make it dev 0 because that is where the SPL
will load the tertiary payload (the actual u-boot binary in our case) from,
see: common/spl/spl_mmc.c, which has dev 0 hardcoded everywhere.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2014-10-24 09:35:38 +02:00
Hans de Goede
cd82113a98 sunxi: Add mmc card-detect functionality
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2014-10-24 09:35:38 +02:00
Hans de Goede
1d1bd42eb0 ARM: sunxi-mmc: Add mmc support for sun6i / A31
The mmc hardware on sun6i has an extra reset control that needs to
be de-asserted prior to usage. Also the FIFO address is different.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
[wens@csie.org: use setbits_le32 for reset control, drop obsolete changes,
		rewrite different FIFO address handling, add commit message]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2014-10-24 09:35:37 +02:00
Wills Wang
a3e8c22011 mmc: sunxi: add SDHC support for sun6i/sun7i/sun8i
Allwinner A20/A23/A31's SD/MMC host support SDHC High Capacity feature.

Signed-off-by: Wills Wang <wills.wang.open@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2014-10-24 09:35:37 +02:00
Simon Glass
5915a2ad0d dm: omap: gpio: Support driver model
Add driver model support to this driver, while retaining support for the
legacy system. Driver model GPIO support is enabled with CONFIG_DM_GPIO
as usual.

Since gpio_is_valid() no longer exists, we can use the -EINVAL error
returned from gpio_request().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
2014-10-23 19:29:07 -06:00
Tom Rini
03a3536c7b Merge branch 'master' of git://git.denx.de/u-boot-tegra 2014-10-23 14:05:34 -04:00
Stefan Roese
3dc23f7852 arm: marvell: Move arch/kirkwood.h to arch/soc.h
This move makes is possible to use this header not only from kirkwood
platforms but from all Marvell mvebu platforms.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Luka Perkov <luka@openwrt.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
2014-10-23 09:59:20 -04:00
Simon Glass
7f1961018c dm: exynos: Make sure that GPIOs are requested
With driver model GPIOs must be requested before use. Make sure this is
done correctly.

(Note that the soft SPI part of universal is omitted, since this driver
is about to be replaced with a driver-model-aware version)

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:33 -06:00
Marcel Ziswiler
09fb73611f mmc: Tegra: Fix timeout issue seen on certain eMMC parts
During rigorous testing of our latest update infrastructure I came
across quite consistent timeouts on certain eMMC parts (e.g. Hynix
H26M21001ECR) when writing big (e.g. in excess of 400 MB) file system
images:

MMC write: dev # 0, block # 40960, count 944128 ...
 mmc_send_cmd_bounced: MMC Timeout
    Interrupt status        0x00000001
    Interrupt status enable 0xdfff003b
    Interrupt signal enable 0xdfff0002
    Present status          0x01870106
mmc write failed

Comparing the various data sheets I came across the following timeout
specification:

Secure Erase/TRIM Timeout=300ms*2*10=6000ms

Unfortunately empirical testing still failed albeit much more rarely.
Increasing the timeout to 8000ms made it finally disappear entirely.
This patch allows us writing various eMMC parts without seeing any
further issues.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-10-22 09:30:54 -07:00
Albert ARIBAUD
790af81543 Merge branch 'u-boot/master' into 'u-boot-arm/master' 2014-10-11 01:20:30 +02:00
Simon Glass
311757be27 samsung: Enable device tree for s5p_goni
Change this board to add a device tree.

This also adds a pinmux header file although it is not used as yet.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-10-08 17:25:47 +09:00
Tom Rini
04de09f89b Merge branch 'topic/arm/socfpga-20141006' of git://git.denx.de/u-boot-socfpga
Fix a trivial conflict in dw_mmc.c after talking with Marek.

Conflicts:
	drivers/mmc/dw_mmc.c

Signed-off-by: Tom Rini <trini@ti.com>
2014-10-06 15:17:13 -04:00
Pavel Machek
498d1a62db arm: socfpga: mmc: Pick the clock from clock manager
Make the SoCFPGA MMC stub pick clock via the clock manager
frequency accessors instead of hard-coding the frequency.

Also fix calloc() misuse.

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2014-10-06 17:46:49 +02:00
Pavel Machek
f33c930583 mmc: dw_mmc: cleanups
The dw_mmc driver was responding to errors with debug(). Change that
to prinf()/puts() respectively so that any errors are immediately
obvious. Also adjust english in comments.

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: Chin Liang See <clsee@altera.com>
2014-10-06 17:34:39 +02:00
Pavel Machek
b966db0d72 dw_mmc: cleanups
dw_mmc driver was responding to errors with debug(). Change that to
prinf so that any errors are immediately obvious. Also adjust english
in comments.

Signed-off-by: Pavel Machek <pavel@denx.de>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-10-03 17:26:50 +03:00
Mario Schuknecht
786a27b7ec mmc: Fix mmc bus width
After setting the bus width, the extended CSD register is read. Some selected
fields are compared with previously read extended CSD register fields. In this
comparison the EXT_CSD_ERASE_GROUP_DEF field is compared. But this field is
previously written under certain circumstances. And then the comparison fails.

Only compare read-only fields. Therefore compare field EXT_CSD_HC_WP_GRP_SIZE
instead of field EXT_CSD_ERASE_GROUP_DEF.

Signed-off-by: Mario Schuknecht <mario.schuknecht@dresearch-fe.de>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-10-03 17:26:50 +03:00
Mario Schuknecht
bcd06989b8 mvebu_mmc: Driver addition
In function mvebu_mmc_write notice command timeout. It is possible that a
command is done, but a timeout occurred.

Enable timeout in set bus function.

Set window registers. Without that I could not use the driver on a Kirkwood
88F6282 SoC.

Set high capacity and 52MHz driver feature.

Signed-off-by: Mario Schuknecht <mario.schuknecht@dresearch-fe.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-10-03 17:26:50 +03:00
Peter Bigot
6dc93e7087 mmc: restore capacity when switching to partition 0
The capacity and lba for an MMC device with part_num 0 reflects the
whole device.  When mmc_switch_part() successfully switches to a
partition, the capacity is changed to that partition.  As partition 0
does not physically exist, attempts to switch back to the whole device
will indicate an error, but the capacity setting for the whole device
must still be restored to match the partition.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Tested-by: Tom Rini <trini@ti.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-10-03 17:26:50 +03:00
Hannes Petermaier
021a80559f mmc: fix ERASE_GRP_DEF handling
if we set manually this bit on the eMMC card using mmc_switch(...),
we also have to set it within our (before read) internal structure
'ext_csd'.

Otherwise following checks on this will fail.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2014-10-03 17:26:49 +03:00
Sonic Zhang
282a82e8a1 mmc: set correct block size value in bfin sdh driver
Wait data transfer till the data end bit other than the data block end
bit is set.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2014-10-03 17:26:49 +03:00
Masahiro Yamada
c79cba37b3 cosmetic: replace MIN, MAX with min, max
The macro MIN, MAX is defined as the aliase of min, max,
respectively.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-09-24 18:30:29 -04:00
Masahiro Yamada
ed36323f6d kconfig: add blank Kconfig files
This would be useful to start moving various config options.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2014-09-24 18:30:28 -04:00
Wang Huan
19060bd886 ls102xa: esdhc: Add esdhc support for LS102xA
For LS1, esdhc is big-endian IP. Accessing the registers
should be in big-endian mode. So we use esdhc_read32()
to read Host controller capabilities register for LS1.

For LS1, when using CMD12, cmdtype need to be set to
ABORT, otherwise, next read command will hang.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
2014-09-08 10:30:34 -07:00
Pavel Machek
7860649716 socfpga: cleanup socfpga_dw_mmc
Cleanups as suggested by wd on mailing list.

Signed-off-by: Pavel Machek <pavel@denx.de>
Acked-by: Chin Liang See <clsee@altera.com>
2014-08-30 07:46:38 -04:00
Pavel Machek
51fb455f82 socfpga: fix clock manager register definition
Structure defining clock manager hardware was wrong, leading to
wrong registers being accessed and hang in MMC init.

This fixes structure to match hardware.

Signed-off-by: Pavel Machek <pavel@denx.de>
2014-08-29 15:50:50 -04:00
Bo Shen
da55c66ec9 MMC: atmel_mci: enable high speed mode support
If the MCI IP version >= 0x300, it supports hight speed mode
option, this patch enable it.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-08-01 20:01:33 +03:00
Bo Shen
cd60ebd430 MMC: atmel_mci: refactor setting the mode register
The mode register is different between MCI IP version.
So, according to MCI IP version to set the mode register.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-08-01 20:01:09 +03:00
Chin Liang See
6ace153d13 mmc/dw_mmc: Fix clock divider calculation error for bypass mode
To fix the clock divider calculation error when the controller
clock same as the operating frequency. This is known as bypass
mode. In this mode, the divider should be 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
2014-08-01 19:45:32 +03:00
Marek Vasut
dae0f5c644 mmc: s3c: Add SD driver
Implement SD driver for the S3C24xx family. This implementation
is currently only capable of using the PIO transfers, DMA is not
supported.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-08-01 19:24:34 +03:00
Lubomir Rintel
64973023df bcm2835_sdhci: Add SDHCI_QUIRK_NO_HISPD_BIT flag
Seems like the controller doesn't support the flag. None of the hi-speed cards
I've tried could be read, while they successfully worked with the quirk enabled.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
2014-08-01 18:57:02 +03:00
DrEagle
3fe3b4fb1c ARM: kirkwood: add mvsdio driver
This patch add Marvell kirkwood MVSDIO/MMC driver
and enable it for Sheevaplugs and OpenRD boards.

Signed-off-by: Gerald Kerma <drEagle@doukki.net>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-08-01 18:44:56 +03:00
Albert ARIBAUD
740f41d3cb Merge branch 'u-boot-sunxi/master' into 'u-boot-arm/master' 2014-07-28 10:12:45 +02:00
Jeroen Hofstee
750121c350 mmc: prevent some warnings with make W=1
Add missing prototypes for global functions and
make local functions static.

cc: panto@antoniou-consulting.com
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-07-18 17:53:24 -04:00
Jeroen Hofstee
cee9ab7cb6 dirvers: mmc: use __weak
use weak instead of alias to prevent some clang warnings.
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-07-18 17:53:23 -04:00
Hans de Goede
b6ae6765c5 sunxi: Remove mmc DMA support
The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the
dma descriptors on the stack, and then exits while the dma transfer is in
progress, so the dma engine is reading stack memory which at that point may
be re-used. So far we've gotten away with this by luck, but recent u-boot
changes have shifted the stack start address by 16 bytes, which combined
with dma alignment now exposes this problem.

Since we end up just busy waiting for the dma engine anyway, this commit
fixes things by simply removing the dma code, resulting in smaller bug-free
code.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2014-07-06 20:12:44 +01:00
Jeroen Hofstee
2b9912e6a7 includes: move openssl headers to include/u-boot
commit 18b06652cd "tools: include u-boot version of sha256.h"
unconditionally forced the sha256.h from u-boot to be used
for tools instead of the host version. This is fragile though
as it will also include the host version. Therefore move it
to include/u-boot to join u-boot/md5.h etc which were renamed
for the same reason.

cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-06-19 11:19:04 -04:00
Darwin Rambo
3d6a5a4dfc mmc: free allocated memory on initialization errors
Cleanup to balance malloc/free calls.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Steve Rae <srae@broadcom.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-06-12 15:21:12 +03:00
Stephen Warren
d4622df342 mmc: return meaningful error codes from mmc_select_hwpart
Rather than just returning -1 everywhere, try to return something
meaningful from mmc_select_hwpart(). Note that most other MMC functions
don't do this, including functions called from mmc_select_hwpart(), so
I'm not sure how effective this will be. Still, it's one less place with
hard-coded -1.

Suggested-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-06-12 14:15:59 +03:00
Albert ARIBAUD
cc49da249c Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' 2014-06-02 08:43:48 +02:00
Wu, Josh
9902c7b6f1 mmc: atmel_mci: fix print incorrect buffer content for debug
Signed-off-by: Josh Wu <josh.wu@atmel.com>
[fix checkpatch line length warning]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-05-27 00:10:46 +02:00
Ian Campbell
e24ea55c04 sunxi: mmc support
On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote:
> > +	case 1:
> > +#if CONFIG_MMC1_PG

> Are you sure that this is correct and shouldn't be:
>
> +#ifdef CONFIG_MMC1_PG
>
> ?

It's "correct" in so far as it works (the boards.cfg config stuff
#defines things to 1), but I think you are right that it isn't the
preferred style. But...

> A quick scan through this patch series shows that this define
> is not set at all. Perhaps its outdated? Or is it used to support
> some other sunxi SoC? Not sure, perhaps it should be removed for
> now.

...I had thought that it was to support some other board which wasn't
being upstreamed right now, so eventually useful and harmless for now,
but I've just checked and it isn't actually used by any of the boards in
u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it.
Rather than resend the entire series, here is v5.1 of this patch.

> Other than this please add my:
>
> Reviewed-by: Stefan Roese <sr@denx.de>

Thanks!

8<---------------------------------

>From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001
From: Ian Campbell <ijc@hellion.org.uk>
Date: Fri, 7 Mar 2014 04:29:39 +0000
Subject: [PATCH v5.1 7/8] sunxi: mmc support

This adds support for the MMC controller on the Allwinner A20 (sun7i)
processor.

Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: Luke Leighton <lkcl@lkcl.net>
Signed-off-by: Oliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Wills Wang <wills.wang.open@gmail.com>
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Tom Cubie <Mr.hipboi@gmail.com>
Cc: Aaron Maoye <leafy.myeh@allwinnertech.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: Tom Rini <trini@ti.com>
2014-05-25 16:26:43 +02:00
Tom Rini
10dc77716f esdhc/usdhc: Fix warning when CONFIG_SYS_FSL_ESDHC_USE_PIO is not set
In 7168977 we made calls to check_and_invalidate_dcache_range()
conditional on !CONFIG_SYS_FSL_ESDHC_USE_PIO.  Only define this function
in this case as well.

Signed-off-by: Tom Rini <trini@ti.com>
2014-05-23 09:19:05 -04:00
Tom Rini
638b3e8342 Merge branch 'master' of git://git.denx.de/u-boot-mmc 2014-05-23 08:13:59 -04:00
Stephen Warren
d235628434 mmc: provide a select_hwpart implementation for get_device()
This enables specifying which eMMC HW partition to target for any U-Boot
command that uses the generic get_partition() function to parse its
command-line arguments.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-05-23 12:11:44 +03:00
Pierre Aubert
91fdabc67a eMMC: add support for operations in RPMB partition
This patch adds functions for read, write and authentication
key programming for the Replay Protected Memory Block partition
in the eMMC.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Pierre Aubert <p.aubert@staubli.com>
2014-05-23 11:52:51 +03:00
Andrew Gabbasov
6b2221b008 mmc: Handle switch error status bit in MMC card status
MMC switch command for unsupported feature (e.g. bus width) sets a switch
error bit in card status. This bit should be checked, and, if it's set,
no access with new controller settings should be performed.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2014-05-23 11:34:33 +03:00
Mateusz Zalega
d803fea576 mmc: postponed needless timer initialization
mmc_init() doesn't call get_timer() anymore if MMC is already
initialized.

<panto> Minor formatting fix.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Mateusz Zalega <m.zalega@samsung.com>
2014-05-23 11:19:53 +03:00
Ye.Li
716897760f esdhc/usdhc: Fix PIO mode bug in fsl_esdhc driver
When configure the fsl_esdhc driver to PIO mode by defining
"CONFIG_SYS_FSL_ESDHC_USE_PIO", the SD/MMC read and write will fail.

Two bugs in the driver to cause the issue:
1. The read buffer was invalidated after reading from DATAPORT register,
which should be only applied to DMA mode. The valid data in cache was
overwritten by physical memory.
2. The watermarks are not set in PIO mode, will cause according state not
be set.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
2014-05-22 18:52:45 +03:00
Albert ARIBAUD
05d134b084 Merge remote-tracking branch 'u-boot/master'
Conflicts:
	boards.cfg

Conflicts were trivial once u-boot-arm/master boards.cfg was
reformatted (commit 6130c146) to match u-boot/master's own
reformatting (commit 1b37fa83).
2014-05-20 10:05:42 +02:00
Jaehoon Chung
9b8c9a3c09 mmc: s5p_sdhci: add the s5p_sdhci_core_init function
To reuse the code, added the s5p_sdhci_core_init function.
Before applied this patch, didn't use the 8-bit mode at exynos baord.
Because it didn't set "MMC_MODE_8BIT".

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16 14:54:26 +09:00
Jaehoon Chung
e09bd85329 mmc: exynos_dw_mmc: enable the DDR mode
Set the ddr mode capability by default.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16 14:54:26 +09:00
Jaehoon Chung
045bdcd0b2 mmc: dw_mmc: support the DDR mode
Support the DDR mode at dw-mmc controller

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16 14:54:26 +09:00
Jaehoon Chung
d22e3d46a9 mmc: support the DDR mode for eMMC
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16 14:54:26 +09:00
Jaehoon Chung
8caf46d189 mmc: remove the unnecessary define and fix the wrong bit control
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Lukasz Majeski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16 14:54:26 +09:00
Jaehoon Chung
959198f7ca mmc: exynos_dw_mmc: restore the property into host
Restore the platdata(property of dt) into host struct.
Then data's information is maintained and reused anywhere.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16 14:54:26 +09:00
Stephen Warren
f175603f7c ARM: tegra: set CONFIG_SYS_MMC_MAX_DEVICE
If CONFIG_API is ever to be enabled on Tegra, this define must be set,
since api/api_storage.c uses it.

A couple of annoyting things about CONFIG_SYS_MMC_MAX_DEVICE

1) It isn't documented in README. The same is true for a lot of similar
   defines used by api_storage.c.

2) It doesn't represent MAX_DEVICE but rather NUM_DEVICES, since the
   valid values are 0..n-1 not 0..n.

However, I this patch does not address those shortcomings.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-05-13 10:41:31 -07:00
Chunhe Lan
0b2e13d9cc powerpc/85xx: Add T4240RDB board support
T4240RDB board Specification
----------------------------
Memory subsystem:
   6GB DDR3
   128MB NOR flash
   2GB NAND flash

Ethernet:
   Eight 1G SGMII ports
   Four 10Gbps SFP+ ports

PCIe:
   Two PCIe slots

USB:
   Two USB2.0 Type A ports

SDHC:
   One SD-card port

SATA:
   One SATA port

UART:
   Dual RJ45 ports

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
[York Sun: fix CONFIG_SYS_QE_FMAN_FW_ADDR in T4240RDB.h]
2014-05-13 08:24:32 -07:00
Prabhakar Kushwaha
1eaa742d85 driver: Add support of image load for MMC & SPI in SPL
Add support of loading image, binary for MMC and SPI during SPL boot.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:50 -07:00
Prabhakar Kushwaha
613ab32c47 driver/mmc: fix compile warnings
Fix following compile warnings
fsl_esdhc_spl.c: In function 'mmc_boot':
fsl_esdhc_spl.c:35:10: warning: unused variable 'byte_num' [-Wunused-variable]
fsl_esdhc_spl.c:35:7: warning: unused variable 'i' [-Wunused-variable]
fsl_esdhc_spl.c:34:8: warning: unused variable 'val' [-Wunused-variable]
fsl_esdhc_spl.c:33:6: warning: unused variable 'blklen' [-Wunused-variable]
fsl_esdhc_spl.c:105:7: warning: 'tmp_buf' may be used uninitialized in this
function [-Wuninitialized]

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:48 -07:00
Albert ARIBAUD
519fdde9e6 Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
	arch/arm/cpu/arm926ejs/mxs/Makefile
	include/configs/trats.h
	include/configs/trats2.h
	include/mmc.h
2014-04-08 09:25:08 +02:00
Haijun.Zhang
1336e2d343 mmc:eSDHC: Workaround for data timeout issue on Txxx SoC
1. The Data timeout counter value in eSDHC_SYSCTL register is
not working as it should be, so add quirks to enable this
workaround to fix it to the max value 0xE.

2. Add CONFIG_SYS_FSL_ERRATUM_ESDHC111 to enable its workaround.

* Update of patch for change mmc interface by
	Pantelis Antoniou <panto@antoniou-consulting.com>

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-04-02 13:25:01 +03:00
Andrew Gabbasov
8a573022c3 mmc: fsl_esdhc: add controller reset in case of data related errors too
The controller reset is performed now if command error occurs.
This commit adds the reset for the case of data related errors too.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-04-02 13:17:12 +03:00
Andrew Gabbasov
fb823981c5 mmc: fsl_esdhc: fix calculation of timeout for data transactions
Calculation of the timeout value should be based on actual clock value,
written to controller registers. Since mmc->tran_speed is either the
maximum allowed speed, or the preliminary value, that is be not yet
set to registers, the actual timeout, taken by the controller, based
on its clock settings, may be much longer than expected, based on
mmc->tran_speed value. In particular it happens at early initialization
stage, when typical value of mmc->tran_speed is 20MHz or 26MHz, while
actual clock setting, configured in the controller, is 400kHz.
It's more correct to use mmc->clock value for timeout calculation instead.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-04-02 13:16:56 +03:00
Tom Rini
33ace362fd mmc: Add 'mmc rst-function' sub-command
Some eMMC chips may need the RST_n_FUNCTION bit set to a non-zero value
in order for warm reset of the system to work.  Details on this being
required will be part of the eMMC datasheet.  Also add using this
command to the dra7xx README.

* Whitespace fix by panto

Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-04-02 13:02:58 +03:00
Nobuhiro Iwamatsu
74c32ef58d mmc: sh_mmcif: Fix warning by unused variable
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Reported-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-04-02 12:55:48 +03:00
Nobuhiro Iwamatsu
cd2bf4846c mmc: sh_mmcif: Fix compile error
BY commit "mmc: Split mmc struct, rework mmc initialization (v2)",
sh_mmcif has compile error. This fixes compile error.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Pantelis Antoniou <panto@antoniou-consulting.com>
Reported-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-04-02 12:55:31 +03:00
Tom Rini
0b2da7e209 blackfin: mmc: Correct mmc_host_is_spi and bfin_sdh.c
In the recent mmc cleanup, the mmc_host_is_spi macro was broken and
bfin_sdh.c had mmc->bus_width turned into mmc_bus_width(mmc), both of
which were incorrect.

Signed-off-by: Tom Rini <trini@ti.com>
2014-03-28 16:55:29 -04:00
Pantelis Antoniou
93bfd61677 mmc: Split mmc struct, rework mmc initialization (v2)
The way that struct mmc was implemented was a bit of a mess;
configuration and internal state all jumbled up in a single structure.

On top of that the way initialization is done with mmc_register leads
to a lot of duplicated code in drivers.

Typically the initialization got something like this in every driver.

	struct mmc *mmc = malloc(sizeof(struct mmc));
	memset(mmc, 0, sizeof(struct mmc);
	/* fill in fields of mmc struct */
	/* store private data pointer */
	mmc_register(mmc);

By using the new mmc_create call one just passes an mmc config struct
and an optional private data pointer like this:

	struct mmc = mmc_create(&cfg, priv);

All in tree drivers have been updated to the new form, and expect
mmc_register to go away before long.

Changes since v1:

* Use calloc instead of manually calling memset.
* Mark mmc_register as deprecated.

Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-03-24 12:58:56 +02:00
Pantelis Antoniou
22cb7d334e mmc: Convert mmc struct's name array to a pointer
Using an array is pointless; even more pointless (and scary) is using
sprintf to fill it without a format string.

Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-03-24 11:32:10 +02:00
Pantelis Antoniou
ab769f227f mmc: Remove ops from struct mmc and put in mmc_ops
Remove the in-structure ops and put them in mmc_ops with
a constant pointer to it.

This makes the mmc structure smaller as well as conserving
code space (in theory).

All in-tree drivers are converted as well; this is done in a
single patch in order to not break git bisect.

Changes since V1:
Fix compilation b0rked issue on omap platforms where OMAP_GPIO was
not set.

Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-03-24 11:32:10 +02:00
Piotr Wilczek
3577fe8be9 drivers:mmc:sdhci: enable support for DT
This patch enables support for device tree for sdhci driver.
Non DT case is still supported.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-03-12 19:54:59 +09:00
Michal Simek
345d3c0f01 mmc: zynq: Add OF initialization support
Enable initialize sdhci from DTB.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-03-04 09:27:35 -05:00
Tom Rini
eeb72e6761 Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
	arch/arm/cpu/armv7/config.mk
	board/ti/am43xx/mux.c
	include/configs/am43xx_evm.h

Signed-off-by: Tom Rini <trini@ti.com>
2014-02-26 16:49:58 -05:00
Darwin Rambo
7a9d0ad009 mmc: kona: Add Kona mmc driver
Add support for the Kona SDHCI found on Broadcom mobile SoCs.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Steve Rae <srae@broadcom.com>
Reviewed-by: Tim Kryger <tkryger@linaro.org>
2014-02-22 19:30:41 +01:00
Tom Rini
130fbeb1c5 blackfin: Add <asm/clock.h> to numerous drivers
With d6a320d we moved some clock externs out of blackfin_local.h and
into clock.h but now need to include <asm/clock.h> in more drivers to
avoid warnings.

Cc: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Tom Rini <trini@ti.com>
2014-02-20 12:00:27 -05:00
Tom Rini
c4d376fd1c Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-02-17 14:22:02 -05:00
Tom Rini
614b2bf1c9 cmd_mmc.c: Drop open/close mmc sub-commands
The open and close mmc sub-commands implement a hard-coded set of values
specific to the SMDK5250 platform.  Remove these commands as what they
did can be done instead with a series of mmc dev / bootpart / bootbus
commands instead now.

Cc: Amar <amarendra.xt@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-02-07 18:17:49 +02:00
Tom Rini
5a99b9de1a cmd_mmc.c: Add bootbus mmc sub-command
Add a bootbus sub-command to the mmc command to allow for setting
the boot_bus_width, reset_boot_bus_width and boot_mode fields of
BOOT_BUS_WIDTH (EXT_CSD[177]).

Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-02-07 18:17:49 +02:00
Tom Rini
792970b0a3 cmd_mmc.c: Add 'partconf' command to mmc
Add a partconf sub-command to the mmc command to allow for setting
the boot_ack, boot_partition and partition_access fields of
PARTITION_CONFIG (formerly BOOT_CONFIG, EXT_CSD[179]).  Part of this
requires changing the check for 'part' from an strncmp to a strcmp, like
the rest of the sub-commands.

Cc: Andy Fleming <afleming@gmail.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-02-07 18:17:49 +02:00
Siva Durga Prasad Paladugu
f9ec45d1d9 mmc: Enabled quirk SDHCI_QUIRK_BROKEN_R1B
As per the below commit
"mmc: sdhci: add the quirk for broken r1b response"
(sha1: 3a6383207b)
need to add quirk SDHCI_QUIRK_BROKEN_R1B, when the
response type is R1b.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-02-07 17:47:19 +02:00
Rajeshwari S Shinde
d3e016cc28 MMC: DWMMC: Correct the CLKDIV register value
This patch corrects the divider value written to CLKDIV register.
Since SDCLKIN is divided inside controller by the DIVRATIO value set
in the CLKSEL register, we need to use the same output clock value to
calculate the CLKDIV value.
as per user manual: cclk_in = SDCLKIN / (DIVRATIO + 1)

Input parameter to mmc_clk is changed to dwmci_host, since
we need the same to read DWMCI_CLKSEL register.

This improves the read timing values for channel 0 on SMDK5250
from 0.288sec to 0.144sec

Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-02-07 17:42:26 +02:00
Stephen Warren
def816a2ba mmc: set rca to 1 for MMC cards
U-Boot currently sets MMC cards' RCA register to 0. This value is
reserved according to the specification. Use a value of 1 instead, just
like the Linux kernel.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-02-07 17:34:06 +02:00
Stephen Warren
a73ca4789f mmc: tegra: support Tegra124
Tegra124's MMC controller is very similar to earlier SoC generations,
and can be supported by the same driver.

However, there are some non-backwards-compatible HW differences, and
hence a new DT compatible value must be used to describe the HW. This
patch updates the driver to support that new compatible value.

That said, the HW differences are only relevant when enabling certain
high-performance transfer modes. Since the driver is currently very
simple and doesn't enable those modes, we don't actually need to address
any of these HW differences in the code yet, hence the simple nature of
this patch.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:45 -07:00
Masahiro Yamada
4d764244bd drivers: delete unused header files
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24 16:59:07 -05:00
Haijun.Zhang
d47e3d2707 esdhc: Detecting 8 bit width before mmc initialization
The upper 4 data signals of esdhc are shared with spi flash.
So detect if the upper 4 pins are assigned to esdhc before
enable sdhc 8 bit width.

Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-01-22 08:56:34 -08:00
Haijun.Zhang
f7e27cc5ee esdhc: Workaround for card can't be detected on T4240QDS
Card detection pin is ineffective on T4240QDS Rev1.0.
There are two cards can be connected to board.
1. eMMC card is built-in board, can not be removed. so
   For eMMC card it is always there.
2. Card detecting pin is functional for SDHC card in Rev2.0.

This workaround force sdhc driver scan and initialize the card
regardless of whether the card is inserted or not in case Rev1.0.

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-01-22 08:56:15 -08:00
Minkyu Kang
a4d481ed81 mmc: dwmmc: mode change to 0644
Don't know why but, file permission was changed

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-01-14 09:44:21 -05:00
Chin Liang See
c5c1af2176 socfpga/dwmmc: Adding DesignWare MMC driver support for SOCFPGA
To add the DesignWare MMC driver support for Altera SOCFPGA. It
required information such as clocks and bus width from platform
specific files (SOCFPGA handoff files)

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-01-09 11:53:55 +02:00
Markus Niebel
ab71188ce8 mmc: add setdsr support
The eMMC and the SD-Card specifications describe the optional SET_DSR command.
During measurements at our lab we found that some cards implementing this feature
having really strong driver strengts per default. This can lead to voltage peaks
above the specification of the host on signal edges for data sent from a card to
the host.

Since availability of a given card type may be shorter than the time a certain
hardware will be produced it is useful to have support for this command (Alternative
would be changing termination resistors and adapting the driver strength of the
host to the used card.)

Following proposal for an implementation:

- new field that reflects CSD field DSR_IMP in struct mmc
- new field for design specific DSR value in struct mmc
- board code can set DSR value in mmc struct just after registering an controller
- mmc_startup sends the the stored DSR value before selecting a card, if DSR_IMP is set

Additionally the mmc command is extended to make is possible to play around with different
DSR values.

The concept was tested on a i.MX53 based platform using a Micron eMMC card where the default
DSR is 0x0400 (12mA) but in our design 0x0100 (0x0100) were enough. To use this feature for
instance on a mx53loco one have to add a call to mmc_set_dsr() in board_mmc_init() after
calling fsl_esdhc_initialize() for the eMMC.

Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-01-09 11:47:51 +02:00
Darwin Rambo
30e6d979fa mmc: Minor cleanup of sdhci.c
Fixup prints to show where the print is done from, and
a few minor formatting/grammar issues.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-01-09 11:36:56 +02:00
Alexey Brodkin
2a7a210e2c mmc/dwmmc: use bounce buffer for data exchange between CPU and MMC controller
Bounce buffer implementation takes care of proper data buffer alignemt
and correct flush/invalidation of data cache at once so we no longer
depend on input data variety and make sure CPU and MMC controller deal
with expected data in case of enabled data cache.

Bounce buffer requires to add its definition (CONFIG_BOUNCE_BUFFER) in
board configuration, otherwise corresponding library won't be compiled
and linker will fail to build resulting executable.

Difference since v1 - fixed compile-time warning with type casting to
"void *":

Slight edit to remove UTF8 characters in the commit message.

Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>

====
passing argument 2 of 'bounce_buffer_start' discards 'const' qualifier
from pointer target type
====

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Amar <amarendra.xt@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Andy Fleming <afleming@gmail.com>
2014-01-09 11:29:02 +02:00
Chin Liang See
fd26b5490b mmc/dwmmc: Using calloc instead malloc
To enhance the SDMMC DesignWare driver to use calloc instead of
malloc. This will avoid the incident that uninitialized members
of mmc structure are later used for NULL comparison.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-01-08 19:02:41 +02:00
Kuo-Jung Su
adebb98ba1 mmc: add Faraday FTSDC021 SDHCI controller support
Faraday FTSDC021 is a controller which is compliant with
SDHCI v3.0, SDIO v2.0 and MMC v4.3.

However this driver is only verified with SD memory cards.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
CC: Andy Fleming <afleming@gmail.com>
2013-12-08 14:23:05 +02:00
Priyanka Jain
4520a2f28e powerpc: mmc: Add corenet devices support in esdhc spl
Existing eSDHC SPL framework assumes booting from sd-image
with boot_format header which contains final u-boot Image
offset and size. No such header is present in case of
corenet devices like T1040 as corenet deivces use PBI-RCW
based intialization.

So, for corenet deives, SPL bootloader use values provided
at compilation time. These values can be defined in board
specific config file.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-12-08 14:17:28 +02:00
Alexey Brodkin
9108b315f2 mmc/dwmmc: modify FIFO threshold only if value explicitly set
If platform provides "host->fifoth_val" it will be used for
initialization of DWMCI_FIFOTH register. Otherwise default value will be
used.

This implementation allows:
 * escape unclear and recursive calculations that are currently in use
 * use whatever custom value for DWMCI_FIFOTH initialization if any
particular SoC requires it

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Amar <amarendra.xt@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Andy Fleming <afleming@freescale.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-12-08 14:08:47 +02:00
Jaehoon Chung
18ab675597 mmc: dw_mmc: remove the exynos specific code in dw-mmc.c
dw-mmc.c is the general driver file.
So, remove the exynos specific code at dw-mmc.c.
Instead, exynos specific cod can be move into exynos-dw_mmc.c.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-08 14:07:07 +02:00
Masahiro Yamada
710f1d3d5f drivers: convert makefiles to Kbuild style
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-10-31 13:26:01 -04:00