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mmc: atmel: Properly fix clock configuration
Timing issue occurs on eMMC not only when modifying the frequency but also for all the switch command(CMD6). According to the MMC spec waiting 8 clocks after a switch command would be the thing to do. This patch allows fixing CPU hang observed when trying to changing the bus width on a eMMC on SAMA5D4. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Marek Vasut <marex@denx.de> # on DENX MA5D4EV Acked-by: Marek Vasut <marex@denx.de> Tested-by: Andreas Bießmann <andreas.devel@googlemail.com> # on atngw100 Acked-by: Andreas Bießmann <andreas.devel@googlemail.com> [fixed minor checkpatch warning] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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1 changed files with 12 additions and 3 deletions
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@ -36,6 +36,7 @@ struct atmel_mci_priv {
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struct mmc_config cfg;
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struct atmel_mci *mci;
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unsigned int initialized:1;
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unsigned int curr_clk;
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};
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/* Read Atmel MCI IP version */
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@ -91,7 +92,10 @@ static void mci_set_mode(struct mmc *mmc, u32 hz, u32 blklen)
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}
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}
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if (version >= 0x500)
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priv->curr_clk = bus_hz / (clkdiv * 2 + clkodd + 2);
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else
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priv->curr_clk = (bus_hz / (clkdiv + 1)) / 2;
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blklen &= 0xfffc;
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mr = MMCI_BF(CLKDIV, clkdiv);
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@ -118,8 +122,6 @@ static void mci_set_mode(struct mmc *mmc, u32 hz, u32 blklen)
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if (mmc->card_caps & mmc->cfg->host_caps & MMC_MODE_HS)
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writel(MMCI_BIT(HSMODE), &mci->cfg);
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udelay(50);
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priv->initialized = 1;
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}
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@ -323,6 +325,13 @@ mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
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}
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}
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/*
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* After the switch command, wait for 8 clocks before the next
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* command
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*/
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if (cmd->cmdidx == MMC_CMD_SWITCH)
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udelay(8*1000000 / priv->curr_clk); /* 8 clk in us */
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return 0;
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}
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