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https://github.com/AsahiLinux/u-boot
synced 2024-11-11 07:34:31 +00:00
mmc: split mmc_startup()
No functionnal change here. The function is really big and can be split. The part related to bus configuration are put in 2 separate functions: one for MMC and one for SD. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Jean-Jacques Hiblot
Jaehoon Chung
parent
06ec045fee
commit
8ac8a26304
1 changed files with 148 additions and 126 deletions
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@ -1103,6 +1103,152 @@ static void mmc_set_bus_width(struct mmc *mmc, uint width)
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mmc_set_ios(mmc);
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}
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static int sd_select_bus_freq_width(struct mmc *mmc)
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{
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int err;
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struct mmc_cmd cmd;
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err = sd_change_freq(mmc);
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if (err)
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return err;
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/* Restrict card's capabilities by what the host can do */
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mmc->card_caps &= mmc->cfg->host_caps;
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if (mmc->card_caps & MMC_MODE_4BIT) {
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cmd.cmdidx = MMC_CMD_APP_CMD;
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cmd.resp_type = MMC_RSP_R1;
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cmd.cmdarg = mmc->rca << 16;
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err = mmc_send_cmd(mmc, &cmd, NULL);
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if (err)
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return err;
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cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
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cmd.resp_type = MMC_RSP_R1;
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cmd.cmdarg = 2;
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err = mmc_send_cmd(mmc, &cmd, NULL);
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if (err)
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return err;
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mmc_set_bus_width(mmc, 4);
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}
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err = sd_read_ssr(mmc);
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if (err)
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return err;
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if (mmc->card_caps & MMC_MODE_HS)
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mmc->tran_speed = 50000000;
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else
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mmc->tran_speed = 25000000;
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return 0;
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}
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static int mmc_select_bus_freq_width(struct mmc *mmc, const u8 *ext_csd)
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{
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ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
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/* An array of possible bus widths in order of preference */
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static const unsigned int ext_csd_bits[] = {
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EXT_CSD_DDR_BUS_WIDTH_8,
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EXT_CSD_DDR_BUS_WIDTH_4,
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EXT_CSD_BUS_WIDTH_8,
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EXT_CSD_BUS_WIDTH_4,
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EXT_CSD_BUS_WIDTH_1,
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};
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/* An array to map CSD bus widths to host cap bits */
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static const unsigned int ext_to_hostcaps[] = {
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[EXT_CSD_DDR_BUS_WIDTH_4] =
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MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
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[EXT_CSD_DDR_BUS_WIDTH_8] =
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MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
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[EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
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[EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
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};
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/* An array to map chosen bus width to an integer */
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static const unsigned int widths[] = {
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8, 4, 8, 4, 1,
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};
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int err;
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int idx;
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err = mmc_change_freq(mmc);
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if (err)
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return err;
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/* Restrict card's capabilities by what the host can do */
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mmc->card_caps &= mmc->cfg->host_caps;
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/* Only version 4 of MMC supports wider bus widths */
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if (mmc->version < MMC_VERSION_4)
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return 0;
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for (idx = 0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
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unsigned int extw = ext_csd_bits[idx];
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unsigned int caps = ext_to_hostcaps[extw];
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/*
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* If the bus width is still not changed,
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* don't try to set the default again.
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* Otherwise, recover from switch attempts
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* by switching to 1-bit bus width.
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*/
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if (extw == EXT_CSD_BUS_WIDTH_1 &&
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mmc->bus_width == 1) {
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err = 0;
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break;
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}
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/*
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* Check to make sure the card and controller support
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* these capabilities
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*/
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if ((mmc->card_caps & caps) != caps)
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continue;
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err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
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EXT_CSD_BUS_WIDTH, extw);
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if (err)
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continue;
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mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
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mmc_set_bus_width(mmc, widths[idx]);
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err = mmc_send_ext_csd(mmc, test_csd);
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if (err)
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continue;
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/* Only compare read only fields */
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if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
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== test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
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ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
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== test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
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ext_csd[EXT_CSD_REV]
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== test_csd[EXT_CSD_REV] &&
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ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
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== test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
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memcmp(&ext_csd[EXT_CSD_SEC_CNT],
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&test_csd[EXT_CSD_SEC_CNT], 4) == 0)
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break;
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err = -EBADMSG;
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}
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if (err)
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return err;
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if (mmc->card_caps & MMC_MODE_HS) {
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if (mmc->card_caps & MMC_MODE_HS_52MHz)
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mmc->tran_speed = 52000000;
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else
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mmc->tran_speed = 26000000;
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}
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return err;
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}
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static int mmc_startup(struct mmc *mmc)
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{
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int err, i;
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@ -1110,7 +1256,6 @@ static int mmc_startup(struct mmc *mmc)
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u64 cmult, csize, capacity;
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struct mmc_cmd cmd;
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ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
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ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
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bool has_parts = false;
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bool part_completed;
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struct blk_desc *bdesc;
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@ -1415,136 +1560,13 @@ static int mmc_startup(struct mmc *mmc)
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return err;
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if (IS_SD(mmc))
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err = sd_change_freq(mmc);
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err = sd_select_bus_freq_width(mmc);
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else
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err = mmc_change_freq(mmc);
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err = mmc_select_bus_freq_width(mmc, ext_csd);
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if (err)
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return err;
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/* Restrict card's capabilities by what the host can do */
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mmc->card_caps &= mmc->cfg->host_caps;
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if (IS_SD(mmc)) {
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if (mmc->card_caps & MMC_MODE_4BIT) {
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cmd.cmdidx = MMC_CMD_APP_CMD;
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cmd.resp_type = MMC_RSP_R1;
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cmd.cmdarg = mmc->rca << 16;
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err = mmc_send_cmd(mmc, &cmd, NULL);
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if (err)
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return err;
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cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
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cmd.resp_type = MMC_RSP_R1;
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cmd.cmdarg = 2;
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err = mmc_send_cmd(mmc, &cmd, NULL);
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if (err)
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return err;
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mmc_set_bus_width(mmc, 4);
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}
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err = sd_read_ssr(mmc);
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if (err)
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return err;
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if (mmc->card_caps & MMC_MODE_HS)
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mmc->tran_speed = 50000000;
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else
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mmc->tran_speed = 25000000;
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} else if (mmc->version >= MMC_VERSION_4) {
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/* Only version 4 of MMC supports wider bus widths */
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int idx;
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/* An array of possible bus widths in order of preference */
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static unsigned ext_csd_bits[] = {
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EXT_CSD_DDR_BUS_WIDTH_8,
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EXT_CSD_DDR_BUS_WIDTH_4,
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EXT_CSD_BUS_WIDTH_8,
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EXT_CSD_BUS_WIDTH_4,
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EXT_CSD_BUS_WIDTH_1,
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};
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/* An array to map CSD bus widths to host cap bits */
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static unsigned ext_to_hostcaps[] = {
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[EXT_CSD_DDR_BUS_WIDTH_4] =
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MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
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[EXT_CSD_DDR_BUS_WIDTH_8] =
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MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
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[EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
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[EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
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};
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/* An array to map chosen bus width to an integer */
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static unsigned widths[] = {
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8, 4, 8, 4, 1,
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};
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for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
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unsigned int extw = ext_csd_bits[idx];
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unsigned int caps = ext_to_hostcaps[extw];
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/*
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* If the bus width is still not changed,
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* don't try to set the default again.
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* Otherwise, recover from switch attempts
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* by switching to 1-bit bus width.
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*/
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if (extw == EXT_CSD_BUS_WIDTH_1 &&
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mmc->bus_width == 1) {
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err = 0;
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break;
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}
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/*
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* Check to make sure the card and controller support
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* these capabilities
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*/
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if ((mmc->card_caps & caps) != caps)
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continue;
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err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
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EXT_CSD_BUS_WIDTH, extw);
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if (err)
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continue;
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mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
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mmc_set_bus_width(mmc, widths[idx]);
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err = mmc_send_ext_csd(mmc, test_csd);
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if (err)
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continue;
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/* Only compare read only fields */
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if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
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== test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
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ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
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== test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
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ext_csd[EXT_CSD_REV]
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== test_csd[EXT_CSD_REV] &&
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ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
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== test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
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memcmp(&ext_csd[EXT_CSD_SEC_CNT],
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&test_csd[EXT_CSD_SEC_CNT], 4) == 0)
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break;
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else
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err = -EBADMSG;
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}
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if (err)
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return err;
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if (mmc->card_caps & MMC_MODE_HS) {
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if (mmc->card_caps & MMC_MODE_HS_52MHz)
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mmc->tran_speed = 52000000;
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else
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mmc->tran_speed = 26000000;
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}
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}
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mmc_set_clock(mmc, mmc->tran_speed);
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/* Fix the block length for DDR mode */
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