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dm: mmc: sunxi: Pass private data around explicitly
At present the driver-private data is obtained in various functions by various means. With driver model this is provided automatically. Without driver model it comes from a C array declared at the top of the file. Adjust internal functions so that they are passed the private data as a parameter, allowing the caller to obtain it using either means. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Simon Glass
Jaehoon Chung
parent
3f5af12a5d
commit
034e226bc7
1 changed files with 42 additions and 29 deletions
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@ -176,9 +176,8 @@ static int mmc_clk_io_on(int sdc_no)
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return mmc_set_mod_clk(priv, 24000000);
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}
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static int mmc_update_clk(struct mmc *mmc)
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static int mmc_update_clk(struct sunxi_mmc_priv *priv)
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{
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struct sunxi_mmc_priv *priv = mmc->priv;
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unsigned int cmd;
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unsigned timeout_msecs = 2000;
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@ -198,15 +197,14 @@ static int mmc_update_clk(struct mmc *mmc)
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return 0;
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}
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static int mmc_config_clock(struct mmc *mmc)
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static int mmc_config_clock(struct sunxi_mmc_priv *priv, struct mmc *mmc)
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{
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struct sunxi_mmc_priv *priv = mmc->priv;
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unsigned rval = readl(&priv->reg->clkcr);
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/* Disable Clock */
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rval &= ~SUNXI_MMC_CLK_ENABLE;
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writel(rval, &priv->reg->clkcr);
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if (mmc_update_clk(mmc))
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if (mmc_update_clk(priv))
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return -1;
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/* Set mod_clk to new rate */
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@ -220,21 +218,20 @@ static int mmc_config_clock(struct mmc *mmc)
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/* Re-enable Clock */
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rval |= SUNXI_MMC_CLK_ENABLE;
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writel(rval, &priv->reg->clkcr);
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if (mmc_update_clk(mmc))
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if (mmc_update_clk(priv))
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return -1;
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return 0;
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}
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static int sunxi_mmc_set_ios(struct mmc *mmc)
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static int sunxi_mmc_set_ios_common(struct sunxi_mmc_priv *priv,
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struct mmc *mmc)
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{
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struct sunxi_mmc_priv *priv = mmc->priv;
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debug("set ios: bus_width: %x, clock: %d\n",
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mmc->bus_width, mmc->clock);
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/* Change clock first */
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if (mmc->clock && mmc_config_clock(mmc) != 0) {
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if (mmc->clock && mmc_config_clock(priv, mmc) != 0) {
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priv->fatal_err = 1;
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return -EINVAL;
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}
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@ -261,9 +258,9 @@ static int sunxi_mmc_core_init(struct mmc *mmc)
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return 0;
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}
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static int mmc_trans_data_by_cpu(struct mmc *mmc, struct mmc_data *data)
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static int mmc_trans_data_by_cpu(struct sunxi_mmc_priv *priv, struct mmc *mmc,
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struct mmc_data *data)
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{
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struct sunxi_mmc_priv *priv = mmc->priv;
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const int reading = !!(data->flags & MMC_DATA_READ);
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const uint32_t status_bit = reading ? SUNXI_MMC_STATUS_FIFO_EMPTY :
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SUNXI_MMC_STATUS_FIFO_FULL;
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@ -293,10 +290,9 @@ static int mmc_trans_data_by_cpu(struct mmc *mmc, struct mmc_data *data)
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return 0;
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}
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static int mmc_rint_wait(struct mmc *mmc, unsigned int timeout_msecs,
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unsigned int done_bit, const char *what)
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static int mmc_rint_wait(struct sunxi_mmc_priv *priv, struct mmc *mmc,
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uint timeout_msecs, uint done_bit, const char *what)
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{
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struct sunxi_mmc_priv *priv = mmc->priv;
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unsigned int status;
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do {
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@ -313,10 +309,10 @@ static int mmc_rint_wait(struct mmc *mmc, unsigned int timeout_msecs,
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return 0;
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}
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static int sunxi_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
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struct mmc_data *data)
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static int sunxi_mmc_send_cmd_common(struct sunxi_mmc_priv *priv,
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struct mmc *mmc, struct mmc_cmd *cmd,
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struct mmc_data *data)
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{
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struct sunxi_mmc_priv *priv = mmc->priv;
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unsigned int cmdval = SUNXI_MMC_CMD_START;
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unsigned int timeout_msecs;
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int error = 0;
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@ -372,7 +368,7 @@ static int sunxi_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
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bytecnt = data->blocksize * data->blocks;
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debug("trans data %d bytes\n", bytecnt);
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writel(cmdval | cmd->cmdidx, &priv->reg->cmd);
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ret = mmc_trans_data_by_cpu(mmc, data);
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ret = mmc_trans_data_by_cpu(priv, mmc, data);
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if (ret) {
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error = readl(&priv->reg->rint) &
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SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT;
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@ -381,14 +377,15 @@ static int sunxi_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
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}
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}
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error = mmc_rint_wait(mmc, 1000, SUNXI_MMC_RINT_COMMAND_DONE, "cmd");
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error = mmc_rint_wait(priv, mmc, 1000, SUNXI_MMC_RINT_COMMAND_DONE,
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"cmd");
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if (error)
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goto out;
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if (data) {
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timeout_msecs = 120;
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debug("cacl timeout %x msec\n", timeout_msecs);
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error = mmc_rint_wait(mmc, timeout_msecs,
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error = mmc_rint_wait(priv, mmc, timeout_msecs,
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data->blocks > 1 ?
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SUNXI_MMC_RINT_AUTO_COMMAND_DONE :
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SUNXI_MMC_RINT_DATA_OVER,
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@ -425,7 +422,7 @@ static int sunxi_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
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out:
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if (error < 0) {
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writel(SUNXI_MMC_GCTRL_RESET, &priv->reg->gctrl);
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mmc_update_clk(mmc);
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mmc_update_clk(priv);
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}
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writel(0xffffffff, &priv->reg->rint);
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writel(readl(&priv->reg->gctrl) | SUNXI_MMC_GCTRL_FIFO_RESET,
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@ -434,7 +431,22 @@ out:
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return error;
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}
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static int sunxi_mmc_getcd(struct mmc *mmc)
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static int sunxi_mmc_set_ios_legacy(struct mmc *mmc)
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{
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struct sunxi_mmc_priv *priv = mmc->priv;
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return sunxi_mmc_set_ios_common(priv, mmc);
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}
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static int sunxi_mmc_send_cmd_legacy(struct mmc *mmc, struct mmc_cmd *cmd,
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struct mmc_data *data)
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{
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struct sunxi_mmc_priv *priv = mmc->priv;
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return sunxi_mmc_send_cmd_common(priv, mmc, cmd, data);
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}
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static int sunxi_mmc_getcd_legacy(struct mmc *mmc)
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{
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struct sunxi_mmc_priv *priv = mmc->priv;
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int cd_pin;
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@ -447,17 +459,18 @@ static int sunxi_mmc_getcd(struct mmc *mmc)
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}
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static const struct mmc_ops sunxi_mmc_ops = {
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.send_cmd = sunxi_mmc_send_cmd,
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.set_ios = sunxi_mmc_set_ios,
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.send_cmd = sunxi_mmc_send_cmd_legacy,
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.set_ios = sunxi_mmc_set_ios_legacy,
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.init = sunxi_mmc_core_init,
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.getcd = sunxi_mmc_getcd,
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.getcd = sunxi_mmc_getcd_legacy,
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};
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struct mmc *sunxi_mmc_init(int sdc_no)
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{
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struct mmc_config *cfg = &mmc_host[sdc_no].cfg;
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struct sunxi_mmc_priv *priv = &mmc_host[sdc_no];
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struct mmc_config *cfg = &priv->cfg;
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memset(&mmc_host[sdc_no], 0, sizeof(struct sunxi_mmc_priv));
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memset(priv, '\0', sizeof(struct sunxi_mmc_priv));
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cfg->name = "SUNXI SD/MMC";
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cfg->ops = &sunxi_mmc_ops;
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@ -479,5 +492,5 @@ struct mmc *sunxi_mmc_init(int sdc_no)
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mmc_clk_io_on(sdc_no);
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return mmc_create(cfg, &mmc_host[sdc_no]);
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return mmc_create(cfg, mmc_host);
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}
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