tegra: Convert MMC to use driver model for operations

Enable CONFIG_DM_MMC_OPS and CONFIG_BLK for all Tegra devices. This moves
Tegra to use driver model fully for MMC.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2017-04-23 20:02:11 -06:00
parent 854f9a71f5
commit 0e513e788f
29 changed files with 42 additions and 86 deletions

View file

@ -110,7 +110,7 @@ static int tdx_cfg_block_mmc_storage(u8 *config_block, int write)
ret = -ENODEV;
goto out;
}
if (part != mmc->block_dev.hwpart) {
if (part != mmc_get_blk_desc(mmc)->hwpart) {
if (blk_select_hwpart_devnum(IF_TYPE_MMC, dev, part)) {
puts("MMC partition switch failed\n");
ret = -ENODEV;

View file

@ -24,10 +24,8 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_TEGRA124_MMC_DISABLE_EXT_LOOPBACK=y
CONFIG_E1000=y
CONFIG_PCI=y

View file

@ -25,10 +25,8 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y

View file

@ -26,11 +26,9 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_RTL8169=y

View file

@ -24,8 +24,6 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_RTL8169=y

View file

@ -26,11 +26,9 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_RTL8169=y

View file

@ -29,10 +29,8 @@ CONFIG_CMD_UBI=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y

View file

@ -25,10 +25,8 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_USB=y

View file

@ -26,11 +26,9 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y

View file

@ -21,11 +21,9 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_BLK is not set
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y

View file

@ -22,8 +22,6 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
# CONFIG_DM_MMC_OPS is not set
CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y

View file

@ -26,11 +26,9 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_RTL8169=y

View file

@ -23,8 +23,6 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
# CONFIG_DM_MMC_OPS is not set
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y

View file

@ -32,14 +32,12 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
CONFIG_CROS_EC_KEYB=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_SPI=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_PMIC=y

View file

@ -22,11 +22,9 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_BLK is not set
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y

View file

@ -22,11 +22,9 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_BLK is not set
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_RTL8169=y

View file

@ -22,11 +22,9 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_BLK is not set
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y

View file

@ -19,9 +19,7 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_BLK is not set
CONFIG_TEGRA186_BPMP_I2C=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_DWC_ETH_QOS=y
CONFIG_E1000=y
CONFIG_RTL8169=y

View file

@ -19,9 +19,7 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_BLK is not set
CONFIG_TEGRA186_BPMP_I2C=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_DWC_ETH_QOS=y
CONFIG_E1000=y
CONFIG_RTL8169=y

View file

@ -22,8 +22,6 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
# CONFIG_DM_MMC_OPS is not set
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y

View file

@ -22,8 +22,6 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
# CONFIG_DM_MMC_OPS is not set
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_USB=y

View file

@ -22,8 +22,6 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
# CONFIG_DM_MMC_OPS is not set
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y

View file

@ -25,8 +25,6 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y

View file

@ -23,8 +23,6 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
# CONFIG_DM_MMC_OPS is not set
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y

View file

@ -24,8 +24,6 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_RTL8169=y

View file

@ -26,11 +26,9 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y

View file

@ -21,8 +21,6 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
# CONFIG_DM_MMC_OPS is not set
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y

View file

@ -22,8 +22,6 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
# CONFIG_DM_MMC_OPS is not set
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_USB=y

View file

@ -18,6 +18,11 @@
DECLARE_GLOBAL_DATA_PTR;
struct tegra_mmc_plat {
struct mmc_config cfg;
struct mmc mmc;
};
struct tegra_mmc_priv {
struct tegra_mmc *reg;
struct reset_ctl reset_ctl;
@ -27,8 +32,6 @@ struct tegra_mmc_priv {
struct gpio_desc wp_gpio; /* Write Protect GPIO */
unsigned int version; /* SDHCI spec. version */
unsigned int clock; /* Current clock (MHz) */
struct mmc_config cfg; /* mmc configuration */
struct mmc *mmc;
};
static void tegra_mmc_set_power(struct tegra_mmc_priv *priv,
@ -151,11 +154,11 @@ static int tegra_mmc_wait_inhibit(struct tegra_mmc_priv *priv,
return 0;
}
static int tegra_mmc_send_cmd_bounced(struct mmc *mmc, struct mmc_cmd *cmd,
static int tegra_mmc_send_cmd_bounced(struct udevice *dev, struct mmc_cmd *cmd,
struct mmc_data *data,
struct bounce_buffer *bbstate)
{
struct tegra_mmc_priv *priv = mmc->priv;
struct tegra_mmc_priv *priv = dev_get_priv(dev);
int flags, i;
int result;
unsigned int mask = 0;
@ -324,7 +327,7 @@ static int tegra_mmc_send_cmd_bounced(struct mmc *mmc, struct mmc_cmd *cmd,
return 0;
}
static int tegra_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
static int tegra_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
struct mmc_data *data)
{
void *buf;
@ -346,7 +349,7 @@ static int tegra_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
bounce_buffer_start(&bbstate, buf, len, bbflags);
}
ret = tegra_mmc_send_cmd_bounced(mmc, cmd, data, &bbstate);
ret = tegra_mmc_send_cmd_bounced(dev, cmd, data, &bbstate);
if (data)
bounce_buffer_stop(&bbstate);
@ -408,9 +411,10 @@ out:
priv->clock = clock;
}
static int tegra_mmc_set_ios(struct mmc *mmc)
static int tegra_mmc_set_ios(struct udevice *dev)
{
struct tegra_mmc_priv *priv = mmc->priv;
struct tegra_mmc_priv *priv = dev_get_priv(dev);
struct mmc *mmc = mmc_get_mmc_dev(dev);
unsigned char ctrl;
debug(" mmc_set_ios called\n");
@ -505,9 +509,10 @@ static void tegra_mmc_reset(struct tegra_mmc_priv *priv, struct mmc *mmc)
tegra_mmc_pad_init(priv);
}
static int tegra_mmc_init(struct mmc *mmc)
static int tegra_mmc_init(struct udevice *dev)
{
struct tegra_mmc_priv *priv = mmc->priv;
struct tegra_mmc_priv *priv = dev_get_priv(dev);
struct mmc *mmc = mmc_get_mmc_dev(dev);
unsigned int mask;
debug(" tegra_mmc_init called\n");
@ -566,9 +571,9 @@ static int tegra_mmc_init(struct mmc *mmc)
return 0;
}
static int tegra_mmc_getcd(struct mmc *mmc)
static int tegra_mmc_getcd(struct udevice *dev)
{
struct tegra_mmc_priv *priv = mmc->priv;
struct tegra_mmc_priv *priv = dev_get_priv(dev);
debug("tegra_mmc_getcd called\n");
@ -578,32 +583,32 @@ static int tegra_mmc_getcd(struct mmc *mmc)
return 1;
}
static const struct mmc_ops tegra_mmc_ops = {
static const struct dm_mmc_ops tegra_mmc_ops = {
.send_cmd = tegra_mmc_send_cmd,
.set_ios = tegra_mmc_set_ios,
.init = tegra_mmc_init,
.getcd = tegra_mmc_getcd,
.get_cd = tegra_mmc_getcd,
};
static int tegra_mmc_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct tegra_mmc_plat *plat = dev_get_platdata(dev);
struct tegra_mmc_priv *priv = dev_get_priv(dev);
struct mmc_config *cfg = &plat->cfg;
int bus_width, ret;
priv->cfg.name = "Tegra SD/MMC";
priv->cfg.ops = &tegra_mmc_ops;
cfg->name = dev->name;
bus_width = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"bus-width", 1);
priv->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
priv->cfg.host_caps = 0;
cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
cfg->host_caps = 0;
if (bus_width == 8)
priv->cfg.host_caps |= MMC_MODE_8BIT;
cfg->host_caps |= MMC_MODE_8BIT;
if (bus_width >= 4)
priv->cfg.host_caps |= MMC_MODE_4BIT;
priv->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
cfg->host_caps |= MMC_MODE_4BIT;
cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
/*
* min freq is for card identification, and is the highest
@ -611,10 +616,10 @@ static int tegra_mmc_probe(struct udevice *dev)
* max freq is highest HS eMMC clock as per the SD/MMC spec
* (actually 52MHz)
*/
priv->cfg.f_min = 375000;
priv->cfg.f_max = 48000000;
cfg->f_min = 375000;
cfg->f_max = 48000000;
priv->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
priv->reg = (void *)devfdt_get_addr(dev);
@ -652,14 +657,16 @@ static int tegra_mmc_probe(struct udevice *dev)
if (dm_gpio_is_valid(&priv->pwr_gpio))
dm_gpio_set_value(&priv->pwr_gpio, 1);
priv->mmc = mmc_create(&priv->cfg, priv);
if (priv->mmc == NULL)
return -1;
upriv->mmc = &plat->mmc;
priv->mmc->dev = dev;
upriv->mmc = priv->mmc;
return tegra_mmc_init(dev);
}
return 0;
static int tegra_mmc_bind(struct udevice *dev)
{
struct tegra_mmc_plat *plat = dev_get_platdata(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
static const struct udevice_id tegra_mmc_ids[] = {
@ -676,6 +683,9 @@ U_BOOT_DRIVER(tegra_mmc_drv) = {
.name = "tegra_mmc",
.id = UCLASS_MMC,
.of_match = tegra_mmc_ids,
.bind = tegra_mmc_bind,
.probe = tegra_mmc_probe,
.ops = &tegra_mmc_ops,
.platdata_auto_alloc_size = sizeof(struct tegra_mmc_plat),
.priv_auto_alloc_size = sizeof(struct tegra_mmc_priv),
};