mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 07:04:28 +00:00
tegra: Convert MMC to use driver model for operations
Enable CONFIG_DM_MMC_OPS and CONFIG_BLK for all Tegra devices. This moves Tegra to use driver model fully for MMC. Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
parent
854f9a71f5
commit
0e513e788f
29 changed files with 42 additions and 86 deletions
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@ -110,7 +110,7 @@ static int tdx_cfg_block_mmc_storage(u8 *config_block, int write)
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ret = -ENODEV;
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goto out;
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}
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if (part != mmc->block_dev.hwpart) {
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if (part != mmc_get_blk_desc(mmc)->hwpart) {
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if (blk_select_hwpart_devnum(IF_TYPE_MMC, dev, part)) {
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puts("MMC partition switch failed\n");
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ret = -ENODEV;
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@ -24,10 +24,8 @@ CONFIG_CMD_GPIO=y
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# CONFIG_CMD_NFS is not set
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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CONFIG_DFU_MMC=y
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CONFIG_DFU_RAM=y
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_TEGRA124_MMC_DISABLE_EXT_LOOPBACK=y
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CONFIG_E1000=y
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CONFIG_PCI=y
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@ -25,10 +25,8 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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CONFIG_DFU_MMC=y
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CONFIG_DFU_RAM=y
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_E1000=y
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CONFIG_PCI=y
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CONFIG_DM_PCI=y
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@ -26,11 +26,9 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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CONFIG_DFU_MMC=y
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CONFIG_DFU_RAM=y
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CONFIG_DFU_SF=y
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_RTL8169=y
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@ -24,8 +24,6 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_RTL8169=y
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@ -26,11 +26,9 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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CONFIG_DFU_MMC=y
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CONFIG_DFU_RAM=y
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CONFIG_DFU_SF=y
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_RTL8169=y
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@ -29,10 +29,8 @@ CONFIG_CMD_UBI=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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CONFIG_DFU_MMC=y
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CONFIG_DFU_RAM=y
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_MTD_UBI_FASTMAP=y
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CONFIG_DM_PMIC=y
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CONFIG_DM_REGULATOR=y
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@ -25,10 +25,8 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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CONFIG_DFU_MMC=y
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CONFIG_DFU_RAM=y
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_SYS_NS16550=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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@ -26,11 +26,9 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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CONFIG_DFU_MMC=y
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CONFIG_DFU_RAM=y
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CONFIG_DFU_SF=y
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_SYS_NS16550=y
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@ -21,11 +21,9 @@ CONFIG_CMD_GPIO=y
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# CONFIG_CMD_SETEXPR is not set
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# CONFIG_CMD_NFS is not set
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CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_BLK is not set
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CONFIG_DFU_MMC=y
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CONFIG_DFU_RAM=y
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CONFIG_DFU_SF=y
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_SYS_NS16550=y
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@ -22,8 +22,6 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_PCI=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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@ -26,11 +26,9 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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CONFIG_DFU_MMC=y
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CONFIG_DFU_RAM=y
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CONFIG_DFU_SF=y
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_RTL8169=y
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@ -23,8 +23,6 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_DM_PMIC=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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@ -32,14 +32,12 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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CONFIG_DFU_MMC=y
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CONFIG_DFU_RAM=y
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CONFIG_DFU_SF=y
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CONFIG_CROS_EC_KEYB=y
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CONFIG_CROS_EC=y
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CONFIG_CROS_EC_SPI=y
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_DM_PMIC=y
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@ -22,11 +22,9 @@ CONFIG_CMD_GPIO=y
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# CONFIG_CMD_SETEXPR is not set
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# CONFIG_CMD_NFS is not set
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CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_BLK is not set
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CONFIG_DFU_MMC=y
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CONFIG_DFU_RAM=y
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CONFIG_DFU_SF=y
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_SYS_NS16550=y
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@ -22,11 +22,9 @@ CONFIG_CMD_GPIO=y
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# CONFIG_CMD_SETEXPR is not set
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# CONFIG_CMD_NFS is not set
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CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_BLK is not set
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CONFIG_DFU_MMC=y
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CONFIG_DFU_RAM=y
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CONFIG_DFU_SF=y
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_RTL8169=y
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@ -22,11 +22,9 @@ CONFIG_CMD_GPIO=y
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# CONFIG_CMD_SETEXPR is not set
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# CONFIG_CMD_NFS is not set
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CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_BLK is not set
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CONFIG_DFU_MMC=y
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CONFIG_DFU_RAM=y
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CONFIG_DFU_SF=y
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_SYS_NS16550=y
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@ -19,9 +19,7 @@ CONFIG_CMD_GPIO=y
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# CONFIG_CMD_SETEXPR is not set
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# CONFIG_CMD_NFS is not set
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CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_BLK is not set
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CONFIG_TEGRA186_BPMP_I2C=y
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_DWC_ETH_QOS=y
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CONFIG_E1000=y
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CONFIG_RTL8169=y
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@ -19,9 +19,7 @@ CONFIG_CMD_GPIO=y
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# CONFIG_CMD_SETEXPR is not set
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# CONFIG_CMD_NFS is not set
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CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_BLK is not set
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CONFIG_TEGRA186_BPMP_I2C=y
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_DWC_ETH_QOS=y
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CONFIG_E1000=y
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CONFIG_RTL8169=y
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@ -22,8 +22,6 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_DM_PMIC=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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@ -22,8 +22,6 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_SYS_NS16550=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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@ -22,8 +22,6 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_DM_PMIC=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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@ -25,8 +25,6 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_SYS_NS16550=y
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@ -23,8 +23,6 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_DM_PMIC=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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@ -24,8 +24,6 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_RTL8169=y
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@ -26,11 +26,9 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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CONFIG_DFU_MMC=y
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CONFIG_DFU_RAM=y
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CONFIG_DFU_SF=y
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_SYS_NS16550=y
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@ -21,8 +21,6 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_DM_PMIC=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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@ -22,8 +22,6 @@ CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_DM=y
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# CONFIG_BLK is not set
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# CONFIG_DM_MMC_OPS is not set
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CONFIG_SYS_NS16550=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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@ -18,6 +18,11 @@
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DECLARE_GLOBAL_DATA_PTR;
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struct tegra_mmc_plat {
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struct mmc_config cfg;
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struct mmc mmc;
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};
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struct tegra_mmc_priv {
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struct tegra_mmc *reg;
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struct reset_ctl reset_ctl;
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@ -27,8 +32,6 @@ struct tegra_mmc_priv {
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struct gpio_desc wp_gpio; /* Write Protect GPIO */
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unsigned int version; /* SDHCI spec. version */
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unsigned int clock; /* Current clock (MHz) */
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struct mmc_config cfg; /* mmc configuration */
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struct mmc *mmc;
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};
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static void tegra_mmc_set_power(struct tegra_mmc_priv *priv,
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@ -151,11 +154,11 @@ static int tegra_mmc_wait_inhibit(struct tegra_mmc_priv *priv,
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return 0;
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}
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static int tegra_mmc_send_cmd_bounced(struct mmc *mmc, struct mmc_cmd *cmd,
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static int tegra_mmc_send_cmd_bounced(struct udevice *dev, struct mmc_cmd *cmd,
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struct mmc_data *data,
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struct bounce_buffer *bbstate)
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{
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struct tegra_mmc_priv *priv = mmc->priv;
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struct tegra_mmc_priv *priv = dev_get_priv(dev);
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int flags, i;
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int result;
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unsigned int mask = 0;
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return 0;
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}
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static int tegra_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
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static int tegra_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
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struct mmc_data *data)
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{
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void *buf;
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bounce_buffer_start(&bbstate, buf, len, bbflags);
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}
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ret = tegra_mmc_send_cmd_bounced(mmc, cmd, data, &bbstate);
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ret = tegra_mmc_send_cmd_bounced(dev, cmd, data, &bbstate);
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if (data)
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bounce_buffer_stop(&bbstate);
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@ -408,9 +411,10 @@ out:
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priv->clock = clock;
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}
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static int tegra_mmc_set_ios(struct mmc *mmc)
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static int tegra_mmc_set_ios(struct udevice *dev)
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{
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struct tegra_mmc_priv *priv = mmc->priv;
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struct tegra_mmc_priv *priv = dev_get_priv(dev);
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struct mmc *mmc = mmc_get_mmc_dev(dev);
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unsigned char ctrl;
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debug(" mmc_set_ios called\n");
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@ -505,9 +509,10 @@ static void tegra_mmc_reset(struct tegra_mmc_priv *priv, struct mmc *mmc)
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tegra_mmc_pad_init(priv);
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}
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static int tegra_mmc_init(struct mmc *mmc)
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static int tegra_mmc_init(struct udevice *dev)
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{
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struct tegra_mmc_priv *priv = mmc->priv;
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struct tegra_mmc_priv *priv = dev_get_priv(dev);
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struct mmc *mmc = mmc_get_mmc_dev(dev);
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unsigned int mask;
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debug(" tegra_mmc_init called\n");
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@ -566,9 +571,9 @@ static int tegra_mmc_init(struct mmc *mmc)
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return 0;
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}
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static int tegra_mmc_getcd(struct mmc *mmc)
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static int tegra_mmc_getcd(struct udevice *dev)
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{
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struct tegra_mmc_priv *priv = mmc->priv;
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struct tegra_mmc_priv *priv = dev_get_priv(dev);
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debug("tegra_mmc_getcd called\n");
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@ -578,32 +583,32 @@ static int tegra_mmc_getcd(struct mmc *mmc)
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return 1;
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}
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static const struct mmc_ops tegra_mmc_ops = {
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static const struct dm_mmc_ops tegra_mmc_ops = {
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.send_cmd = tegra_mmc_send_cmd,
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.set_ios = tegra_mmc_set_ios,
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.init = tegra_mmc_init,
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.getcd = tegra_mmc_getcd,
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.get_cd = tegra_mmc_getcd,
|
||||
};
|
||||
|
||||
static int tegra_mmc_probe(struct udevice *dev)
|
||||
{
|
||||
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
|
||||
struct tegra_mmc_plat *plat = dev_get_platdata(dev);
|
||||
struct tegra_mmc_priv *priv = dev_get_priv(dev);
|
||||
struct mmc_config *cfg = &plat->cfg;
|
||||
int bus_width, ret;
|
||||
|
||||
priv->cfg.name = "Tegra SD/MMC";
|
||||
priv->cfg.ops = &tegra_mmc_ops;
|
||||
cfg->name = dev->name;
|
||||
|
||||
bus_width = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
|
||||
"bus-width", 1);
|
||||
|
||||
priv->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
|
||||
priv->cfg.host_caps = 0;
|
||||
cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
|
||||
cfg->host_caps = 0;
|
||||
if (bus_width == 8)
|
||||
priv->cfg.host_caps |= MMC_MODE_8BIT;
|
||||
cfg->host_caps |= MMC_MODE_8BIT;
|
||||
if (bus_width >= 4)
|
||||
priv->cfg.host_caps |= MMC_MODE_4BIT;
|
||||
priv->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
|
||||
cfg->host_caps |= MMC_MODE_4BIT;
|
||||
cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
|
||||
|
||||
/*
|
||||
* min freq is for card identification, and is the highest
|
||||
|
@ -611,10 +616,10 @@ static int tegra_mmc_probe(struct udevice *dev)
|
|||
* max freq is highest HS eMMC clock as per the SD/MMC spec
|
||||
* (actually 52MHz)
|
||||
*/
|
||||
priv->cfg.f_min = 375000;
|
||||
priv->cfg.f_max = 48000000;
|
||||
cfg->f_min = 375000;
|
||||
cfg->f_max = 48000000;
|
||||
|
||||
priv->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
|
||||
cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
|
||||
|
||||
priv->reg = (void *)devfdt_get_addr(dev);
|
||||
|
||||
|
@ -652,14 +657,16 @@ static int tegra_mmc_probe(struct udevice *dev)
|
|||
if (dm_gpio_is_valid(&priv->pwr_gpio))
|
||||
dm_gpio_set_value(&priv->pwr_gpio, 1);
|
||||
|
||||
priv->mmc = mmc_create(&priv->cfg, priv);
|
||||
if (priv->mmc == NULL)
|
||||
return -1;
|
||||
upriv->mmc = &plat->mmc;
|
||||
|
||||
priv->mmc->dev = dev;
|
||||
upriv->mmc = priv->mmc;
|
||||
return tegra_mmc_init(dev);
|
||||
}
|
||||
|
||||
return 0;
|
||||
static int tegra_mmc_bind(struct udevice *dev)
|
||||
{
|
||||
struct tegra_mmc_plat *plat = dev_get_platdata(dev);
|
||||
|
||||
return mmc_bind(dev, &plat->mmc, &plat->cfg);
|
||||
}
|
||||
|
||||
static const struct udevice_id tegra_mmc_ids[] = {
|
||||
|
@ -676,6 +683,9 @@ U_BOOT_DRIVER(tegra_mmc_drv) = {
|
|||
.name = "tegra_mmc",
|
||||
.id = UCLASS_MMC,
|
||||
.of_match = tegra_mmc_ids,
|
||||
.bind = tegra_mmc_bind,
|
||||
.probe = tegra_mmc_probe,
|
||||
.ops = &tegra_mmc_ops,
|
||||
.platdata_auto_alloc_size = sizeof(struct tegra_mmc_plat),
|
||||
.priv_auto_alloc_size = sizeof(struct tegra_mmc_priv),
|
||||
};
|
||||
|
|
Loading…
Reference in a new issue