mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 15:41:40 +00:00
of: clean up OF_CONTROL ifdef conditionals
We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
parent
dffb86e468
commit
0f9258228e
55 changed files with 74 additions and 99 deletions
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@ -27,7 +27,5 @@
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#define DWMCI_DIVRATIO_BIT 24
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#define DWMCI_DIVRATIO_MASK 0x7
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#ifdef CONFIG_OF_CONTROL
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int exynos_dwmmc_init(const void *blob);
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#endif
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int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel);
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@ -374,7 +374,5 @@ void exynos_init_dsim_platform_data(vidinfo_t *vid);
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/* panel driver init based on mipi dsi interface */
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void s6e8ax0_init(void);
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#ifdef CONFIG_OF_CONTROL
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extern int mipi_power(void);
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#endif
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#endif /* _DSIM_H */
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@ -65,8 +65,6 @@ static inline int s5p_mmc_init(int index, int bus_width)
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return s5p_sdhci_init(base, index, bus_width);
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}
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#ifdef CONFIG_OF_CONTROL
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int exynos_mmc_init(const void *blob);
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#endif
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#endif
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@ -874,7 +874,7 @@ int exynos_pinmux_config(int peripheral, int flags)
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return -1;
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}
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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static int exynos4_pinmux_decode_periph_id(const void *blob, int node)
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{
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int err;
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@ -573,7 +573,7 @@ void clock_ll_start_uart(enum periph_id periph_id)
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reset_set_enable(periph_id, 0);
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}
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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int clock_decode_periph_id(const void *blob, int node)
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{
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enum periph_id id;
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@ -588,7 +588,7 @@ int clock_decode_periph_id(const void *blob, int node)
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assert(clock_periph_id_isvalid(id));
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return id;
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}
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#endif /* CONFIG_OF_CONTROL */
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#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
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int clock_verify(void)
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{
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@ -582,7 +582,7 @@ void reset_set_enable(enum periph_id periph_id, int enable)
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writel(reg, reset);
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}
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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/*
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* Convert a device tree clock ID to our peripheral ID. They are mostly
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* the same but we are very cautious so we check that a valid clock ID is
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@ -618,7 +618,7 @@ enum periph_id clk_id_to_periph_id(int clk_id)
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return clk_id;
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}
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}
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#endif /* CONFIG_OF_CONTROL */
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#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
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void clock_early_init(void)
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{
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@ -732,7 +732,7 @@ void reset_set_enable(enum periph_id periph_id, int enable)
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writel(reg, reset);
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}
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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/*
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* Convert a device tree clock ID to our peripheral ID. They are mostly
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* the same but we are very cautious so we check that a valid clock ID is
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@ -798,7 +798,7 @@ enum periph_id clk_id_to_periph_id(int clk_id)
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return clk_id;
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}
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}
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#endif /* CONFIG_OF_CONTROL */
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#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
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void clock_early_init(void)
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{
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@ -507,7 +507,7 @@ void reset_set_enable(enum periph_id periph_id, int enable)
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writel(reg, reset);
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}
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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/*
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* Convert a device tree clock ID to our peripheral ID. They are mostly
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* the same but we are very cautious so we check that a valid clock ID is
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@ -542,7 +542,7 @@ enum periph_id clk_id_to_periph_id(int clk_id)
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return clk_id;
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}
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}
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#endif /* CONFIG_OF_CONTROL */
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#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
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void clock_early_init(void)
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{
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@ -562,7 +562,7 @@ void reset_set_enable(enum periph_id periph_id, int enable)
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writel(reg, reset);
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}
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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/*
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* Convert a device tree clock ID to our peripheral ID. They are mostly
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* the same but we are very cautious so we check that a valid clock ID is
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return clk_id;
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}
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}
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#endif /* CONFIG_OF_CONTROL */
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#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
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void clock_early_init(void)
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{
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@ -24,7 +24,7 @@ DECLARE_GLOBAL_DATA_PTR;
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static int reset_pin = -1;
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#endif
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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ulong ram_base;
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void dram_init_banksize(void)
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@ -154,7 +154,7 @@ int board_mmc_init(bd_t *bd)
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int dram_init(void)
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{
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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int node;
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fdt_addr_t addr;
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fdt_size_t size;
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@ -135,7 +135,7 @@ int do_run(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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}
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#endif
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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bool cli_process_fdt(const char **cmdp)
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{
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/* Allow the fdt to override the boot command */
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*/
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hang();
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}
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#endif /* CONFIG_OF_CONTROL */
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#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
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void cli_loop(void)
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{
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@ -157,8 +157,7 @@ int spl_init(void)
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gd->malloc_limit = CONFIG_SYS_MALLOC_F_LEN;
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gd->malloc_ptr = 0;
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#endif
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if (IS_ENABLED(CONFIG_OF_CONTROL) &&
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IS_ENABLED(CONFIG_SPL_OF_CONTROL)) {
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if (CONFIG_IS_ENABLED(OF_CONTROL)) {
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ret = fdtdec_setup();
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if (ret) {
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debug("fdtdec_setup() returned error %d\n", ret);
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@ -7,7 +7,7 @@
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obj-y += device.o lists.o root.o uclass.o util.o
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obj-$(CONFIG_DEVRES) += devres.o
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ifndef CONFIG_SPL_BUILD
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obj-$(CONFIG_OF_CONTROL) += simple-bus.o
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obj-$(CONFIG_$(SPL_)OF_CONTROL) += simple-bus.o
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endif
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obj-$(CONFIG_$(SPL_)DM_DEVICE_REMOVE) += device-remove.o
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obj-$(CONFIG_DM) += dump.o
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@ -59,7 +59,7 @@ int device_bind(struct udevice *parent, const struct driver *drv,
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dev->seq = -1;
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dev->req_seq = -1;
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if (IS_ENABLED(CONFIG_OF_CONTROL) && IS_ENABLED(CONFIG_DM_SEQ_ALIAS)) {
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if (CONFIG_IS_ENABLED(OF_CONTROL) && IS_ENABLED(CONFIG_DM_SEQ_ALIAS)) {
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/*
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* Some devices, such as a SPI bus, I2C bus and serial ports
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* are numbered using aliases.
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fdt_addr_t dev_get_addr(struct udevice *dev)
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{
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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fdt_addr_t addr;
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addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
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@ -99,7 +99,7 @@ int device_bind_driver_to_node(struct udevice *parent, const char *drv_name,
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return 0;
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}
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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/**
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* driver_check_compatible() - Check if a driver is compatible with this node
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*
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@ -114,7 +114,7 @@ int dm_init(void)
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ret = device_bind_by_name(NULL, false, &root_info, &DM_ROOT_NON_CONST);
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if (ret)
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return ret;
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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DM_ROOT_NON_CONST->of_offset = 0;
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#endif
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ret = device_probe(DM_ROOT_NON_CONST);
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return ret;
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}
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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int dm_scan_fdt_node(struct udevice *parent, const void *blob, int offset,
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bool pre_reloc_only)
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{
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return ret;
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}
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if (OF_CONTROL) {
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if (CONFIG_IS_ENABLED(OF_CONTROL)) {
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ret = dm_scan_fdt(gd->fdt_blob, pre_reloc_only);
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if (ret) {
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debug("dm_scan_fdt() failed: %d\n", ret);
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@ -336,7 +336,7 @@ U_BOOT_DRIVER(gpio_mxc) = {
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.bind = mxc_gpio_bind,
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};
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#ifndef CONFIG_OF_CONTROL
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#if !CONFIG_IS_ENABLED(OF_CONTROL)
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static const struct mxc_gpio_plat mxc_plat[] = {
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{ 0, (struct gpio_regs *)GPIO1_BASE_ADDR },
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{ 1, (struct gpio_regs *)GPIO2_BASE_ADDR },
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@ -135,7 +135,7 @@ static int vybrid_gpio_bind(struct udevice *dev)
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return 0;
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}
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#ifndef CONFIG_OF_CONTROL
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#if !CONFIG_IS_ENABLED(OF_CONTROL)
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static const struct vybrid_gpio_platdata vybrid_gpio[] = {
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{0, GPIO0_BASE_ADDR, "GPIO0 "},
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{1, GPIO1_BASE_ADDR, "GPIO1 "},
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@ -1002,7 +1002,7 @@ static int s3c24x0_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
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}
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}
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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static void process_nodes(const void *blob, int node_list[], int count,
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int is_highspeed)
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{
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return 0;
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}
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#endif /* CONFIG_OF_CONTROL */
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#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
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#ifdef CONFIG_EXYNOS5
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static void exynos_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
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@ -14,4 +14,4 @@ obj-y += keyboard.o pc_keyb.o
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obj-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
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endif
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obj-y += input.o
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obj-$(CONFIG_OF_CONTROL) += key_matrix.o
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obj-$(CONFIG_$(SPL_)OF_CONTROL) += key_matrix.o
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@ -295,7 +295,7 @@ static int init_tegra_keyboard(struct stdio_dev *dev)
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if (config.created)
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return 0;
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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int node;
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node = fdtdec_next_compatible(gd->fdt_blob, 0,
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@ -158,7 +158,7 @@ int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel)
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return exynos_dwmci_core_init(host, index);
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}
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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static struct dwmci_host dwmci_host[DWMMC_MAX_CH_NUM];
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static int do_dwmci_init(struct dwmci_host *host)
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return s5p_sdhci_core_init(host);
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}
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];
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static int do_sdhci_init(struct sdhci_host *host)
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@ -21,7 +21,7 @@ DECLARE_GLOBAL_DATA_PTR;
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struct mmc_host mmc_host[CONFIG_SYS_MMC_MAX_DEVICE];
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#ifndef CONFIG_OF_CONTROL
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#if !CONFIG_IS_ENABLED(OF_CONTROL)
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#error "Please enable device tree support to use this driver"
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#endif
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@ -33,7 +33,7 @@ int zynq_sdhci_init(phys_addr_t regbase)
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return 0;
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}
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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int zynq_sdhci_of_init(const void *blob)
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{
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int offset = 0;
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@ -266,7 +266,7 @@ static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode,
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return 0;
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}
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
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{
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fdt_addr_t addr;
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return 0;
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}
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#endif /* CONFIG_OF_CONTROL */
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#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
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/**
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* spi_flash_probe_slave() - Probe for a SPI flash device on a bus
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}
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}
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
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debug("SF: FDT decode error\n");
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ret = -EINVAL;
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@ -361,7 +361,7 @@ int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr,
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return 1;
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}
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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int xilinx_emaclite_of_init(const void *blob)
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{
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int offset = 0;
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@ -553,7 +553,7 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr,
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return 1;
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}
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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int zynq_gem_of_init(const void *blob)
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{
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int offset = 0;
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@ -180,7 +180,7 @@ enum tmu_status_t tmu_monitor(int *temp)
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*/
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static int get_tmu_fdt_values(struct tmu_info *info, const void *blob)
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{
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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fdt_addr_t addr;
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int node;
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int error = 0;
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@ -256,7 +256,7 @@ int pmic_init(unsigned char bus)
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{
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static const char name[] = "MAX77686_PMIC";
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struct pmic *p = pmic_alloc();
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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const void *blob = gd->fdt_blob;
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int node, parent, tmp;
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#endif
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@ -266,7 +266,7 @@ int pmic_init(unsigned char bus)
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return -ENOMEM;
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}
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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node = fdtdec_next_compatible(blob, 0, COMPAT_MAXIM_MAX77686_PMIC);
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if (node < 0) {
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debug("PMIC: No node for PMIC Chip in device tree\n");
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@ -357,7 +357,7 @@ int ns16550_serial_probe(struct udevice *dev)
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return 0;
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}
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#ifdef CONFIG_OF_CONTROL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
|
||||
{
|
||||
struct ns16550_platdata *plat = dev->platdata;
|
||||
|
|
|
@ -32,7 +32,7 @@ static void serial_find_console_or_panic(void)
|
|||
struct udevice *dev;
|
||||
int node;
|
||||
|
||||
if (OF_CONTROL && gd->fdt_blob) {
|
||||
if (CONFIG_IS_ENABLED(OF_CONTROL) && gd->fdt_blob) {
|
||||
/* Check for a chosen console */
|
||||
node = fdtdec_get_chosen_node(gd->fdt_blob, "stdout-path");
|
||||
if (node < 0)
|
||||
|
@ -55,7 +55,7 @@ static void serial_find_console_or_panic(void)
|
|||
}
|
||||
}
|
||||
}
|
||||
if (!SPL_BUILD || !OF_CONTROL || !gd->fdt_blob) {
|
||||
if (!SPL_BUILD || !CONFIG_IS_ENABLED(OF_CONTROL) || !gd->fdt_blob) {
|
||||
/*
|
||||
* Try to use CONFIG_CONS_INDEX if available (it is numbered
|
||||
* from 1!).
|
||||
|
|
|
@ -12,7 +12,7 @@
|
|||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
static const struct udevice_id omap_serial_ids[] = {
|
||||
{ .compatible = "ti,omap3-uart" },
|
||||
{ .compatible = "ti,omap4-uart" },
|
||||
|
|
|
@ -353,7 +353,7 @@ static const struct dm_serial_ops pl01x_serial_ops = {
|
|||
.setbrg = pl01x_serial_setbrg,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
static const struct udevice_id pl01x_serial_id[] ={
|
||||
{.compatible = "arm,pl011", .data = TYPE_PL011},
|
||||
{.compatible = "arm,pl010", .data = TYPE_PL010},
|
||||
|
|
|
@ -9,7 +9,7 @@
|
|||
#include <ns16550.h>
|
||||
#include <serial.h>
|
||||
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
static const struct udevice_id tegra_serial_ids[] = {
|
||||
{ .compatible = "nvidia,tegra20-uart" },
|
||||
{ }
|
||||
|
@ -42,7 +42,7 @@ U_BOOT_DEVICE(ns16550_serial) = {
|
|||
U_BOOT_DRIVER(serial_ns16550) = {
|
||||
.name = "serial_tegra20",
|
||||
.id = UCLASS_SERIAL,
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
.of_match = tegra_serial_ids,
|
||||
.ofdata_to_platdata = tegra_serial_ofdata_to_platdata,
|
||||
.platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
|
||||
|
|
|
@ -113,7 +113,7 @@ static int uniphier_serial_remove(struct udevice *dev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
static const struct udevice_id uniphier_uart_of_match[] = {
|
||||
{ .compatible = "socionext,uniphier-uart" },
|
||||
{ /* sentinel */ }
|
||||
|
|
|
@ -175,7 +175,7 @@ DECLARE_PSSERIAL_FUNCTIONS(1);
|
|||
static struct serial_device uart_zynq_serial1_device =
|
||||
INIT_PSSERIAL_STRUCTURE(1, "ttyPS1");
|
||||
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
__weak struct serial_device *default_serial_console(void)
|
||||
{
|
||||
const void *blob = gd->fdt_blob;
|
||||
|
|
|
@ -520,7 +520,7 @@ static int get_max98095_codec_values(struct sound_codec_info *pcodec_info,
|
|||
const void *blob)
|
||||
{
|
||||
int error = 0;
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
enum fdt_compat_id compat;
|
||||
int node;
|
||||
int parent;
|
||||
|
|
|
@ -814,7 +814,7 @@ static int get_codec_values(struct sound_codec_info *pcodec_info,
|
|||
const void *blob)
|
||||
{
|
||||
int error = 0;
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
enum fdt_compat_id compat;
|
||||
int node;
|
||||
int parent;
|
||||
|
|
|
@ -585,7 +585,7 @@ static struct tpm_vendor_specific tpm_tis_i2c = {
|
|||
|
||||
static enum i2c_chip_type tpm_vendor_chip_type(void)
|
||||
{
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
const void *blob = gd->fdt_blob;
|
||||
|
||||
if (fdtdec_next_compatible(blob, 0, COMPAT_INFINEON_SLB9645_TPM) >= 0)
|
||||
|
|
|
@ -22,7 +22,7 @@ struct exynos_dp *dp_regs;
|
|||
|
||||
void exynos_dp_set_base_addr(void)
|
||||
{
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
unsigned int node = fdtdec_next_compatible(gd->fdt_blob,
|
||||
0, COMPAT_SAMSUNG_EXYNOS5_DP);
|
||||
if (node <= 0)
|
||||
|
|
|
@ -28,7 +28,7 @@ DECLARE_GLOBAL_DATA_PTR;
|
|||
|
||||
static unsigned int panel_width, panel_height;
|
||||
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
vidinfo_t panel_info = {
|
||||
/*
|
||||
* Insert a value here so that we don't end up in the BSS
|
||||
|
@ -126,7 +126,7 @@ static void lcd_panel_on(vidinfo_t *vid)
|
|||
|
||||
exynos_backlight_on(1);
|
||||
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
node = fdtdec_next_compatible(gd->fdt_blob, 0,
|
||||
COMPAT_SAMSUNG_EXYNOS_FIMD);
|
||||
if (node <= 0) {
|
||||
|
@ -150,7 +150,7 @@ static void lcd_panel_on(vidinfo_t *vid)
|
|||
exynos_mipi_dsi_init();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
int exynos_lcd_early_init(const void *blob)
|
||||
{
|
||||
unsigned int node;
|
||||
|
@ -295,7 +295,7 @@ void lcd_ctrl_init(void *lcdbase)
|
|||
set_system_display_ctrl();
|
||||
set_lcd_clk();
|
||||
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
#ifdef CONFIG_EXYNOS_MIPI_DSIM
|
||||
exynos_init_dsim_platform_data(&panel_info);
|
||||
#endif
|
||||
|
|
|
@ -251,7 +251,7 @@ void exynos_fimd_window_off(unsigned int win_id)
|
|||
writel(cfg, &fimd_ctrl->winshmap);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
/*
|
||||
* The reset value for FIMD SYSMMU register MMU_CTRL is 3
|
||||
* on Exynos5420 and newer versions.
|
||||
|
@ -295,7 +295,7 @@ void exynos_fimd_lcd_init(vidinfo_t *vid)
|
|||
{
|
||||
unsigned int cfg = 0, rgb_mode;
|
||||
unsigned int offset;
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
unsigned int node;
|
||||
|
||||
node = fdtdec_next_compatible(gd->fdt_blob,
|
||||
|
|
|
@ -28,7 +28,7 @@
|
|||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
static struct exynos_platform_mipi_dsim *dsim_pd;
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
static struct mipi_dsim_config dsim_config_dt;
|
||||
static struct exynos_platform_mipi_dsim dsim_platform_data_dt;
|
||||
static struct mipi_dsim_lcd_device mipi_lcd_device_dt;
|
||||
|
@ -249,7 +249,7 @@ void exynos_set_dsim_platform_data(struct exynos_platform_mipi_dsim *pd)
|
|||
dsim_pd = pd;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
int exynos_dsim_config_parse_dt(const void *blob)
|
||||
{
|
||||
int node;
|
||||
|
|
|
@ -49,7 +49,7 @@ vidinfo_t panel_info = {
|
|||
.vl_col = -1,
|
||||
};
|
||||
|
||||
#ifndef CONFIG_OF_CONTROL
|
||||
#if !CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
#error "You must enable CONFIG_OF_CONTROL to get Tegra LCD support"
|
||||
#endif
|
||||
|
||||
|
|
|
@ -108,7 +108,7 @@ int cli_readline_into_buffer(const char *const prompt, char *buffer,
|
|||
*/
|
||||
int cli_simple_parse_line(char *line, char *argv[]);
|
||||
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
/**
|
||||
* cli_process_fdt() - process the boot command from the FDT
|
||||
*
|
||||
|
|
|
@ -20,9 +20,6 @@
|
|||
#undef CONFIG_CMD_SNTP
|
||||
#undef CONFIG_CMD_TFTPPUT
|
||||
#undef CONFIG_CMD_TFTPSRV
|
||||
#ifndef CONFIG_SPL_OF_CONTROL
|
||||
#undef CONFIG_OF_CONTROL
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_SPL_DM
|
||||
#undef CONFIG_DM_SERIAL
|
||||
|
|
|
@ -106,7 +106,8 @@
|
|||
# define CONFIG_XILINX_TB_WATCHDOG
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_OF_CONTROL
|
||||
#if !defined(CONFIG_OF_CONTROL) || \
|
||||
(defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_OF_CONTROL))
|
||||
/* ddr sdram - main memory */
|
||||
# define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START
|
||||
# define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE
|
||||
|
|
|
@ -214,7 +214,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
|
|||
#define CONFIG_SPI_FLASH_BAR
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_OF_CONTROL /* DW SPI is controlled via DT */
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL) /* DW SPI is controlled via DT */
|
||||
#define CONFIG_DESIGNWARE_SPI
|
||||
#define CONFIG_CMD_SPI
|
||||
#endif
|
||||
|
|
|
@ -122,11 +122,11 @@ struct udevice_id {
|
|||
ulong data;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
#define of_match_ptr(_ptr) (_ptr)
|
||||
#else
|
||||
#define of_match_ptr(_ptr) NULL
|
||||
#endif /* CONFIG_OF_CONTROL */
|
||||
#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
|
||||
|
||||
/**
|
||||
* struct driver - A driver for a feature or peripheral
|
||||
|
|
|
@ -45,16 +45,6 @@ struct fdt_memory {
|
|||
#define SPL_BUILD 0
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
# if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_OF_CONTROL)
|
||||
# define OF_CONTROL 0
|
||||
# else
|
||||
# define OF_CONTROL 1
|
||||
# endif
|
||||
#else
|
||||
# define OF_CONTROL 0
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Information about a resource. start is the first address of the resource
|
||||
* and end is the last address (inclusive). The length of the resource will
|
||||
|
|
11
lib/Makefile
11
lib/Makefile
|
@ -26,8 +26,8 @@ obj-y += crc8.o
|
|||
obj-y += crc16.o
|
||||
obj-$(CONFIG_ERRNO_STR) += errno_str.o
|
||||
obj-$(CONFIG_FIT) += fdtdec_common.o
|
||||
obj-$(CONFIG_OF_CONTROL) += fdtdec_common.o
|
||||
obj-$(CONFIG_OF_CONTROL) += fdtdec.o
|
||||
obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec_common.o
|
||||
obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec.o
|
||||
obj-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o
|
||||
obj-$(CONFIG_GZIP) += gunzip.o
|
||||
obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o
|
||||
|
@ -51,15 +51,12 @@ endif
|
|||
|
||||
ifndef CONFIG_SPL_BUILD
|
||||
obj-$(CONFIG_OF_LIBFDT) += libfdt/
|
||||
obj-$(CONFIG_OF_CONTROL) += fdtdec_common.o
|
||||
obj-$(CONFIG_OF_CONTROL) += fdtdec.o
|
||||
endif
|
||||
|
||||
ifdef CONFIG_SPL_OF_CONTROL
|
||||
obj-$(CONFIG_OF_LIBFDT) += libfdt/
|
||||
obj-$(CONFIG_OF_CONTROL) += fdtdec_common.o
|
||||
obj-$(CONFIG_OF_CONTROL) += fdtdec.o
|
||||
endif
|
||||
obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec_common.o
|
||||
obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec.o
|
||||
|
||||
ifdef CONFIG_SPL_BUILD
|
||||
obj-$(CONFIG_SPL_YMODEM_SUPPORT) += crc16.o
|
||||
|
|
|
@ -1140,7 +1140,7 @@ int fdtdec_decode_display_timing(const void *blob, int parent, int index,
|
|||
|
||||
int fdtdec_setup(void)
|
||||
{
|
||||
#ifdef CONFIG_OF_CONTROL
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
# ifdef CONFIG_OF_EMBED
|
||||
/* Get a pointer to the FDT */
|
||||
gd->fdt_blob = __dtb_dt_begin;
|
||||
|
|
|
@ -3,9 +3,6 @@
|
|||
# TODO: Invent a better way
|
||||
|
||||
ifdef CONFIG_SPL_BUILD
|
||||
ifndef CONFIG_SPL_OF_CONTROL
|
||||
CONFIG_OF_CONTROL=
|
||||
endif
|
||||
|
||||
ifndef CONFIG_SPL_DM
|
||||
CONFIG_DM_SERIAL=
|
||||
|
|
Loading…
Reference in a new issue