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mmc: add HS200 support in MMC core
Add HS200 to the list of supported modes and introduce tuning in the MMC startup process. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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parent
ec841209a7
commit
634d484940
2 changed files with 38 additions and 2 deletions
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@ -621,6 +621,10 @@ static int mmc_set_card_speed(struct mmc *mmc, enum bus_mode mode)
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case MMC_HS_52:
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case MMC_DDR_52:
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speed_bits = EXT_CSD_TIMING_HS;
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break;
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case MMC_HS_200:
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speed_bits = EXT_CSD_TIMING_HS200;
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break;
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case MMC_LEGACY:
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speed_bits = EXT_CSD_TIMING_LEGACY;
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break;
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@ -667,9 +671,12 @@ static int mmc_get_capabilities(struct mmc *mmc)
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mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
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cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
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cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0x3f;
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/* High Speed is set, there are two types: 52MHz and 26MHz */
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if (cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V |
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EXT_CSD_CARD_TYPE_HS200_1_8V)) {
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mmc->card_caps |= MMC_MODE_HS200;
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}
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if (cardtype & EXT_CSD_CARD_TYPE_52) {
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if (cardtype & EXT_CSD_CARD_TYPE_DDR_52)
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mmc->card_caps |= MMC_MODE_DDR_52MHz;
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@ -1268,6 +1275,7 @@ void mmc_dump_capabilities(const char *text, uint caps)
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struct mode_width_tuning {
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enum bus_mode mode;
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uint widths;
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uint tuning;
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};
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static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
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@ -1383,6 +1391,7 @@ static const struct mode_width_tuning mmc_modes_by_pref[] = {
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{
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.mode = MMC_HS_200,
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.widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
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.tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200
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},
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{
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.mode = MMC_DDR_52,
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@ -1484,6 +1493,15 @@ static int mmc_select_mode_and_width(struct mmc *mmc)
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mmc_select_mode(mmc, mwt->mode);
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mmc_set_clock(mmc, mmc->tran_speed, false);
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/* execute tuning if needed */
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if (mwt->tuning) {
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err = mmc_execute_tuning(mmc, mwt->tuning);
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if (err) {
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debug("tuning failed\n");
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goto error;
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}
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}
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/* do a transfer to check the configuration */
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err = mmc_read_and_compare_ext_csd(mmc);
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if (!err)
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@ -56,6 +56,7 @@
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#define MMC_MODE_HS (MMC_CAP(MMC_HS) | MMC_CAP(SD_HS))
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#define MMC_MODE_HS_52MHz MMC_CAP(MMC_HS_52)
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#define MMC_MODE_DDR_52MHz MMC_CAP(MMC_DDR_52)
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#define MMC_MODE_HS200 MMC_CAP(MMC_HS_200)
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#define MMC_MODE_8BIT BIT(30)
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#define MMC_MODE_4BIT BIT(29)
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@ -86,6 +87,7 @@
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#define MMC_CMD_SET_BLOCKLEN 16
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#define MMC_CMD_READ_SINGLE_BLOCK 17
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#define MMC_CMD_READ_MULTIPLE_BLOCK 18
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#define MMC_CMD_SEND_TUNING_BLOCK_HS200 21
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#define MMC_CMD_SET_BLOCK_COUNT 23
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#define MMC_CMD_WRITE_SINGLE_BLOCK 24
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#define MMC_CMD_WRITE_MULTIPLE_BLOCK 25
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@ -113,6 +115,13 @@
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#define SD_CMD_APP_SEND_OP_COND 41
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#define SD_CMD_APP_SEND_SCR 51
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static inline bool mmc_is_tuning_cmd(uint cmdidx)
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{
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if (cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200)
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return true;
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return false;
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}
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/* SCR definitions in different words */
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#define SD_HIGHSPEED_BUSY 0x00020000
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#define SD_HIGHSPEED_SUPPORTED 0x00020000
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@ -210,6 +219,13 @@
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#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
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| EXT_CSD_CARD_TYPE_DDR_1_2V)
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#define EXT_CSD_CARD_TYPE_HS200_1_8V BIT(4) /* Card can run at 200MHz */
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/* SDR mode @1.8V I/O */
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#define EXT_CSD_CARD_TYPE_HS200_1_2V BIT(5) /* Card can run at 200MHz */
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/* SDR mode @1.2V I/O */
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#define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \
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EXT_CSD_CARD_TYPE_HS200_1_2V)
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#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
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#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
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#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
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@ -219,6 +235,8 @@
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#define EXT_CSD_TIMING_LEGACY 0 /* no high speed */
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#define EXT_CSD_TIMING_HS 1 /* HS */
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#define EXT_CSD_TIMING_HS200 2 /* HS200 */
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#define EXT_CSD_BOOT_ACK_ENABLE (1 << 6)
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#define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3)
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#define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0)
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