In an effort to unify the spi flash drivers further, drop all the
unused and/or duplicate command defines.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The MDC signal is available on all xMII (i.e. 'not 7-wire') interfaces, so
mii_speed has to be set for all these interfaces, and not only for MII.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
At least on i.MX25, the RMII mode did not work, which is fixed by this patch.
The MII_MODE bit of the FEC RCR register means xMII, i.e. 'not 7-wire', so set
it accordingly.
According to the xMII and 7-wire (aka GPSI) standards, full duplex should be
available on xMII, but not on 7-wire, so set FCE accordingly. The FEC may
support full duplex for 7-wire too, but the reference manual does not say that,
so avoid an invalid assumption. Actually, the choice between half and full
duplex also depends on the endpoint/switch/repeater configuration, so a config
option could be added for that, but there has been no need for it so far.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Now that common code doesn't declare these as volatile, we don't need to
either anymore. This fixes the build warning:
bfin_mac.c: In function 'bfin_EMAC_recv':
bfin_mac.c:193:23: warning: assignment discards qualifiers from pointer target type
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Buffer coming from upper layers should be cacheline aligned/padded
to perform safe cache operations. For now we don't do bounce
buffering so getting unaligned buffer is an upper layer error.
We can't check if the buffer is properly padded with current
interface so just assume it is (consider changing with in the
future). The following changes are done:
1. Remove useless length alignment check. We get actual transfer
length not the size of the underlying buffer so it's perfectly
valid for it to be unaligned.
2. Move flush_dcache_range() out of while loop or it will
flush too much.
3. Don't try to fix buffer address before calling invalidate:
if it's unaligned it's an error anyway so let cache subsystem
cry about that.
4. Fix end buffer address to be cacheline aligned assuming upper
layer reserved enough space. This is potentially dangerous
operation so upper layers should be careful about that.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
The USB spec says that 32 bytes is the minimum required alignment.
However on some platforms we have a larger minimum requirement for cache
coherency. In those cases, use that value rather than the USB spec
minimum. We add a cpp check to <usb.h> to define USB_DMA_MINALIGN and
make use of it in ehci-hcd.c and musb_core.h. We cannot use MAX() here
as we are not allowed to have tests inside of align(...).
Signed-off-by: Tom Rini <trini@ti.com>
[marek.vasut]: introduce some crazy macro voodoo
Signed-off-by: Marek Vasut <marex@denx.de>
[ilya.yanok]: moved external buffer fixes to separate patch,
we use {ALLOC,DEFINE}_ALIGN_BUFFER macros with alignment of USB_DMA_MINALIGN
for qh_list, qh and qtd structures to make sure they are proper aligned
for both controller and cache operations.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
Move or_asynclistaddr programming to ehci_submit_async()
function to make sure queue head is properly programmed
before every transfer. This solves the problem with changing
qh address.
Also remove unneeded qh_list->qh_link reprogramming at the
end of transfer.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
This has never been completely sufficient and now happens too late to
paper over the cache coherency problems with the current USB stack.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* 'next' of git://git.denx.de/u-boot-video:
ipu_common: Add ldb_clk for use in parenting the pixel clock
ipu_common: Do not hardcode the ipu_clk frequency
ipu_common: Rename MXC_CCM_BASE
ipu_common: Let clk_ipu_enable/disable only run on MX51 and MX53
ipu_common: Only apply the erratum to MX51
video: Rename CONFIG_VIDEO_MX5
mx6: Allow mx6 to access the IPUv3 registers
common lcd: minor coding style changes
Signed-off-by: Wolfgang Denk <wd@denx.de>
For FSL low-end processors (VVN2.2), in order to detect the SD card,
we should enable PEREN, HCKEN and IPGEN to enable the clock.
Otherwise, after booting the u-boot, and then inserting the SD card,
the SD card can't be detected.
For SDHC VVN2.3 IP, these bits are reserved, and SDCLKEN is used.
And when accessing to these reserved bit, no any impact happened.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
CC: Andy Fleming <afleming@gmail.com>
CC: Marek Vasut <marex@denx.de>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Use the function 'mmc_send_status' to check the card status.
only when the card is ready, driver can send the next erase command
to the card, otherwise, the erase will failed:
=> mmc erase 0 1
MMC erase: dev # 0, block # 0, count 1 ... 1 blocks erase: OK
=> mmc erase 0 2
MMC erase: dev # 0, block # 0, count 2 ... mmc erase failed
1 blocks erase: ERROR
=> mmc erase 0 4
MMC erase: dev # 0, block # 0, count 4 ... mmc erase failed
1 blocks erase: ERROR
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
CC: Andy Fleming <afleming@gmail.com>
CC: Marek Vasut <marex@denx.de>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This code adds call to mmc_init(), for partition related commands (e.g.
fatls, fatinfo etc.).
It is safe to call mmc_init() multiple times since mmc->has_init flag
prevents from multiple initialization.
The FAT related code calls get_dev high level method and then uses
elements from mmc->block_dev, which is uninitialized until the mmc_init
(and thereof mmc_startup) is called.
This problem appears on boards, which don't use mmc as the default
place for envs
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
mmc_set_clock is set to the hard-coding.
But i think good that use the tran_speed value.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
* 'next' of git://git.denx.de/u-boot-net:
net: Inline the new eth_setenv_enetaddr_by_index function
net: allow setting env enetaddr from net device setting
net/designware: Consecutive writes to the same register to be avoided
CACHE: net: asix: Fix asix driver to work with data cache on
net: phy: micrel: make ksz9021 phy accessible
net: abort network initialization if the PHY driver fails
phylib: phy_startup() should return an error code on failure
net: tftp: fix type of block arg to store_block
Signed-off-by: Wolfgang Denk <wd@denx.de>
* 'master' of git://git.denx.de/u-boot-i2c:
mx28evk: Add I2C support
mxs-i2c: Fix internal address byte order
mxc_i2c: remove setting speed at each start
mx6qsabrelite: add i2c support
mxc_i2c: specify i2c base address in config file
Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is an add-on to f6c4191f. There are a few registers where
consecutive writes to the same location should be avoided or have a delay.
According to Synopsys, here is a list of the registers and bit(s) where
consecutive writes should be avoided or a delay is required:
DMA Registers:
Register 0 Bit 7
Register 6 All bits except for 24, 16-13, 2-1.
GMAC Registers:
Registers 0-3 All bits
Registers 6-7 All bits
Register 10 All bits
Register 11 All bits except for 5-6.
Registers 16-47 All bits
Register 48 All bits except for 18-16, 14.
Register 448 Bit 4.
Register 459 Bits 0-3.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Matthew Gerlach <mgerlach@altera.com>
Acked-by: Amit Virdi <amit.virdi@st.com>
The asix driver did not align buffers, therefore it didn't work
with data cache enabled. Fix this.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@gmail.com>
Micrel accidentally used the same part number
for the KS8721 and KSZ9021. So, both cannot be
in the same build of u-boot. Add a config option
to handle this.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Now that phy_startup() can return an actual error code, check for that error
code and abort network initialization if the PHY fails.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Nobuhiro Iwamamatsu <nobuhiro.iwamatsu.yj@renesas.com> (sh_eth part)
Acked-by: Stephan Linz <linz@li-pro.net> (Xilinx part, xilinx_axi_emac and xilinx_ll_temac)
Reviewed-by: Marek Vasut <marex@denx.de> (FEC part)
phy_startup() calls the PHY driver's startup function, but it ignores the
return code from that function, and so it never returns any failures.
Signed-off-by: Timur Tabi <timur@freescale.com>
Large EEPROMs, e.g. 24lc32, need 2 byte to address the internal memory.
These devices require that the high byte of the internal address has to be
written first.
The mxs_i2c driver currently writes the address' low byte first.
The following patch fixes the byte order of the internal address that should
be written to the I2C device.
Signed-off-by: Torsten Fleischer <to-fleischer@t-online.de>
CC: Marek Vasut <marex@denx.de>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Other then being very weird, this code was also wrong.
For example, say I set speed to 100K. I'll read back the speed
as 85937. But the speed is really 85937.5, so we I reset
the speed to 85937, I'll get 73660.7. After a couple of transactions
my speed is now exactly 68750 so it will remain there.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
The following platforms had their config files changed
flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd
and mx53loco.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
When support sh7734 of sh-ether, ECSIPR_BRCRXIP and other were removed.
Therefore SH7757 and SH7724 can not build. This revise this probelem.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Add ldb_clk for use in parenting the pixel clock.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
The registers accessed inside clk_ipu_enable/disable are not present on MX6,
so make sure they only run on MX51 and MX53.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
The following erratum :
"ENGcm08316
IPU: Clarification regarding the bypass mode registers setup for
display and camera interfaces"
only applies to mx51, so restrict its usage for this SoC only.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* 'master' of git://git.denx.de/u-boot-arm:
tegra: define fdt_load/fdt_high variables
tegra: enable bootz command
tegra: usb: Fix device enumeration problem of USB1
tegra: trimslice: set up serial flash pinmux
tegra: add pin_mux_spi() board initialization function
tegra: add GMC/GMD funcmux entry for SFLASH
tegra: bootcmd: start USB only when needed
tegra: bootcmd enhancements
tegra: add enterrcm command
tegra: enable CONFIG_ENV_VARS_UBOOT_CONFIG
Add env vars describing U-Boot target board
tegra: usb: fix wrong error check
tegra: add ULPI on USB2 funcmux entry
tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches
tegra: Add Tamonten Evaluation Carrier support
tegra: Use SD write-protect GPIO on Tamonten
tegra: Implement gpio_early_init() on Tamonten
tegra: Allow boards to perform early GPIO setup
tegra: plutux: Add device tree support
tegra: medcom: Add device tree support
tegra: Rework Tamonten support
beagle: add eeprom expansion board info for bct brettl4
Signed-off-by: Wolfgang Denk <wd@denx.de>
A known hardware issue of USB1 port where bit 1 (connect status
change) of PORTSC register will be set after issuing Port Reset
(like "usb reset" in u-boot command line).
This will be treated as an error and stops later device enumeration.
Therefore we clear that bit after Port Reset in order to proceed
later device enumeration.
Signed-off-by: Jim Lin <jilin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This patch adds functions to enable/disable the power of USB
host controller for EXYNOS5.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Drop mdelay() macros since we already have a common mdelay() func.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Needed for redundant environment for example.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
i2c_probe() is changed to reinit the i2c bus upon read failure.
This is naturally the case upon i2c bus probing.
Also, some printf messages upon read failure are removed. As they
would interfere with the "i2c probe" command.
Additionally, i2c_set_bus_speed() now returns 0, so that the
"i2c speed" command can be used.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Add support for the M41T82 RTC to the m41t62 driver. The only
difference that needs to be handled by this driver, is to
clear the HT (Halt Update) bit upon reset. This bit is not
used on the M41T62, so its save to clear this bit always.
The M41T82 support will be used by the X600 (SPEAr600)
board support.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the following changes to designware ethernet driver
found on the ST SPEAr SoC:
- Don't init MAC & PHY upon startup. This causes a delay, waiting for
the auto negotiation to complete. And we don't want this delay to
always happen. Especially not on platforms where ethernet is not
used at all (e.g. booting via flash).
Instead postpone the MAC / PHY configuration to the stage, where
ethernet is first used.
- Add possibility for board specific PHY init code. This is needed
for example on the X600 board, where the Vitesse PHY needs to be
configured for GMII mode.
This board specific PHY init is done via the function
designware_board_phy_init(). And this driver now adds a weak default
which can be overridden by board code.
- Use common functions miiphy_speed() & miiphy_duplex() to read
link status from PHY.
- Print status and progress of auto negotiation.
- Print link status (speed, dupex) upon first usage.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@gmail.com>
Few Designware peripheral registers need to be modified based on the
ethernet interface selected by the board. This patch supports interface
information in ethernet driver
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
There are two problems in the current timeout loop implementation:
1. In case initial test failing, there will always be a delay of 1 ms
2. The delay duration is not tunable
The new implementation addresses both these limitations.
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
If the flash size was smaller than 1MB then flash_print_info()
was erroneously reporting 0 MB.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
THis patch introduces a new methodology for flash probing
in which flash_devices[] table, looked-up thru the dev_id, is
used to locate the flash geometry and information.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Since the smi erase code is very generic and works for any kind
of flash, there is no need to test for ST_M25Pxx_ID flash types
like m25p40 flashes).
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
smi_read_sr fails sometimes because of TFF not getting set within assumed time.
This condition may arise because of, for example, smi memory being in a erase
mode.
This fix is to enable reading the status register until timeout.
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
SMI driver read status fails because the control register could not be
overwritten. Instead, the read status should be tried until timeout.
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This commit does the following:
- Reports error if SNOR flash is not found on the board
- Changes smi_read_sr to return error using which a retry mechanism is
implemented for reading flash status
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Curently the code makes wrong assumption that the Transfer finished flag shall
be set within the stipulated time. However, there may occur a scenario in which
the TFF flag is not set. Return error in that case.
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
SMI is the serial memory interface controller provided by ST.
Earlier, a driver exists in the u-boot source code for the SMI IP. However, it
was specific to spear platforms. This commit converts the same driver to a more
generic driver. As a result, the driver files are renamed to st_smi.c and
st_smi.h and moved into drivers/mtd folder for reusability by other platforms
using smi controller peripheral.
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Flexible static memory controller is a peripheral provided by ST,
which controls the access to NAND chips along with many other
memory device chips eg NOR, SRAM.
This patch adds the driver support for FSMC controller interfacing
with NAND memory.
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
On DA850/OMAP-L138 it was observed that in RMII mode,
auto negotiation was not performed. This patch enables
auto negotiation in RMII mode. Without this patch, EMAC
initialization takes more time and sometimes tftp fails
in RMII mode.
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
This allows a final, board specific, step in the claim/relase_bus
function for the SPI controller, which may be needed for some hardware
designs.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
These two function nows ensure that the MPP is configured correctly for
the SPI controller before any SPI access, and restore the initial
configuration when the access is over.
Since the used pins for the SPI controller can differ (2 possibilities
for each signal), the used pins are configured with CONFIG_SYS_KW_SPI_MPP.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
This was not done before, and in the case of a shared pin (for MPP0
between NF_IO[2] and CSn) this could lead to problems.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Enable new PIO feature supported by Atmel SoC.
Using CPU_HAS_PIO3 micro to enable PIO new feature.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Commit 7a101e946cba55e32d3d1265e30456c810046da3 introduced following warning:
---8<---
ehci-atmel.c: In function 'ehci_hcd_init':
ehci-atmel.c:49:2: warning: suggest parentheses around comparison in operand of '&' [-Wparentheses]
ehci-atmel.c: In function 'ehci_hcd_stop':
ehci-atmel.c:79:2: warning: suggest parentheses around comparison in operand of '&' [-Wparentheses]
--->8---
This patch fixes it.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
cc: Bo Shen <voice.shen@atmel.com>
cc: Marek Vasut <marex@denx.de>
Some Atmel SoC support USB EHCI, add the EHCI driver to support it.
To enable the USB EHCI, add the following configuration options into
board relative configuration file and remove USB OHCI options.
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_ATMEL
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
panel_info data structure is gloable variable, so, I have initialized it
in board file. If it is initialized in init_panel_info() like existing,
it can't be used in drv_lcd_init() in common/lcd.c because
init_panel_info() is called after drv_lcd_init().
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The same places that check for CONFIG_OMAP44XX need to check for
CONFIG_AM33XX as we share the same i2c block.
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
This reverts commit 0e57968a21.
The short version of the original commit is that some i2c devices cannot
be probed via read as they NAK the first cycle, so try and probe via a
write that we abort before it writes to the device. This however is not
allowed by the TRM for any of these parts. The section on I2C_CON
(table 17-35 I2C_CON for am/dm37x for example) says you must not change
the register while STT has been set. On these parts, the unpredictable
behavior that the chip exhibits is not problematic. On OMAP4 however it
results in the chip being in a bad state:
Panda # i2c probe
Valid chip addresses: 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12
13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A
2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42
43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A
5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72
73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F
Panda # i2c md 50 0
timed out in wait_for_pin: I2C_STAT=0
I2C read: I/O error
Error reading the chip.
We must revert the original behavior to bring probe back into line with
the TRM.
Cc: Nick Thompson <nick.thompson@ge.com>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
In anticipation of Tegra3 support, continue removing/renaming
Tegra2-specific files. No functional changes (yet).
Updated copyrights to 2012.
Signed-off-by: Tom Warren <twarren@nvidia.com>
In anticipation of Tegra3 support, continue removing/renaming
Tegra2-specific files. No functional changes (yet).
Updated copyrights to 2012.
Signed-off-by: Tom Warren <twarren@nvidia.com>
In anticipation of Tegra3 support, start removing/renaming
Tegra2-specific files. No functional changes (yet).
Also updated copyright to 2012.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass's proposal to fix this on Seaboard was NAK'd, so I
removed his NS16550 references and added a small delay before
SPI/UART muxing. Tested on my Seaboard with large SPI reads/writes
and saw no corruption (crc's matched) and no spurious comm chars.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Jimmy Zhang <jimmzhang@nvidia.com>
* 'master' of git://git.denx.de/u-boot-video:
video: atmel/lcd: add LCD driver for new Atmel SoC
video: cfb_console: flush dcache for frame buffer in DRAM
cfb_console: Ignore bell character
cfb_console: Add console_clear_line function
cfb_console: Fix function console_back
omap3_dss: cosmetic changes
omap3_dss: add optional framebuffer
mx53loco: Add LCD support
mx5: Rename mx51_fb_init()
mx53: Allow IPUv3 driver to also work on mx53
mx51evk: Add LCD support
EXYNOS: display 32bpp bitmap TIZEN logo
create lib/tizen directory
LCD: display 32bpp decompressed bitmap image
common/lcd.c: reduce one CONFIG_LCD_LOGO ifdef
common/lcd.c: reduce some CONFIG_LCD_*_LOGO ifdefs
common/lcd.c: use ARRAY_SIZE
cmd_bmp.c: make bmp_display() usable by drivers or board code
LCD: support another s6e8ax0 panel type
LCD: change s6e8ax0 panel gamma value
include/video.h: drop unused video_printf()
Signed-off-by: Wolfgang Denk <wd@denx.de>
The new Atmel SoC (at91sam9x5 series and at91sam9n12) add a totally
different LCD controller. Add this new driver to support it.
Using CONFIG_ATMEL_HLCD (distinguish with CONFIG_ATMEL_LCD) to enable
this in board configuration file.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Data cache flushing is required for frame buffer in RAM to fix the
distorted console text output. Currently this text distortion is
observed with cfb on beagleboard and N900 when running with data
cache enabled.
Reported-by: Pali Rohár <pali.rohar@gmail.com>
Tested-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
console_clear_line() clears part of specified line or the full line.
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
* Do not disable and enable the cursor again.
console_back() is called only from video_putc() which already turns
the cursor off at the beginning and turns it on at the end, so there
is no need to change the cursor in console_back().
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This is an sh2a device (max 266MHz) with FPU, video display
controller (VDC), 8 serial ports, 4 I2C channels, 3 CAN ports,
SD and on-chip USB.
The RSK2+SH7269 board uses the SH7269 processor. It is often
referred to as just rsk7269.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Remove unnecessary brackets.
Unwrap lines which are below 80 chars.
Single line comment as single line (as the rest).
Moved init values to the source code.
cc: s-paulraj@ti.com
cc: khasim@ti.com
Signed-off-by: Jeroen Hofstee <jhofstee@victronenergy.com>
The beagle board uses the background color to show an orange screen during
startup. This patch adds the ability to add a frame buffer, with the
intention not to break the beagle board use case (I don't have one).
videomodes.c is not used. Scrolling depends on this patch:
http://patchwork.ozlabs.org/patch/155662/
cc: trini@ti.com
cc: s-paulraj@ti.com
cc: khasim@ti.com
Signed-off-by: Jeroen Hofstee <jhofstee@victronenergy.com>
The ipuv3 driver is currently only used on mx51, but it can be extended to work
on mx53 and mx6 as well.
Rename mx51_fb_init(), so that it can be used by other SoCs.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
This patch supports drawing 32bpp bitmap TIZEN logo in exynos fb.
"tizen_hd_logo.h" data is compressed from trats_logo.bmp to
trats_logo.bmp.gz by gzip and converted to tizen_hd_logo.h header file
format by some application. The logo data is decompressed in the exynos
fb driver by bmp_display().
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
s6e8ax0 panel has many panel of types. This patch support another panel
on TIZEN lunchbox board(HWREVISION 2). This panel has reversed panel
display type. So, I had added necessary command.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
s6e8ax0 panel init gamma value is changed because existing it was not
proper value for this panel.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
SH7734 support GMII. This add register infomation and the function
which enable GMII.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
SH7734 has one channel ethernet device.
This support 10/100/1000Base, and RMII/MII/GMII.
And this has the same structure as SH7763.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Add several levels of DEBUG prints so that you can limit the noise to
the severety of your problem.
DEBUG_LL_STATE = Link local state machine changes
DEBUG_DEV_PKT = Packets or info directed to the device
DEBUG_NET_PKT = Packets on info on the network at large
DEBUG_INT_STATE = Internal network state changes
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Call a built-in dummy if none is registered... don't require
protocols to register a handler (eliminating dummies)
NetConsole now uses the ARP handler when waiting on arp
(instead of needing a #define hack in arp.c)
Clear handlers at the end of net loop
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
Rename IP header related things to IP_UDP. The existing definition
of IP_t includes UDP header, so name it to accurately describe the
structure.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
These are all the files which use the API incorrectly but did not get
built using MAKEALL -a powerpc|arm. I have no compiler for them, but
the remaining issues should be far less than without this patch.
Any outstanding issues are left to the maintainers of boards that use
these drivers.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Fix this:
rtl8169.c: In function 'rtl8169_initialize':
rtl8169.c:907:13: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Fix this:
pcnet.c: In function 'pcnet_initialize':
pcnet.c:224:13: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Fix this:
xilinx_axi_emac.c: In function 'xilinx_axiemac_initialize':
xilinx_axi_emac.c:646: warning: assignment from incompatible pointer type
Signed-off-by: Stephan Linz <linz@li-pro.net>
Fix this:
xilinx_emaclite.c: In function 'xilinx_emaclite_initialize':
xilinx_emaclite.c:371: warning: assignment from incompatible pointer type
Signed-off-by: Stephan Linz <linz@li-pro.net>
Fix this:
xilinx_ll_temac.c: In function 'xilinx_ll_temac_initialize':
xilinx_ll_temac.c:332: warning: assignment from incompatible pointer type
xilinx_ll_temac.c:340: warning: assignment from incompatible pointer type
Signed-off-by: Stephan Linz <linz@li-pro.net>
Fix this:
uec.c: In function 'uec_initialize':
uec.c:1404:12: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Fix this:
uli526x.c: In function 'uli526x_initialize':
uli526x.c:243:13: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Fix this:
tsi108_eth.c: In function 'tsi108_eth_initialize':
tsi108_eth.c:745:13: warning: assignment from incompatible pointer type
tsi108_eth.c: In function 'tsi108_eth_recv':
tsi108_eth.c:989:4: warning: passing argument 1 of 'NetReceive' discards qualifiers from pointer target type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Fix this:
rtl8139.c: In function 'rtl8139_initialize':
rtl8139.c:234:13: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Fix this:
ns8382x.c: In function 'ns8382x_initialize':
ns8382x.c:352:13: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Fix this:
natsemi.c: In function 'natsemi_initialize':
natsemi.c:338:13: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Fix this:
eth.c: In function 'fm_eth_initialize':
eth.c:651:12: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Fix this:
e1000.c: In function 'e1000_initialize':
e1000.c:5264:13: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Fix this:
smc91111.c: In function 'smc91111_initialize':
smc91111.c:1363:12: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Fix this:
macb.c: In function 'macb_eth_initialize':
macb.c:564:15: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Fix this:
lan91c96.c: In function 'lan91c96_initialize':
lan91c96.c:811:12: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Fix this:
ks8695eth.c: In function 'ks8695_eth_initialize':
ks8695eth.c:236:12: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Fix this:
ftmac100.c: In function 'ftmac100_initialize':
ftmac100.c:266:12: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Fix this:
fec_mxc.c: In function 'fec_probe':
fec_mxc.c:926:13: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Fix this:
enc28j60.c: In function 'enc28j60_initialize':
enc28j60.c:967:12: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Fix this:
eepro100.c: In function 'eepro100_initialize':
eepro100.c:464:13: warning: assignment from incompatible pointer type
eepro100.c: In function 'eepro100_recv':
eepro100.c:694:4: warning: passing argument 1 of 'NetReceive' discards qualifiers from pointer target type
include/net.h:438:13: note: expected 'uchar *' but argument is of type 'volatile u8 *'
The use of a descriptor like this may mean DMA will update this at will
Beware this may be a source of trouble on some boards
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Fix this:
dnet.c: In function 'dnet_eth_initialize':
dnet.c:380:15: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Fix this:
dm9000x.c: In function 'dm9000_initialize':
dm9000x.c:636:12: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Fix this:
dc2114x.c: In function 'dc21x4x_initialize':
dc2114x.c:305:15: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Fix this:
cs8900.c: In function 'cs8900_initialize':
cs8900.c:326:12: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc Joe Hershberger <joe.hershberger@gmail.com>
Fix this:
calxedaxgmac.c: In function 'xgmac_rx':
calxedaxgmac.c:479:2: warning: passing argument 1 of 'NetReceive' discards qualifiers from pointer target type
include/net.h:438:13: note: expected 'uchar *' but argument is of type 'volatile unsigned char *'
calxedaxgmac.c: In function 'calxedaxgmac_initialize':
calxedaxgmac.c:547:12: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Fix this:
at91_emac.c: In function 'at91emac_register':
at91_emac.c:524:12: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Fix this:
armada100_fec.c: In function 'armada100_fec_register':
armada100_fec.c:723:12: warning: assignment from incompatible pointer type
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Fix:
4xx_enet.c: In function 'ppc_4xx_eth_initialize':
4xx_enet.c:2029: warning: assignment from incompatible pointer type
Tested on sequoia board.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Anatolij Gustschin <agust@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Fixes:
davinci_emac.c: In function 'davinci_emac_initialize':
davinci_emac.c:796:12: warning: assignment from incompatible pointer type [enabled by default]
Tested on da850_am18xxevm
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Fixes:
tsec.c: In function 'tsec_initialize':
tsec.c:638:12: warning: assignment from incompatible pointer type
Tested on MPC8313e-RDB
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Fix:
mpc512x_fec.c: In function 'mpc512x_fec_initialize':
mpc512x_fec.c:634: warning: assignment from incompatible pointer type
Tested on mpc5121ads board using tftp and nfs commands.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Fix:
asix.c: In function 'asix_eth_get_info':
asix.c:629:12: warning: assignment from incompatible pointer type
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Fix:
mpc5xxx_fec.c: In function 'mpc5xxx_fec_initialize':
mpc5xxx_fec.c:920: warning: assignment from incompatible pointer type
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Anatolij Gustschin <agust@denx.de>
Fix:
smsc95xx.c: In function 'smsc95xx_eth_get_info':
smsc95xx.c:869:12: warning: assignment from incompatible pointer type
[enabled by default]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
smc911x.c: In function 'smc911x_initialize':
smc911x.c:288:12: warning: assignment from incompatible pointer type
[enabled by default]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
* 'master' of git://git.denx.de/u-boot-usb:
USB: S5P: Add ehci support
usb:udc:samsung Add functions for storing private gadget data in UDC driver
usb:gadget:composite: Support for composite at gadget.h
usb:gadget:composite USB composite gadget support
usb:udc:samsung:cleanup Replace DEBUG_* macros with debug_cond() calls
usb:udc: Remove duplicated USB definitions from include/linux/usb/ch9.h file
USB: Document the QH and qTD antics in EHCI-HCD
USB: Drop cache flush bloat in EHCI-HCD
USB: Drop ehci_alloc/ehci_free in ehci-hcd
USB: Align buffers at cacheline
usb: use noinline define
* 'master' of git://git.denx.de/u-boot-nand-flash:
NAND: Remove ONFI detection message to from bootup log
driver/mtd:IFC: Fix possible memory leak
driver/mtd: IFC NAND: Add support of ONFI NAND flash
mtd, nand: move some printfs to debug output.
nand_util: correct YAFFS image write function
powerpc/85xx: fix NAND boot linker scripts for -fpic
nand: extend .raw accesses to work on multiple pages
* 'master' of git://git.denx.de/u-boot-arm: (167 commits)
OMAP4/5: Change omap4_sdp, omap4_panda, omap5_evm maintainer
ARM: omap3: Add CONFIG_SPL_BOARD_INIT for CONFIG_SPL_MMC_SUPPORT
ARM: omap3: Set SPL stack size to 8KB, image to 54KB.
arm, omap3: fix warm reset serial output on OMAP36xx/AM/DM37xx
OMAP4: Set fdt_high for OMAP4 devices to enable booting with Device Tree
omap4: do not enable auxiliary cores
omap4: do not enable fs-usb module
omap4: panda: disable uart2 pads during boot
igep00x0: change mpurate from 500 to auto
igep00x0: enable the use of a plain text file
tegra2: trivially enable 13 mhz crystal frequency
tegra: Enable keyboard for Seaboard
tegra: Switch on console mux and use environment for console
tegra: Add tegra keyboard driver
tegra: fdt: Add keyboard definitions for Seaboard
tegra: fdt: Add keyboard controller definition
tegra: Add keyboard support to funcmux
input: Add support for keyboard matrix decoding from an fdt
input: Add generic keyboard input handler
input: Add linux/input.h for key code support
fdt: Add fdtdec functions to read byte array
tegra: Enable LP0 on Seaboard
tegra: fdt: Add EMC data for Tegra2 Seaboard
tegra: i2c: Add function to find DVC bus
fdt: tegra: Add EMC node to device tree
tegra: Add EMC settings for Seaboard
tegra: Turn off power detect in board init
tegra: Set up warmboot code on Nvidia boards
tegra: Setup PMC scratch info from ap20 setup
tegra: Add warmboot implementation
tegra: Set up PMU for Nvidia boards
tegra: Add PMU to manage power supplies
tegra: Add EMC support for optimal memory timings
tegra: Add header file for APB_MISC register
tegra: Add tegra_get_chip_type() to detect SKU
tegra: Add flow, gp_padctl, fuse, sdram headers
tegra: Add crypto library for warmboot code
tegra: Add functions to access low-level Osc/PLL details
tegra: Move ap20.h header into arch location
Add AES crypto library
i2c: Add TPS6586X driver
Add abs() macro to return absolute value
fdt: Add function to return next compatible subnode
fdt: Add function to locate an array in the device tree
i.MX28: Avoid redefining serial_put[cs]()
i.MX28: Check if WP detection is implemented at all
i.MX28: Add battery boot components to SPL
i.MX28: Reorder battery status functions in SPL
i.MX28: Add LRADC init to i.MX28 SPL
i.MX28: Add LRADC register definitions
i.MX28: Shut down the LCD controller before reset
i.MX28: Add LCDIF register definitions
i.MX28: Implement boot pads sampling and reporting
i.MX28: Improve passing of data from SPL to U-Boot
M28EVK: Add SD update command
M28EVK: Implement support for new board V2.0
FEC: Abstract out register setup
MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged
i.MX28: Add delay after CPU bypass is cleared
spi: mxs: Allow other chip selects to work
spi: mxs: Introduce spi_cs_is_valid()
mx53loco: Remove unneeded gpio_set_value()
mx53loco: Add CONFIG_REVISION_TAG
mx53loco: Turn on VUSB regulator
mx53loco: Add mc34708 support and set mx53 frequency at 1GHz
pmic: dialog: Avoid name conflicts
imx: Add u-boot.imx as target for ARM9 i.MX SOCs
i.MX2: Include asm/types.h in arch-mx25/imx-regs.h
imx: usb: There is no such register
i.MX25: usb: Set PORTSCx register
imx: nand: Support flash based BBT
i.MX25: This architecture has a GPIO4 too
i.MX25: esdhc: Add mxc_get_clock infrastructure
i.MX6: mx6q_sabrelite: add SATA bindings
i.MX6: add enable_sata_clock()
i.MX6: Add ANATOP regulator init
mx28evk: add NAND support
USB: ehci-mx6: Fix broken IO access
M28: Scan only first 512 MB of DRAM to avoid memory wraparound
Revert "i.MX28: Enable additional DRAM address bits"
M28: Enable FDT support
mx53loco: Add support for 1GHz operation for DA9053-based boards
mx53loco: Allow to print CPU information at a later stage
mx5: Add clock config interface
imx-common: Factor out get_ahb_clk()
i.MX6Q: mx6qsabrelite: Add keypress support to alter boot flow
mx31pdk: Allow booting a zImage kernel
mx6qarm2: Allow booting a zImage kernel
mx6qsabrelite: Allow booting a zImage kernel
mx28evk: Allow booting a zImage kernel
m28evk: Allow to booting a dt kernel
mx28evk: Allow to booting a dt kernel
mx6qsabrelite: No need to set the direction for GPIO3_23 again
pmic: Add support for the Dialog DA9053 PMIC
MX53: mx53loco: Add SATA support
MX53: Add support to ESG ima3 board
SATA: add driver for MX5 / MX6 SOCs
MX53: add function to set SATA clock to internal
SATA: check for return value from sata functions
MX5: Add definitions for SATA controller
NET: fec_mxc.c: Add a way to disable auto negotiation
Define UART4 and UART5 base addresses
EXYNOS: Change bits per pixel value proper for u-boot.
EXYNOS: support TRATS board display function
LCD: support S6E8AX0 amoled driver based on EXYNOS MIPI DSI
EXYNOS: support EXYNOS MIPI DSI interface driver.
EXYNOS: support EXYNOS framebuffer and FIMD display drivers.
LCD: add data structure for EXYNOS display driver
EXYNOS: add LCD and MIPI DSI clock interface.
EXYNOS: definitions of system resgister and power management registers.
SMDK5250: fix compiler warning
misc:pmic:samsung Convert TRATS target to use MAX8997 instead of MAX8998
misc:pmic:max8997 MAX8997 support for PMIC driver
TRATS: modify the trats's configuration
ARM: Exynos4: ADC: Universal_C210: Enable LDO4 power line for ADC measurement
EXYNOS: Rename exynos5_tzpc structure to exynos_tzpc
arm: ea20: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT
arm: cam_enc_4xx: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT
cm-t35: add I2C multi-bus support
include/configs: Remove CONFIG_SYS_64BIT_STRTOUL
include/configs: Remove CONFIG_SYS_64BIT_VSPRINTF
omap3: Introduce weak misc_init_r
omap730p2: Remove empty misc_init_r
omap5912osk: Remove empty misc_init_r
omap4+: Remove CONFIG_ARCH_CPU_INIT
omap4: Remove CONFIG_SYS_MMC_SET_DEV
OMAP3: pandora: drop console kernel argument
OMAP3: pandora: revise GPIO configuration
...
This commit adds support for storing private data to Samsung's UDC
driver. This data is afterward used by usb gadget.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
USB Composite gadget implementation for u-boot. It builds on top
of USB UDC drivers.
This commit is based on following files from Linux Kernel v2.6.36:
./include/linux/usb/composite.h
./drivers/usb/gadget/composite.c
SHA1: d187abb9a83e6c6b6e9f2ca17962bdeafb4bc903
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
This patch cleans up the Samsung's UDC driver. It replaces several
DEBUG_* macros with debug_cond().
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Remove the repeated USB descriptor code and use usbdescriptors.h file.
ch9.h file has been copied from linux and is needed for USB gadget
related work.
Now usbdescriptors.h and ch9.h shall be used together.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
The construction of QH and qTD lists in ehci_submit_async() call is cryptic
business, add at least a bit of comments so if someone is reading it, he can at
least reference the intel ehci manual (ehci-r10.pdf).
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Discard the creepy cache flushing mechanisms in ehci-hcd.c and replace them with
more straightforward flushing. In the new approach, the flushing takes place
directly in ehci_submit_async() call instead of going through the QH list and
flushing all members and buffers. This discards a lot of weird bit operations
on the members of QH and qTD structures.
NOTE: Certainly, this flushes even qTDs which are possibly unused in some
transactions, though the overhead of the previous code was much higher than is
the overhead of flushing two more cache lines (which most probably aren't even
cached).
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
These two functions were called only from ehci_submit_async(), therefore
dissolve them as part of ehci_submit_async() to get rid of all those static
variables.
Signed-off-by: Marek Vasut <marex@denx.de>
Without this patch, boot shows this messages upon NAND detection:
NAND: ONFI flash detected
ONFI param page 0 valid
ONFI flash detected
ONFI param page 0 valid
128 MiB
With this patch, its back to the U-Boot "standard":
NAND: 128 MiB
Tested on x600 (SPEAr600).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Scott Wood <scott@tyr.buserror.net>
if priv->bank >= MAX_BANK, priv should be freed before returning ENODEV.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Scott Wood <scott@tyr.buserror.net>
current U-Boot shows on startup (for example on the enbw_cmc
board) the following printfs from the nand subsystem:
Flash: 2 MiB
NAND: Bad block table found at page 65472, version 0x01
Bad block table found at page 65408, version 0x01
nand_read_bbt: Bad block at 0x000002980000
nand_read_bbt: Bad block at 0x000003240000
128 MiB
MMC: davinci: 0
remove them to debug output, so it shows with this patch:
Flash: 2 MiB
NAND: 128 MiB
MMC: davinci: 0
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scott@tyr.buserror.net>
In function nand_write_skip_bad(),for YAFFS filesystem part,
write_oob() will return 0 when success, so when rval equals 0,
it should continue to write the next page, and no break.
Signed-off-by: Wentao, Liu <wentao.liu@intel.com>
Acked-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Scott Wood <scott@tyr.buserror.net>
Add support for internal matrix keyboard controller for Nvidia Tegra
platforms. This driver uses the fdt decode function to obtain its key
codes.
Support for the Ctrl modifier is provided. The left and right ctrl keys are
dealt with in the same way.
This uses the new keyboard input library (drivers/input/input.c) to decode
keys and handle most of the common input logic. The new key matrix library
is also used to decode (row, column) key positions into key codes.
The intent is to make this driver purely about dealing with the hardware.
Key detection before the driver is loaded is supported. This key will be
picked up when the keyboard driver is initialized.
Modified by Bernie Thompson <bhthompson@chromium.org> and
Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix
and various other things.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Matrix keyboards require a key map to be set up, and must also deal with
key ghosting.
Create a keyboard matrix management implementation which can be leveraged
by various keyboard drivers. This includes code to read the keymap from
the FDT and perform debouncing.
Signed-off-by: Bernie Thompson <bhthompson@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add a module which understands converting key codes (or scan codes)
to ASCII characters. It includes FIFO support and can call back to
drivers to read new characters when its FIFO is empty.
Keycode maps are provided for un-modified, shift and ctrl keys.
The plan is to use this module where such mapping is required.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add tegra_i2c_get_dvc_bus_num() to obtain the I2C bus number of DVC bus.
This allows us to talk to the PMU.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This power management chip supports battery charging and a large number
of power supplies. This initial driver only provides the ability to adjust
the two synchronous buck converters SM0 and SM1 in a stepwise manner.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This macro is generally useful to make it available in common.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
If the WP function is NULL, simply assume the card is always RW.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Abstract out common register setup. This also configured r_cntrl
to correct value at registration time.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
MXS SSP controller may have up to three chip selects per port: SS0, SS1 and SS2.
Currently only SS0 is supported in the mxs_spi driver.
Allow all the three chip select to work by selecting the desired one
in bits 20 and 21 of the HW_SSP_CTRL0 register.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Introduce spi_cs_is_valid() for validating spi bus and chip select numbers.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
As mx53loco board has two variants: one with Dialog PMIC and another with FSL MC34708 PMIC,
we need to be able to build both drivers.
Change pmic_init() and PMIC_NUM_OF_REGS names to avoid build conflicts when both drivers are present.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
The reference manual of i.MX25 (nor i.MX31) does not define such
register. This seems to access read only UH2_CAPLENGTH register (if
CONFIG_MXC_USB_PORT is zero).
Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Stefano Babic <sbabic@denx.de>
The USB controller in i.MX25 has a PORTSCx registers which should be
set. In this regard it is similar to the controller in i.MX31. As this
file is compiled only with i.MX25 and -31, #ifdef check can be removed.
Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Stefano Babic <sbabic@denx.de>
To get USB working again on the i.MX6, this patch fixes a bug introduced
with commit 522b2a0 "Add proper IO accessors for mx6 usb registers.".
At that occasion, I also added the missing __iomem directive.
Cc: Marek Vasut <marex@denx.de>
CC: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
This driver is part of Freescale's LTIB for
MX5 / MX6.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Terry Lv <r65388@freescale.com>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Dirk Behme <dirk.behme@de.bosch.com>
vl_bpix of vidinfo_t was changed proper value for u-boot.
It is used to multiple of 2 by using NBITS() macro.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch support S6E8AX0 amoled driver based on EXYNOS MIPI DSI interface.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
EXYNOS SoC platform has MIPI-DSI controller and MIPI-DSI
based LCD Panel could be used with it. This patch supports MIPI-DSI driver
based Samsung SoC chip.
LCD panel driver based MIPI-DSI should be registered to MIPI-DSI driver at
board file and LCD panel driver specific function registered to mipi_dsim_ddi
structure at lcd panel init function called system init.
In the MIPI-DSI driver, find lcd panel driver by using registered
lcd panel name, and then initialize lcd panel driver.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
This patch support EXYNOS FB and FIMD display drivers.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
This commit adds support for MAX8997 PMIC driver.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Make the sysctrl structure common, so that it can
be used in generic functions across socs.
Also change the base address of the system control module, to
include all the registers and not simply the io regs.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Add parameters to the OMAP MMC initialization function so the board can
mask host capabilities and set the maximum clock frequency. While the
OMAP supports a certain set of MMC host capabilities, individual boards
may be more restricted and the OMAP may need to be configured to match
the board. The PRG_SDMMC1_SPEEDCTRL bit in the OMAP3 is an example.
Signed-off-by: Jonathan Solnit <jsolnit@gmail.com>
This change adds an implementation of high-speed UART found on NXP
LPC32X0 SoCs. Such UARTs are enumerated as UART1, UART2 and UART7.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
In driver mmc, generic s5p_sdhci code is implemented.
s5p_mmc file is dupulicated.
we are good that use the generic sdhci.
This patch supported the sdhci for Samsung-SoC.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Lei Wen<leiwen@marvell.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
To support the Samsung-SoC, added the basically functions.
Samsung-SoC didn't used the SDHCI_CTRL_HISPD.
And added set_control_reg callback for s3c64xx.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Lei Wen<leiwen@marvell.com>
When response type is R1b, mask value is added the SDHCI_INT_DAT_END.
but in while(), didn't check that flag.
So sdhci controller didn't work fine.
CMD6 didn't always complete.
So add the quirks for broken r1b response
and add the timeout value to prevent the infinite loop.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Lei Wen<leiwen@marvell.com>
Some MMC cards, like my ancient 32.0MB SanDisk RS-MMC cards had issue if b_max
was set to 0x40 and DMA was enabled. Lower this value to 0x20, which allows
these cards to work too.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
This patch imports parts of two patches from the Freescale U-Boot with the following
commit messages:
ENGR00156405 ESDHC: Add workaround for auto-clock gate errata ENGcm03648
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/drivers/mmc/imx_esdhc.c?h=imx_v2009.08_12.01.01&id=e436525a70fe47623d346bc7d9f08f12ff8ad787
The errata, not applicable to USDHC, causes ESDHC to shut off clock to the card
when auto-clock gating is enabled for commands with busy signalling and no data
phase. The card might require the clock to exit the busy state, so the workaround
is to disable the auto-clock gate bits in SYSCTL register for such commands. The
workaround also entails polling on DAT0 bit in the PRSSTAT register to learn when
busy state is complete. Auto-clock gating is re-enabled at the end of busy state.
ENGR00156670-1 ESDHC/USDHC: Remove delay before each cmd and some bug fixes
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/drivers/mmc/imx_esdhc.c?h=imx_v2009.08_12.01.01&id=a77c6fec8596891be96b2cdbc742c9824844b92a
Removed delay of 10 ms before each command. There should not be a need to have this
delay after the ENGR00156405 patch that polls until card is not busy anymore before
proceeding to next cmd.
This patch imports the polling part of both patches. The auto-clock gating code
don't apply for i.MX6 as implemented in these two patches.
SYSCTL_RSTA was defined twice. Remove one definition.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Andy Fleming <afleming@freescale.com>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
According to OMAP3 TRM, when the controller reports certain errors,
driver must perform a software reset. This is done by setting a bit
in SYSCTL and waiting it to clear:
- SRC on command timeout (CTO)
- SRD on data errors (DTO, DCRC and DEB)
This fixes a problem seen on OMAP3 pandora board with some cards
that won't work with a message printed multiple times:
timedout waiting on cmd inhibit to clear
Code loosely based on Linux omap_hsmmc driver.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Tested-by: Tom Rini <trini@ti.com>
Tested-by: Pali Rohár <pali.rohar@gmail.com>
The message didn't state that it's waiting for STAT to _clear_,
and printing the STAT value itself can help to identify problems.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Acked-by: Tom Rini <trini@ti.com>
According to OMAP3 TRM, PBIASLITEPWRDNZ bits must be cleared while MMC
power supply is being enabled and is ramping up (those bits might be
left set by the previous bootloader). It doesn't say what happens if
this procedure is violated, but better not to risk here and do things
as required.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Acked-by: Tom Rini <trini@ti.com>
This patch sets the MMC width according to the MMC host capabilities.
It turned out, that there are some targets (e.g. GONI), which are able
to read data from SPI only at 4 bit mode.
This patch restricts the width number according to the MMC host.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Andy Fleming <afleming@gmail.com>
* 'agust@denx.de' of git://git.denx.de/u-boot-staging:
lin_gadget: use common linux/compat.h
linux/compat.h: rename from linux/mtd/compat.h
lin_gadget: use common mdelay
gunzip: rename z{alloc, free} to gz{alloc, free}
fs/fat: align disk buffers on cache line to enable DMA and cache
part_dos: align disk buffers on cache line to enable DMA and cache
Merge our duplicate definitions with the common header.
Also fix drivers/usb/gadget/s3c_udc_otg_xfer_dma.c to
use min() instead of min_t() since we remove the latter
from compat.h.
Additionally use memalign() directly as the lin_gadget
specific kmalloc() macro is removed from lin_gadget_compat.h
by this patch.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
* 'master' of git://git.denx.de/u-boot-mpc85xx:
powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR
powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot
cmd_bdinfo: display the address map size (32-bit vs. 36-bit)
PowerPC: correct the SATA for p1/p2 rdb-pc platform
powerpc/corenet_ds: Slave core in holdoff when boot from SRIO
powerpc/corenet_ds: Slave reads ENV from master when boot from SRIO
powerpc/corenet_ds: Slave uploads ucode when boot from SRIO
powerpc/corenet_ds: Slave module for boot from SRIO
powerpc/corenet_ds: Master module for boot from SRIO
powerpc/corenet_ds: Document for the boot from SRIO
powerpc/corenet_ds: Correct the compilation errors about ENV
powerpc/srio: Rewrite the struct ccsr_rio
powerpc/85xx:Fix lds for nand boot debug info
powerpc/p2041rdb: add env in NAND support
powerpc/p2041rdb: add NAND and NAND boot support
powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards
powerpc/85xx:Avoid vector table compilation for nand_spl
powerpc/85xx:Fix IVORs addr after vector table relocation
powerpc/85xx:Avoid hardcoded vector address for IVORs
powerpc/p1023rds: Disable nor flash node and enable nand flash node
* 'master' of git://git.denx.de/u-boot-i2c:
i2c:designware Turn off the ctrl when setting the speed
i2c: Add support for designware i2c controller
sh: i2c: Add support I2C controller of SH7734
For the powerpc processors with SRIO interface, boot location can be configured
from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash
for u-boot image. The image can be fetched from another processor's memory
space by SRIO link connected between them.
The processor boots from SRIO is slave, the processor boots from normal flash
memory space and can help slave to boot from its memory space is master.
They are different environments and requirements:
master:
1. NOR flash for its own u-boot image, ucode and ENV space.
2. Slave's u-boot image in master NOR flash.
3. Normally boot from local NOR flash.
4. Configure SRIO switch system if needed.
slave:
1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
2. Boot location should be set to SRIO1 or SRIO2 by RCW.
3. RCW should configure the SerDes, SRIO interfaces correctly.
4. Slave must be powered on after master's boot.
5. Must define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE because of no ucode
locally.
For the slave module, need to finish these processes:
1. Set the boot location to SRIO1 or SRIO2 by RCW.
2. Set a specific TLB entry for the boot process.
3. Set a LAW entry with the TargetID SRIO1 or SRIO2 for the boot.
4. Slave's u-boot image should be generated specifically by
make xxxx_SRIOBOOT_SLAVE_config.
This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
The designware i2c controller must be turned off before
setting the speed in IC_CON register, as stated in the
section 6.3.1 of the dw_apb_i2c_db.pdf.
Signed-off-by: Michel Sanches <michel.sanches@st.com>
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Earlier, a driver exists in the u-boot source for designware i2c interface. That
driver was specific to spear platforms. This patch implements the i2c controller
as a generic driver which can be used by multiple platforms
The driver files are now renamed to designware_i2c.c and designware_i2c.h and
these are moved into drivers/i2c folder for reusability by other
platforms
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Renesas SH7734 has two I2C interfaceis.
This supports these I2C.
V5: - include i2c.h.
- Add check of icsr bit polling logic.
- Implement i2c_probe.
V4: - Remove sh_i2c_dump_reg function.
- Use puts() when there's no format.
- Chnage check for I2C bus number.
- Remove space before the semi-colon.
V3: - Fix error for whitespace.
V2: - Changed bit control to use the clr|set|clrsetbits_* functions.
- Fix wrong comment style.
- Add new line before for loop in i2c_read.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
No other driver sets up the part type to DOS in their init, and it
doesn't seem to be needed as `mmcinfo` and `mmc part` stll work, so
drop it.
Reported-by: Marek Vasut <marex@denx.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
... after commit "net/miiphy/serial: drop duplicate NAMESIZE
define" (sha1:f6add13) was applied. The building of the new
LL TEMAC network driver fails with error below:
xilinx_ll_temac.c: In function 'xilinx_ll_temac_initialize':
xilinx_ll_temac.c:301: error: 'NAMESIZE' undeclared (first use in this function)
xilinx_ll_temac.c:301: error: (Each undeclared identifier is reported only once
xilinx_ll_temac.c:301: error: for each function it appears in.)
Signed-off-by: Stephan Linz <linz@li-pro.net>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Fix the warning
mmc.c: In function 'mmc_send_cmd':
mmc.c:87: warning: assignment from incompatible pointer type
in case CONFIG_MMC_TRACE is enabled.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Andy Fleming <afleming@freescale.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
This is just a patch for the problem reported here:
http://lists.denx.de/pipermail/u-boot/2012-February/117580.html originally reported by Igor.
"Looks like this is copy paste error from my side,(for port2/3 it should have been bypass
for port2/3 rather its port1 set in bypass mode)"
I only submit the patch since it is missing in 2012.04-rc3 while the twister board
depends on it. Maybe it is already somewhere in the reposistory, but I cannot find it.
note: the twister boards still needs an additional `usb reset`, don't know why.
U-Boot 2012.04-rc3-dirty (Apr 19 2012 - 21:38:38)
AM35XX-GP ES1.0, CPU-OPP2, L3-165MHz, Max CPU Clock 600 Mhz
TAM3517 TWISTER Board + LPDDR/NAND
I2C: ready
DRAM: 256 MiB
NAND: 512 MiB
MMC: OMAP SD/MMC: 0
In: serial
Out: serial
Err: serial
Die ID #746c0000000000000155dc1405011024
Net: DaVinci-EMAC, smc911x-0
Hit any key to stop autoboot: 0
twister => usb start
(Re)start USB...
USB: Register 1313 NbrPorts 3
USB EHCI 1.00
scanning bus for devices... 1 USB Device(s) found
scanning bus for storage devices... 0 Storage Device(s) found
twister => usb reset
(Re)start USB...
USB: Register 1313 NbrPorts 3
USB EHCI 1.00
scanning bus for devices... 1 USB Device(s) found
scanning bus for storage devices... 0 Storage Device(s) found
twister => usb reset
(Re)start USB...
USB: Register 1313 NbrPorts 3
USB EHCI 1.00
scanning bus for devices... 1 USB Device(s) found
scanning bus for storage devices... 0 Storage Device(s) found
twister => usb reset
(Re)start USB...
USB: Register 1313 NbrPorts 3
USB EHCI 1.00
scanning bus for devices... 1 USB Device(s) found
scanning bus for storage devices... 0 Storage Device(s) found
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: Govindraj.R <govindraj.raja <at> ti.com>
Acked-by: Tom Rini <trini@ti.com>
Fix gcc 4.6 build warnings:
onenand_base.c: In function 'onenand_probe':
onenand_base.c:2577:6: warning: variable 'maf_id' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
* 'master' of git://git.denx.de/u-boot-arm:
ARM926EJS: Fix cache.c to comply with checkpatch.pl
ARM926EJS: Make asm routines volatile in cache ops
MX35: mx35pdk: wrong board revision
ARM1136: MX35: Make asm routines volatile in cache ops
ARM: add u-boot.imx as target for i.MX SOCs
M28: Pull out CONFIG_APBH_DMA so it's always enabled
DMA: Split the APBH DMA init into block and channel init
imx: Return gpio_set_value in gpio_direction_output
imx: Use GPIO_TO_PORT macro in the gpio driver instead of (gpio >> 5)
imx: Add GPIO_TO_PORT macro in the mxc_gpio driver
imx: Remove unneeded/repititive definitions from imx headers
i.MX28: Allow coexistence of PIO and DMA mode for SD/MMC
MX31: mx31pdk: drop enable_caches from board file
i.MX28: Fix initial stack pointer position
mx35: mx35pdk: fix when cache functions are linked
mx35: flea3: fix when cache functions are linked
ARM: 926ejs: use debug() for misaligned addresses
ARM1136: add cache flush and invalidate operations
mx6qsabrelite: Fix the serial console port
mx6qsabrelite: Add boot switch setting information into the README
i.MX6: mx6qsabrelite: add cache commands if cache is enabled
i.MX6: implement enable_caches()
i.MX6: define CACHELINE_SIZE
MX53: DDR: Fix ZQHWCTRL field TZQ_CS
mx28evk: Add a README file
mx28: Split the README into a common part and a m28 specific part
tricorder: Load kernel from ubifs
tricorder: Add UBIFS
cm-t35: fix Ethernet reset timing
hawkboard: Add CONFIG_SPL_LIBGENERIC_SUPPORT
BeagleBoard: Remove userbutton command and use gpio command instead
OMAP: Move omap1510inn to Unmaintained / Orphaned
This fixes the issue where mxs_dma_init() was called either twice or never,
without introducing any new init hooks.
The idea is to allow each and every device using the APBH DMA block to
configure and request only the channels it uses, instead of making it call init
for all the channels as is now.
The common DMA block init part, which only configures the block, is then called
from CPUs arch_cpu_init() call.
NOTE: This patch depends on:
http://patchwork.ozlabs.org/patch/150957/
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
This SD DMA function of i.MX28 is still apparently too experimental to be
enabled by default in 2012.04 release. Enable this feature only if the user
plans to tinker with DCache or explicitly enables it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Fix:
spr_smi.c: In function 'smi_write':
spr_smi.c:325:15: warning: variable 'WM' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Vipin Kumar <vipin.kumar@st.com>
* 'master' of git://git.denx.de/u-boot-net:
net/designware: Change timeout loop implementation
net/designware: Set ANAR to 0x1e1
net/designware: Program phy registers when auto-negotiation is ON
net/designware: Try configuring phy on each dw_eth_init
net/designware: Consecutive writes must have delay
net/designware: Phy address fix
net/designware: Fix the max frame length size
net/designware: Fix to restore hw mac address
microblaze: Wire up LL_TEMAC driver initialization
microblaze: Add faked LL_TEMAC driver configuration
microblaze: Enable several ethernet driver compilation
net: ll_temac: Add LL TEMAC driver to u-boot
Update net subsystem maintainer in doc/git-mailrc
net/eth.c: fix eth_write_hwaddr() to use dev->enetaddr as fall back
mvgbe: remove warning for unused methods
Note: because 4-byte addressing is not supported yet,
at the moment only the first 16MiB of the device are available.
Signed-off-by: Jérôme Carretero <cJ@zougloub.eu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The new implementation changes the timeout loop implementation to avoid 1 ms
delay in each failing test. It also configures the delay to 10usec.
Signed-off-by: Amit Virdi <amit.virdi@st.com>
This patch forces the advertised capabilities during auto
negotiation to always be 10/100 Mbps and half/full as duplexing.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
If AN(auto-negotiation) is ON, speed bit of control register are not
applicable. Also phy registers were not getting programmed as per the
result of AN. This patch sets only AN bit & restart AN bit for AN ON
selection & programs PHY registers as per AN result.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Phy autonegotiation works only when the ethernet cable is plugged in.
Since the phy was configured only at the init time, a plugged in cable
was necessary to initialize the phy properly.
This patch keeps a flag to check if the phy initialization has
succeeded, and calls configure_phy routine at every init if this flag
reports otherwise.
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
This patch solves a TX/RX problem which happens at 10Mbps, due to the
fact that we are not respecting 4 cyles of the phy_clk (2.5MHz) between
two consecutive writes on the same register.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
The code assumes the phy address to be > 0, which is not true, the phy address
can be in the range 0-31.
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
The max frame length for normal descriptor can be 0x7FF i.e 2047. It was wrongly
specified as 2048. Currently, the max descriptor length is around 1500, so
redefining the mask to 1600
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
The network controller mac resets hardware address stored in MAC_HI and MAC_LO
registers if mac is resetted. So, hw mac address needs to be restored in case
mac is explicitly resetted from driver.
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
This replacement causes 4KB page size devices to work properly with u-boot.
The old ONENAND_IS_MLC() behavior has been preserved by explicit
setting of ONENAND_HAS_4KB_PAGE for those devices.
This change makes the onenand_base.c file more resembling the respective
kernel sources.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
Test HW:
- Samsung S5PC110 GONI
- Samsung S5PC210 Universal
Xilinx LocalLink Tri-Mode Ether MAC driver can be
used by Xilinx Microblaze or Xilinx ppc405/440 in
SDMA and FIFO mode. DCR or XPS bus can be used.
The driver uses and requires MII and PHYLIB.
CP: 4 warnings: 'Use of volatile is usually wrong'
I won't fix this, because it depends on the network
driver subsystem.
Reported-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Stephan Linz <linz@li-pro.net>
Separate callback for probing OneNAND memory chip.
If no special function is defined, default implementation will be used.
This approach gives more flexibility for OneNAND device probing.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Some baords may use the GBE interface but they have no
phy connected to the interface and a direct MAC/MAC interface.
For them we need to get rid of compiler warnings.
Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
flush_dcache is not declared in the common.h API,
flush_dcache_range however is
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Thomas Chou <thomas@wytron.com.tw>
flush_dcache is not declared in the common.h API,
flush_dcache_range however is
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Thomas Chou <thomas@wytron.com.tw>
The FSL PCI driver uses local prototypes for
pciauto_[pre|post]scan_setup_bridge(), this does not seem right,
so move them to the <pci.h> file.
Fixed a small extern declaration too, this is harmless but distracts
the view since all other prototypes are explicitly external.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Fix:
mmc.c: In function 'mmc_bounce_buffer_start':
mmc.c:132:13: warning: no return statement in function returning
non-void [-Wreturn-type]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Fix:
tegra2_mmc.c: In function 'mmc_send_cmd':
tegra2_mmc.c:230:3: warning: 'mask' may be used uninitialized in this
function [-Wuninitialized]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Tom Warren <twarren@nvidia.com>
* 'agust@denx.de' of git://git.denx.de/u-boot-staging:
lzma: fix printf warnings
Remove CONFIG_SYS_EXTBDINFO from snapper9260.h
cmd_pxe.c: fix strict-aliasing warnings
net: smc91111: use mdelay()
doc: Fix some typos in different files
disk/part.c: Fix device enumeration through API
mkenvimage: Really set the redundant byte when applicable
mkenvimage: Don't try to detect comments in the input file
mkenvimage: Use mmap() when reading from a regular file
mkenvimage: Read/Write from/to stdin/out by default or if the filename is "-"
mkenvimage: More error handling
mkenvimage: Correct an include and add a missing one
mkenvimage: correct and clarify comments and error messages
MAKEALL: display SPL size if present
ARMV7/Vexpress: add missing get_ticks() and get_tbclk()
mkenvimage: fix usage message
cmd_fat: add FAT write command
fs/fat/fat_write.c: Fix GCC 4.6 warnings
FAT write: Fix compile errors
* 'master' of git://git.denx.de/u-boot-arm: (146 commits)
arm: Use common .lds file where possible
arm: add a common .lds link script
arm: Remove unneeded setting of LDCSRIPT
Define CPUDIR for the .lds link script
arm: Remove zipitz2 link script
Allow arch directory to contain .lds without requiring Makefile
OMAP: Remove omap1610inn-based boards
arch/arm/cpu/armv7/omap-common/clocks-common.c: Fix build warnings
board/ti/beagle/beagle.c: Fix build warnings
sdrc.c: Fix typo in do_sdrc_init() for SPL
tegra: i2c: Add I2C driver
tegra: fdt: i2c: Add extra I2C bindings for U-Boot
tegra: i2c: Select I2C ordering for Seaboard
tegra: i2c: Enable I2C on Seaboard
tegra: i2c: Select number of controllers for Tegra2 boards
tegra: i2c: Initialise I2C on Nvidia boards
tegra: Enhance clock support to handle 16-bit clock divisors
fdt: Add function to allow aliases to refer to multiple nodes
tegra: Rename NV_PA_PMC_BASE to TEGRA2_PMC_BASE
tegra: fdt: Enable FDT support for Ventana
tegra: fdt: Enable FDT support for Seaboard
tegra: usb: Enable USB on Seaboard
tegra: usb: Add common USB defines for tegra2 boards
tegra: usb: Add USB support to nvidia boards
arm: Check for valid FDT after console is up
fdt: Avoid early panic() when there is no FDT present
tegra: usb: Add support for Tegra USB peripheral
tegra: fdt: Add function to return peripheral/clock ID
usb: Add support for txfifo threshold
tegra: usb: fdt: Add USB definitions for Tegra2 Seaboard
tegra: usb: fdt: Add additional device tree definitions for USB ports
tegra: fdt: Add clock bindings for Tegra2 Seaboard
tegra: fdt: Add clock bindings
tegra: fdt: Add additional USB binding
fdt: Add tegra-usb bindings file from linux
fdt: Add staging area for device tree binding documentation
tegra: fdt: Add device tree file for Tegra2 Seaboard from kernel
tegra: fdt: Add Tegra2x device tree file from kernel
arm: fdt: Add skeleton device tree file from kernel
fdt: Add basic support for decoding GPIO definitions
fdt: Add functions to access phandles, arrays and bools
fdt: Tidy up a few fdtdec problems
fdt: Add tests for fdtdec
fdt: Add fdtdec_find_aliases() to deal with alias nodes
arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load
net: fec_mxc: allow use with cache enabled
net: force PKTALIGN to ARCH_DMA_MINALIGN
i.MX28: Enable caches by default
i.MX28: Make use of the bounce buffer
i.MX28: Do data transfers via DMA in MMC driver
MMC: Implement generic bounce buffer
i.MX28: Add cache support to MXS NAND driver
i.MX28: Add cache support into the APBH DMA driver
ARM926EJS: Implement cache operations
board/vpac270/onenand.c: Fix build errors
nhk8815: fix build errors
atmel-boards: add missing atmel_mci.h
ARM: highbank: setup env from boot source register
ARM: highbank: change env config to use nvram
ARM: highbank: add reset support
ARM: highbank: Add boot counter support
ARM: highbank: change TEXT_BASE to 0x8000
ARM: highbank: fix us_to_tick calculation
ARM: highbank: add missing get_tbclk
ARM: highbank: fix warning for calxedaxgmac_initialize
net: calxedaxgmac: fix build due to missing __aligned definition
EXYNOS: Add structure for Exynos4 DMC
EXYNOS: SMDK5250: Support all 4 UARTs
ARM: fix s3c2410 timer code
ARM: davinci: fixes for cam_enc_4xx board
omap3_spi: receive transmit mode
calimain, enbw_cmc: Fix typo in comments
Davinci: ea20: use gpio framework to access gpios
OMAP3: mt_ventoux: sets its own mtdparts
OMAP3: mt_ventoux: updated timing for FPGA
twl4030: fix potential power supply handling issues
NAND: TI: fix warnings in omap_gpmc.c
cam_enc_4xx: Rename 'images' to 'imgs'
arm: Add Prep subcommand support to bootm
OMAP3: twister: add support to boot Linux from SPL
SPL: call cleanup_before_linux() before booting Linux
OMAP3: SPL: do not call I2C init if no I2C is set.
Add cache functions to SPL for armv7
devkit8000: Implement and activate direct OS boot
omap/spl: change output of spl_parse_image_header
omap-common/spl: Add linux boot to SPL
devkit8000/spl: init GPMC for dm9000 in SPL
omap-common: Add NAND SPL linux booting
devkit8000: add config for spl command
Add cmd_spl command
mx53ard: Initialize return code with error
mx53: Make PLL2 to be the parent of UART clock
configs: imx: Use CONFIG_SF_DEFAULT_CS
mx28evk: Provide default values for SPI bus and chip select
USB: ehci-mx6: Add proper IO accessors
mx6: Read silicon revision from register
i.MX28: Drop __naked function from spl_mem_init
mxs_spi: Return proper timeout error
i.MX28: Make the stabilization delays shorter
pmic_i2c: Return error in case of invalid pmic_i2c_tx_num
mx6: Remove duplicate definition of ANATOP_BASE_ADDR
mx6: Fix reset cause for Power On Reset case
i.MX6: mx6qsabrelite: add MACH_TYPE_MX6Q_SABRELITE
i.MX6: mx6q_sabrelite: add CONFIG_REVISION_TAG
i.MX28: Enable additional DRAM address bits
mx6q: mx6qsabrelite: setup_spi() should be called in board_init to allow use for environment
mx31: add "ARM11P power gating" to get_reset_cause
mx31pdk: Fix CONFIG_SYS_MEMTEST_END
efikamx: Fix CONFIG_SYS_MEMTEST_END
mx53smd: Fix CONFIG_SYS_MEMTEST_END
mx53evk: Fix CONFIG_SYS_MEMTEST_END
mx51evk: Fix CONFIG_SYS_MEMTEST_END
i.MX6: mx6qsabrelite: add ext2 support
imximage: Remove overwriting of flash_offset
IXP: Fix GPIO_INT_ACT_LOW_SET()
IXP: Fix NAND build warning on PDNB3 and SCPU
IXP: Move PDNB3 and SCPU from Makefile to boards.cfg
IXP: Squash warnings in IXP NPE
IXP: Fix missing MACH_TYPE_{ACTUX?,PNB3,DVLHOST}
IXP: Make IXP buildable with arm-linux- toolchains
Examples: Properly append LDFLAGS to LD command
SPL: Enable YMODEM support on BeagleBone and AM335x EVM
SPL: Add YMODEM over UART load support
SPL: Add README.omap3
README: document more SPL config options
spl.c: Use __noreturn decorator
config.mk: Check for -fstack-usage support
config.mk: Make cc-option create a file under include/generated
...
Add basic i2c driver for Tegra2 with 8- and 16-bit address support.
The driver requires CONFIG_OF_CONTROL to obtain its configuration
from the device tree.
(Simon Glass: sjg@chromium.org modified for upstream)
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This adds basic support for the Tegra2 USB controller. Board files should
call board_usb_init() to set things up.
Configuration is performed through the FDT, with aliases used to set the
order of the ports, like this fragment:
aliases {
/* This defines the order of our USB ports */
usb0 = "/usb@0xc5008000";
usb1 = "/usb@0xc5000000";
};
drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the txfilltuning
field in the EHCI controller on reset.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Ensure that transmit and receive buffers are cache-line aligned.
Invalidate cache for each packet as received, update receive buffer
descriptors one cache line at a time, flush cache before transmitting.
Original patch by Marek:
http://lists.denx.de/pipermail/u-boot/2012-February/117695.html
Signed-off-by: Eric Nelson <eric.nelson at boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
This utilizes the newly introduced bounce buffers in the MMC layer.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
This implements generic bounce buffer at the end of MMC command submission
chain. Therefore if unaligned data are passed, they are copied. This stuff
should be pushed down into the MMC subsystem to squash all places generating
these unaligned data.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@gmail.com>
This patch adds the support for high speed in usb device framework and usbtty
driver. This feature has been kept within a macro CONFIG_USBD_HS, so the board
configuration files have to define this macro to enable high speed support.
Along with that specific peripheral drivers also need to define a function to
let the framework know that the enumeration has happened at high speed.
This function prototype is "int is_usbd_high_speed(void)"
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Implementation of receive-transmit mode for
omap3 MCSPI.
Introduces full duplex communication, needed by
some spi devices (such as enc28j60).
Signed-off-by: jacopo mondi <mondi@cs.unibo.it> <j.mondi@voltaelectronics.com>
twl4030_pmrecv_vsel_cfg currently first sets up device group (effectively
enabling the supply), and only then sets vsel (selects voltage). This could
lead to wrong voltage for a short time, or even long time if second i2c
write fails.
Fix this by writing vsel first and device group after that. Also
introduce error checking to not enable the supply if we failed to set
the voltage, and start logging errors as power supply problems are
usually important.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
The following warnings are reported for boards using SOFT ECC.
omap_gpmc.c:33:30: warning: 'hw_nand_oob' defined but not used
omap_gpmc.c:78:13: warning: 'omap_hwecc_init' defined but not used
omap_gpmc.c:116:12: warning: 'omap_correct_data' defined but not used
omap_gpmc.c:182:12: warning: 'omap_calculate_ecc' defined but not used
omap_gpmc.c:208:13: warning: 'omap_enable_hwecc' defined but not used
Signed-off-by: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Scott Wood <scottwood@freescale.com>
Add proper IO accessors for mx6 usb registers.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Jason Liu <r64343@freescale.com>
Instead of returning -1, it is preferred to return -ETIMEDOUT in case of timeouts.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
This patch renames mx28_register to mx28_register_32 in order to
prepare for the introduction of an 8-bit register, mx28_register_8.
Signed-off-by: Robert Delien <robert@delien.nl>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
The module has 4 chip select signals. This patch supports it.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Without the fix, flash_write_cfibuffer will terminate the erased
status check once an all-0xFF word has been found instead of
continuing the erased status check utill the first non-0xFF word.
Signed-off-by: Tao Hou <hotforest@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
The dev->req_config flag was indicating that the forwarded
request needs to perform the usb gadget delayed status.
This is however not needed anymore, so it can be removed.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
While receiving packets from FIFO sometimes the buffer provided was
nonaligned. Fix this by taking a temporary aligned buffer and then
copying the content to nonaligned buffer.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
This patch adds the support for usb device high speed for designware peripheral.
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
This patch fixes a few bugs in USB device controller driver.
The fixes are as follows
1. Adding error condition checks eg. NULL return
2. Endpoint other than endpoint 0 (control endpoint) are initialized
only if usb state machine reaches STATE_ADDRESSED or above
3. Zero length packet handling corrected
4. Dead code removed
5. Bulk out endpoint returns after servicing 1 interrupt and returns
back to service if more interrupts are pending
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Acked-by: Marek Vasut <marex@denx.de>
The earlier usb device controller driver was specific to spear platforms. This
patch implements the usb device controller driver as a generic controller which
can be reused by other platforms using this peripheral.
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Acked-by: Marek Vasut <marex@denx.de>
Common code has a mdelay() func, so use that instead of the usb-specific
wait_ms() func. This also fixes the build errors:
ohci-hcd.c: In function 'submit_common_msg':
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1519:9: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1816:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1827:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1844:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1563:11: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1583:9: sorry, unimplemented: called from here
make[1]: *** [ohci-hcd.o] Error 1
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Marek Vasut <marex@denx.de>
musb_hcd.c: In function 'musb_submit_rh_msg':
musb_hcd.c:827:2: warning: format '%d' expects type 'int',
but argument 3 has type 'long unsigned int'
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
A few subsystems are using the same define "NAMESIZE". This has been
working so far because they define it to the same number. However, I
want to change the size of eth_device's NAMESIZE, so rather than tweak
the define names, simply drop references to it. Almost no one does,
and the handful that do can easily be changed to a sizeof().
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* 'master' of git://git.denx.de/u-boot-avr32:
atmel_mci.h: remove outdated register macros
doc/git-mailrc: add <me> to avr32 alias
ATMEL: remove old atmel_mci driver
ATMEL: use generic mmc framework
All boards are using the gen_atmel_mci driver now, so no need
to carry the old driver around.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
gen_atmel_mci works on AVR32 as well, so no need to use the legacy
mmc driver. This also has the nice side effect of being able to use
SDHC cards an those boards.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This provides a way of simulating GPIOs by setting values which are seen
by the normal gpio_get/set_value() calls.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The generalised calculation of the serial bit rate reg also applies
to sh7264, it was just the clock speed that was set incorrectly.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
EDMR_INIT_CNT holds the check count of initialization.
Since there were more same values (1000), this collected as TIMEOUT_CNT.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The only two drivers to write the status register do it in the same
way, so unify the implementations. This also makes the block unlock
logic the same.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The local sst enable/disable write funcs don't really add anything
over the common API, so just inline the common calls directly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Analysis of the flash drivers shows that they all use 0x20 if the erase
size is 4KiB, or 0xd8 if it's larger. So with this info in hand, we can
unify all the erase functionality in one place.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
I imagine much of these constants are due to copy & pasting previous
drivers rather than an actual reflection of the hardware layout. At
any rate, inline the info that we don't care about externally as it
shrinks things nicely.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Fixing build regressions for the Integrator I get find that a few
boards try to work around the missing declaration of
pciauto_config_init() by declaring it in the local scope. This
does not make sense when the sibling functions are in <pci.h>
so move the function to the header, ridding the build error
in the Integrator and getting rid of the local declarations
here and there.
Reported-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This moves keyboard polling logic from USB HCD drivers into USB
keyboard driver. Remove usb_event_poll() as keyboard polling was
the only user of this API. With this patch USB keyboard works with
EHCI controllers again. Tested on a tegra2 seaboard.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Fix the crash when running several times usb_init() with a USB ethernet
device plugged.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Wolfgang Grandegger <wg@denx.de>
Freescale IFC NAND Machine calculates ECC on 512byte sector and same is used in
fsl_ifc_run_command() during ECC status verification. Also this sector is passed
to is_blank() for blank checking. It is wrong at first place because
is_blank()'s implementation checks for Page size and OOB area size.
is_blank() should be called per page for main and OOB area verification.
Variables name are redefined to avoid confusion between buffer and ecc sector.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
1) OOB area should be updated irrespective of NAND page size. Earlier it was
updated only for 512byte NAND page.
2) During OOB update fbcr should be equal to OOB size.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
commit 2a8e0fc8b3 ("nand: Merge changes
from Linux nand driver") accidentally reverted commit
13f0fd94e3 ("NAND: Scan bad blocks
lazily.").
Reinstate the change, as amended by commit
ff49ea8977 ("NAND: Mark the BBT as scanned
prior to calling scan_bbt.").
Signed-off-by: Scott Wood <scottwood@freescale.com>
This reverts commit 4fee6c2f29.
It breaks boards that currently rely on soft-ecc, as pointed out here:
http://patchwork.ozlabs.org/patch/140872/
The reverted patch should be resubmitted with documentation, and with the
CONFIG_MTD_ECC_SOFT selected from every board that needs it. We could
start by looking at what NAND driver the board selects, and whether
that driver ever asks for soft ECC.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Boards may have things they want done before or after normal phy config.
Letting the boards call drv->config allows them more flexibilty.
Boards affected by this change are corenet_ds and mpc8544ds.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Add the gigabit phy KSZ9021.
Also, add function ksz9021_phy_extended_write
/_read for access to the phys extended registers.
The environment variable "disable_giga"
can be used to disable 1000baseTx.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Surround non PHYLIB routines miiphy_restart_aneg
and miiphy_wait_aneg with ifndef CONFIG_PHYLIB.
When later PHYLIB is required it is easy to delete
the non-PHYLIB code. This separation idea
came from Andy Fleming.
fec_miiphy_read, and fec_miiphy_write changed to
fec_phy_read, and fec_phy_write with argument changes.
Deprecated miiphy_register is no longer used. Both
old and new PHYLIB code now use mdio_register.
Cleanup some debug prints.
Inline function fec_miiphy_fec_to_eth is no longer necessary.
Moved to the single call location.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU
Introduce two new macros to control conditional setup
MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x)
MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x)
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
This reverts commits 2faa76196a as
this has introduced some large problems on all other platforms and have
more changes in them than the commit message implies.
Cc: Heiko Schocher <hs@denx.de>
Cc: Patil, Rachna <rachna@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
This reverts commit 498cbdfe62 as we need
to revert the i2c changes that add the support for the platform.
Cc: Heiko Schocher <hs@denx.de>
Cc: Patil, Rachna <rachna@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
* 'master' of git://git.denx.de/u-boot-mmc:
mmc: make mmc_send_status() more reliable
mmc: fix card busy polling
Tegra: mmc: Fixed handling of interrupts in timeouts.
omap_hsmmc: Wait for CMDI to be clear
Align the card status polling with the Linux kernel and retry the
command at least five times. Also some cards apparently mishandle the
status bits, so make sure to check the card state too.
Signed-off-by: Jan Kloetzke <jan.kloetzke@dspg.com>
Cc: Andy Fleming <afleming@gmail.com>
A MMC/SD card may always go into the programming state (and hence be
busy) after a block write. Therefore always check the card state, even
after single block writes. On the other hand there is no need to check
the card status after a read.
Also make sure that errors during busy polling are propagated upwards.
Signed-off-by: Jan Kloetzke <jan.kloetzke@dspg.com>
Cc: Andy Fleming <afleming@gmail.com>
We are seeing occasional timeouts in the Tegra mmc code when
we are reading from external MMC cards. These don't seem to be
detrimental if they are handled properly. This CL properly
clears the "normal interrupt status register" (norintsts) in
error conditions. If we don't do this, when we come back into
mmc_send_cmd() the register will still contain status from the
last transaction.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Before we can send a command we need both the DATI (command inhibit on
mmc_dat line) bit and CMDI (command inhibit on mmc_cmd line) are clear.
The previous behavior of only checking on DATI was insufficient on some
cards and incorrect behavior in any case. This makes the code check
for both bits being clear and makes the error print more clear as
to what happened. DATI_CMDDIS is removed as it was unused elsewhere
in the code and stood for 'DATI is set, cmds are disabled still'.
Fix originally spotted by Peter Bigot.
Tested-by: Peter A. Bigot <bigotp@acm.org>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Tom Rini <trini@ti.com>
Tested-by: Andreas Müller <schnitzeltony@googlemail.com>
* 'sf' of git://git.denx.de/u-boot-blackfin:
README: Add description of SPI Flash (SF) command configuration
sf command: allow default bus and chip selects
sf: eeprom_m95xxx: set a sane default timeout
sf: eeprom_m95xxx: fix up style
* 'master' of git://git.denx.de/u-boot-blackfin:
Blackfin: pata_bfin: fix printf warning
Blackfin: bfin_nand: mark local func static
linkage.h: move from blackfin to common includes
Blackfin: br4: new board port
Blackfin: add in/out le32 variants
post: add blackfin to the post_time_ms list
Blackfin: bf537-stamp: drop board reset workaround
Blackfin: pr1: new board port
Every board currently defines this to the same value, so just default
to that to avoid having to make everyone do the same thing.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
pata_bfin.c: In function 'bfin_ata_identify':
pata_bfin.c:887:2: warning: format '%x' expects type 'unsigned int',
but argument 2 has type 'lbaint_t'
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Clean up added ehci-omap.c and make it generic for re-use across
omap-soc having same ehci ip block. Also pass the modes to be configured
from board file and configure the ports accordingly. All usb layers
are not cache aligned, till then keep cache off for usb ops as ehci will use
internally dma for all usb ops.
* Add a generic common header ehci-omap.h having common ip block
data and reg shifts.
* Rename and modify ehci-omap3 to ehci.h retain only conflicting
sysc reg shifts remove others and move to common header file.
* pass the board data for beagle/panda accordinly to use
ehci ports.
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Based on discussion from this thread [1].
Adding omap-view port that helps us in using the generic ulpi
framework for any ulpi phy ops using the INSNREG05_ULPI viewport
reg available on omap platform.
Currently ehci ports are available on omap3/4 platforms so enable the same
for beagle and panda, patch is tested on the same boards.
Thanks to Igor Grinberg <grinberg@compulab.co.il> for reviewing the
omap-ehci patches and suggesting this approach.
[1]: http://www.mail-archive.com/u-boot@lists.denx.de/msg76076.html
Tested-by: Stefano Babic <sbabic@denx.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Extend the existing ulpi viewport framework
to pass the port number information for any ulpi
ops. Fix the usage of ulpi api's accordingly.
Tested-by: Stefano Babic <sbabic@denx.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Problem appears to have been present since day one but masked because alignment
aborts were not enabled. ca4b55800e "arm, arm926ejs: always do cpu critical
inits" turned on alignment aborts and uncovered this latent problem.
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-By: Jason Cooper <u-boot@lakedaemon.net>
Tested-By: Holger Brunck <holger.brunck@keymile.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
The generic spi flash driver (drivers/mtd/spi/spi_flash.c) uses the
spi low level driver's spi_xfer() function with len=0 to deassert the
SPI flash' chip select. But the i.MX28 spi driver rejects this call
due to len=0.
This patch implements an exception for len=0 with the SPI_XFER_END
flag set. This results in an extra read with the chip select being
deasserted afterwards. There seems to be no way to deassert the signal
by hand.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
This patch modifies mxcmmc.c to be used
not only by i.MX27 but also by i.MX31 boards.
Both use the same SD controller, but have different
clock set-ups.
The i.MX27 imx_get_XXXclock functions are made static to
generic.c and a public mxc_get_clock() function
is provided. Pins, base address and prototypes for
an i.MX31 specific board_init_mmc() are provided.
Some of the i.MX27 clock getters are unused and marked
as such to avoid warnings (./MAKEALL -s mx27), but
the code was left in for future use.
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Stefano Babic <sbabic@denx.de>
When the data cache is enabled we must flush on write and invalidate
on read. We also check that buffers are aligned to data cache lines
boundaries. With recent work in U-Boot this should generally be the case
but the warnings will catch problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
* 'master' of git://git.denx.de/u-boot-nand-flash:
nand/fsl_elbc: Convert to self-init
nand: Introduce CONFIG_SYS_NAND_SELF_INIT
nand_spl: store ecc data on the stack
mtd/nand: Add ONFI support for FSL NAND controller
nand: make 1-bit software ECC configurable
nand: Sanitize ONFI strings.
nand: Merge changes to BBT from Linux nand driver
nand: Merge changes from Linux nand driver
nand: cleanup whitespace
nand: Add more NAND types from Linux nand driver
nand: Merge BCH code from Linux nand driver
NAND: Remove additional (CONFIG_SYS)_NAND_MAX_CHIPS
NAND: remove NAND_MAX_CHIPS definitions
nand_spl_simple: store ecc data on the stack
The current implementation of cfi_flash uses udelay to reset watchdog.
If several blocks are blank (0xff filled) the watchdog timed out.
The reason is, udelay is never called, if flash device is ready to fast.
e.g.
mw.w $(copy_addr) FFFF 10000;cp.b $(copy_addr) 10880000 20000
-> watchdog timed out
mw.w $(copy_addr) 0000 10000;cp.b $(copy_addr) 10880000 20000
-> watchdog not timed out
This patch adds an extra watchdog reset in front of flash ready check.
Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This driver doesn't yet make use of the added flexibility (not that that
should stop anyone from converting...), but it will with the in-progress
hack to support 4k-page NAND.
Signed-off-by: Scott Wood <scottwood@freescale.com>
This allows a driver to run code between nand_scan_ident() and
nand_scan_tail(), among other things. See the additions to
doc/README.nand for details.
To allow a gradual transition, Boards that don't set
CONFIG_SYS_NAND_SELF_INIT will still be initialized the old way, but
new drivers should not require this, and existing drivers should be
converted when convenient.
Signed-off-by: Scott Wood <scottwood@freescale.com>
- fix NAND_CMD_READID command for ONFI detect.
- add NAND_CMD_PARAM command to read the ONFI parameter page.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
The software ECC algorithm is not necessary when hardware ECC
is available and can be left out for a smaller image size.
Enable with CONFIG_MTD_ECC_SOFT.
Signed-off-by: Christian Hitz <christian.hitz@aizo.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
[backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe]
This is part of the synchronization with the nand driver to the
Linux 3.0 state.
Signed-off-by: Christian Hitz <christian.hitz@aizo.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
[backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe]
This patch synchronizes the nand driver with the Linux 3.0 state.
Signed-off-by: Christian Hitz <christian.hitz@aizo.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
[backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe]
This patch synchronizes the nand driver with the Linux 3.0 state.
Signed-off-by: Christian Hitz <christian.hitz@aizo.com>
Cc: Scott Wood <scottwood@freescale.com>
[scottwood@freescale.com: minor fixes]
Signed-off-by: Scott Wood <scottwood@freescale.com>
Bring up to date with corresponding file from linux.
Signed-off-by: Christian Hitz <christian.hitz@aizo.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
[backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe]
This patch merges the additional NAND flash types from the 3.0 Linux
kernel.
Signed-off-by: Christian Hitz <christian.hitz@aizo.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
[backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe]
This patch merges the BCH ECC algorithm from the 3.0 Linux kernel.
This enables U-Boot to support modern NAND flash chips that
require more than 1-bit of ECC in software.
Signed-off-by: Christian Hitz <christian.hitz@aizo.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Currently nand_spl_simple puts it's temp data at 0x10000 offset in SDRAM
which is likely to contain already loaded data.
The patch saves the oob data and the ecc on the stack replacing
the fixed address in RAM.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Ilya Yanok <yanok@emcraft.com>
CC: Scott Wood <scottwood@freescale.com>
CC: Tom Rini <tom.rini@gmail.com>
CC: Simon Schwarz <simonschwarzcor@googlemail.com>
CC: Wolfgang Denk <wd@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Existing OMAP I2C driver does not support address
length greater than one. Hence this patch is to
add support for 2 byte address read/write.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Patil, Rachna <rachna@ti.com>
At old overo boards TWL4030 RTC irq is connected to gpio112. Unfortunately
this pin is also used for revision detection. Therefore we need to send
shut-up to TWL4030 to avoid reading wrong revision. In SPL this must
be done before SDRAM is set up because the type of SDRAM is revision dependent.
By this patch it is ensured that all variables used by omap24xx_i2c.c are
located in SRAM.
Signed-off-by: Andreas Müller <schnitzeltony@gmx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Add multi-FEC support for imx_get_mac_from_fuse by passing dev_id as a parameter.
This feature is important on mx28 SoC for example that has two FEC ports.
Cc: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
* 'master' of git://git.denx.de/u-boot-mpc83xx:
mpc8313erdb: fix mtdparts address
powerpc/83xx/km: add support for 8321 based tuge1 board
powerpc/83xx/km: merge tuxa and tuda1 boards to tuxx1
powerpc/83xx/km: remove obsolete defines for tuda1
powerpc/83xx/km: update SDRAM parameters for km8321 boards
mpc8313erdb: Enable GPIO support on the MPC8313E RDB
mpc83xx: Add a GPIO driver for the MPC83XX family
gpio: Replace ARM gpio.h with the common API in include/asm-generic
gpio: Modify common gpio.h to more closely match Linux
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
ARM boards should use the generic GPIO API
This means changing gpio to unsigned type
Remove the unused gpio_toggle() function which is not part of the API
Comment that free should not modify pin state
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
fixed merge conflict in da8xx_gpio.c, tegra2_gpio.c, and
extended to the new mxs_gpio.c.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
The pointer to the registers used to control the Freescale ESDHC MMC
controller is not initialized correctly when using PIO mode. This is
fixed by initializing the pointer in the same way as all other sites
within the driver.
Examining the commit history shows that this was broken at introduction
due to a code change in upstream U-Boot to support the mx51 processor
family.
Reported-by: Jim Lentz <JLentz@zhone.com>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
On Tegra2, card-detection is implemented by passing the card-detection
GPIOs to the MMC driver at initialization time. Instead of implementing
the board_mmc_getcd() function, use the card-detect hook and allow
boards to override it by providing their own board_mmc_getcd()
implementation.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
This card-detect hook probably doesn't work. Perhaps somebody with more
knowledge about the hardware can comment on this. I think that perhaps
even the complete code from esdhc_init() could go into the getcd()
function instead or mmc_getcd() needs to be called at some later time
after mmc_init(), which, however, would require many other drivers to
change.
In addition to implementing the hook, this patch also removes the call
to the board_mmc_getcd() function which is now called from the MMC
framework and is no longer required here.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Tested-by: Jason Liu <jason.hui@linaro.org>
Check for card detect each time an MMC/SD device is initialized. If card
detection is not implemented, this code behaves as before and continues
assuming a card is present. If no card is detected, has_init is reset
for the MMC/SD device (to force initialization next time) and an error
is returned.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Tested-by: Jason Liu <jason.hui@linaro.org>
The new API no longer uses the extra cd parameter that was used to store
the card presence state. Instead, this information is returned via the
function's return value. board_mmc_getcd() returns -1 to indicate that
no card-detection mechanism is implemented; 0 indicates that no card is
present and 1 is returned if it was detected that a card is present.
The rationale for this change can be found in the following email
thread:
http://lists.denx.de/pipermail/u-boot/2011-November/110180.html
In summary, the old API was not consistent with the rest of the MMC API
which always passes a struct mmc as the first parameter. Furthermore the
cd parameter was used to mean "card absence" in some implementations and
"card presence" in others.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Tested-by: Jason Liu <jason.hui@linaro.org>
Fix:
mv_sdhci.c: In function 'mv_sdh_init':
mv_sdhci.c:47:22: warning: the comparison will always
evaluate as 'true' for the address of 'mv_sdhci_writeb'
will never be NULL [-Waddress]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Lei Wen <leiwen@marvell.com>
Cc: Andy Fleming <afleming@freescale.com>
Acked-by: Lei Wen <leiwen@marvell.com>
This patch improve the performance by spliting flag examination code
in ftsdc010_send_cmd() into 3 functions.
This patch also reordered the function which made better capability to
some high performance cards against to the next version of ftsdc010
hardware.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Add a host capability checking to avoid the mmc stack
switch the card to HIGHSPEED mode when the card supports
HIGHSPEED while the host doesn't.
This patch avoid furthur transaction problem when the
mmc/sd card runs different mode to the host.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
The mmc host controller on the i.mx6q is called usdhc which
is redesigned based on the freescale esdhc controller.
The usdhc controller is almost compatible with esdhc except
it adds one mix register to support debug/SD3.0 and move
the low bit 0-6 of XFERTYP register to the mix control reg
low bit 0-6. Thus on i.mx6q, we have the following compared
with the previous soc: (can refer to RM of chapter 56.3.3)
i.mx6q:
mix control:
bit 31 - bit 7: Added for debug/SD3.0 support
bit 6 - bit 0: move in the XFERTYP register bit 6-0 on previous soc
XFERTYP register:
bit 31 - bit 7: the same as before,
bit 6 - bit 0: no-use
previous soc
mix control: no
XFERTYP register:
bit 31 - bit 0: xfertype information
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
This adds ethernet driver for Calxeda xgmac found on Highbank SOC.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Fix: WARNING: __aligned(size) is preferred over
__attribute__((aligned(size)))
Signed-off-by: Wolfgang Denk <wd@denx.de>
* 'master' of git://git.denx.de/u-boot-arm:
tegra2: Optimize out-of-tree build for Ventana.
tegra: Move boards over to use arch-level board UART function
tegra: Add support for UART init in cpu board.c
tegra: Add a function mux feature
tegra: add clock_ll_start_uart() to enable UART prior to reloc
tegra: Move clock_early_init() to arch_cpu_init()
tegra: Move cpu_init_cp15() to arch_cpu_init()
arm: Tegra: Fix Harmony and Ventana builds in u-boot-tegra/master
tegra: Fix build error in plutux, medcom
tegra2: Add Avionic Design Medcom support.
tegra2: Add Avionic Design Plutux support.
tegra2: Add common Avionic Design Tamonten support.
tegra2: Move tegra2_mmc_init() prototype to public header.
tegra2: Change CONFIG_SYS_TEXT_BASE to 0x00108000.
tegra2: Always build with USE_PRIVATE_LIBGCC=yes.
tegra2: Plumb in SPI/UART switch code
tegra2: spi: Support SPI / UART switch
tegra2: Implement SPI / UART GPIO switch
tegra2: Enable SPI environment on Seaboard
tegra2: config: Enable SPI flash on Seaboard
tegra2: spi: Add SPI driver for Tegra2 SOC
tegra2: Add UARTB support
tegra2: Tidy UART selection
arm, davinci: Fix build warnings for cam_enc_4xx
Devkit8000: Switch over to enable_gpmc_cs_config
arm, davinci: Add support for generating AIS images to the Makefile
mkimage: Fix variable length header support
arm, da850evm: Add an SPL for SPI boot
arm, davinci: Add SPL support for DA850 SoCs
sf: Add spi_boot() to allow booting from SPI flash in an SPL
spl: display_options.o is required for SPI flash support in SPL
ARM: omap3: add support to Technexion twister board
ARM: omap3: added common configuration for Technexion TAM3517
vision2: Fix checkpatch warning
CONFIG_SYS_FPGA_PROG_FEEDBACK was already introduced to print
the current status of FPGA loading - an undef in the code made this
CONFIG_ useless.
Signed-off-by: Stefano Babic <sbabic@denx.de>
tegra2_mmc_init() is implemented by the Tegra2 MMC driver. Since most of
the Tegra2-based boards will need to call it, this commit exports it in
the new public asm/arch/mmc.h header file to prevent each board from
providing its own prototype.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add the SPI / UART switch logic into the Tegra2 SPI driver so that it
can co-exist with the NS16550 UART.
We need the ns16550.h header for NS16550_t for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
* 'next' of ../next:
mkenvimage: Add version info switch (-V)
mkenvimage: Fix getopt() error handling
mkenvimage: Fix some typos
phy: add Micrel KS8721BL phy definition
net: introduce per device index
mvgbe: remove setting of ethaddr within the driver
x86: Add support for specifying an initrd with the zboot command
x86: Refactor the zboot innards so they can be reused with a vboot image
x86: Add infrastructure to extract an e820 table from the coreboot tables
x86: Add support for booting Linux using the 32 bit boot protocol
x86: Clean up the x86 zimage code in preparation to extend it
x86: Import code from coreboot's libpayload to parse the coreboot table
x86: Initial commit for running as a coreboot payload
CHECKPATCH: ./board/esd/hh405/logo_320_240_8bpp.c
CHECKPATCH: ./board/esd/hh405/logo_1024_768_8bpp.c
CHECKPATCH: ./board/esd/hh405/logo_320_240_4bpp.c
CHECKPATCH: ./board/esd/hh405/logo_640_480_24bpp.c
CHECKPATCH: ./board/esd/apc405/logo_640_480_24bpp.c
CHECKPATCH: ./board/esd/voh405/logo_320_240_4bpp.c
CHECKPATCH: ./board/esd/voh405/logo_640_480_24bpp.c
CHECKPATCH: ./board/esd/hh405/fpgadata.c
CHECKPATCH: ./board/esd/pci405/fpgadata.c
CHECKPATCH: ./board/esd/tasreg/fpgadata.c
CHECKPATCH: ./board/esd/apc405/fpgadata.c
CHECKPATCH: ./board/esd/voh405/fpgadata.c
CHECKPATCH: ./board/esd/ash405/fpgadata.c
CHECKPATCH: ./board/esd/dasa_sim/fpgadata.c
CHECKPATCH: ./board/esd/ar405/fpgadata_xl30.c
CHECKPATCH: ./board/esd/ar405/fpgadata.c
CHECKPATCH: ./board/esd/plu405/fpgadata.c
CHECKPATCH: ./board/esd/wuh405/fpgadata.c
CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci405.c
CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci405ab.c
CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci4052.c
CHECKPATCH: ./board/esd/canbt/fpgadata.c
CHECKPATCH: ./board/esd/du405/fpgadata.c
CHECKPATCH: ./board/esd/cpciiser4/fpgadata.c
CHECKPATCH: ./board/dave/PPChameleonEVB/fpgadata.c
avr32:mmu.c: fix printf() length modifier
fat.c: fix printf() length modifier
cmd_sf.c: fix printf() length modifier
Make printf and vprintf safe from buffer overruns
vsprintf: Move function documentation into header file
Add safe vsnprintf and snprintf library functions
Move vsprintf functions into their own header
Conflicts:
tools/mkenvimage.c
Signed-off-by: Wolfgang Denk <wd@denx.de>
This adds support for the Micrel KS8721BL/SL PHY.
The definition is taken from the correspondent datasheet.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Fix:
In file included from s3c_udc_otg.c:216:0:
s3c_udc_otg_xfer_dma.c: In function 'complete_tx':
s3c_udc_otg_xfer_dma.c:280:33: warning: variable 'is_short' set but not used
s3c_udc_otg_xfer_dma.c:280:6: warning: variable 'ep_tsr' set but not used
s3c_udc_otg_xfer_dma.c: In function 's3c_udc_irq':
s3c_udc_otg_xfer_dma.c:469:16: warning: variable 'flags' set but not used
s3c_udc_otg_xfer_dma.c:468:18: warning: variable 'gintmsk' set but not used
s3c_udc_otg_xfer_dma.c: In function 's3c_queue':
s3c_udc_otg_xfer_dma.c:582:14: warning: variable 'gintsts' set but not used
s3c_udc_otg_xfer_dma.c:581:16: warning: variable 'flags' set but not used
s3c_udc_otg_xfer_dma.c: In function 's3c_ep0_read':
s3c_udc_otg_xfer_dma.c:778:6: warning: variable 'ret' set but not used
s3c_udc_otg_xfer_dma.c: In function 's3c_udc_set_halt':
s3c_udc_otg_xfer_dma.c:1020:16: warning: variable 'flags' set but not used
s3c_udc_otg_xfer_dma.c: In function 's3c_ep0_setup':
s3c_udc_otg_xfer_dma.c:1258:13: warning: initialization from incompatible
pointer type [enabled by default]
s3c_udc_otg_xfer_dma.c:1239:16: warning: variable 'is_in' set but not used
s3c_udc_otg_xfer_dma.c:1239:9: warning: variable 'bytes' set but not used
s3c_udc_otg.c: In function 'usb_gadget_register_driver':
s3c_udc_otg.c:292:16: warning: variable 'flags' set but not used
s3c_udc_otg.c: In function 'usb_gadget_unregister_driver':
s3c_udc_otg.c:338:16: warning: variable 'flags' set but not used
s3c_udc_otg.c: In function 's3c_ep_enable':
s3c_udc_otg.c:582:16: warning: variable 'flags' set but not used
s3c_udc_otg.c: In function 's3c_ep_disable':
s3c_udc_otg.c:646:16: warning: variable 'flags' set but not used
s3c_udc_otg.c: In function 's3c_dequeue':
s3c_udc_otg.c:704:16: warning: variable 'flags' set but not used
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Remy Bohmer <linux@bohmer.net>
Fix:
e1000_spi.c: In function 'spi_free_slave':
e1000_spi.c:115: warning: unused variable 'hw'
e1000_spi.c: In function 'do_e1000_spi':
e1000_spi.c:472: warning: 'checksum' may be used uninitialized in this function
e1000_spi.c:472: note: 'checksum' was declared here
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Acked-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
A network driver should not touch the environment at all. This patch fixes
this behaviour by removing the code for setting a default/randomized MAC
address.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Cc: Eric Cooper <ecc@cmu.edu>
Cc: Jason Cooper <u-boot@lakedaemon.net>
Cc: Siddarth Gore <gores@marvell.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Simon Guinot <simon.guinot@sequanux.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
GPIO configuration shall never be done inside a driver, never.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Fix trailing white space, indentation by spaces instead of TABs,
excessive blank lines, trailing blank lines.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit bdbcdc89 "pxa: convert pxa27x_udc to use read and write
functions" added a number of C++ comments. Fix these.
Signed-off-by: Wolfgang Denk <wd@denx.de>
In 9792987721 Stefan describes a usecase
where the previous behavior of leaving wMaxPacketSize be unaligned
caused fatal problems. The initial fix for this problem was incomplete
however as it showed another cases of non-aligned access that previously
worked implicitly. This switches to making sure that all access of
wMaxPacketSize are done via (get|put)_unaligned.
In order to maintain a level of readability to the code in some cases
we now use a variable for the value of wMaxPacketSize and in others, a
macro.
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Remy Bohmer <linux@bohmer.net>
OpenRISC:
Tested-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Beagleboard xM, Pandaboard run-tested, s5p_goni build-tested.
Signed-off-by: Tom Rini <trini@ti.com>
Clean a mixup between u32 and int as a return type
for functions returning error values.
Use int as it is native (and widely used) return type.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Simon Glass <sjg@chromium.org>
There is no benefit in using u8, so switch to unsigned to reduce the
binary image size (by 20 bytes).
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Simon Glass <sjg@chromium.org>
Add partial ULPI specification implementation that should be enough to
interface the ULPI PHYs in the boot loader context.
Add a viewport implementation for Chipidea/ARC based controllers.
Signed-off-by: Jana Rapava <fermata7@gmail.com>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Simon Glass <sjg@chromium.org>
This patch allows USB to work on some hosts, which need additional frobing after
the host was powered up via regular USB powerup sequence.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Jason Liu <r64343@freescale.com>
This is useful for USB Transceivers init etc.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Jason Liu <r64343@freescale.com>
It's derived from ehci-mxc and uses the header files of the
ehci-fsl interface. The callback board_ehci_hcd_init() has
been introduced to allow for board-specific setup when USB
is started.
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
CC: Stefano Babic <sbabic@denx.de>
CC: Remy Bohmer <linux@bohmer.net>
This commit provides UDC driver support for Samsung's SoC
family of processors.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Remy Bohmer <linux@bohmer.net>
According to EHCI specification v1.0, the controller should stabilize
the power on a port at most 20 ms after the port power bit transition.
So, we put this setting in the virtual descriptor corresponding field,
(bPwrOn2PwrGood = 10 => 10 x 2ms = 20ms), this saves about 500ms at each
controller initialization/enumeration.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
On some usb device controllers (pxa) the endpoint configuration must be programmed prior to enable it.
Signed-off-by: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Remy Bohmer <linux@bohmer.net>
Fix:
at91_emac.c: In function 'at91emac_phy_init':
at91_emac.c:244:20: warning: variable 'duplex' set but not used
[-Wunused-but-set-variable]
at91_emac.c:244:13: warning: variable 'speed' set but not used
[-Wunused-but-set-variable]
Use new debug_cond() to fix these warnings. In the result, anumber of
inconsistent printf() formats are detected:
at91_emac.c: In function 'at91emac_read':
at91_emac.c:147:2: warning: format '%x' expects argument of type
'unsigned int', but argument 2 has type 'struct at91_emac_t *'
[-Wformat]
at91_emac.c: In function 'at91emac_write':
at91_emac.c:157:2: warning: format '%x' expects argument of type
'unsigned int', but argument 2 has type 'struct at91_emac_t *'
[-Wformat]
at91_emac.c:157:2: warning: format '%x' expects argument of type
'unsigned int', but argument 4 has type 'short unsigned int *'
[-Wformat]
at91_emac.c: In function 'at91emac_recv':
at91_emac.c:451:3: warning: format '%d' expects argument of type
'int', but argument 2 has type 'long unsigned int' [-Wformat]
at91_emac.c:451:3: warning: format '%x' expects argument of type
'unsigned int', but argument 4 has type 'long unsigned int' [-Wformat]
Fix these, too.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Jens Scharsig <js_at_ng@scharsoft.de>
Cc: Andreas Bießmann <andreas.devel@gmail.com>
Cc: Reinhard Meyer <u-boot@emk-elektronik.de>
Fix:
ne2000_base.c: In function 'dp83902a_send':
ne2000_base.c:282:7: warning: variable 'tmp' set but not used
[-Wunused-but-set-variable]
ne2000_base.c: In function 'dp83902a_RxEvent':
ne2000_base.c:376:5: warning: variable 'rsr' set but not used
[-Wunused-but-set-variable]
ne2000_base.c: In function 'dp83902a_TxEvent':
ne2000_base.c:513:5: warning: variable 'tsr' set but not used
[-Wunused-but-set-variable]
ne2000_base.c: In function 'dp83902a_ClearCounters':
ne2000_base.c:550:17: warning: variable 'cnt3' set but not used
[-Wunused-but-set-variable]
ne2000_base.c:550:11: warning: variable 'cnt2' set but not used
[-Wunused-but-set-variable]
ne2000_base.c:550:5: warning: variable 'cnt1' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Wolfgang Denk <wd@denx.de>
* 'master' of git://git.denx.de/u-boot-arm:
M28: Cleanup memsize.o OOT build
i.MX28: Move SPL to arch/arm/cpu/arm926ejs/mx28
M28: Fix typo
M28: Document that units has to be set to sectors on SD bootcard
i.mx: i.mx6q: add the initial support for i.mx6q ARM2 board
i.mx: mxc_gpio: add the i.mx6q support
i.mx: add the initial support for freescale i.MX6Q processor
i.mx: introduce the armv7/imx-common folder
S5PC2XX: Rename S5pc2XX to exynos
tegra2: Don't use board pointer before it is set up
tegra2: Remove unneeded 'dynamic ram size' message
tegra2: Remove unused low-level Tegra2 UART code
tegra2: Remove unneeded config option
tegra2: Remove unneeded boot code
tegra2: Enable instruction cache
arm: Move CP15 init out of cpu_init_crit()
tegra2: Simplify tegra_start() boot path
tegra2: Add arch_cpu_init() to fire up Cortex-A9
tegra2: Use new GPIO APIs in gpio_config_uart()
tegra2: Add support for Ventana
tegra2: Modify MMC driver to handle power and cd GPIOs
tegra2: Move board_mmc_init into board files
This was used by the AVP in early boot but is no longer used. Unless we
plan to enable it somehow it is not needed. In any case we should try
to use the ns16550 driver instead as it has the same code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
... rather than open-coding the register accesses.
However, gpio_request() typically stores the "label" parameter in a global
data structure. This causes problems when called from gpio_config_uart(),
since the code is running before relocation. To solve this, pass a NULL
string to gpio_request(), and modify gpio_request() not to touch the string
if it's NULL.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Pass the GPIO numbers for power and card detect to tegra2_mmc_init(), and
modify that function to perform all required GPIO initialization. This
removes the need for board files to perform these operations.
Move board_mmc_getcd() into tegra2_mmc.c now that the driver knows which
GPIOs to use.
Update affected call-sites in seaboard.c and harmony.c. Note that this
change should make all SD ports work on Harmony, since the required GPIO
setup is now being performed.
v4: Fix prototype of tegra2_mmc_init() in board.h to match driver change.
Remove prototype of gpio_config_mmc() from board.h
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Cc: Andy Fleming <afleming@gmail.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
MMC interfaces are specified to be 3.3V compatible with an operating
voltage range of 3.1V to 3.5V for SD cards. This change affects
hardware using TWL4030 (TPS6595x) PMICs and should improve the
reliability when communicating with marginally-spec'd MMC devices.
3.15V is the highest possible level for this chip. This patch
has been tested on a Gumstix Overo board.
Signed-off-by: Ash Charles <ash@gumstix.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
Fix:
da8xx_gpio.c: In function 'gpio_toggle_value':
da8xx_gpio.c:208:23: warning: variable 'bank' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Fix:
ep0.c: In function 'ep0_get_descriptor':
ep0.c:187:8: warning: variable 'cp' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Acked-by: Remy Bohmer <linux@bohmer.net>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Fix:
core.c: In function 'usbd_device_event_irq':
core.c:596:21: warning: variable 'state' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Acked-by: Remy Bohmer <linux@bohmer.net>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Fix:
musb_udc.c: In function 'musb_peri_softconnect':
musb_udc.c:166:14: warning: variable 'intrtx' set but not used
[-Wunused-but-set-variable]
musb_udc.c:166:6: warning: variable 'intrrx' set but not used
[-Wunused-but-set-variable]
musb_udc.c:165:5: warning: variable 'intrusb' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Acked-by: Remy Bohmer <linux@bohmer.net>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Fix:
ehci-mxc.c: In function 'ehci_hcd_init':
ehci-mxc.c:113:6: warning: variable 'tmp' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This fixes the build of the two sh boards shmin and r7780mp and qemu-mips
which currently fail to build due to dropped pre-CONFIG_NET_MULTI code.
This v2 patch minimizes the number of lines in the diff for easy review
and to eliminate any possible accidential changes resulting from moving
lines of code in the file. This also makes the register function very easy.
Any cleanups and improvements are intentionally deferred to follow-up patches
to keep this patch as simple and as easy to review as possible.
A new driver register function, ne2k_register() calls the existing
one-time setup part of the old init function and calls eth_register().
Changes to shmin, r7780mp and qemu-mips:
- Call the new ne2k_register() from board_eth_init() of the boards.
- Tested using qemu-mips board,
- Tested the two renesas / sh boards r7780mp and shmin to compile again,
and should work.
checkpatch-clean when "--ignore VOLATILE" is added to .checkpatch.conf,
and no warnings introduced in none of the three boards using this driver.
Signed-off-by: Bernhard Kaindl <bernhard.kaindl@gmx.net>
Fix:
inca-ip_sw.c: In function 'inca_switch_init':
inca-ip_sw.c:210:6: warning: variable 'v' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Wolfgang Denk <wd@denx.de>
Fix:
nand_spl_load.c: In function 'nand_boot':
nand_spl_load.c:31:6: warning: variable 'ret' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Fix warnings for both cases:
definded CONFIG_SYS_NAND_HW_ECC_OOBFIRST:
nand_spl_simple.c: In function 'nand_read_page':
nand_spl_simple.c:156:6: warning: variable 'stat' set but not used
[-Wunused-but-set-variable]
not definded CONFIG_SYS_NAND_HW_ECC_OOBFIRST:
nand_spl_simple.c: In function 'nand_read_page':
nand_spl_simple.c:196:6: warning: variable 'stat' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Fix:
cfb_console.c:371: warning: 'cursor_state' defined but not used
cfb_console.c:372: warning: 'old_col' defined but not used
cfb_console.c:373: warning: 'old_row' defined but not used
cfb_console.c:435: warning: 'video_invertchar' defined but not used
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Wolfgang Denk <wd@denx.de>
* 'master' of git://git.denx.de/u-boot-arm:
davinci: Remove unwanted memsize.c from hawkboard's nand spl build
devkit8000: Move CONFIG_SYS_TEXT_BASE out of bss
da850evm: pass board revision info to kernel
arch/arm/include/asm/arch-omap5/clocks.h: Fix GCC 4.2 warnings
arch/arm/cpu/armv7/omap-common/clocks-common.c: Fix GCC 4.6 warnings
arch/arm/cpu/armv7/omap-common/spl.c: Fix GCC 4.2 warnings
MX35: flea3: changes due to hardware revision B
MX: serial_mxc: cleanup removing nasty #ifdef
M28: Fix OB1 bug in GPIO driver
MXS: Add static annotations to dma driver
apbh_dma: return error value on timeout
Efika: Configure additional regulators for HDMI output
mx5: Correct a warning in clock.c
MC13892: Add REGMODE0 bits definitions
mx51evk: Configure the pins as GPIOs prior to using gpio_get_value
mx53smd: Configure the pins as GPIOs prior to using gpio_get_value
mx53evk: Configure the pins as GPIOs prior to using gpio_get_value
mx53ard: Configure the pins as GPIOs prior to using gpio_get_value
mx53loco: Configure the pins as GPIOs prior to using gpio_get_value
OMAP3: Add SPL_BOARD_INIT hook
AM3517 CraneBoard: Add SPL support
AM3517: Add SPL support
OMAP3: Add SPL support to omap3_evm
OMAP3: Add SPL support to Beagleboard
OMAP3 SPL: Add identify_nand_chip function
OMAP3 SPL: Rework memory initalization and devkit8000 support
OMAP3: Suffix all Micron memory timing parts with their speed
OMAP3: Add optimal SDRC autorefresh control values
omap3: mem: Add MCFG helper macro
OMAP3: Remove get_mem_type prototype
OMAP3: Change mem_ok to clear again after reading back
OMAP3: Add a helper function to set timings in SDRC
OMAP3: Update SDRC dram_init to always call make_cs1_contiguous()
omap3: mem: Comment enable_gpmc_cs_config more
ARM: davici_emac: Fix condition for number of phy detects
arm: printf() is not available in some SPL configurations
arm, davinci: add support for am1808 based enbw_cmc board
arm, davinci: move misc function in arch tree
arm, board/davinci/common/misc.c: Codingstyle cleanup
arm, davinci, da850: add uart1 tx rx pinmux config
arm, davinci: move davinci_rtc struct to hardware.h
arm, davinci: Remove duplication of pinmux configuration code
arm, hawkboard: Use the pinmux configurations defined in the arch tree
arm, da850evm: Use the pinmux configurations defined in the arch tree
arm, da850: Add pinmux configurations to the arch tree
arm, da850evm: Do pinmux configuration for EMAC together with other pinmuxes
arm, hawkboard: Remove obsolete struct pinmux_config i2c_pins
arm, davinci: Move pinmux functions from board to arch tree
arm, arm926ejs: always do cpu critical inits
omap_gpmc: use SOFTECC in SPL if it's enabled
nand_spl_simple: add support for software ECC
AM3517: move AM3517 specific mux defines to generic header
AM35xx: add EMAC support
davinci_emac: hardcode 100Mbps for AM35xx and RMII
davinci_emac: fix for running with dcache enabled
arm926ejs: add noop implementation for dcache ops
davinci_emac: conditionally compile specific PHY support
davinci_emac: use internal addresses in buffer descriptors
davinci_emac: move arch-independent defines to separate header
BeagleBoard: config: Really switch to ttyO2
ARM: davinci_dm6467Tevm: Fix build breakage
ARM: OMAP: Remove STACKSIZE for IRQ and FIQ if unused
ARM: OMAP3: Remove unused define SDRC_R_C_B
ARM: OMAP3: Remove unused define CONFIG_OMAP3430
omap4: fix IO setting
omap4+: streamline CONFIG_SYS_TEXT_BASE and other SDRAM addresses
omap4460: add ES1.1 identification
omap4: emif: fix error in driver
omap: remove I2C from SPL
omap4460: fix TPS initialization
omap: fix cache line size for omap3/omap4 boards
omap4: ttyO2 instead of ttyS2 in default bootargs
omap: Improve PLL parameter calculation tool
start.S: remove omap3 specific code from start.S
armv7: setup vector
armv7: include armv7/cpu.c in SPL build
armv7: disable L2 cache in cleanup_before_linux()
arm, arm926ejs: Fix clear bss loop for zero length bss
PXA: Move colibri_pxa270 to board/toradex/
PXA: Flip colibri_pxa27x to pxa-common.h
PXA: Introduce common configuration header for PXA
PXA: Rename pxa_dram_init to pxa2xx_dram_init
PXA: Squash extern pxa_dram_init()
PXA: Export cpu_is_ and pxa_dram_init functions
PXA: Cleanup Colibri PXA270
PXA: Replace timer driver
PXA: Add cpuinfo display for PXA2xx
PXA: Separate PXA2xx CPU init
PXA: Rename CONFIG_PXA2[57]X to CONFIG_CPU_PXA2[57]X
PXA: Unify vpac270 environment size
PXA: Enable command line editing for vpac270
PXA: Adapt Voipac PXA270 to OneNAND SPL
PXA: Drop Voipac PXA270 OneNAND IPL
PXA: Fixup PXA25x boards after start.S update
PXA: Re-add the Dcache locking as RAM for pxa250
PXA: Rework start.S to be closer to other ARMs
PXA: Drop XM250 board
PXA: Drop PLEB2 board
PXA: Drop CRADLE board
PXA: Drop CERF250 board
Fix regression in SMDK6400
nand: Add common functions to linux/mtd/nand.h
Ethernut 5 board support
net: Armada100: Fix compilation warnings
ARM: remove duplicated code for LaCie boards
ARM: add support for LaCie 2Big Network v2
mvsata: fix ide_preinit for missing disks
netspace_v2: Read Ethernet MAC address from EEPROM
omap3evm: Add support for EFI partitions
part_efi: Fix compile errors
TPM (Trusted Platform Module) is an integrated circuit and
software platform that provides computer manufacturers with the
core components of a subsystem used to assure authenticity,
integrity and confidentiality.
This driver supports version 1.2 of the TCG (Trusted Computing
Group) specifications.
The TCG specification defines several so called localities in a
TPM chip, to be controlled by different software layers. When
used on a typical x86 platform during the firmware phase, only
locality 0 can be accessed by the CPU, so this driver even while
supporting the locality concept presumes that only locality zero
is used.
This implementation is loosely based on the article "Writing a
TPM Device Driver" published on http://ptgmedia.pearsoncmg.com
Compiling this driver with DEBUG defined will generate trace of
all accesses to TMP registers.
This driver has been tested and is being used in three different
functional ChromeOS machines (Pinetrail and Sandy Bridge Intel
chipsets) all using the same Infineon SLB 9635 TT 1.2 device.
A u-boot cli command allowing access to the TPM was also
implemented and is being submitted as a second patch.
Change-Id: I22a33c3e5b2e20eec9557a7621bd463b30389d73
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
CC: Wolfgang Denk <wd@denx.de>
The serial driver for iMX SOCs is continuosly changed if a
new SOC or not yet used port is used. CONFIG_SYS_<SOC>_<UART Port>
defines were used only to find the base address for the selected UART.
Instead of that, move the base address to the board configuration
file and drop all #ifdef from driver.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Helmut Raiger <helmut.raiger@hale.at>
CC: John Rigby <jcrigby@gmail.com>
CC: Matthias Weisser <weisserm@arcor.de>
CC: Jason Liu <jason.hui@linaro.org>
Acked-by: Jason Liu <jason.hui@linaro.org>
This patch fixes a small off-by-one bug in the GPIO driver for the mxs platform that allowed the selection gpio pins of one bank more than the SoC actually has.
Signed-off-by: Robert Deliën <robert at delien.nl>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Some functions were internal to the apbh dma driver, so annotate them static.
Some of the functions weren't used at all so drop them. This makes the U-Boot
binary smaller by about 1500 bytes.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
When a timeout occurs, the return value is prepared but never returned.
Fix that.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Fix the condition for number of phys in
davinci_eth_phy_detect() function.
CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT indicates number of
phys. From this commit id dc02badab4
davinci emac initilazed one less than the number of phy count.
Signed-off-by: Prabhakar Lad <prabhakar.csengg@gmail.com>
Acked-by: Heiko Schocher <hs@denx.de>
move struct davinci_rtc to arch/arm/include/asm/arch-davinci/hardware.h
and add RTC_KICK0R_WE, RTC_KICK1R_WE defines,
so they are global useable.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Use software ECC for the SPL build if support for software ECC in SPL is
enabled.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Scott Wood <scottwood@freescale.com>
This patch adds support for software ECC to the nand_spl_simple driver.
To enable this one have to define CONFIG_SPL_NAND_SOFTECC.
Tested on OMAP3.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Scott Wood <scottwood@freescale.com>
For some reason code setting the speed based on the PHY feedback causes
troubles on AM3517 so hardcode 100Mbps for now.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
DaVinci EMAC is present on TI AM35xx SoCs (ARMv7) which run with D-Cache
enabled by default. So we have to take care and flush/invalidate the
cache before/after the DMA operations.
Please note that the receive buffer alignment to 32 byte boundary comes
from the old driver version I don't know if it is really needed or
alignment to cache line size is enough.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
On AM35xx CPPI RAM had different addresses when accessed from the CPU
and from the EMAC. We need to account this to deal with the buffer
descriptors correctly.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
DaVinci EMAC is found not only on DaVinci SoCs but on some OMAP3 SoCs
also. This patch moves common defines from arch-davinci/emac_defs.h to
drivers/net/davinci_emac.h
DaVinci specific PHY drivers hacked to include the new header. We might
want to switch to phylib in future.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
s3c64xx.c implemented its own nand_read_byte, nand_write_buf and
nand_read_buf functions. This provoked a regression when these functions
were made public by patch 55f429bb39614a16b1bacc9a8bea9ac01a60bfc8.
This deletes these duplicated functions from s3c64xx.c and adds the generic
implementations in nand_base.c to the spl Makefile. It also adds
-ffcuntion-sections and -gc-sections to the compilation flags of the SPL to
avoid errors originating from unused functions in nand_base.c.
Description of the regression:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/108873
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Cc: scottwood@freescale.com
Cc: s-paulraj@ti.com
Cc: albert.u.boot@aribaud.net
Functions often used in SPL are now part of linux/mtd/nand.h.
Static modifiers are removed from these functions in
drivers/mtd/nand/nand_base.c.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Cc: scottwood@freescale.com
Cc: s-paulraj@ti.com
Cc: albert.u.boot@aribaud.net
Acked-by: Scott Wood <scottwood@freescale.com>
Consider that ide_preinit() succeed if at least one port is successfully
initialized. This allows to iniatialize IDE support on a board with two
SATA ports but a single hard disk available.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
FTPCI100 is a SoC PCI componenet of Faraday company.
Which is usually built into SoC chips for providing
embedded PCI functions.
Signed-off-by: Gavin Guo <gavinguo@andestech.com>
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
This adds support for the SMSC LAN87xx PHYs.
Following PHYs can be used by set CONFIG_PHY_SMSC to config.
- SMSC LAN8700
- SMSC LAN8710/LAN8720
- SMSC LAN8710/LAN8720
A setup of PHY was copied from linux kenrel.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Fixed white space errors; modified commit message a bit.
Signed-off-by: Wolfgang Denk <wd@denx.de>
When printing the string "\r\n" to the framebuffer console, the first
character of the current line was being replaced with a space. The "boot"
prompt would become the "oot" prompt. This change makes the cursor
non-destructive so that no matter where it goes on its way to where it's
supposed to be, the end result is that the cursor is where it's supposed to
be with the other text preserved.
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
The original m88e1111s_config() does not do the SGMII mode
initialization and is buggy. Rewrite the function according to
3.0.6 kernel function m88e1111_config_init() in drivers/net/phy/marvell.c
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
We want to show the length, so multiplying by sector size makes no sense.
This is a hold over from the erase code before the big refactor.
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The sh_eth driver had an own mii functions. However the function
didn't support the gigabit PHY. The U-Boot has the general phy driver
and miiphybb driver, and they already support it.
So this patch removes the own functions and uses the phy driver.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Fix:
sl811-hcd.c: In function 'sl811_rh_submit_urb':
sl811-hcd.c:556:8: warning: variable 'wIndex' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Fix:
sata_dwc.c: In function 'scan_sata':
sata_dwc.c:535:38: warning: variable 'udma_mask' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Kazuaki Ichinohe <kazuichi@fsi.co.jp>
* 'master' of git://git.denx.de/u-boot-mpc85xx:
mpc85xx: support for Freescale COM Express P2020
arch/powerpc/cpu/mpc8xxx/ddr/interactive.c: Fix GCC 4.6 build warning
mpc85xx: support board-specific reset function
powerpc/85xx: verify the localbus device tree address before booting the OS
mpc8xxx: update module_type values from JEDEC DDR3 SPD Specification
powerpc/p3060qds: Add board related support for P3060QDS platform
powerpc/85xx: clean up and document the QE/FMAN microcode macros
powerpc/85xx: always implement the work-around for Erratum SATA_A001
powerpc/85xx: CONFIG_FSL_SATA_V2 should be defined in config_mpc85xx.h
powerpc/85xx: Add workaround for erratum A-003474
powerpc/85xx: fixup flexcan device tree clock-frequency
powerpc/85xx: Add workaround for erratum CPU-A003999
Several macros are used to identify and locate the microcode binary image
that U-boot needs to upload to the QE or Fman. Both the QE and the Fman
use the QE Firmware binary format to package their respective microcode data,
which is why the same macros are used for both. A given SOC will only have
a QE or an Fman, so this is safe.
Unfortunately, the current macro definition and usage has inconsistencies.
For example, CONFIG_SYS_FMAN_FW_ADDR was used to define the address of Fman
firmware in NOR flash, but CONFIG_SYS_QE_FW_IN_NAND contains the address
of NAND. There's no way to know by looking at a variable how it's supposed
to be used.
In the future, the code which uploads QE firmware and Fman firmware will
be merged.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On the P1022/P1013, the work-around for erratum SATA_A001 was implemented
only if U-Boot initializes SATA, but SATA is not initialized by default. So
move the work-around to the CPU initialization function, so that it's always
executed on the SOCs that need it.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
If no controller is present, the i8402 driver should return immediately and
not attempt to operate on the missing hardware.
In kbd_input_empty, the status register is checked every millisecond to see
whether the input buffer is empty, up to a timeout which is tracked by
decrimenting a counter each time the check is performed. The decrement is
performed with a postfix -- operator, and the value of the counter is
checked in place. That means that when the counter reaches zero and the
loop terminates, it will actually be decrimented one more time and become
-1. That value is returned as the return value of the function. That would
give the right answer if it wasn't for that extra decrement because a
timeout would indicate that the buffer never became empty.
This change fixes both of those bugs.
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Change my old email address which is no longer valid.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
* 'master' of git://git.denx.de/u-boot-mmc:
Revert "mmc: retry the cmd8 to meet 74 clocks requirement in the spec"
mmc: mv_sdhci: Fix host version read for Armada100
Fix:
x86emu/ops2.c: In function 'x86emuOp2_set_byte':
x86emu/ops2.c:171:11: warning: variable 'name' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This reverts commit 02f3029f18.
This patch add 3 times retry to CMD8 because the Marvell mmc controller
doesn't obey the power ramp up process in the SD specification 6.4.1.
(Please refer to figure 6.1 and 6.2 in the specification.)
The CMD0 should be send after power ramp up has been finished.
However, the Marvell mmc contorller must do power ramp up after the
first CMD0 command has been send.
This patch also affect existing platforms like Nokia N900 and other
platforms.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Acked-by: Lei Wen <leiwen@marvell.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
sdhci_readw does not work for host version read in Armada100 series
SoCs. This patch fix this issue by making a sdhci_readl call to get host
version.
Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
Add the 1920x1080 and 1280x720 resolution support.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
CC: Anatolij Gustschin <agust@denx.de>
