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fsl_esdhc: fix PIO mode transfers

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The pointer to the registers used to control the Freescale ESDHC MMC
controller is not initialized correctly when using PIO mode. This is
fixed by initializing the pointer in the same way as all other sites
within the driver.

Examining the commit history shows that this was broken at introduction
due to a code change in upstream U-Boot to support the mx51 processor
family.

Reported-by: Jim Lentz <JLentz@zhone.com>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
This commit is contained in:
Ira Snyder 2011-12-23 08:30:40 +00:00 committed by Andy Fleming
parent bf83662ba3
commit 8eee2bd7f4
1 changed files with 2 additions and 1 deletions
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3
drivers/mmc/fsl_esdhc.c
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@ -114,7 +114,8 @@ uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data)
static void
esdhc_pio_read_write(struct mmc *mmc, struct mmc_data *data)
{
struct fsl_esdhc *regs = mmc->priv;
struct fsl_esdhc_cfg *cfg = mmc->priv;
struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
uint blocks;
char *buffer;
uint databuf;