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Merge branch 'master' of git://git.denx.de/u-boot-blackfin

Browse source 
* 'master' of git://git.denx.de/u-boot-blackfin:
  Blackfin: pata_bfin: fix printf warning
  Blackfin: bfin_nand: mark local func static
  linkage.h: move from blackfin to common includes
  Blackfin: br4: new board port
  Blackfin: add in/out le32 variants
  post: add blackfin to the post_time_ms list
  Blackfin: bf537-stamp: drop board reset workaround
  Blackfin: pr1: new board port
This commit is contained in:
Wolfgang Denk 2012-02-13 23:13:22 +01:00
commit 06576b2efc
22 changed files with 630 additions and 63 deletions
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5
MAINTAINERS
View file

@ -1183,6 +1183,11 @@ Chong Huang <chuang@ucrobotics.com>
bf525-ucr2 BF525
Dimitar Penev <dpn@switchfin.org>
BR4 Appliance BF537
PR1 Appliance BF537
#########################################################################
# NDS32 Systems: #
# #

2
arch/blackfin/cpu/cache.S
View file

@ -8,8 +8,8 @@
* Licensed under the GPL-2 or later.
*/
#include <asm/linkage.h>
#include <config.h>
#include <linux/linkage.h>
#include <asm/blackfin.h>
.text

2
arch/blackfin/include/asm/blackfin_local.h
View file

@ -48,7 +48,7 @@
#define L1_CACHE_SHIFT 5
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#include <asm/linkage.h>
#include <linux/linkage.h>
#include <asm/cache.h>
#ifndef __ASSEMBLY__

2
arch/blackfin/include/asm/cache.h
View file

@ -7,7 +7,7 @@
#ifndef __ARCH_BLACKFIN_CACHE_H
#define __ARCH_BLACKFIN_CACHE_H
#include <asm/linkage.h> /* for asmlinkage */
#include <linux/linkage.h> /* for asmlinkage */
/*
* Bytes per L1 cache line

2
arch/blackfin/include/asm/io.h
View file

@ -134,9 +134,11 @@ static inline unsigned int readl(const volatile void __iomem *addr)
#define inb(port) readb(__io(port))
#define inw(port) readw(__io(port))
#define inl(port) readl(__io(port))
#define in_le32(port) inl(port)
#define outb(x, port) writeb(x, __io(port))
#define outw(x, port) writew(x, __io(port))
#define outl(x, port) writel(x, __io(port))
#define out_le32(x, port) outl(x, port)
#define inb_p(port) inb(__io(port))
#define inw_p(port) inw(__io(port))

50
arch/blackfin/include/asm/linkage.h
View file

@ -22,53 +22,7 @@
* MA 02110-1301 USA
*/
#ifndef _LINUX_LINKAGE_H
#define _LINUX_LINKAGE_H
#include <linux/config.h>
#ifdef __cplusplus
#define CPP_ASMLINKAGE extern "C"
#else
#define CPP_ASMLINKAGE
#endif
#define asmlinkage CPP_ASMLINKAGE
#define SYMBOL_NAME_STR(X) #X
#define SYMBOL_NAME(X) X
#ifdef __STDC__
#define SYMBOL_NAME_LABEL(X) X##:
#else
#define SYMBOL_NAME_LABEL(X) X:
#endif
#define __ALIGN .align 4
#define __ALIGN_STR ".align 4"
#ifdef __ASSEMBLY__
#define ALIGN __ALIGN
#define ALIGN_STR __ALIGN_STR
#define LENTRY(name) \
ALIGN; \
SYMBOL_NAME_LABEL(name)
#define ENTRY(name) \
.globl SYMBOL_NAME(name); \
LENTRY(name)
#endif
#ifndef END
#define END(name) \
.size name, .-name
#endif
#ifndef ENDPROC
#define ENDPROC(name) \
.type name, @function; \
END(name)
#endif
#ifndef __ASM_LINKAGE_H
#define __ASM_LINKAGE_H
#endif

2
arch/blackfin/lib/__kgdb.S
View file

@ -1,5 +1,5 @@
#include <asm/linkage.h>
#include <linux/linkage.h>
/* save stack context for non-local goto
* int kgdb_setjmp(long *buf)

2
arch/blackfin/lib/outs.S
View file

@ -8,7 +8,7 @@
* Licensed under the GPL-2.
*/
#include <asm/linkage.h>
#include <linux/linkage.h>
.align 2

7
board/bf537-stamp/bf537-stamp.c
View file

@ -43,13 +43,6 @@ int checkboard(void)
return 0;
}
void board_reset(void)
{
/* workaround for weak pull ups on ssel */
if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
bfin_reset_boot_spi_cs(GPIO_PF10);
}
#ifdef CONFIG_BFIN_MAC
static void board_init_enetaddr(uchar *mac_addr)
{

50
board/br4/Makefile Normal file
View file

@ -0,0 +1,50 @@
#
# U-boot - Makefile
#
# Copyright (c) Switchfin Org. <dpn@switchfin.org>
#
# Copyright (c) 2005-2007 Analog Device Inc.
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
COBJS-y := $(BOARD).o
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(call cmd_link_o_target, $(OBJS) $(SOBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

30
board/br4/br4.c Normal file
View file

@ -0,0 +1,30 @@
/*
* U-boot - main board file
*
* Copyright (c) Switchfin Org. <dpn@switchfin.org>
*
* Copyright (c) 2005-2008 Analog Devices Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* Licensed under the GPL-2 or later.
*/
#include <common.h>
#include <net.h>
#include <netdev.h>
int checkboard(void)
{
printf("Board: Switchvoice BR4 Appliance\n");
printf(" Support: http://www.switchvoice.com/\n");
return 0;
}
#ifdef CONFIG_BFIN_MAC
int board_eth_init(bd_t *bis)
{
return bfin_EMAC_initialize(bis);
}
#endif

30
board/br4/config.mk Normal file
View file

@ -0,0 +1,30 @@
#
# Copyright (c) Switchfin Org. <dpn@switchfin.org>
#
# Copyright (c) 2005-2008 Analog Device Inc.
#
# (C) Copyright 2001
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
CFLAGS_lib/zlib += -O2

50
board/pr1/Makefile Normal file
View file

@ -0,0 +1,50 @@
#
# U-boot - Makefile
#
# Copyright (c) Switchfin Org. <dpn@switchfin.org>
#
# Copyright (c) 2005-2007 Analog Device Inc.
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
COBJS-y := $(BOARD).o
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(call cmd_link_o_target, $(OBJS) $(SOBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

30
board/pr1/config.mk Normal file
View file

@ -0,0 +1,30 @@
#
# Copyright (c) Switchfin Org. <dpn@switchfin.org>
#
# Copyright (c) 2005-2008 Analog Device Inc.
#
# (C) Copyright 2001
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
CFLAGS_lib/zlib += -O2

30
board/pr1/pr1.c Normal file
View file

@ -0,0 +1,30 @@
/*
* U-boot - main board file
*
* Copyright (c) Switchfin Org. <dpn@switchfin.org>
*
* Copyright (c) 2005-2008 Analog Devices Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* Licensed under the GPL-2 or later.
*/
#include <common.h>
#include <net.h>
#include <netdev.h>
int checkboard(void)
{
printf("Board: Switchvoice PR1 Appliance\n");
printf(" Support: http://www.switchvoice.com/\n");
return 0;
}
#ifdef CONFIG_BFIN_MAC
int board_eth_init(bd_t *bis)
{
return bfin_EMAC_initialize(bis);
}
#endif

2
boards.cfg
View file

@ -291,6 +291,7 @@ bf561-acvilon blackfin blackfin
bf561-ezkit blackfin blackfin
blackstamp blackfin blackfin
blackvme blackfin blackfin
br4 blackfin blackfin
cm-bf527 blackfin blackfin
cm-bf533 blackfin blackfin
cm-bf537e blackfin blackfin
@ -300,6 +301,7 @@ cm-bf561 blackfin blackfin
dnp5370 blackfin blackfin
ibf-dsp561 blackfin blackfin
ip04 blackfin blackfin
pr1 blackfin blackfin
tcm-bf518 blackfin blackfin
tcm-bf537 blackfin blackfin
M52277EVB m68k mcf5227x m52277evb freescale - M52277EVB:SYS_SPANSION_BOOT,SYS_TEXT_BASE=0x00000000

2
drivers/block/pata_bfin.c
View file

@ -884,7 +884,7 @@ static void bfin_ata_identify(struct ata_port *ap, int dev)
sata_dev_desc[ap->port_no].removable = 0;
sata_dev_desc[ap->port_no].lba = (u32) n_sectors;
debug("lba=0x%x\n", sata_dev_desc[ap->port_no].lba);
debug("lba=0x%lx\n", sata_dev_desc[ap->port_no].lba);
#ifdef CONFIG_LBA48
if (iop->command_set_2 & 0x0400)

2
drivers/mtd/nand/bfin_nand.c
View file

@ -73,7 +73,7 @@ static void bfin_nfc_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
SSYNC();
}
int bfin_nfc_devready(struct mtd_info *mtd)
static int bfin_nfc_devready(struct mtd_info *mtd)
{
pr_stamp();
return (bfin_read_NFC_STAT() & NBUSY) ? 1 : 0;

157
include/configs/br4.h Normal file
View file

@ -0,0 +1,157 @@
/*
* U-boot - Configuration file for BR4 Appliance
*
* based on bf537-stamp.h
* Copyright (c) Switchfin Org. <dpn@switchfin.org>
*/
#ifndef __CONFIG_BR4_H__
#define __CONFIG_BR4_H__
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf537-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
* SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
*/
/* CONFIG_CLKIN_HZ is any value in Hz */
#define CONFIG_CLKIN_HZ 25000000
/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
/* 1 = CLKIN / 2 */
#define CONFIG_CLKIN_HALF 0
/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
/* 1 = bypass PLL */
#define CONFIG_PLL_BYPASS 0
/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
/* Values can range from 0-63 (where 0 means 64) */
#define CONFIG_VCO_MULT 24
/* CCLK_DIV controls the core clock divider */
/* Values can be 1, 2, 4, or 8 ONLY */
#define CONFIG_CCLK_DIV 1
/* SCLK_DIV controls the system clock divider */
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5
/*
* Memory Settings
*/
#define CONFIG_MEM_ADD_WDTH 10
#define CONFIG_MEM_SIZE 64
#define CONFIG_EBIU_SDRRC_VAL 0x306
#define CONFIG_EBIU_SDGCTL_VAL 0x8091998d
#define CONFIG_EBIU_AMGCTL_VAL 0xFF
#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_MALLOC_LEN (384 * 1024)
/*
* Network Settings
*/
#ifndef __ADSPBF534__
#define ADI_CMDS_NETWORK 1
#define CONFIG_BFIN_MAC
#define CONFIG_NETCONSOLE
#endif
#define CONFIG_HOSTNAME br4
#define CONFIG_TFTP_BLOCKSIZE 4404
/* Uncomment next line to use fixed MAC address */
/* #define CONFIG_ETHADDR 5c:38:1a:80:a7:00 */
/*
* Flash Settings
*/
#define CONFIG_SYS_NO_FLASH /* We have no parallel FLASH */
/*
* SPI Settings
*/
#define CONFIG_BFIN_SPI
#define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_STMICRO
/*
* Env Storage Settings
*/
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_OFFSET 0x10000
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_ENV_SECT_SIZE 0x10000
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
/*
* I2C Settings
*/
#define CONFIG_BFIN_TWI_I2C
#define CONFIG_HARD_I2C
/*
* NAND Settings
*/
#define CONFIG_NAND_PLAT
#define CONFIG_SYS_NAND_BASE 0x20000000
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2))
#define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 1))
#define BFIN_NAND_WRITE(addr, cmd) \
do { \
bfin_write8(addr, cmd); \
SSYNC(); \
} while (0)
#define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd)
#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
#define NAND_PLAT_GPIO_DEV_READY GPIO_PF9
/*
* Misc Settings
*/
#define CONFIG_BAUDRATE 115200
#define CONFIG_RTC_BFIN
#define CONFIG_UART_CONSOLE 0
#define CONFIG_SYS_PROMPT "br4>"
#define CONFIG_BOOTCOMMAND "run nandboot"
#define CONFIG_BOOTDELAY 2
#define CONFIG_LOADADDR 0x2000000
/*
* Pull in common ADI header for remaining command/environment setup
*/
#include <configs/bfin_adi_common.h>
/*
* Overwrite some settings defined in bfin_adi_common.h
*/
#undef NAND_ENV_SETTINGS
#define NAND_ENV_SETTINGS \
"nandargs=set bootargs " CONFIG_BOOTARGS "\0" \
"nandboot=" \
"nand read $(loadaddr) 0x0 0x900000;" \
"run nandargs;" \
"bootm" \
"\0"
#endif

157
include/configs/pr1.h Normal file
View file

@ -0,0 +1,157 @@
/*
* U-boot - Configuration file for PR1 Appliance
*
* based on bf537-stamp.h
* Copyright (c) Switchfin Org. <dpn@switchfin.org>
*/
#ifndef __CONFIG_PR1_H__
#define __CONFIG_PR1_H__
#include <asm/config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf537-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
* SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
*/
/* CONFIG_CLKIN_HZ is any value in Hz */
#define CONFIG_CLKIN_HZ 25000000
/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
/* 1 = CLKIN / 2 */
#define CONFIG_CLKIN_HALF 0
/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
/* 1 = bypass PLL */
#define CONFIG_PLL_BYPASS 0
/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
/* Values can range from 0-63 (where 0 means 64) */
#define CONFIG_VCO_MULT 24
/* CCLK_DIV controls the core clock divider */
/* Values can be 1, 2, 4, or 8 ONLY */
#define CONFIG_CCLK_DIV 1
/* SCLK_DIV controls the system clock divider */
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5
/*
* Memory Settings
*/
#define CONFIG_MEM_ADD_WDTH 11
#define CONFIG_MEM_SIZE 128
#define CONFIG_EBIU_SDRRC_VAL 0x306
#define CONFIG_EBIU_SDGCTL_VAL 0x8091998d
#define CONFIG_EBIU_AMGCTL_VAL 0xFF
#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_MALLOC_LEN (384 * 1024)
/*
* Network Settings
*/
#ifndef __ADSPBF534__
#define ADI_CMDS_NETWORK 1
#define CONFIG_BFIN_MAC
#define CONFIG_NETCONSOLE
#endif
#define CONFIG_HOSTNAME pr1
#define CONFIG_TFTP_BLOCKSIZE 4404
/* Uncomment next line to use fixed MAC address */
/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
/*
* Flash Settings
*/
#define CONFIG_SYS_NO_FLASH /* We have no parallel FLASH */
/*
* SPI Settings
*/
#define CONFIG_BFIN_SPI
#define CONFIG_ENV_SPI_MAX_HZ 30000000
#define CONFIG_SF_DEFAULT_SPEED 30000000
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_STMICRO
/*
* Env Storage Settings
*/
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_OFFSET 0x10000
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_ENV_SECT_SIZE 0x10000
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
/*
* I2C Settings
*/
#define CONFIG_BFIN_TWI_I2C
#define CONFIG_HARD_I2C
/*
* NAND Settings
*/
#define CONFIG_NAND_PLAT
#define CONFIG_SYS_NAND_BASE 0x20000000
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2))
#define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 1))
#define BFIN_NAND_WRITE(addr, cmd) \
do { \
bfin_write8(addr, cmd); \
SSYNC(); \
} while (0)
#define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd)
#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
#define NAND_PLAT_GPIO_DEV_READY GPIO_PF9
/*
* Misc Settings
*/
#define CONFIG_BAUDRATE 115200
#define CONFIG_RTC_BFIN
#define CONFIG_UART_CONSOLE 0
#define CONFIG_SYS_PROMPT "pr1>"
#define CONFIG_BOOTCOMMAND "run nandboot"
#define CONFIG_BOOTDELAY 2
#define CONFIG_LOADADDR 0x2000000
/*
* Pull in common ADI header for remaining command/environment setup
*/
#include <configs/bfin_adi_common.h>
/*
* Overwrite some settings defined in bfin_adi_common.h
*/
#undef NAND_ENV_SETTINGS
#define NAND_ENV_SETTINGS \
"nandargs=set bootargs " CONFIG_BOOTARGS "\0" \
"nandboot=" \
"nand read $(loadaddr) 0x0 0x900000;" \
"run nandargs;" \
"bootm" \
"\0"
#endif

76
include/linux/linkage.h Normal file
View file

@ -0,0 +1,76 @@
/*
* U-boot - linkage.h
*
* Copyright (c) 2005-2007 Analog Devices Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#ifndef _LINUX_LINKAGE_H
#define _LINUX_LINKAGE_H
#include <asm/linkage.h>
#include <linux/config.h>
#ifdef __cplusplus
#define CPP_ASMLINKAGE extern "C"
#else
#define CPP_ASMLINKAGE
#endif
#define asmlinkage CPP_ASMLINKAGE
#define SYMBOL_NAME_STR(X) #X
#define SYMBOL_NAME(X) X
#ifdef __STDC__
#define SYMBOL_NAME_LABEL(X) X##:
#else
#define SYMBOL_NAME_LABEL(X) X:
#endif
#define __ALIGN .align 4
#define __ALIGN_STR ".align 4"
#ifdef __ASSEMBLY__
#define ALIGN __ALIGN
#define ALIGN_STR __ALIGN_STR
#define LENTRY(name) \
ALIGN; \
SYMBOL_NAME_LABEL(name)
#define ENTRY(name) \
.globl SYMBOL_NAME(name); \
LENTRY(name)
#ifndef END
#define END(name) \
.size name, .-name
#endif
#ifndef ENDPROC
#define ENDPROC(name) \
.type name, @function; \
END(name)
#endif
#endif
#endif

3
post/post.c
View file

@ -495,7 +495,8 @@ void post_reloc(void)
*/
unsigned long post_time_ms(unsigned long base)
{
#if defined(CONFIG_PPC) || defined(CONFIG_ARM) && !defined(CONFIG_KIRKWOOD)
#if defined(CONFIG_PPC) || defined(CONFIG_BLACKFIN) || \
(defined(CONFIG_ARM) && !defined(CONFIG_KIRKWOOD))
return (unsigned long)lldiv(get_ticks(), get_tbclk() / CONFIG_SYS_HZ)
- base;
#else