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Merge branch 'master' of git://git.denx.de/u-boot-i2c

Browse source 
* 'master' of git://git.denx.de/u-boot-i2c:
  mx28evk: Add I2C support
  mxs-i2c: Fix internal address byte order
  mxc_i2c: remove setting speed at each start
  mx6qsabrelite: add i2c support
  mxc_i2c: specify i2c base address in config file

Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
Wolfgang Denk 2012-07-12 08:17:29 +02:00
commit 0b15d51ed0
15 changed files with 51 additions and 36 deletions
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7
arch/arm/include/asm/arch-mx31/imx-regs.h
View file

@ -606,6 +606,13 @@ struct esdc_regs {
#define UART4_BASE 0x43FB0000
#define UART5_BASE 0x43FB4000
#define I2C1_BASE_ADDR 0x43f80000
#define I2C1_CLK_OFFSET 26
#define I2C2_BASE_ADDR 0x43F98000
#define I2C2_CLK_OFFSET 28
#define I2C3_BASE_ADDR 0x43f84000
#define I2C3_CLK_OFFSET 30
#define ESDCTL_SDE (1 << 31)
#define ESDCTL_CMD_RW (0 << 28)
#define ESDCTL_CMD_PRECHARGE (1 << 28)

2
arch/arm/include/asm/arch-mx35/imx-regs.h
View file

@ -39,7 +39,7 @@
#define MAX_BASE_ADDR 0x43F04000
#define EVTMON_BASE_ADDR 0x43F08000
#define CLKCTL_BASE_ADDR 0x43F0C000
#define I2C_BASE_ADDR 0x43F80000
#define I2C1_BASE_ADDR 0x43F80000
#define I2C3_BASE_ADDR 0x43F84000
#define ATA_BASE_ADDR 0x43F8C000
#define UART1_BASE 0x43F90000

3
board/freescale/mx28evk/iomux.c
View file

@ -159,6 +159,9 @@ const iomux_cfg_t iomux_setup[] = {
MX28_PAD_SSP2_MISO__SSP2_D0 | MUX_CONFIG_SSP2,
MX28_PAD_SSP2_SS0__SSP2_D3 |
(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),
/* I2C */
MX28_PAD_I2C0_SCL__I2C0_SCL,
MX28_PAD_I2C0_SDA__I2C0_SDA,
};
#define HW_DRAM_CTL29 (0x74 >> 2)

11
board/freescale/mx6qsabrelite/mx6qsabrelite.c
View file

@ -55,6 +55,11 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
PAD_CTL_ODE | PAD_CTL_SRE_FAST)
int dram_init(void)
{
gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
@ -72,6 +77,11 @@ iomux_v3_cfg_t uart2_pads[] = {
MX6Q_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
};
iomux_v3_cfg_t i2c3_pads[] = {
MX6Q_PAD_GPIO_5__I2C3_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL),
MX6Q_PAD_GPIO_16__I2C3_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL),
};
iomux_v3_cfg_t usdhc3_pads[] = {
MX6Q_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6Q_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
@ -336,6 +346,7 @@ int board_init(void)
#ifdef CONFIG_MXC_SPI
setup_spi();
#endif
imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads));
#ifdef CONFIG_CMD_SATA
setup_sata();

31
drivers/i2c/mxc_i2c.c
View file

@ -59,27 +59,10 @@ struct mxc_i2c_regs {
#define I2SR_IIF (1 << 1)
#define I2SR_RX_NO_AK (1 << 0)
#if defined(CONFIG_SYS_I2C_MX31_PORT1)
#define I2C_BASE 0x43f80000
#define I2C_CLK_OFFSET 26
#elif defined (CONFIG_SYS_I2C_MX31_PORT2)
#define I2C_BASE 0x43f98000
#define I2C_CLK_OFFSET 28
#elif defined (CONFIG_SYS_I2C_MX31_PORT3)
#define I2C_BASE 0x43f84000
#define I2C_CLK_OFFSET 30
#elif defined(CONFIG_SYS_I2C_MX53_PORT1)
#define I2C_BASE I2C1_BASE_ADDR
#elif defined(CONFIG_SYS_I2C_MX53_PORT2)
#define I2C_BASE I2C2_BASE_ADDR
#elif defined(CONFIG_SYS_I2C_MX35_PORT1)
#define I2C_BASE I2C_BASE_ADDR
#elif defined(CONFIG_SYS_I2C_MX35_PORT2)
#define I2C_BASE I2C2_BASE_ADDR
#elif defined(CONFIG_SYS_I2C_MX35_PORT3)
#define I2C_BASE I2C3_BASE_ADDR
#ifdef CONFIG_SYS_I2C_BASE
#define I2C_BASE CONFIG_SYS_I2C_BASE
#else
#error "define CONFIG_SYS_I2C_MX<Processor>_PORTx to use the mx I2C driver"
#error "define CONFIG_SYS_I2C_BASE to use the mxc_i2c driver"
#endif
#define I2C_MAX_TIMEOUT 10000
@ -114,7 +97,7 @@ static uint8_t i2c_imx_get_clk(unsigned int rate)
(struct clock_control_regs *)CCM_BASE;
/* start the required I2C clock */
writel(readl(&sc_regs->cgr0) | (3 << I2C_CLK_OFFSET),
writel(readl(&sc_regs->cgr0) | (3 << CONFIG_SYS_I2C_CLK_OFFSET),
&sc_regs->cgr0);
#endif
@ -248,12 +231,6 @@ int i2c_imx_start(void)
struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
unsigned int temp = 0;
int result;
int speed = i2c_get_bus_speed();
u8 clk_idx = i2c_imx_get_clk(speed);
u8 idx = i2c_clk_div[clk_idx][1];
/* Store divider value */
writeb(idx, &i2c_regs->ifdr);
/* Enable I2C controller */
writeb(0, &i2c_regs->i2sr);

2
drivers/i2c/mxs_i2c.c
View file

@ -97,7 +97,7 @@ void mxs_i2c_write(uchar chip, uint addr, int alen,
for (i = 0; i < alen; i++) {
data >>= 8;
data |= ((char *)&addr)[i] << 24;
data |= ((char *)&addr)[alen - i - 1] << 24;
if ((i & 3) == 2)
writel(data, &i2c_regs->hw_i2c_data);
}

2
include/configs/flea3.h
View file

@ -66,7 +66,7 @@
*/
#define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_MX35_PORT3
#define CONFIG_SYS_I2C_BASE I2C3_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 0xfe
#define CONFIG_MXC_SPI

3
include/configs/imx31_phycore.h
View file

@ -54,7 +54,8 @@
#define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_MX31_PORT2
#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR
#define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_MXC_UART

8
include/configs/mx28evk.h
View file

@ -68,6 +68,7 @@
#define CONFIG_CMD_SPI
#define CONFIG_CMD_USB
#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_I2C
/*
* Memory configurations
@ -188,6 +189,13 @@
#define CONFIG_USB_STORAGE
#endif
/* I2C */
#ifdef CONFIG_CMD_I2C
#define CONFIG_I2C_MXS
#define CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_SPEED 400000
#endif
/*
* SPI
*/

2
include/configs/mx35pdk.h
View file

@ -57,7 +57,7 @@
*/
#define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_MX35_PORT1
#define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO

2
include/configs/mx53ard.h
View file

@ -50,7 +50,7 @@
#define CONFIG_CMD_I2C
#define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_MX53_PORT2
#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED 100000
/* MMC Configs */

2
include/configs/mx53evk.h
View file

@ -53,7 +53,7 @@
#define CONFIG_CMD_I2C
#define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_MX53_PORT2 1
#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC Configs */

2
include/configs/mx53loco.h
View file

@ -89,7 +89,7 @@
/* I2C Configs */
#define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_MX53_PORT1
#define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC Controller */

2
include/configs/mx53smd.h
View file

@ -50,7 +50,7 @@
#define CONFIG_CMD_I2C
#define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_MX53_PORT2
#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED 100000
/* MMC Configs */

8
include/configs/mx6qsabrelite.h
View file

@ -58,6 +58,14 @@
#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
#endif
/* I2C Configs */
#define CONFIG_CMD_I2C
#define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_BASE I2C3_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 0xfe
/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC