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USB: Drop cache flush bloat in EHCI-HCD
Discard the creepy cache flushing mechanisms in ehci-hcd.c and replace them with more straightforward flushing. In the new approach, the flushing takes place directly in ehci_submit_async() call instead of going through the QH list and flushing all members and buffers. This discards a lot of weird bit operations on the members of QH and qTD structures. NOTE: Certainly, this flushes even qTDs which are possibly unused in some transactions, though the overhead of the previous code was much higher than is the overhead of flushing two more cache lines (which most probably aren't even cached). Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
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parent
de98e8b22a
commit
b8adb12095
1 changed files with 27 additions and 100 deletions
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@ -108,99 +108,6 @@ static struct descriptor {
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#define ehci_is_TDI() (0)
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#endif
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#if defined(CONFIG_EHCI_DCACHE)
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/*
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* Routines to handle (flush/invalidate) the dcache for the QH and qTD
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* structures and data buffers. This is needed on platforms using this
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* EHCI support with dcache enabled.
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*/
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static void flush_invalidate(u32 addr, int size, int flush)
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{
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if (flush)
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flush_dcache_range(addr, addr + size);
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else
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invalidate_dcache_range(addr, addr + size);
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}
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static void cache_qtd(struct qTD *qtd, int flush)
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{
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u32 *ptr = (u32 *)qtd->qt_buffer[0];
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int len = (qtd->qt_token & 0x7fff0000) >> 16;
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flush_invalidate((u32)qtd, sizeof(struct qTD), flush);
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if (ptr && len)
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flush_invalidate((u32)ptr, len, flush);
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}
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static inline struct QH *qh_addr(struct QH *qh)
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{
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return (struct QH *)((u32)qh & 0xffffffe0);
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}
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static void cache_qh(struct QH *qh, int flush)
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{
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struct qTD *qtd;
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struct qTD *next;
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static struct qTD *first_qtd;
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/*
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* Walk the QH list and flush/invalidate all entries
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*/
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while (1) {
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flush_invalidate((u32)qh_addr(qh), sizeof(struct QH), flush);
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if ((u32)qh & QH_LINK_TYPE_QH)
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break;
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qh = qh_addr(qh);
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qh = (struct QH *)qh->qh_link;
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}
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qh = qh_addr(qh);
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/*
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* Save first qTD pointer, needed for invalidating pass on this QH
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*/
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if (flush)
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first_qtd = qtd = (struct qTD *)(*(u32 *)&qh->qh_overlay &
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0xffffffe0);
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else
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qtd = first_qtd;
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/*
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* Walk the qTD list and flush/invalidate all entries
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*/
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while (1) {
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if (qtd == NULL)
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break;
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cache_qtd(qtd, flush);
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next = (struct qTD *)((u32)qtd->qt_next & 0xffffffe0);
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if (next == qtd)
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break;
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qtd = next;
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}
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}
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static inline void ehci_flush_dcache(struct QH *qh)
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{
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cache_qh(qh, 1);
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}
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static inline void ehci_invalidate_dcache(struct QH *qh)
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{
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cache_qh(qh, 0);
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}
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#else /* CONFIG_EHCI_DCACHE */
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/*
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*
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*/
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static inline void ehci_flush_dcache(struct QH *qh)
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{
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}
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static inline void ehci_invalidate_dcache(struct QH *qh)
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{
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}
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#endif /* CONFIG_EHCI_DCACHE */
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void __ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
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{
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mdelay(50);
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@ -263,12 +170,20 @@ out:
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static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
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{
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uint32_t addr, delta, next;
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uint32_t delta, next;
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uint32_t addr = (uint32_t)buf;
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size_t rsz = roundup(sz, 32);
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int idx;
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addr = (uint32_t) buf;
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if (sz != rsz)
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debug("EHCI-HCD: Misaligned buffer size (%08x)\n", sz);
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if (addr & 31)
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debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
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idx = 0;
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while (idx < 5) {
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flush_dcache_range(addr, addr + rsz);
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td->qt_buffer[idx] = cpu_to_hc32(addr);
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td->qt_buffer_hi[idx] = 0;
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next = (addr + 4096) & ~4095;
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@ -317,6 +232,8 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
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memset(&qh, 0, sizeof(struct QH));
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memset(qtd, 0, sizeof(qtd));
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toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
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qh.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
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c = (usb_pipespeed(pipe) != USB_SPEED_HIGH &&
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usb_pipeendpoint(pipe) == 0) ? 1 : 0;
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@ -337,9 +254,6 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
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tdp = &qh.qh_overlay.qt_next;
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toggle =
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usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
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if (req != NULL) {
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qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
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qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
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@ -391,7 +305,10 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
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qh_list.qh_link = cpu_to_hc32((uint32_t)&qh | QH_LINK_TYPE_QH);
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/* Flush dcache */
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ehci_flush_dcache(&qh_list);
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flush_dcache_range((uint32_t)&qh_list,
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(uint32_t)&qh_list + sizeof(struct QH));
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flush_dcache_range((uint32_t)&qh, (uint32_t)&qh + sizeof(struct QH));
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flush_dcache_range((uint32_t)qtd, (uint32_t)qtd + sizeof(qtd));
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usbsts = ehci_readl(&hcor->or_usbsts);
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ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f));
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@ -414,13 +331,23 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
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timeout = USB_TIMEOUT_MS(pipe);
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do {
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/* Invalidate dcache */
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ehci_invalidate_dcache(&qh_list);
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invalidate_dcache_range((uint32_t)&qh_list,
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(uint32_t)&qh_list + sizeof(struct QH));
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invalidate_dcache_range((uint32_t)&qh,
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(uint32_t)&qh + sizeof(struct QH));
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invalidate_dcache_range((uint32_t)qtd,
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(uint32_t)qtd + sizeof(qtd));
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token = hc32_to_cpu(vtd->qt_token);
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if (!(token & 0x80))
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break;
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WATCHDOG_RESET();
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} while (get_timer(ts) < timeout);
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/* Invalidate the memory area occupied by buffer */
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invalidate_dcache_range(((uint32_t)buffer & ~31),
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((uint32_t)buffer & ~31) + roundup(length, 32));
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/* Check that the TD processing happened */
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if (token & 0x80) {
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printf("EHCI timed out on TD - token=%#x\n", token);
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