Commit graph

1664 commits

Author SHA1 Message Date
York Sun
830fc1bfe7 powerpc: mpc85xx: Convert CONFIG_SYS_CCSRBAR_DEFAULT to Kconfig option
Move default value definitions to to Kconfig SYS_CCSRBAR_DEFAULT.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-12-02 08:52:34 -08:00
York Sun
22a1b99a1d powerpc: cyrus: Separate P5020/P5040 config options
Instead of using EXTRA options in defconfig, use two targets
in Kconfig to select correct SoC.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-12-02 08:52:34 -08:00
Tom Rini
6b29a395b6 Merge git://git.denx.de/u-boot-mpc85xx 2016-11-29 19:42:48 -05:00
York Sun
e8a390f018 powerpc: Drop default CONFIG_MAX_CPUS
This configuration has been moved into Kconfig for mpc85xx, and
dropped for mpc86xx. Remove the default value in config.h.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:17 -08:00
York Sun
6c691a1c7e powerpc: mpc86xx: Remove macro CONFIG_MAX_CPUS
This macro CONFIG_MAX_CPUS is not used for MPC86xx SoCs.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:16 -08:00
York Sun
4f5554c6e5 powerpc: MPC8641: Remove macro CONFIG_MPC8641
Replace CONFIG_MPC8641 with ARCH_MPC8641 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:16 -08:00
York Sun
1425a87b14 powerpc: MPC8610: Remove macro CONFIG_MPC8610
Replace CONFIG_MPC8610 with ARCH_MPC8610 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:16 -08:00
York Sun
3f82b56d41 powerpc: mpc85xx: Move CONFIG_MAX_CPUS to Kconfig
Use Kconfig to set MAX_CPUS for mpc85xx.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:16 -08:00
York Sun
cdb72c5212 powerpc: T4080: Drop configuration for T4080
There is no T4080 target. Drop related macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:16 -08:00
York Sun
26bc57da0a powerpc: T4240: Remove macro CONFIG_PPC_T4240
Use CONFIG_ARCH_T4240 from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:15 -08:00
York Sun
652a7bbd87 powerpc: T4160: Remove macro CONFIG_PPC_T4160
Use CONFIG_ARCH_T4160 instead.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:15 -08:00
York Sun
12ffdb3b12 powerpc: T4160RDB: Separate from T4240RDB in Kconfig
Use TARGET_T4160RDB to simplify Kconfig options.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:15 -08:00
York Sun
673c01c708 powerpc: T4240QDS: Remove macro CONFIG_T4240QDS
Use CONFIG_TARGET_T4240QDS instead.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:15 -08:00
York Sun
9c21d06c67 powerpc: T4160QDS: Separate from T4240QDS in Kconfig
Use TARGET_T4160QDS to simplify Kconfig options.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:15 -08:00
York Sun
0f3d80e993 powerpc: T2080, T2081: Remove macro CONFIG_PPC_T2080 and CONFIG_PPC_T2081
Use CONFIG_ARCH_T2080 and CONFIG_ARCH_T2081 instead.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:15 -08:00
York Sun
01671e668b powerpc: T2080RDB: Rename from T208XRDB in Kconfig
T208XRDB only has one target T2080RDB. Use TARGET_T2080RDB in Kconfig
and clean up existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:14 -08:00
York Sun
638d5be055 powerpc: T208XQDS: Split as T2080QDS and T2081QDS
Use two separated targets in Kconfig to simplify configurations.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:14 -08:00
York Sun
78e5699523 powerpc: T104xRDB: Remove macro CONFIG_T104xRDB and T104xD4RDB
CONFIG_T104xRDB is defined in T104xRDB.h, so it is always enabled for
all T1040RDB, T1040D4RDB, T1042RDB, T1042D4RDB, T1042RDB_PI.
CONFIG_T104XD4RDB is defined for all T1040D4RDB, T1042D4RDB.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:14 -08:00
York Sun
319ed24a8a powerpc: T1042D4RDB: Separate from T1042RDB in Kconfig
Use TARGET_T1042D4RDB in Kconfig to simplify config options.
Remove macro CONFIG_T1042D4RDB.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:14 -08:00
York Sun
55ed8ae367 powerpc: T1042RDB_PI: Split from T1042RDB in Kconfig
Use separated TARGET_T1042RDB_PI to simplify config options.
Remove macro CONFIG_T1042RDB_PI.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:14 -08:00
York Sun
5449c98a2d powerpc: T1042: Remove macro CONFIG_PPC_T1042
Replace CONFIG_PPC_T1042 with ARCH_T1024 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:13 -08:00
York Sun
a016735c79 powerpc: T1040D4RDB: Separate from T1040RDB in Kconfig
Use TARGET_T1040D4RDB in Kconfig to simplify config macros. Replace
CONFIG_T1040D4RDB with TARGET_T1040D4RDB and clean up existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:13 -08:00
York Sun
5d73701073 powerpc: T1040: Remove macro CONFIG_PPC_T1040
Replace CONFIG_PPC_T1040 with ARCH_T1040 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:13 -08:00
York Sun
95a809b918 powerpc: T104XRDB: Split to T1040RDB and T1042RDB in Kconfig
Split ARCH_T104XRDB as ARCH_T1040RDB and ARCH_T1042RDB in Kconfig to
simplify config options.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:13 -08:00
York Sun
e5d5f5a8be powerpc: T1024: Remove macro CONFIG_PPC_T1024
Replace CONFIG_PPC_T1024 with ARCH_T1024 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:13 -08:00
York Sun
6f53bd475a powerpc: T1024QDS: Rename Kconfig option to match the name
Rename TARGET_T102XQDS to TARGET_T1024QDS to match the name.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:13 -08:00
York Sun
5ff3f41d04 powerpc: T1023: Remove macro CONFIG_PPC_T1023
Replace CONFIG_PPC_T1023 with ARCH_T1023 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:12 -08:00
York Sun
08c752920d powerpc: T102xRDB: Split as T1023RDB and T1024RDB
The defconfig files are separated. Splitting targets in Kconfig simplifies
config options.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:12 -08:00
York Sun
10343403af powerpc: QEMU_E500: Remove macro CONFIG_QEMU_E500
Replace CONFIG_QEMU_E500 with ARCH_QEMU_E500 in Kconfig and
clean up existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:12 -08:00
York Sun
b41f192b67 powerpc: B4420: Remove macro CONFIG_PPC_B4420
Replace CONFIG_PPC_B4420 with ARCH_B4420 in Kconfig and clean up
existing macros.
2016-11-23 23:42:12 -08:00
York Sun
d46a4a1378 powerpc: B4860QDS: Remove macro CONFIG_B4860QDS
Use CONFIG_TARGET_B4860QDS instead.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:12 -08:00
York Sun
3006ebc37e powerpc: B4860: Remove macro CONFIG_PPC_B4860
Replace CONFIG_PPC_B4860 with ARCH_B4860 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:12 -08:00
York Sun
45a8d11782 powerpc: B4420QDS: Split from B4860QDS in Kconfig
Use TARGET_B4420QDS to simplify Kconfig options.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:12 -08:00
York Sun
9539036012 powerpc: P5040: Remove macro CONFIG_P5040
Replace CONFIG_P5040 with ARCH_P5040 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:11 -08:00
York Sun
cefe11cdb2 powerpc: P5020: Remove macro CONFIG_PPC_P5020
Replace CONFIG_PPC_P5020 with ARCH_P5020 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:11 -08:00
York Sun
e71372cb63 powerpc: P4080: Remove macro CONFIG_PPC_P4080
Replace CONFIG_PPC_P4080 with ARCH_P4080 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:11 -08:00
York Sun
5e5fdd2d00 powerpc: P3041: Remove macro CONFIG_PPC_P3041
Replace CONFIG_PPC_P3041 with ARCH_P3041 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:10 -08:00
York Sun
ce040c83f1 powerpc: P2041: Remove macro CONFIG_PPC_P2041
Replace CONFIG_PPC_P2041 with ARCH_P2041 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:10 -08:00
York Sun
789460c914 powerpc: P2010: Drop configuration for P2010
P2010 is a single-core version of P2020. There is no P2010 target
configured. Drop related macros. P2010 SoC is still supported.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:10 -08:00
York Sun
4593637b13 powerpc: P2020: Remove macro CONFIG_P2020
Replace CONFIG_P2020 with ARCH_P2020 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:10 -08:00
York Sun
4167a67d5d powerpc: P1025: Remove macro CONFIG_P1025
Replace CONFIG_P1025 with ARCH_P1025 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:10 -08:00
York Sun
52b6f13d2c powerpc: P1024: Remove CONFIG_P1024
Replace CONFIG_P1024 with ARCH_P1024 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:10 -08:00
York Sun
a990799d52 powerpc: P1021: Remove macro CONFIG_P1021
Replace CONFIG_P1021 with ARCH_P1021 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:09 -08:00
York Sun
484fff6478 powerpc: P1020: Remove macro CONFIG_P1020
Replace CONFIG_P1020 with ARCH_P1020 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:09 -08:00
York Sun
e5cc150945 powerpc: P1_P2_RDB_PC: Drop TARGET_P1_P2_RDB_PC
All boards covered by this group have been converted to their own
targers. Drop TARGET_P1_P2_RDB_PC from Kconfig.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:09 -08:00
York Sun
8435aa777e powerpc: P2020RDB-PC: Separate from P1_P2_RDB_PC in Kconfig
Use TARGET_P2020RDB_PC instead of sharing with P1_P2_RDB_PC to
simplify Kconfig and config macros.

Remove macro CONFIG_P2020RDB.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:09 -08:00
York Sun
b0c98b4b9f powerpc: P1025RDB: Separate from P1_P2_RDB_PC in Kconfig
Use TARGET_P1025RDB instead of sharing with P1_P2_RDB_PC to
simplify Kconfig and config macros.

Remove macro CONFIG_P1025RDB.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:09 -08:00
York Sun
4eedabfe93 powerpc: P1024RDB: Separate from P1_P2_RDB_PC in Kconfig
Use TARGET_P1024RDB instead of sharing with TARGET_P1_P2_RDB_PC to
simplify Kconfig and macros.

Remove macro CONFIG_P1024RDB.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:09 -08:00
York Sun
da439db35a powerpc: P1021RDB: Separate from P1_P2_RDB_PC in Kconfig
Use TARGET_P1021RDB instead of sharing with TARGET_P1_P2_RDB_PC to
simplify Kconfig and macros.

Remove macro CONFIG_P1021RDB.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:09 -08:00
York Sun
e9bc8a8fc1 powerpc: P1020UTM: Separate from P1_P2_RDB_P2 in Kconfig
Use TARGET_P1020UTM instead of sharing with TARGET_P1_P2_RDB_PC
to simplify Kconfig and config macros.

Remove macro CONFIG_P1020UTM.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:08 -08:00
York Sun
f404b66ce1 powerpc: P1020RDB-PD: Separate from P1_P2_RDB_PC in Kconfig
Use TARGET_P1020RDB_PD instead of sharing with P1_P2_RDB_PC
to simplify Kconfig and config macros.

Remove macro CONFIG_P1020RDB_PD.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:08 -08:00
York Sun
aa14620c2e powerpc: P1020RDB-PC: Separate from P1_P2_RDB_PC in Kconfig
Use TARGET_P1020RDB_PC instead of sharing with TARGET_P1_P2_RDB_PC
to simplify Kconfig and config macros.

Remove macro CONFIG_P1020RDB_PC.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:08 -08:00
York Sun
fedae6ebaf powerpc: P1020MBG: Separate from P1_P2_RDB_PC in Kconfig
Use TARGET_P1020MBG instead of sharing with TARGET_P1_P2_RDB_PC to
simplify Kconfig and other macros.

Remove macro CONFIG_P1020MBG.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:08 -08:00
York Sun
41c7b7b132 powerpc: P1017: Drop configuration for P1017
P1017 is a single-core version of P1023. There is no P1017 target
configured. Drop related macros. P1017 SoC is still supported.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:08 -08:00
York Sun
46d9fc0bb7 powerpc: P1014: Drop configuration for P1014
P1014 is a variant of P1010. There is no P1014 target configured.
Drop related macros. P1014 SoC is still supported.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:08 -08:00
York Sun
2f8b81268a powerpc: P1013: Drop configuration for P1013
P1013 is a single-core version of P1022. There is no P1022 target
configured. Drop related macros. P1022 SoC is still supported.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:08 -08:00
York Sun
83b9bea116 powerpc: P1012: Drop configuration for P1012
P1012 is a single-core version of P1021. There is no P1012 target
configured. Drop related macros. P1012 SoC is still supported.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:07 -08:00
York Sun
1cdd96f325 powerpc: P1011: Remove macro CONFIG_P1011
Replace CONFIG_P1011 with ARCH_P1011 in Kconfig. P1011RDB seems to be in
scrapyard though.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:07 -08:00
York Sun
9bb1d6bcd2 powerpc: P1023: Remove macro CONFIG_P1023
Replace CONFIG_P1023 with ARCH_P1023 in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:07 -08:00
York Sun
feb9e25bc7 powerpc: P1022: Remove macro CONFIG_P1022
Replace CONFIG_P1022 with ARCH_P1022 in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:07 -08:00
York Sun
7601686c60 powerpc: P1010RDB: Remove macros CONFIG_P1010RDB_PA and CONFIG_P1010RDB_PB
Remove CONFIG_P1010RDB_PA and CONFIG_P1010RDB_PB and split TARGET_P1010RDB
to TARGET_P1010RDB_PA and TARGET_P1010RDB_PB in Kconfig.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:07 -08:00
York Sun
7d5f9f84f1 powerpc: P1010: Remove macro CONFIG_P1010
Replace CONFIG_P1010 with ARCH_P1010 in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:07 -08:00
York Sun
c8f48474bc powerpc: MPC8572: Remove macro CONFIG_MPC8572
Replace CONFIG_MPC8572 with ARCH_MPC8572 in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:06 -08:00
York Sun
23b36a7d48 powerpc: MPC8569: Remove macro CONFIG_MPC8569
Replace CONFIG_MPC8569 with ARCH_MPC8569 in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:06 -08:00
York Sun
d07c384310 powerpc: MPC8568: Remove macro CONFIG_MPC8568
Replace CONFIG_MPC8568 with ARCH_MPC8568 in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:06 -08:00
York Sun
99d0a3123e powerpc: MPC8560: Remove macro CONFIG_MPC8560
Replace CONFIG_MPC8560 with ARCH_MPC8560 in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:05 -08:00
York Sun
2f2d54b7cd powerpc: MPC8555CDS: Remove macro CONFIG_MPC8555CDS
Use CONFIG_TARGET_MPC8555CDS instead.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:05 -08:00
York Sun
3c3d8ab58d powerpc: MPC8555: Remove macro CONFIG_MPC8555
Replace CONFIG_MPC8555 with ARCH_MPC8555 in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:05 -08:00
York Sun
4096f350d5 powerpc: MPC8541CDS: Remove macro CONFIG_MPC8541CDS
Replace with CONFIG_TARGET_MPC8541CDS from Kconfig.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:05 -08:00
York Sun
3aff30825e powerpc: mpc8541: Remove macro CONFIG_MPC8541
Replace CONFIG_MPC8541 with ARCH_MPC8541 in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:05 -08:00
York Sun
7f825218dc powerpc: mpc8540: Remove macro CONFIG_MPC8540
Replace CONFIG_MPC8540 with ARCH_MPC8540 in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:04 -08:00
York Sun
24ad75ae55 powerpc: MPC8536: Move CONFIG_MPC8536 to Kconfig option
Replace CONFIG_MPC8536 with ARCH_MPC8536 in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:04 -08:00
York Sun
ebccf25518 powerpc: C29XPCIE: Remove macro CONFIG_C29XPCIE
Use CONFIG_TARGET_C29XPCIE instead.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:04 -08:00
York Sun
4fd64746b0 powerpc: C29X: Move CONFIG_PPC_C29X to Kconfig option
Replace CONFIG_PPC_C29X with ARCH_C29X in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:04 -08:00
York Sun
a202b9f802 powerpc: BSC9132QDS: Remove CONFIG_BSC9132QDS macro
Use CONFIG_TARGET_BSC9132QDS from Kconfig option, remove CONFIG_BSC9132QDS
macro.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:04 -08:00
York Sun
115d60c0cf powerpc: BSC9131/2: Move CONFIG_BSC9131/2 to Kconfig options
Replace CONFIG_BSC9131, CONFIG_BSC9132 with ARCH_BSC9131, ARCH_BSC9132
Kconfig options.

Also drop #ifdef in BSC9131RDB.h since it is redundant.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:03 -08:00
York Sun
25cb74b30a powerpc: MPC8544: Move CONFIG_MPC8544 to Kconfig option
Replace CONFIG_MPC8544 with ARCH_MPC8544 in Kconfig.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:03 -08:00
York Sun
281ed4c74b powerpc: MPC8548: Move CONFIG_MPC8548 to Kconfig option
Replace CONFIG_MPC8548 with ARCH_MPC8548 in Kconfig.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23 23:42:03 -08:00
Hou Zhiqiang
5eef15ea9d fsl: serdes: fix a deadloop issue for P4080
This deadloop is introduced by commit:
71fe222 fsl: serdes: ensure accessing the initialized maps of serdes protocol

deadloop detail:
cpu_init_r => fsl_serdes_init => p4080_erratum_serdes_a005 =>
is_serdes_configured => fsl_serdes_init

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-21 09:20:32 -08:00
Sriram Dash
4359a3b9e4 powerpc: mpc512x: Add support for get_svr() for mpc512x devices
Defines get_svr() for mpc512x devices

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-21 09:20:32 -08:00
Vagrant Cascadian
3450a8596d Fix spelling of "resetting".
Cover-Letter: Fixes several spelling errors for the words "resetting",
  "extended", "occur", and "multiple".

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-31 10:13:17 -04:00
Prabhakar Kushwaha
a9320c495e arch: powerpc: Remove unused dts frequency fixup for lbc_clk
lbc_clk is used to fixup dts as "bus frequency".
It is not being used by Linux IFC and eLBC driver.

So remove unused "bus frqeuency" fix-up of devicre tree.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-10-14 10:23:11 -07:00
Robert P. J. Day
fc0b5948e0 Various, accumulated typos collected from around the tree.
Fix various misspellings of:

 * deprecated
 * partition
 * preceding,preceded
 * preparation
 * its versus it's
 * export
 * existing
 * scenario
 * redundant
 * remaining
 * value
 * architecture

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2016-10-06 20:57:40 -04:00
Simon Glass
ca12e65caa spl: Add a parameter to jump_to_image_linux()
Instead of using the global spl_image variable, pass the required struct in
as an argument.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06 14:48:19 -04:00
Sriram Dash
f413d1cae8 mpc85xx: powerpc: usb: Update the list of Socs afftected by erratum A006261
Apply the erratum A006261 for the following Socs:
P2041 rev 2.0, P2040 rev 2.0, P5040 rev 2.0, 2.1

Do not apply erratum A006261 for the following Socs:
T4160, T4080, T1040, T1042, T1020, T1022, T2080, T2081

Erratum A006261 is applicable for the following Socs:
P1010(1.0, 2.0), P2041(1.0, 1.1, 2.0, 2.1), P2040(1.0, 1.1, 2.0, 2.1),
P3041(1.0, 1.1, 2.0, 2.1), P5010(1.0, 2.0), P5020(1.0, 2.0),
P5021(1.0, 2.0), T4240(1.0, 2.0), P5040(1.0,2.0,2.1).

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-28 09:08:16 -07:00
Sriram Dash
15a6d496e7 mpc85xx: powerpc: usb: Enable Usb phy initialisation settings for P1010
CONFIG_SYS_FSL_USB1_PHY_ENABLE is set and the USB Phy
offset are set to enable the initial setting of Usb Phy for P1010.

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-28 09:08:16 -07:00
Sriram Dash
08efeac55f mpc85xx: powerpc: usb: Modified the erratum A006261 according to endianness
Modifies erratum implementation due to the fact that P3041,
P5020, and P5040 are all big endian for the USB PHY registers, but
they were specified little endian.

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-28 09:08:16 -07:00
Tom Rini
cbe7706ab8 Merge git://git.denx.de/u-boot-fsl-qoriq
trini: Drop local memset() from
examples/standalone/mem_to_mem_idma2intr.c

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-26 17:10:56 -04:00
Masahiro Yamada
4491327d59 Remove arch/${ARCH}/include/asm/errno.h
Unlike Linux, nothing about errno.h is arch-specific in U-Boot.
As you see, all of arch/${ARCH}/include/asm/errno.h is just a
wrapper of <asm-generic/errno.h>.  Actually, U-Boot does not
export headers to user-space, so we just have to care about the
consistency in the U-Boot tree.

Now all of include directives for <asm/errno.h> are gone.
Deprecate <asm/errno.h>.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-09-23 17:56:18 -04:00
Masahiro Yamada
1221ce459d treewide: replace #include <asm/errno.h> with <linux/errno.h>
Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content.  (both just wrap <asm-generic/errno.h>)

Replace all include directives for <asm/errno.h> with <linux/errno.h>.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-23 17:55:42 -04:00
Masahiro Yamada
b5bf5cb3b3 treewide: use #include <...> to include public headers
We are supposed to use #include <...> to include headers in the
public include paths.  We should use #include "..." only for headers
in local directories.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-09-23 17:53:56 -04:00
Masahiro Yamada
63a7578e4e arch, board: squash lines for immediate return
Remove unneeded variables and assignments.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Reviewed-by: Angelo Dureghello <angelo@sysam.it>
2016-09-23 17:53:53 -04:00
Tom Rini
adf32adb70 PowerPC: Update MIP405/MIP405T to use Kconfig better
Convert CONFIG_MIP405T from SYS_EXTRA_OPTIONS to a real config

There are two boards, MIP405 and MIP405T that have a few differences.
Start by checking for CONFIG_TARGET_MIP405.  Then introduce
CONFIG_TARGET_MIP405T and use that not CONFIG_MIP405T.  Next, convert
also convert the usage of CONFIG_ISO_STRING to be based on Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-20 09:30:25 -04:00
Siva Durga Prasad Paladugu
a4d88920e5 Kconfig: Move config IDENT_STRING to Kconfig
Move the config IDENT_STRING to Kconfig and migrate all boards

[sivadur: Migrate zynq boards]
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
[trini: Update configs, add some default to sunxi Kconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-20 09:30:23 -04:00
Simon Glass
d3662dff78 Convert CONFIG_SPL_DRIVERS_MISC_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:08 -04:00
Simon Glass
d3e7e2b2ce Convert CONFIG_SPL_HASH_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:07 -04:00
Simon Glass
dbdaeee43c Convert CONFIG_SPL_CRYPTO_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:07 -04:00
Simon Glass
d3c1f46737 Move existing use of CONFIG_SPL_RSA to Kconfig
A few boards define this in a header file which is incorrect. It means that
Kconfig options that rely on this cannot be used. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:03:45 -04:00
Simon Glass
3433a693a9 Move existing use of CONFIG_SPL_DM to Kconfig
A few boards define this in a header file which is incorrect. It means that
Kconfig options that rely on this cannot be used. Move it.

Note that quite a few boards defined this options but do not appear to
actually use SPL:

	BSC9132QDS_NOR_DDRCLK100_SECURE
	BSC9132QDS_NOR_DDRCLK133_SECURE
	BSC9132QDS_SDCARD_DDRCLK100_SECURE
	BSC9132QDS_SDCARD_DDRCLK133_SECURE
	BSC9132QDS_SPIFLASH_DDRCLK100_SECURE
	BSC9132QDS_SPIFLASH_DDRCLK133_SECURE
	C29XPCIE_NOR_SECBOOT
	P1010RDB-PA_36BIT_NAND_SECBOOT
	P1010RDB-PA_36BIT_SPIFLASH_SECBOOT
	P1010RDB-PA_NAND_SECBOOT
	P1010RDB-PA_NOR_SECBOOT
	P1010RDB-PB_36BIT_NOR_SECBOOT
	P1010RDB-PB_36BIT_SPIFLASH_SECBOOT
	P1010RDB-PB_NAND_SECBOOT
	P1010RDB-PB_NOR_SECBOOT
	P3041DS_SECURE_BOOT
	P4080DS_SECURE_BOOT
	P5020DS_NAND_SECURE_BOOT
	P5040DS_SECURE_BOOT
	T1023RDB_SECURE_BOOT
	T1024QDS_DDR4_SECURE_BOOT
	T1024QDS_SECURE_BOOT
	T1024RDB_SECURE_BOOT
	T1040RDB_SECURE_BOOT
	T1042D4RDB_SECURE_BOOT
	T1042RDB_SECURE_BOOT
	T2080QDS_SECURE_BOOT
	T2080RDB_SECURE_BOOT
	T4160QDS_SECURE_BOOT
	T4240QDS_SECURE_BOOT
	ls1021aqds_nor_SECURE_BOOT
	ls1021atwr_nor_SECURE_BOOT
	ls1043ardb_SECURE_BOOT

For these boards CONFIG_SPL_DM will no-longer be defined in SPL. But since
they apparently don't have an SPL, this should not matter.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:03:41 -04:00
Simon Glass
b63f8a4336 arm: fsl: Adjust ordering of #ifndef CONFIG_SPL_BUILD
The secure boot header files incorrectly define SPL options only if
CONFIG_SPL_BUILD is defined. This means that the options are only enabled
in an SPL build, and not with a normal 'make xxx_defconfig'. This means
that moveconfig.py cannot work, since it sees the options as disabled even
when they may be manually enabled in an SPL build.

Fix this by changing the order.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:03:37 -04:00
Hou Zhiqiang
71fe22256c fsl: serdes: ensure accessing the initialized maps of serdes protocol
Up to now, the function is_serdes_configed() doesn't check if the map
of serdes protocol is initialized before accessing it. The function
is_serdes_configed() will get wrong result when it was called before
the serdes protocol maps initialized. As the first element of the map
isn't used for any device, so use it as the flag to indicate if the
map has been initialized.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:06:49 -07:00
Joe Hershberger
dfcc496ed7 net: mii: Changes not made by spatch
If the functions passed to the registration function are not in the same
C file (extern) then spatch will not handle the dependent changes.

Make those changes manually.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>

For the 4xx related files:
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-08-15 15:29:03 -05:00
Joe Hershberger
875e0bc68a net: mii: Fix changes made by spatch
Some of the changes were a bit too complex.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-08-15 15:29:03 -05:00
Joe Hershberger
5a49f17481 net: mii: Use spatch to update miiphy_register
Run scripts/coccinelle/net/mdio_register.cocci on the U-Boot code base.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-08-15 15:26:33 -05:00
Dirk Eibach
54a0eb7a18 ppc4xx: Fix platform support
Commit "ecc3066 Fix board init code to respect the C runtime environment"
broke platform support for ppc4xx.
start.S prepares a stackframe that is later rendered unusable by appending
the reserved space for global data.
Instead the reserved space has to be put first. Then the stackframe can
be pushed.

I can only test the 405EP OCM case. At least all other ppc4xx boards still
build.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2016-08-09 09:25:36 +02:00
Masahiro Yamada
bb6b142fc1 treewide: move CONFIG_PHYS_64BIT to Kconfig
We need to ensure that CONFIG_PHYS_64BIT is configured via Kconfig so
that it is always available to the build system.  Otherwise we can run
into cases where we have inconsistent sizes of certain attributes.

Ravi Babu reported offset mismatch of struct dwc3 across files since
commit 95ebc253e6 ("types.h: move and redefine resource_size_t").
Since the commit, resource_addr_t points to phys_addr_t, whose size
is dependent on CONFIG_PHYS_64BIT for ARM architecture.

I tried my best to use "select" where possible (for example, ARMv8
architecture) because I think this kind of option is generally user-
unconfigurable.  However, I see some of PowerPC boards have 36BIT
defconfigs as well as 32BIT ones.  I moved CONFIG_PHYS_64BIT to the
defconfigs for such boards.

CONFIG_36BIT is no longer referenced, so all of the defines were
removed from CONFIG_SYS_EXTRA_OPTIONS.

Fixes: 95ebc253e6 ("types.h: move and redefine resource_size_t")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Ravi Babu <ravibabu@ti.com>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-08-05 07:27:25 -04:00
York Sun
f3dbf1f0c9 powerpc/mpc85xx: Update erratum workaround for A006379
Update erratum workaround for A006379 to set register CPCHDBCR0
with value 0x001e0000, replacing the old value 0x003c0000.

Signed-off-by: York Sun <york.sun@nxp.com>
Reported-by: Dave Liu <dave.liu@nxp.com>
2016-08-02 09:43:13 -07:00
Tom Rini
499a950d41 Merge git://git.denx.de/u-boot-mpc86xx 2016-07-26 17:34:51 -04:00
Sumit Garg
69d4b48c84 SECURE_BOOT: Enable SD as a source for bootscript
Add support for reading bootscript and bootscript header from SD. Also
renamed macros *_FLASH to *_DEVICE to represent SD alongwith NAND and
NOR flash.

Reviewed-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:01:43 -07:00
Scott Wood
b60038ccab powerpc/86xx: Pass -mcpu=7400 to GCC
Without this, GCC uses the toolchain default, which may be incompatible
with -maltivec.

Signed-off-by: Scott Wood <oss@buserror.net>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-25 12:51:16 -07:00
Sumit Garg
aa36c84edf powerpc/mpc85xx: T104x: Add nand secure boot target
For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC.
In non-secure boot scenario from NAND, this address will map to CPC
configured as SRAM. But in case of secure boot, this default address
always maps to IBR (Internal Boot ROM).
The IBR code requires that the bootloader(U-boot) must lie in 0 to 3.5G
address space i.e. 0x0 - 0xDFFFFFFF.

For secure boot target from NAND, the text base for SPL is kept same as
non-secure boot target i.e. 0xFFFx_xxxx but the SPL U-boot binary will
be copied to CPC configured as SRAM with address in 0-3.5G(0xBFFC_0000)
As a the virtual and physical address of CPC would be different. The
virtual address 0xFFFx_xxxx needs to be mapped to physical address
0xBFFx_xxxx.

Create a new PBI file to configure CPC as SRAM with address 0xBFFC0000
and update DCFG SCRTACH1 register with location of Header required for
secure boot.

The changes are similar to
commit 467a40dfe3
    powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041

While P3041 has a 1MB CPC and does not require SPL. On T104x, CPC
is only 256K and thus SPL framework is used.
The changes are only applicable for SPL U-Boot running out of CPC SRAM
and not the next level U-Boot loaded on DDR.

Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-21 11:09:34 -07:00
Sumit Garg
8f01397ba7 powerpc/mpc85xx: SECURE BOOT- Enable chain of trust in SPL
As part of Chain of Trust for Secure boot, the SPL U-Boot will validate
the next level U-boot image. Add a new function spl_validate_uboot to
perform the validation.

Enable hardware crypto operations in SPL using SEC block.
In case of Secure Boot, PAMU is not bypassed. For allowing SEC block
access to CPC configured as SRAM, configure PAMU.

Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-21 11:09:23 -07:00
Robert P. J. Day
62a3b7dd08 Various, unrelated tree-wide typo fixes.
Fix a number of typos, including:

     * "compatble" -> "compatible"
     * "eanbeld" -> "enabled"
     * "envrionment" -> "environment"
     * "FTD" -> "FDT" (for "flattened device tree")
     * "ommitted" -> "omitted"
     * "overriden" -> "overridden"
     * "partiton" -> "partition"
     * "propogate" -> "propagate"
     * "resourse" -> "resource"
     * "rest in piece" -> "rest in peace"
     * "suport" -> "support"
     * "varible" -> "variable"

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2016-07-16 09:43:12 -04:00
Hamish Martin
4b689f02ff dm: gpio: MPC85XX GPIO platform data support
Define a platform data structure for the MPC85XX GPIO driver to allow
use of the driver without device tree. Users should define the GPIO
blocks for their platform like this:
  struct mpc85xx_gpio_plat gpio_blocks[] = {
         {
                 .addr = 0x130000,
                 .ngpios = 32,
         },
         {
                 .addr = 0x131000,
                 .ngpios = 32,
         },
  };

  U_BOOT_DEVICES(my_platform_gpios) = {
         { "gpio_mpc85xx", &gpio_blocks[0] },
         { "gpio_mpc85xx", &gpio_blocks[1] },
  };

This is intended to build upon the recent submission of the base
MPC85XX driver from Mario Six. We need to use that new driver
without dts support and this patch gives us that flexibility.
This has been tested on a Freescale T2080 CPU, although only the first
GPIO block.

Signed-off-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
Tested-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-11 14:06:44 -06:00
Marek Vasut
12c67d7522 powerpc: mpc85xx: Do not build errata command in SPL
The errata command is useless in SPL, so don't build it. This fixes
multiple build failures on PowerPC.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: York Sun <york.sun@nxp.com>
Fixes: 92623672f9 ("fsl: usb: make errata function common for PPC and ARM")
2016-07-05 17:40:28 +02:00
Robert P. J. Day
25bab53ab2 Remove unneeded remnants of bcopy().
Since bcopy() is no longer used, delete all remaining references to
it.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2016-06-06 13:39:18 -04:00
mario.six@gdsys.cc
07d31f8f98 dm: gpio: Add driver for MPC85XX GPIO controller
This patch adds a driver for the built-in GPIO controller of the MPC85XX
SoC (probably supporting other PowerQUICC III SoCs as well).

Each GPIO bank is identified by its own entry in the device tree, i.e.

gpio-controller@fc00 {
      #gpio-cells = <2>;
      compatible = "fsl,pq3-gpio";
      reg = <0xfc00 0x100>
}

By default, each bank is assumed to have 32 GPIOs, but the ngpios
setting is honored, so the number of GPIOs for each bank in configurable
to match the actual GPIO count of the SoC (e.g. the 32/32/23 banks of
the P1022 SoC).

The usual functions of GPIO drivers (setting input/output mode and output
value setting) are supported.

The driver has been tested on MPC85XX, but it is likely that other
PowerQUICC III devices will work as well.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-03 22:13:24 -07:00
Robert P. J. Day
b7707b043e arch/powerpc: Simplify some calculations using ARRAY_SIZE() macro.
Replace a number of array length calculations with the ARRAY_SIZE()
macro, for clarity.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-03 22:13:12 -07:00
Robert P. J. Day
7ffe3cd62e Delete tests of CONFIG_OF_LIBFDT when testing CONFIG_OF_BOARD_SETUP
Since CONFIG_OF_BOARD_SETUP depends on CONFIG_OF_LIBFDT:

  config OF_BOARD_SETUP
          bool "Set up board-specific details in device tree before boot"
          depends on OF_LIBFDT
          ...

remove superfluous tests of CONFIG_OF_LIBFDT when testing for
CONFIG_OF_BOARD_SETUP.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
[trini: Typo fix: s/ifdefi/ifdef/]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-05-27 15:41:16 -04:00
Simon Glass
14c67ebaef powerpc: Drop unused code related to generic board
Since generic board init is enabled, this is not used. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-27 15:39:54 -04:00
Tom Rini
826d06dbdd Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2016-05-25 07:19:31 -04:00
Tom Rini
fc15b9beed Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2016-05-24 13:42:03 -04:00
Aneesh Bansal
82eda68444 powerpc/mpc85xx: set L2PE in L2CSR0 before enabling L2 cache
While enabling L2 cache, the value of L2PE (L2 cache parity/ECC
error checking enable) must not be changed while the L2 cache is
enabled.
So, L2PE must be set before enabling L2 cache.

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-05-24 10:31:21 -07:00
York Sun
cb1629f91a powerpc: Disable flush or invalidate dcache by range for some SoCs
Commit ac337168a unified functions to flush and invalidate dcache by
range. These two functions were no-op for SoCs other than 4xx and
MPC86xx. Adding these functions seemed to be correct but introduced
issues when the dcache is flushed. While the root cause is under
investigation, disable these functions for affected SoCs so various
drivers can work.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-05-19 10:47:11 -07:00
Alex Porosanu
76394c9c91 crypto/fsl: add support for multiple SEC engines initialization
For SoCs that contain multiple SEC engines, each of them needs
to be initialized (by means of initializing among others the
random number generator).

Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-05-18 08:51:46 -07:00
Alex Porosanu
404bf4547e arch/arm, arch/powerpc: add # of SEC engines on the SOC
Some SOCs, specifically the ones in the C29x familiy can have
multiple security engines. This patch adds a system configuration
define which indicates the maximum number of SEC engines that
can be found on a SoC.

Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-05-18 08:51:46 -07:00
mario.six@gdsys.cc
dbc82ce31b dm: fsl_i2c: Enable DM for FSL I2C
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2016-05-17 08:28:55 +02:00
mario.six@gdsys.cc
ec2c81c5d4 dm: fsl_i2c: Rename I2C register structure
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2016-05-17 08:28:52 +02:00
Robert P. J. Day
1cc0a9f496 Fix various typos, scattered over the code.
Spelling corrections for (among other things):

* environment
* override
* variable
* ftd (should be "fdt", for flattened device tree)
* embedded
* FTDI
* emulation
* controller
2016-05-05 21:39:26 -04:00
Andreas Bießmann
09c2b8f3e3 Change my mailaddress
I'll switch my mails to my own server, so drop all gmail references.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-05-02 18:37:09 -04:00
mario.six@gdsys.cc
5068946120 powerpc: mpc85xx: Enable pre-relocation malloc for MPC85xx
To enable DM on MPC85xx, we need pre-relocation malloc, which is
implemented in this patch.

We also make sure that the IVORs are always 4-aligned on e500 to prevent
alignment exceptions caused by code changes in start.S.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Cc: York Sun <york.sun@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-04-08 15:42:10 -07:00
Mateusz Kulikowski
e162c6b1a7 usb: Rename ehci-fsl.h to ehci-ci.h
Most of ehci-fsl header describe USB controller
designed by Chipidea and used by various SoC vendors.

This patch renames it to a generic header: ehci-ci.h
Contents of file are not changed (so it contains several
references to freescale SoCs).

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Simon Glass <sjg@chromium.org>
2016-04-01 17:18:10 -04:00
Vagrant Cascadian
a6f70a3d14 Fix spelling of "transferred".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-22 12:16:16 -04:00
Simon Glass
73223f0e1b Kconfig: Move CONFIG_FIT and related options to Kconfig
There are already two FIT options in Kconfig but the CONFIG options are
still in the header files. We need to do a proper move to fix this.

Move these options to Kconfig and tidy up board configuration:

   CONFIG_FIT
   CONFIG_OF_BOARD_SETUP
   CONFIG_OF_SYSTEM_SETUP
   CONFIG_FIT_SIGNATURE
   CONFIG_FIT_BEST_MATCH
   CONFIG_FIT_VERBOSE
   CONFIG_OF_STDOUT_VIA_ALIAS
   CONFIG_RSA

Unfortunately the first one is a little complicated. We need to make sure
this option is not enabled in SPL by this change. Also this option is
enabled automatically in the host builds by defining CONFIG_FIT in the
image.h file. To solve this, add a new IMAGE_USE_FIT #define which can
be used in files that are built on the host but must also build for U-Boot
and SPL.

Note: Masahiro's moveconfig.py script is amazing.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add microblaze change, various configs/ re-applies]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-03-14 19:18:07 -04:00
Simon Glass
9e971632cd freescale: Remove CONFIG_DM from header files
Kconfig options must defined in the defconfig files. Since RSA_SOFTWARE_EXP
relies on CONFIG_DM, unless it is set in kconfig we cannot enable RSA.
Remove the hacks which enable CONFIG_DM in header files and update the
defconfig.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-03-14 14:21:27 -04:00
Qianyu Gong
075affb1ac fm: fdt: Move fman ucode fixup to driver code
Not only powerpc/mpc85xx but also Freescale Layerscape platforms will
use fdt_fixup_fman_firmware() to insert Fman ucode blob into the device
tree. So move the function to Fman driver code.

Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-24 08:51:13 -08:00
Qianyu Gong
2459afb1a7 qe: move drivers/qe/qe.h to include/fsl_qe.h
As the QE firmware struct is shared with Fman, move the header file
out of drivers/qe/.

Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-24 08:51:13 -08:00
Aneesh Bansal
f698e9f39a powerpc/SECURE_BOOT: Add PAMU driver
PAMU driver basic support for usage in Secure Boot.
In secure boot PAMU is not in bypass mode. Hence to use
any peripheral (SEC Job ring in our case), PAMU has to be
configured.

The patch reverts commit 7cad2e38d6.

The Header file pamu.h and few functions in driver have been derived
from Freescale Libos.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-24 08:40:55 -08:00
David Müller (ELSOFT AG)
928f605455 Remove unused CONFIG_MODEM_SUPPORT option and associated dead code.
Signed-off-by: David Müller <d.mueller@elsoft.ch>
2016-02-08 10:22:44 -05:00
Bin Meng
a187559e3d Use correct spelling of "U-Boot"
Correct spelling of "U-Boot" shall be used in all written text
(documentation, comments in source files etc.).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2016-02-06 12:00:59 +01:00
Tom Rini
cd85bec36d Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2016-01-27 15:05:36 -05:00
Aneesh Bansal
d0a6d7ce55 secure_boot: enable chain of trust for PowerPC platforms
Chain of Trust is enabled for PowerPC platforms for Secure Boot.
CONFIG_BOARD_LATE_INIT is defined.
In board_late_init(), fsl_setenv_chain_of_trust() is called which
will perform the following:
- If boot mode is non-secure, return (No Change)
- If boot mode is secure, set the following environmet variables:
   bootdelay = 0 (To disable Boot Prompt)
   bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script)

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:12:56 -08:00
Aneesh Bansal
0a6b2714ad secure_boot: create function to determine boot mode
A function is created to detrmine if the boot mode is secure
or non-secure for differnt SoC's.

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:12:42 -08:00
Aneesh Bansal
bdc22074c5 secure_boot: split the secure boot functionality in two parts
There are two phases in Secure Boot
1. ISBC: In BootROM, validate the BootLoader (U-Boot).
2. ESBC: In U-Boot, continuing the Chain of Trust by
         validating and booting LINUX.

For ESBC phase, there is no difference in SoC's based on ARM or
PowerPC cores.

But the exit conditions after ISBC phase i.e. entry conditions for
U-Boot are different for ARM and PowerPC.
PowerPC:

If Secure Boot is executed, a separate U-Boot target is required
which must be compiled with a diffrent Text Base as compared to
Non-Secure Boot. There are some LAW and TLB settings which are
required specifically for Secure Boot scenario.

ARM:
ARM based SoC's have a fixed memory map and exit conditions from
BootROM are same irrespective of boot mode (Secure or Non-Secure).

Thus the current Secure Boot functionlity has been split into
two parts:
CONFIG_CHAIN_OF_TRUST
This will have the following functionality as part of U-Boot:
1. Enable commands like esbc_validate, esbc_halt
2. Change the environment settings based on bootmode, determined
   at run time:
     - If bootmode is non-secure, no change
     - If bootmode is secure, set the following:
         - bootdelay = 0 (Don't give boot prompt)
         - bootcmd = Validate and execute the bootscript.

CONFIG_SECURE_BOOT
This is defined only for creating a different compile time target
for secure boot.

Traditionally, both these functionalities were defined under
CONFIG_SECURE_BOOT. This patch is aimed at removing the requirement
for a separate Secure Boot target for ARM based SoC's.
CONFIG_CHAIN_OF_TRUST will be defined and boot mode will be
determine at run time.

Another Security Requirement for running CHAIN_OF_TRUST is that
U-Boot environemnt must not be picked from flash/external memory.
This cannot be done based on bootmode at run time in current U-Boot
architecture. Once this dependency is resolved, no separate
SECURE_BOOT target will be required for ARM based SoC's.

Currently, the only code under CONFIG_SECURE_BOOT for ARM SoC's is
defining CONFIG_ENV_IS_NOWHERE

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:12:32 -08:00
Aneesh Bansal
74eecd820f secure_boot: include/configs: move definition of CONFIG_CMD_BLOB
CONFIG_CMD_BLOB must be defined in case of Secure Boot. It was
earlier defined in all config files. The definition has been
moved to a common file which is included by all configs.

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:12:26 -08:00
Ricardo Ribalda Delgado
80cce2629b ppc: xilinx-ppc4xx: Port to DM serial
xilinx_uartlite has been ported to DM, this patch makes the
xilinx-ppc405-generic and the xilinx-ppc440-generic boards use the new
DM driver.

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:57:11 +01:00
Ricardo Ribalda Delgado
5e68f17e24 ppc: dts: Add device tree for xilix-ppc4xx-generic
Add device tree example file for xilinx-ppc440-generic and
xilinx-ppc405-generic

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:43:01 +01:00
Ricardo Ribalda Delgado
5b218ae106 mailaddr: Update mail address
The old mail address will stop working soon.
Update it all the files

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:32:05 +01:00
Ricardo Ribalda Delgado
583aefb89c xilinx-ppc440: Remove support for v5fx30teval
It is just a specialized version of xilinx-ppc440

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:32:04 +01:00
Ricardo Ribalda Delgado
70c29dcdbc ppc: xilinx-ppc405: Remove support for fx12mm
It is just a specialized version of the xilinx-ppc405

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:32:04 +01:00
Ricardo Ribalda Delgado
9ac0efd292 ppc: xilinx-ppc440: Remove support for ml507
ml507 is just a specialized version of the xilinx-ppc440-generic

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:32:04 +01:00
Tom Rini
d82477748d Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2016-01-25 16:45:00 -05:00
Ashish kumar
43381474ff arch/powperpc: Fix start_align due to use of __ffs64() instead ffs64()
Incorrect DDR law was created in case of B4860qds after commit
2d2f490d. Return value of ffs64() differs from __ffs64(), eg.
    ffs64(0x80000000) = 0x20
    __ffs64(0x80000000) = 0x1f
As a result of this change, callers need to adjust the expected
return value by removing -1.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-25 12:30:31 -08:00
Prabhakar Kushwaha
2c0d69713c powerpc: mpc85xx: Move set_liodns, setup_portals to common boot seq
Users migrating Freescale's PowerPC SoC U-Boot code to their custom
board, often overlook the need to execute set_liodns() and
setup_portals() being called by platform files.

So Move set_liodns() and setup_portals() to common u-boot boot
sequence

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-25 12:13:31 -08:00
Shengzhou Liu
a994b3deb0 driver/ddr/fsl: Add workaround for A009663
Erratum A-009663 workaround requires to set DDR_INTERVAL[BSTOPRE] to 0
before setting DDR_SDRAM_CFG[MEM_EN] and set DDR_INTERVAL[BSTOPRE]
to the desired value after DDR initialization has completed.

When DDR controller is configured to operate in auto-precharge
mode(DDR_INTERVAL[BSTOPRE]=0), this workaround is not needed.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-25 08:24:15 -08:00
Tom Rini
0080931abf serial: Remove serial_putc_raw_dev
clang-3.8 reports that serial_putc_raw_dev in serial_ns16550.c is
unused.  Further investigation shows that we have 3 places that
implement this function and no callers, remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-25 10:39:45 -05:00
Tom Rini
6e2f153895 arm, powerpc: Update cc-version tests to check for cc-name as well
For compatibility clang will report some gcc version.  However since we
are checking gcc versions in order to then fail to build, we should
limit these tests only to when we are using gcc and not clang.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-01-25 10:39:44 -05:00
Tom Rini
5b8031ccb4 Add more SPDX-License-Identifier tags
In a number of places we had wordings of the GPL (or LGPL in a few
cases) license text that were split in such a way that it wasn't caught
previously.  Convert all of these to the correct SPDX-License-Identifier
tag.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-01-19 08:31:21 -05:00
Ben Whitten
192bc6948b Fix GCC format-security errors and convert sprintfs.
With format-security errors turned on, GCC picks up the use of sprintf with
a format parameter not being a string literal.

Simple uses of sprintf are also converted to use strcpy.

Signed-off-by: Ben Whitten <ben.whitten@gmail.com>
Acked-by: Wolfgang Denk <wd@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-01-14 22:11:34 -05:00
Albert ARIBAUD
ecc306639e Fix board init code to respect the C runtime environment
board_init_f_mem() alters the C runtime environment's
stack it is actually already using. This is not a valid
behaviour within a C runtime environment.

Split board_init_f_mem into C functions which do not alter
their own stack and always behave properly with respect to
their C runtime environment.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Thomas Chou <thomas@wytron.com.tw>
2016-01-13 21:05:17 -05:00
Robert P. J. Day
d7b4ca2b6f powerpc: Various typo fixes under arch/powerpc/cpu/mpc83xx
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2016-01-08 10:15:43 -05:00
Heiko Schocher
6a655d8e34 powerpc, mpc5xxx: fix missing bootflag init
since:
commit: f05ad9ba "Add a way to skip relocation"

tqm5200s board fails to boot. Reason is that
board_init_f has a function parameter bootflag,
which is not setup in
in arch/powerpc/cpu/mpc5xxx/start.S _start

So board_init_f gets a undefined bootflag,
currently the gd pointer address. Unfortunately
this address sets the GD_FLG_SKIP_RELOC bit,
so u-boot code gets not relocated and u-boot
does not boot ...

Init bootflag with 0, and tqm5200 boots fine again.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <yorksun@freescale.com>
2016-01-05 08:33:44 -08:00
Tom Rini
1a33892164 fsl_*_serdes.c: Modify memset call in serdes_init
GCC 5.x does not like sizeof(array_variable) and errors out.  Change these
calls to be instead sizeof(u8) (as that's what serdes_prtcl_map is) *
SERDES_PRCTL_COUNT (the number of array elements).

Cc: York Sun <yorksun@freescale.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-12-13 18:27:29 -08:00
Shengzhou Liu
a46b1852de fsl/ddr: updated ddr errata-A008378 for arm and power SoCs
DDR errata-A008378 applies to LS1021-20-22A-R1.0, T1023-R1.0,
T1024-R1.0, T1040-42-20-22-R1.0/R1.1, it has been fixed on
LS102x Rev2.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-12-13 18:27:28 -08:00
Shengzhou Liu
a07bdad749 fsl/errata: move fsl_errata.h to common directory
move arch/powerpc/include/asm/fsl_errata.h to include/fsl_errata.h
to make it public for both ARM and POWER SoCs.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
[York Sun: fix soc.h path in fsl_errata.h]
Reviewed-by: York Sun <yorksun@freescale.com>
2015-12-13 18:27:28 -08:00
Wolfgang Denk
6623aee5b6 PPC4xx: Create "liebherr" vendor directory
In preparation of some new Liebherr boards to be added soon, a new
"liebherr" vendor directory gets created, and the "lwmon5" board
directory is moved into this new vendor directory.

cc: Stefan Roese <sr@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2015-11-30 12:50:29 +01:00
Stefan Roese
7514037bcd ppc4xx: Remove remnants from ocotea, taishan, ebony and taihu
The removal of some PPC4xx boards did not catch all references to
these boards. This patch now removes all remnants still left.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefan Roese <sr@denx.de>
2015-11-30 12:44:54 +01:00
Thomas Chou
f27445cbdc ns16550: unify serial_ppc
Unify serial_ppc, and use the generic binding.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Add TODO comment]
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-11-21 21:50:04 -05:00
Simon Glass
24b852a7a2 Move console definitions into a new console.h file
The console includes a global variable and several functions that are only
used by a small subset of U-Boot files. Before adding more functions, move
the definitions into their own header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-11-19 20:27:50 -07:00
Dirk Eibach
a3f9d6c779 mpc83xx: Add strider board
The gdsys strider board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.

On board peripherals include:
- 1x 10/100 Mbit/s Ethernet (optional)
- Lattice ECP3 FPGA connected via eLBC

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
[trini: Drop setting CONFIG_SYS_GENERIC_BOARD, this is always true now]
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-11-12 18:03:48 -05:00
Tom Rini
7ff15aca1a powerpc: Finish updating u-boot*lds scripts for newer binutils
In 522b021 we dropped 'PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4)' lines in
the mpc85xx linker scripts as this is not required and breaks newer
binutils.  This commit cleans up the rest of the powerpc linker scripts.

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-11-10 09:20:29 -05:00
Tom Rini
da58dec866 Various Makefiles: Add SPDX-License-Identifier tags
After consulting with some of the SPDX team, the conclusion is that
Makefiles are worth adding SPDX-License-Identifier tags too, and most of
ours have one.  This adds tags to ones that lack them and converts a few
that had full (or in one case, very partial) license blobs into the
equivalent tag.

Cc: Kate Stewart <kstewart@linuxfoundation.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-11-10 09:19:52 -05:00
Zhenhua Luo
522b021a8a mpc85xx/u-boot*.lds: remove _GLOBAL_OFFSET_TABLE_ definition
In binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbols defined by PROVIDE in
u-boot.lds overrides the linker built-in symbols
(https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commitdiff;
h=b893397a4b1316610f49819344817715e4305de9),
so the linker is treating _GLOBAL_OFFSET_TABLE_ as a definition into the
.reloc section.

To align with the change of binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbol
should not be defined in sections, and the symbols in linker generated .got
section should be used(https://sourceware.org/ml/binutils/2008-09/
msg00122.html)

Fixed the following build errors with binutils-2.25:
| powerpc-poky-linux-gnuspe-ld.bfd: _GLOBAL_OFFSET_TABLE_ not defined in
linker created .got

Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
2015-11-09 23:21:06 +00:00
Måns Rullgård
44d0677a90 Replace "extern inline" with "static inline"
A number of headers define functions as "extern inline" which is
causing problems with gcc5.  The reason is that starting with
version 5.1, gcc defaults to the standard C99 semantics for the
inline keyword.

Under the traditional GNU inline semantics, an "extern inline"
function would never create an external definition, the same
as inline *without* extern in C99.  In C99, and "extern inline"
definition is simply an external definition with an inline hint.
In short, the meanings of inline with and without extern are
swapped between GNU and C99.

The upshot is that all these definitions in header files create
an external definition wherever those headers are included,
resulting in multiple definition errors at link time.

Changing all these functions to "static inline" fixes the problem
since this works as desired in all gcc versions.  Although the
semantics are slightly different (a static inline definition may
result in an actual function being emitted), it works as intended
in practice.

This patch also removes extern prototype declarations for the
changed functions where they existed.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2015-11-09 18:19:40 -05:00
Fabio Estevam
2d2f490dd5 powerpc: Remove __ilog2_u64 and ffs4 from bitops
Remove __ilog2_u64 and ffs4 from powerpc bitops to align with the
kernel implementation.

Use the generic __ffs64 instead of a custom powerpc implementation.

Cc: York Sun <yorksun@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-11-05 16:47:05 -05:00
Bin Meng
4b6d09449f video: Drop DEV_EXT_VIDEO flag
DEV_EXT_VIDEO does not have any actual meaning, hence drop it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-05 08:24:42 +01:00
Andy Fleming
87e29878ca mpc85xx: Add support for the Varisys Cyrus board
This board runs a P5020 or P5040 chip, and utilizes
an EEPROM with similar formatting to the Freescale P5020DS.

Large amounts of this code were developed by
Adrian Cox <adrian at humboldt dot co dot uk>

Signed-off-by: Andy Fleming <afleming@gmail.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-04 15:19:34 -08:00
Shengzhou Liu
96d59e9d6a mpc85xx/t2081: enable parsing DDR ratio for T2081 rev1.1
T2081 rev 1.1 changes MEM_PLL_RAT in RCW which requires new parsing
for PLL ratio.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-02 08:51:50 -08:00
Zhao Qiang
d468377672 t1040d4rdb: assign muxed pins to qe-tdm when set hwconfig qe-tdm
qe-tdm is muxed with diu, if hwconfig setted as qe-tdm,
assign muxed pins to qe-tdm, then delete diu node from
device tree.

Signed-off-by: Zhao Qiang <qiang.zhao@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-02 08:48:20 -08:00
Tom Rini
588eec2a86 Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2015-10-30 12:56:58 -04:00
Shaohui Xie
8225b2fd87 net: Move some header files to include/
The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM
and PPC, move it out of ppc to include/, and change the path in
drivers accordingly.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29 10:34:00 -07:00
Tom Rini
b147ff2f37 arch/powerpc/cpu/ppc4xx/Kconfig: Finish removing boards
My patches to drop various ppc4xx boards were not build tested and
omitted the Kconfig parts.

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-27 20:28:39 -04:00
Simon Glass
75918afa64 powerpc: Drop old non-generic-board code
This code is no-longer used. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-10-19 17:06:20 -04:00
Tom Rini
b9f06b360d arch/powerpc/config.mk: Pass -fno-ira-hoist-pressure when possible
There are various toolchain issues that cause us to produce invalid
binaries with certain gcc 4.8.x and 4.9.x versions when we don't pass
this flag in.

Tested-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-17 08:04:11 -04:00
Stefan Roese
b6b5e394db ppc4xx: Remove lcd4_lwmon5 support
This platform has not gone into production. So lets remove it.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-10-11 17:12:10 -04:00
Stefan Roese
04386f656b Revert "powerpc: ppc4xx: remove lwmon5 support"
This reverts commit 8fe11b8901.

I'll add support to lwmon5 in the next patch and will remove
support for the broken lcd4_lwmon5 as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-10-11 17:12:09 -04:00
Masahiro Yamada
2ec69b881c powerpc: mpc85xx: remove stxgp3, stxssa support
These have not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Dan Malek <dan@embeddedalley.com>
2015-09-02 11:33:19 -04:00
Masahiro Yamada
972f5320da powerpc: mpc5xx: remove cmi_mpc5xx support
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-02 11:33:18 -04:00
Masahiro Yamada
eb5d1dc7a6 powerpc: ppc4xx: remove zeus support
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Stefan Roese <sr@denx.de>
2015-09-02 11:33:17 -04:00
Masahiro Yamada
0e03059396 powerpc: ppc4xx: remove sbc405 support
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-02 11:33:16 -04:00
Masahiro Yamada
242836a893 powerpc: ppc4xx: remove pcs440ep support
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Stefan Roese <sr@denx.de>
2015-09-02 11:33:15 -04:00
Masahiro Yamada
c6999e5f85 powerpc: ppc4xx: remove p3p440 support
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Stefan Roese <sr@denx.de>
2015-09-02 11:33:14 -04:00
Masahiro Yamada
8fe11b8901 powerpc: ppc4xx: remove lwmon5 support
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)

Remove CONFIG_LWMON5 references.
(Also, remove undefined CONFIG_WD_MAX_RATE while I am here.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Stefan Roese <sr@denx.de>
2015-09-02 11:33:13 -04:00
Masahiro Yamada
54a3f260fd powerpc: ppc4xx: remove csb272, csb472 support
These have not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tolunay Orkun <torkun@nextio.com>
2015-09-02 11:33:12 -04:00
Masahiro Yamada
0d2fc81133 powerpc: ppc4xx: remove alpr support
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Stefan Roese <sr@denx.de>
2015-09-02 11:33:11 -04:00
Tom Rini
9809ccdd4c Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2015-09-02 11:30:46 -04:00
Aneesh Bansal
2ed948f466 SECURE_BOOT: Disable IE Key feature for RAMBOOT
ISBC Key Extension feature is not applicable for RAMBOOT
as there is no way to retrieve the CSF Header and validated
IE Key table from SRAM once CPC has been disabled.
The feature is only applicable in case of NOR SECURE BOOT.
Code Cleanup:
The SECURE_BOOT specific defines have been moved from
arch-ls102xa/config.h to
arm/include/asm/fsl_secure_boot.h

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-09-01 21:38:02 -05:00
Igal Liberman
97a8d010e0 net/fman: Support both new and legacy FMan Compatibles
Recently  the FMan Port and MAC compatibles were changed.
This patch aligns the FMan Port and MAC compatibles
to the new FMan device tree binding document.
The FMan device tree binding document can be found in the Linux kernel:
./Documentation/devicetree/bindings/powerpc/fsl/fman.txt

This patch doesn't affect legacy compatibles support.

Signed-off-by: Igal Liberman <igal.liberman@freescale.com>
Tested-by: Xing Lei <xing.lei@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-09-01 20:57:15 -05:00
York Sun
2becdc6f9d powerpc: e6500: Lock/unlock L2 cache instead of L1 as init_ram
MPC85xx has been using locked L1 cache as init_ram. L1 cache is a write
through cache on E6500. L2 cache is enabled to to hold the data. This
patch locks/unlocks L2 cache to ensure no data cast out from L2 cache.

Signed-off-by: York Sun <yorksun@freescale.com>
Reported-by: Jeffery Zhu <Jefferry.Zhu@freescale.com>
2015-09-01 20:42:54 -05:00
Ruchika Gupta
057c220055 Correct License and Copyright information on few files
gpio.h - Added missing copyright in few files.
rsa-mod-exp.h - Corrected copyright in the file.
fsl_sec.h - Added missing license in files
drivers/crypto/fsl/Makefile - Removed the incomplete GPLv2 license and replaced it with GPLv2+ license

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
2015-08-12 20:47:46 -04:00