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powerpc: P1021: Remove macro CONFIG_P1021
Replace CONFIG_P1021 with ARCH_P1021 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
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484fff6478
commit
a990799d52
8 changed files with 13 additions and 11 deletions
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@ -144,6 +144,7 @@ config TARGET_P1021RDB
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bool "Support P1021RDB"
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select SUPPORT_SPL
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select SUPPORT_TPL
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select ARCH_P1021
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config TARGET_P1024RDB
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bool "Support P1024RDB"
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@ -287,6 +288,9 @@ config ARCH_P1011
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config ARCH_P1020
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bool
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config ARCH_P1021
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bool
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config ARCH_P1022
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bool
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@ -75,7 +75,7 @@ obj-$(CONFIG_ARCH_MPC8572) += mpc8572_serdes.o
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obj-$(CONFIG_ARCH_P1010) += p1010_serdes.o
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obj-$(CONFIG_ARCH_P1011) += p1021_serdes.o
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obj-$(CONFIG_ARCH_P1020) += p1021_serdes.o
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obj-$(CONFIG_P1021) += p1021_serdes.o
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obj-$(CONFIG_ARCH_P1021) += p1021_serdes.o
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obj-$(CONFIG_ARCH_P1022) += p1022_serdes.o
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obj-$(CONFIG_ARCH_P1023) += p1023_serdes.o
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obj-$(CONFIG_P1024) += p1021_serdes.o
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@ -596,7 +596,7 @@ void get_sys_info(sys_info_t *sys_info)
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#endif
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#ifdef CONFIG_QE
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#if defined(CONFIG_P1021) || defined(CONFIG_P1025)
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#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_P1025)
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sys_info->freq_qe = sys_info->freq_systembus;
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#else
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qe_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_QE_RATIO)
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@ -199,7 +199,7 @@
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#endif
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#elif defined(CONFIG_P1021)
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#elif defined(CONFIG_ARCH_P1021)
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#define CONFIG_MAX_CPUS 2
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#define CONFIG_SYS_FSL_NUM_LAWS 12
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#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
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@ -2488,7 +2488,7 @@ typedef struct ccsr_gur {
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u8 res11a[76];
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par_io_t qe_par_io[7];
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u8 res11b[1600];
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#elif defined(CONFIG_P1021) || defined(CONFIG_P1025)
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#elif defined(CONFIG_ARCH_P1021) || defined(CONFIG_P1025)
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u8 res11a[12];
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u32 iovselsr;
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u8 res11b[60];
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@ -567,7 +567,7 @@ static void phy_change(struct eth_device *dev)
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{
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uec_private_t *uec = (uec_private_t *)dev->priv;
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#if defined(CONFIG_P1021) || defined(CONFIG_P1025)
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#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_P1025)
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ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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/* QE9 and QE12 need to be set for enabling QE MII managment signals */
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@ -578,7 +578,7 @@ static void phy_change(struct eth_device *dev)
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/* Update the link, speed, duplex */
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uec->mii_info->phyinfo->read_status(uec->mii_info);
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#if defined(CONFIG_P1021) || defined(CONFIG_P1025)
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#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_P1025)
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/*
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* QE12 is muxed with LBCTL, it needs to be released for enabling
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* LBCTL signal for LBC usage.
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@ -1193,14 +1193,14 @@ static int uec_init(struct eth_device* dev, bd_t *bd)
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uec_private_t *uec;
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int err, i;
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struct phy_info *curphy;
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#if defined(CONFIG_P1021) || defined(CONFIG_P1025)
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#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_P1025)
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ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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#endif
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uec = (uec_private_t *)dev->priv;
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if (uec->the_first_run == 0) {
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#if defined(CONFIG_P1021) || defined(CONFIG_P1025)
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#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_P1025)
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/* QE9 and QE12 need to be set for enabling QE MII managment signals */
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setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE9);
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setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE12);
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@ -1232,7 +1232,7 @@ static int uec_init(struct eth_device* dev, bd_t *bd)
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udelay(100000);
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} while (1);
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#if defined(CONFIG_P1021) || defined(CONFIG_P1025)
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#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_P1025)
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/* QE12 needs to be released for enabling LBCTL signal*/
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clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE12);
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#endif
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@ -82,7 +82,6 @@
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#if defined(CONFIG_TARGET_P1021RDB)
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#define CONFIG_BOARDNAME "P1021RDB-PC"
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#define CONFIG_NAND_FSL_ELBC
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#define CONFIG_P1021
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#define CONFIG_QE
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#define CONFIG_VSC7385_ENET
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#define CONFIG_SYS_LBC_LBCR 0x00080000 /* Implement conversion of
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@ -3383,7 +3383,6 @@ CONFIG_OS2_ENV_ADDR
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CONFIG_OS_ENV_ADDR
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CONFIG_OTHBOOTARGS
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CONFIG_OVERWRITE_ETHADDR_ONCE
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CONFIG_P1021
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CONFIG_P1024
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CONFIG_P1025
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CONFIG_P2020
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