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powerpc: MPC8555: Remove macro CONFIG_MPC8555

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Replace CONFIG_MPC8555 with ARCH_MPC8555 in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
This commit is contained in:
York Sun 2016-11-16 11:23:23 -08:00
parent 4096f350d5
commit 3c3d8ab58d
13 changed files with 15 additions and 13 deletions
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4
arch/powerpc/cpu/mpc85xx/Kconfig
View file

@ -76,6 +76,7 @@ config TARGET_MPC8548CDS
config TARGET_MPC8555CDS
bool "Support MPC8555CDS"
select ARCH_MPC8555
config TARGET_MPC8560ADS
bool "Support MPC8560ADS"
@ -207,6 +208,9 @@ config ARCH_MPC8544
config ARCH_MPC8548
bool
config ARCH_MPC8555
bool
source "board/freescale/b4860qds/Kconfig"
source "board/freescale/bsc9131rdb/Kconfig"
source "board/freescale/bsc9132qds/Kconfig"

2
arch/powerpc/cpu/mpc85xx/cpu.c
View file

@ -294,7 +294,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
/* Everything after the first generation of PQ3 parts has RSTCR */
#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \
defined(CONFIG_MPC8555) || defined(CONFIG_MPC8560)
defined(CONFIG_ARCH_MPC8555) || defined(CONFIG_MPC8560)
unsigned long val, msr;
/*

4
arch/powerpc/cpu/mpc85xx/speed.c
View file

@ -626,7 +626,7 @@ void get_sys_info(sys_info_t *sys_info)
*/
lcrr_div *= 4;
#elif !defined(CONFIG_ARCH_MPC8540) && !defined(CONFIG_ARCH_MPC8541) && \
!defined(CONFIG_MPC8555) && !defined(CONFIG_MPC8560)
!defined(CONFIG_ARCH_MPC8555) && !defined(CONFIG_MPC8560)
/*
* Yes, the entire PQ38 family use the same
* bit-representation for twice the clock divider values.
@ -682,7 +682,7 @@ int get_clocks (void)
* AN2919.
*/
#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \
defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555) || \
defined(CONFIG_MPC8560) || defined(CONFIG_ARCH_MPC8555) || \
defined(CONFIG_P1022)
gd->arch.i2c1_clk = sys_info.freq_systembus;
#elif defined(CONFIG_ARCH_MPC8544)

2
arch/powerpc/include/asm/config_mpc85xx.h
View file

@ -85,7 +85,7 @@
#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x00
#elif defined(CONFIG_MPC8555)
#elif defined(CONFIG_ARCH_MPC8555)
#define CONFIG_MAX_CPUS 1
#define CONFIG_SYS_FSL_NUM_LAWS 8
#define CONFIG_SYS_FSL_DDRC_GEN1

2
arch/powerpc/include/asm/cpm_85xx.h
View file

@ -77,7 +77,7 @@
*/
#define CPM_DATAONLY_BASE ((uint)128)
#define CPM_DP_NOSPACE ((uint)0x7FFFFFFF)
#if defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555)
#if defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_ARCH_MPC8555)
#define CPM_FCC_SPECIAL_BASE ((uint)0x00009000)
#define CPM_DATAONLY_SIZE ((uint)(8 * 1024) - CPM_DATAONLY_BASE)
#else /* MPC8540, MPC8560 */

2
arch/powerpc/include/asm/fsl_lbc.h
View file

@ -326,7 +326,7 @@ void lbc_sdram_init(void);
#define LCRR_CLKDIV 0x0000001F
#define LCRR_CLKDIV_SHIFT 0
#if defined(CONFIG_MPC83xx) || defined(CONFIG_ARCH_MPC8540) || \
defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555) || \
defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_ARCH_MPC8555) || \
defined(CONFIG_MPC8560)
#define LCRR_CLKDIV_2 0x00000002
#define LCRR_CLKDIV_4 0x00000004

2
arch/powerpc/include/asm/immap_85xx.h
View file

@ -127,7 +127,7 @@ typedef struct ccsr_i2c {
#if defined(CONFIG_ARCH_MPC8540) || \
defined(CONFIG_ARCH_MPC8541) || \
defined(CONFIG_ARCH_MPC8548) || \
defined(CONFIG_MPC8555)
defined(CONFIG_ARCH_MPC8555)
/* DUART Registers */
typedef struct ccsr_duart {
u8 res1[1280];

2
drivers/ddr/fsl/ctrl_regs.c
View file

@ -1831,7 +1831,7 @@ static void set_ddr_sdram_clk_cntl(fsl_ddr_cfg_regs_t *ddr,
unsigned int clk_adjust; /* Clock adjust */
unsigned int ss_en = 0; /* Source synchronous enable */
#if defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555)
#if defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_ARCH_MPC8555)
/* Per FSL Application Note: AN2805 */
ss_en = 1;
#endif

2
drivers/ddr/fsl/mpc85xx_ddr_gen1.c
View file

@ -47,7 +47,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
out_be32(&ddr->timing_cfg_2, regs->timing_cfg_2);
out_be32(&ddr->sdram_mode, regs->ddr_sdram_mode);
out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval);
#if defined(CONFIG_MPC8555) || defined(CONFIG_ARCH_MPC8541)
#if defined(CONFIG_ARCH_MPC8555) || defined(CONFIG_ARCH_MPC8541)
out_be32(&ddr->sdram_clk_cntl, regs->ddr_sdram_clk_cntl);
#endif

2
drivers/input/keyboard.c
View file

@ -21,7 +21,7 @@ static struct input_config config;
static int kbd_read_keys(struct input_config *config)
{
#if defined(CONFIG_MPC5xxx) || defined(CONFIG_ARCH_MPC8540) || \
defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555)
defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_ARCH_MPC8555)
/* no ISR is used, so received chars must be polled */
ps2ser_check();
#endif

1
include/configs/MPC8555CDS.h
View file

@ -17,7 +17,6 @@
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_CPM2 1 /* has CPM2 */
#define CONFIG_MPC8555 1 /* MPC8555 specific */
#define CONFIG_MPC8555CDS 1 /* MPC8555CDS board specific */
#define CONFIG_SYS_TEXT_BASE 0xfff80000

2
include/keyboard.h
View file

@ -99,7 +99,7 @@ extern void pckbd_leds(unsigned char leds);
#endif /* !CONFIG_DM_KEYBOARD */
#if defined(CONFIG_MPC5xxx) || defined(CONFIG_ARCH_MPC8540) || \
defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555)
defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_ARCH_MPC8555)
int ps2ser_check(void);
#endif

1
scripts/config_whitelist.txt
View file

@ -3141,7 +3141,6 @@ CONFIG_MPC83XX_GPIO_1_INIT_VALUE
CONFIG_MPC83XX_PCI2
CONFIG_MPC850
CONFIG_MPC855
CONFIG_MPC8555
CONFIG_MPC8555CDS
CONFIG_MPC8560
CONFIG_MPC8560ADS