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powerpc: MPC8569: Remove macro CONFIG_MPC8569
Replace CONFIG_MPC8569 with ARCH_MPC8569 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
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8d85448699
commit
23b36a7d48
8 changed files with 11 additions and 9 deletions
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@ -88,6 +88,7 @@ config TARGET_MPC8568MDS
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config TARGET_MPC8569MDS
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bool "Support MPC8569MDS"
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select ARCH_MPC8569
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config TARGET_MPC8572DS
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bool "Support MPC8572DS"
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@ -219,6 +220,9 @@ config ARCH_MPC8560
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config ARCH_MPC8568
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bool
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config ARCH_MPC8569
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bool
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source "board/freescale/b4860qds/Kconfig"
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source "board/freescale/bsc9131rdb/Kconfig"
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source "board/freescale/bsc9132qds/Kconfig"
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@ -70,7 +70,7 @@ obj-$(CONFIG_ARCH_MPC8536) += mpc8536_serdes.o
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obj-$(CONFIG_ARCH_MPC8544) += mpc8544_serdes.o
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obj-$(CONFIG_ARCH_MPC8548) += mpc8548_serdes.o
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obj-$(CONFIG_ARCH_MPC8568) += mpc8568_serdes.o
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obj-$(CONFIG_MPC8569) += mpc8569_serdes.o
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obj-$(CONFIG_ARCH_MPC8569) += mpc8569_serdes.o
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obj-$(CONFIG_MPC8572) += mpc8572_serdes.o
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obj-$(CONFIG_P1010) += p1010_serdes.o
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obj-$(CONFIG_P1011) += p1021_serdes.o
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@ -707,7 +707,7 @@ int get_clocks (void)
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#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
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gd->arch.sdhc_clk = sys_info.freq_sdhc / 2;
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#else
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#if defined(CONFIG_MPC8569) || defined(CONFIG_P1010) ||\
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#if defined(CONFIG_ARCH_MPC8569) || defined(CONFIG_P1010) ||\
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defined(CONFIG_P1014)
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gd->arch.sdhc_clk = gd->bus_clk;
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#else
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@ -345,7 +345,7 @@ l2_disabled:
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mtspr DBCR0,r0
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#endif
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#ifdef CONFIG_MPC8569
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#ifdef CONFIG_ARCH_MPC8569
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#define CONFIG_SYS_LBC_ADDR (CONFIG_SYS_CCSRBAR_DEFAULT + 0x5000)
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#define CONFIG_SYS_LBCR_ADDR (CONFIG_SYS_LBC_ADDR + 0xd0)
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@ -376,7 +376,7 @@ l2_disabled:
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tlbivax 0,r4
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isync
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#endif /* CONFIG_MPC8569 */
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#endif /* CONFIG_ARCH_MPC8569 */
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/*
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* Search for the TLB that covers the code we're executing, and shrink it
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@ -113,7 +113,7 @@
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#define CONFIG_SYS_FSL_RMU
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#define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2
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#elif defined(CONFIG_MPC8569)
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#elif defined(CONFIG_ARCH_MPC8569)
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#define CONFIG_MAX_CPUS 1
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#define CONFIG_SYS_FSL_NUM_LAWS 10
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#define CONFIG_SYS_FSL_SEC_COMPAT 2
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@ -2210,7 +2210,7 @@ typedef struct ccsr_gur {
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u32 gpiocr; /* GPIO control */
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#endif
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u8 res3[12];
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#if defined(CONFIG_MPC8569)
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#if defined(CONFIG_ARCH_MPC8569)
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u32 plppar1; /* Platform port pin assignment 1 */
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u32 plppar2; /* Platform port pin assignment 2 */
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u32 plpdir1; /* Platform port pin direction 1 */
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@ -2484,7 +2484,7 @@ typedef struct ccsr_gur {
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u32 svr; /* System version */
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u8 res10[8];
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u32 rstcr; /* Reset control */
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#if defined(CONFIG_ARCH_MPC8568) || defined(CONFIG_MPC8569)
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#if defined(CONFIG_ARCH_MPC8568) || defined(CONFIG_ARCH_MPC8569)
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u8 res11a[76];
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par_io_t qe_par_io[7];
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u8 res11b[1600];
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@ -13,7 +13,6 @@
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/* High Level Configuration Options */
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#define CONFIG_BOOKE 1 /* BOOKE */
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#define CONFIG_E500 1 /* BOOKE e500 family */
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#define CONFIG_MPC8569 1 /* MPC8569 specific */
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#define CONFIG_MPC8569MDS 1 /* MPC8569MDS board specific */
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#define CONFIG_FSL_ELBC 1 /* Has Enhance localbus controller */
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@ -3141,7 +3141,6 @@ CONFIG_MPC83XX_GPIO_1_INIT_VALUE
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CONFIG_MPC83XX_PCI2
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CONFIG_MPC850
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CONFIG_MPC855
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CONFIG_MPC8569
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CONFIG_MPC8569MDS
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CONFIG_MPC857
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CONFIG_MPC8572
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