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https://github.com/AsahiLinux/u-boot
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powerpc: T4080: Drop configuration for T4080
There is no T4080 target. Drop related macros. Signed-off-by: York Sun <york.sun@nxp.com>
This commit is contained in:
parent
26bc57da0a
commit
cdb72c5212
7 changed files with 7 additions and 18 deletions
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@ -46,7 +46,6 @@ obj-$(CONFIG_ARCH_P5020) += p5020_ids.o
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obj-$(CONFIG_ARCH_P5040) += p5040_ids.o
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obj-$(CONFIG_ARCH_T4240) += t4240_ids.o
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obj-$(CONFIG_ARCH_T4160) += t4240_ids.o
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obj-$(CONFIG_PPC_T4080) += t4240_ids.o
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obj-$(CONFIG_ARCH_B4420) += b4860_ids.o
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obj-$(CONFIG_ARCH_B4860) += b4860_ids.o
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obj-$(CONFIG_ARCH_T1040) += t1040_ids.o
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@ -88,7 +87,6 @@ obj-$(CONFIG_ARCH_P5020) += p5020_serdes.o
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obj-$(CONFIG_ARCH_P5040) += p5040_serdes.o
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obj-$(CONFIG_ARCH_T4240) += t4240_serdes.o
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obj-$(CONFIG_ARCH_T4160) += t4240_serdes.o
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obj-$(CONFIG_PPC_T4080) += t4240_serdes.o
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obj-$(CONFIG_ARCH_B4420) += b4860_serdes.o
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obj-$(CONFIG_ARCH_B4860) += b4860_serdes.o
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obj-$(CONFIG_ARCH_BSC9132) += bsc9132_serdes.o
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@ -512,7 +512,7 @@ static void fdt_fixup_usb(void *fdt)
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#endif
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#if defined(CONFIG_ARCH_T2080) || defined(CONFIG_ARCH_T4240) || \
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defined(CONFIG_ARCH_T4160) || defined(CONFIG_PPC_T4080)
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defined(CONFIG_ARCH_T4160)
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void fdt_fixup_dma3(void *blob)
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{
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/* the 3rd DMA is not functional if SRIO2 is chosen */
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@ -529,8 +529,7 @@ void fdt_fixup_dma3(void *blob)
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case 0x29:
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case 0x2d:
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case 0x2e:
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#elif defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160) || \
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defined(CONFIG_PPC_T4080)
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#elif defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160)
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u32 srds_prtcl_s4 = in_be32(&gur->rcwsr[4]) &
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FSL_CORENET2_RCWSR4_SRDS4_PRTCL;
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srds_prtcl_s4 >>= FSL_CORENET2_RCWSR4_SRDS4_PRTCL_SHIFT;
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@ -131,8 +131,7 @@ void get_sys_info(sys_info_t *sys_info)
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* T2080 rev 1.1 and later also use half mem_pll comparing with rev 1.0
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*/
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#if defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160) || \
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defined(CONFIG_PPC_T4080) || defined(CONFIG_ARCH_T2080) || \
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defined(CONFIG_ARCH_T2081)
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defined(CONFIG_ARCH_T2080) || defined(CONFIG_ARCH_T2081)
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svr = get_svr();
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switch (SVR_SOC_VER(svr)) {
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case SVR_T4240:
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@ -263,7 +263,7 @@ static const struct serdes_config serdes4_cfg_tbl[] = {
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{18, {PCIE3, PCIE3, PCIE3, PCIE3, AURORA, AURORA, AURORA, AURORA}},
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{}
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};
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#elif defined(CONFIG_ARCH_T4160) || defined(CONFIG_PPC_T4080)
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#elif defined(CONFIG_ARCH_T4160)
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static const struct serdes_config serdes1_cfg_tbl[] = {
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/* SerDes 1 */
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{1, {NONE, NONE, NONE, NONE,
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@ -545,8 +545,7 @@
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#define CONFIG_SYS_FSL_A004447_SVR_REV 0x11
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#define CONFIG_ESDHC_HC_BLK_ADDR
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#elif defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160) || \
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defined(CONFIG_PPC_T4080)
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#elif defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160)
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#define CONFIG_E6500
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#define CONFIG_SYS_PPC64 /* 64-bit core */
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#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
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@ -571,9 +570,6 @@
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#if defined(CONFIG_ARCH_T4160)
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#define CONFIG_MAX_CPUS 8
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#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 }
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#elif defined(CONFIG_PPC_T4080)
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#define CONFIG_MAX_CPUS 4
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#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1 }
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#endif
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#endif
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#define CONFIG_SYS_FSL_NUM_CC_PLLS 5
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@ -1759,8 +1759,7 @@ typedef struct ccsr_gur {
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/* use reserved bits 18~23 as scratch space to host DDR PLL ratio */
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#define FSL_CORENET_RCWSR0_MEM_PLL_RAT_RESV_SHIFT 8
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#define FSL_CORENET_RCWSR0_MEM_PLL_RAT_MASK 0x3f
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#if defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160) || \
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defined(CONFIG_PPC_T4080)
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#if defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160)
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#define FSL_CORENET2_RCWSR4_SRDS1_PRTCL 0xfc000000
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#define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT 26
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#define FSL_CORENET2_RCWSR4_SRDS2_PRTCL 0x00fe0000
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@ -1875,8 +1874,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
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#define FSL_CORENET_RCWSR11_EC2_FM2_DTSEC5_MII 0x00100000
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#define FSL_CORENET_RCWSR11_EC2_FM2_DTSEC5_NONE 0x00180000
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#endif
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#if defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160) || \
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defined(CONFIG_PPC_T4080)
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#if defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160)
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#define FSL_CORENET_RCWSR13_EC1 0x60000000 /* bits 417..418 */
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#define FSL_CORENET_RCWSR13_EC1_FM2_DTSEC5_RGMII 0x00000000
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#define FSL_CORENET_RCWSR13_EC1_FM2_GPIO 0x40000000
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@ -34,7 +34,6 @@ obj-$(CONFIG_ARCH_T2080) += t2080.o
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obj-$(CONFIG_ARCH_T2081) += t2080.o
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obj-$(CONFIG_ARCH_T4240) += t4240.o
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obj-$(CONFIG_ARCH_T4160) += t4240.o
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obj-$(CONFIG_PPC_T4080) += t4240.o
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obj-$(CONFIG_ARCH_B4420) += b4860.o
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obj-$(CONFIG_ARCH_B4860) += b4860.o
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obj-$(CONFIG_LS1043A) += ls1043.o
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