Commit graph

22766 commits

Author SHA1 Message Date
Tom Rini
8fe042be9a fpga: Migrate CONFIG_MAX_FPGA_DEVICES to Kconfig
This is always defined to 5, so use that as the default.

Cc: Michal Simek <michal.simek@amd.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Michal Simek <michal.simek@amd.com>
2023-01-20 12:27:06 -05:00
Tom Rini
81451a3985 i2c: fsl_i2c: Rework usage of CONFIG_SYS_IMMR
This driver is used on both m68k, where CONFIG_SYS_IMMR is not used, and
PowerPC an ARM where it is. Abstract this to a new value rather than
re-defining a CONFIG symbol on m68k.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Tom Rini
a3fda0d30a global: Remove unused CONFIG defines
Remove some CONFIG symbols and related comments, etc, that are unused
within the code itself at this point.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Neil Armstrong
043a9674b6 usb: dwc3-meson-gxl: force mode on child add/removal
arch/mach-meson has some custom usb logic, in particular:
* on board_usb_init(), we force USB_DR_MODE_PERIPHERAL
* on board_usb_cleanup(), we force USB_DR_MODE_HOST

With DM_USB_GADGET=y, board_usb_init/cleanup() are no
longer used when we call usb_gadget_initialize().
Instead, the generic (from udc-uclass) initialization/release is
called, which itself calls the controller driver's probe()/remove().

Therefore, enabling DM_USB_GADGET=y will mean that this mode
switching will break.

To prepare for enabling DM_USB_GADGET, perform the mode switching
when the "amlogic,meson-g12a-usb" (dwc2) driver is
probed()/removed() instead.

This is achieved via the glue driver, which gets notified each time one
of its children is probed()/removed.

Note: this change should be harmless without DM_USB_GADGET=y
because the amlogic-g12a-usb driver is not probed via driver model.

Thanks for Mattijs for the original work at [1].

[1] https://lore.kernel.org/all/20221024-meson-dm-usb-v1-1-2ab077a503b9@baylibre.com/

Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Link: https://lore.kernel.org/r/20230117-u-boot-usb-gxl-otg-dm-v1-1-2853f6d75b06@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-20 16:21:31 +01:00
Ilias Apalodimas
eda976d36a tee: optee: fix uuid comparisons on service discovery
When comparing UUIDs for discovered services we only compare up to the
ptr size instead of the entire UUID

Fixes: 94ccfb78a4 ("drivers: tee: optee: discover OP-TEE services")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
2023-01-20 10:04:56 +02:00
Ilias Apalodimas
9d28f67c81 tpm2: ftpm: add the device in the OP-TEE services list
commit fe8a4ed011 ("tee: optee: discover services dependent on tee-supplicant")
is trying to automatically scan and add TAs that are presented on pseudo
bus from the secure world.
In order to be able to list and compare the scanned devices the available drivers
have to register themselves on the op-tee service list.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-01-20 10:04:56 +02:00
Ilias Apalodimas
218a9917d6 tee: optee: fix a print error on rng probing
If we fail to probe the optee-rng device, we print a wrong message
referring to the firmware tpm.

Fixes: 476a3d58df ("tee: optee: don't fail probe because of optee-rng")
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-01-20 10:04:56 +02:00
Tom Rini
53c47c59e6 convert rockchip to use binman
patman fix for checkpatch
 binman optional entries, improved support for ELF symbols
 trace improvements
 minor fdt refactoring
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Merge tag 'dm-pull-18jan23' of https://source.denx.de/u-boot/custodians/u-boot-dm

convert rockchip to use binman
patman fix for checkpatch
binman optional entries, improved support for ELF symbols
trace improvements
minor fdt refactoring
2023-01-19 09:46:57 -05:00
Simon Glass
85d87112cb dm: pinctrl: Revert "pinctrl: probe pinctrl drivers during post-bind"
This breaks chromebook_coral and it is also not how things should work. If
a board needs to bind GPIOs as part of a pinctrl driver this can be done
during the bind step, if needed.

We cannot probe pinctrl devices when binding as a rule, since it cannot be
supported on some platforms.

The bind and probe steps are separate in U-Boot and they should remain
separate.

This reverts commit f9ec791b5e.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-18 11:49:13 -07:00
Jorge Ramirez-Ortiz
83d7a7af5d firmware: ti_sci: fix typo in boot authentication message name
Fix AUTH_BOOT message identifier (s/IMIAGE/IMAGE)

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Acked-by: Andrew Davis <afd@ti.com>
2023-01-18 13:11:13 -05:00
Andreas Kemnade
2e4865bc64 musb-new: omap2430: fix compiling in DM_USB_GADGET config
Add the separate IRQ handling function and change the registration.

Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
2023-01-18 12:46:13 -05:00
Andreas Kemnade
7a2d80efc3 musb-new: omap2430: no host data access in gadget mode
Avoid accessing structures (usb_bus_priv) only present when musb is
in host mode.

Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
2023-01-18 12:46:13 -05:00
Tom Rini
448e2b6327 event: Correct dependencies on the EVENT framework
The event framework is just that, a framework. Enabling it by itself
does nothing, so we shouldn't ask the user about it. Reword (and correct
typos) around this the option and help text. This also applies to
DM_EVENT and EVENT_DYNAMIC. Only EVENT_DEBUG and CMD_EVENT should be
visible to the user to select, when EVENT is selected.

With this, it's time to address the larger problems. When functionality
uses events, typically via EVENT_SPY, the appropriate framework then
must be select'd and NOT imply'd. As the functionality will cease to
work (and so, platforms will fail to boot) this is non-optional and
where select is appropriate. Audit the current users of EVENT_SPY to
have a more fine-grained approach to select'ing the framework where
used. Also ensure the current users of event_register and also select
EVENT_DYNAMIC.

Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reported-by: Oliver Graute <Oliver.Graute@kococonnector.com>
Reported-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Fixes: 7fe32b3442 ("event: Convert arch_cpu_init_dm() to use events")
Fixes: 42fdcebf85 ("event: Convert misc_init_f() to use events")
Fixes: c5ef202557 ("dm: fix DM_EVENT dependencies")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-18 12:46:13 -05:00
Tom Rini
5b958dea5c Merge branch '2022-01-16-bootstd-updates'
To quote the author:
So far standard boot lacks a boot menu, although it is possible to create
a rudimentary one using the existing 'bootmenu' command.

Even then, this text-based menu offer only basic functionality and does
not take full advantage of the displays which are common on many devices.

This series provides a 'bootflow menu' command which allows the user to
select from the available bootflows. An attempt is made to show the name
of the available operating systems, by reading more information into the
bootflow. A logo can be read also, where supported, so that this can be
presented to the user when an option is highlighted.

Full use is made of TrueType fonts, if enabled. For cases where only a
serial console is available, it falls back to a simple text-based menu.

All of this is implementing using a new 'expo' construct, a collection of
scenes (like menu screens) which can be navigated by the user to view
information and select options. This is fairly general and should be able
to cope with a wider array of use cases, with less hacking of the menu
code, such as is currently needed for CMD_BOOTEFI_BOOTMGR.

Of course it would be possible to enhance the existing menu rather than
creating a new setup. Instead it seems better to make the existing menu
use expo, if code space permits. It avoids the event-loop problem and
should be more extensible, given its loosely coupled components and use of
IDs instead of pointers. Further motivation is provided in the
documentation.

For now the CLI keypress-decoding code is split out to be used by the new
menu. The key codes defined by menu.h are reused also.

This is of course just a starting point. Some ideas for future work are
included in the documentation.
2023-01-17 08:55:40 -05:00
Tom Rini
6d03688e75 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- kirkwood: Convert to DM Serial for various Kirkwood boards (Tony)
- orion-timer: Fix problem in early_init_done() (Stefan)
2023-01-17 08:10:56 -05:00
Mattijs Korpershoek
fd083842d7 usb: dwc3-meson-g12a: force mode on child add/removal
arch/mach-meson has some custom usb logic, in particular:
* on board_usb_init(), we force USB_DR_MODE_PERIPHERAL
* on board_usb_cleanup(), we force USB_DR_MODE_HOST

With DM_USB_GADGET=y, board_usb_init/cleanup() are no
longer used when we call usb_gadget_initialize().
Instead, the generic (from udc-uclass) initialization/release is
called, which itself calls the controller driver's probe()/remove().

Therefore, enabling DM_USB_GADGET=y will mean that this mode
switching will break.

To prepare for enabling DM_USB_GADGET, perform the mode switching
when the "amlogic,meson-g12a-usb" (dwc2) driver is
probed()/removed() instead.

This is achieved via the glue driver, which gets notified each time one
of its children is probed()/removed.

Note: this change should be harmless without DM_USB_GADGET=y
because the amlogic-g12a-usb driver is not probed via driver model.

Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20221024-meson-dm-usb-v1-1-2ab077a503b9@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-17 09:27:17 +01:00
Stefan Roese
9a13a76e62 timer: orion-timer: Fix problem in early_init_done()
It was noticed that Clearfog is currently broken with this newly
introduced early_init_done() function. Apparently the timer is enabled
here when U-Boot is run but not configured - at least not correctly.
Resulting in a hangup in the timer reading functions.

To fix this, also read the value of the reload register and check it's
value with the one written to by U-Boot. Only if this matches, the
init has already been done.

Fixes: 5387b093cb ("timer: orion-timer: Fix problem with early static variable")
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Pali Rohár <pali@kernel.org>
Cc: Martin Rowe <martin.p.rowe@gmail.com>
Cc: Tony Dinh <mibodhi@gmail.com>
Cc: Pali Rohár <pali@kernel.org>
Cc: Michael Walle <michael@walle.cc>
2023-01-17 07:06:37 +01:00
Simon Glass
0e38bd848d video: Add font functions to the vidconsole API
Support for fonts currently depends on the type of vidconsole in use. Add
two new methods to enumerate fonts and to set the font.

Fix a few other method comments while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-16 18:26:50 -05:00
Simon Glass
7abe73fc14 video: truetype: Rename the metrics function
This should really have a 'truetype' prefix. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-16 18:26:50 -05:00
Simon Glass
72a0dd8bed video: Enable VIDEO_ANSI by default only with EFI
This is not generally needed unless EFI_LOADER is used. Adjust the default
setting to reduce the size of the U-Boot build.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-16 18:26:50 -05:00
Simon Glass
30f3333d88 image: Move common image code to image_board and command
We should use the cmd/ directory for commands rather than for common code
used elsewhere in U-Boot. Move the common 'source' code into
image-board.c to achieve this.

The image_source_script() function needs to call run_command_list()  so
seems to belong better in the command library. Move and rename it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-16 18:26:50 -05:00
Jay Buddhabhatti
29b58bba91 clk: versal: Return error in case if clock setup failed
Currently probe is getting success even if clock setup is failed
because of that u-boot is trying to access invalid clocks. So return
error if clock setup failed.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fa78e71211e5f68f8dc1353b357f96e6283f65a8.1673335422.git.michal.simek@amd.com
2023-01-16 15:33:58 +01:00
Jagan Teki
a25338aa89 clk: rockchip: Add rv1126 clk support
Add clock driver support for Rockchip RV1126 SoC.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:11 +08:00
Jagan Teki
8430a87502 pinctrl: rockchip: Add rv1126 support
Add pinctrl driver for Rockchip RV1126.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:11 +08:00
Jagan Teki
32b2ea9818 pinctrl: rockchip: Add pinctrl route types
Some pins in rockchip are routed via Top GRF and PMU GRF
instead of direct regmap.

Add support to handle all these routing paths so that the
SoC pinctrl drivers will use them accordingly.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:11 +08:00
Jagan Teki
0900840b46 ram: rockchip: Add rv1126 lpddr4 support
Add LPDDR4 detection timings and support for RV1126.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:11 +08:00
Jagan Teki
4fadeecb62 ram: rockchip: rv1126: Control ddr init prints via DEBUG
Control the ddr init print messages via RAM_ROCKCHIP_DEBUG
instead of printing by default.

This gives an option to configs to enable these prints or
not.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:10 +08:00
Jagan Teki
e869b3485c ram: rockchip: Add rv1126 ddr driver support
Add DDR driver for Rockchip RV1126 SoC.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:10 +08:00
Jagan Teki
a70a62cd52 ram: rockchip: Add rv1126 ddr loader params
Add DDR loader parameters for Rockchip RV1126 SoC.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:10 +08:00
Jagan Teki
d04aa29fba ram: rockchip: Add rv1126 ddr3 support
Add DDR3 detection timings for Rockchip RV1126 SoC.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:10 +08:00
Jagan Teki
5ab30c3176 ram: rockchip: Update ddr pctl regs for px30
Add full ddr pctl registers and bit masks for px30.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:10 +08:00
Jagan Teki
29c3148974 ram: rockchip: Compute ddr capacity based on grf split
DDR chip capacity is computed based on GRF split in some
Rockchip SoC's like PX30 and RV1126.

Add split argument in ddr print info so-that the respective
ddr driver will pass the grf split.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:10 +08:00
Jagan Teki
26f92be07e ram: rockchip: Add common ddr type configs
We have common ddr types in rockchip or in general. So use
the common ddr type names instead of per Rockchip SoC to
avoid confusion.

The respective ddr type names will use on the associated
ddr SoC driver as these drivers are built per SoC at a time.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:10 +08:00
Jagan Teki
78276c5313 ram: Mark ram-uclass depend on TPL_DM or SPL_DM
ram-uclass is building irrespective of whether TPL_DM
or SPL_DM is enabled. So control the ram uclass build
based on TPL/SPL_DM.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:10 +08:00
Quentin Schulz
23b71addf9 rockchip: clk: add watchdog clock to px30_clk_enable
Add the PCLK_WDT_NS clock to px30_clk_enable so that the watchdog driver
can probe since it wants to enable this clock.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:10 +08:00
Mattijs Korpershoek
2383e8f4ae usb: gadget: dwc2_udc_otg: implement pullup()
Pullup is used by the usb framework in order to do software-controlled
usb_gadget_connect() and usb_gadget_disconnect().

Implement pullup() for dwc2 using the SOFT_DISCONNECT bit in the dctl
register:
* when pullup is on, clear SOFT_DISCONNECT
* when pullup is off, set SOFT_DISCONNECT

This is especially useful when a gadget disconnection is initiated but
no board_usb_cleanup() is called.

Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2023-01-14 14:10:30 +01:00
Dario Binacchi
66b5847b30 usb: gadget: fastboot: detach usb just before rebooting
The patch fixes the following error when updating a BSH SMM S2 board:
3:72>Start Cmd:FB[-t 8000]: ucmd nand write ${loadaddr} nanddtb ${filesize}
3:72>Okay (0.023s)
3:72>Start Cmd:FB: reboot
3:72>Fail Bulk(R):LIBUSB_ERROR_IO(0s)

The "fastboot reboot" command detaches the USB when it still needs to be
used. So let's detach the USB just before the reset.

CC: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Fixes: 5f7e01e9d5 ("usb: gadget: fastboot: detach usb on reboot commands")
Suggested-by: Michael Trimarchi <michael@amarulasolutions.com>
Co-developed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-01-14 14:10:30 +01:00
Tom Rini
fe4c21de4f Add driver to manage onboard hub supplies
Add calibration support for stm32-adc
 Linux kernel v6.1 DT synchronization for stm32mp151.dtsi
 stm32mp157a-dk1-scmi-u-boot.dtsi update
 Add support of OP-TEE and STM32MP13x in bsec driver
 ECDSA various fixes for stm32mp
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Merge tag 'u-boot-stm32-20230113' of https://source.denx.de/u-boot/custodians/u-boot-stm

Add driver to manage onboard hub supplies
Add calibration support for stm32-adc
Linux kernel v6.1 DT synchronization for stm32mp151.dtsi
stm32mp157a-dk1-scmi-u-boot.dtsi update
Add support of OP-TEE and STM32MP13x in bsec driver
ECDSA various fixes for stm32mp
2023-01-13 09:56:19 -05:00
Marek Vasut
48b3ecbedf gpio: Get rid of gpio_hog_probe_all()
The gpio_hog_probe_all() functionality can be perfectly well replaced by
DM_FLAG_PROBE_AFTER_BIND DM flag, which would trigger .probe() callback
of each GPIO hog driver instance after .bind() and thus configure the
hogged GPIO accordingly.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2023-01-12 14:06:16 -05:00
Quentin Schulz
942918f2ac dm: fix probing of all devices that have u-boot, dm-pre-reloc in SPL/TPL
Currently, dm_probe_devices checks that the flags of the device contains
DM_FLAG_PRE_RELOC. However DM_FLAG_PRE_RELOC is a driver - and not a
device - flag. This means that the check in pre_reloc_only mode would
always fail.

Instead, what was aimed to be checked is that either the driver of the
device has the flag set, or that the device has the u-boot,dm-pre-reloc
Device Tree property set.

So let's fix the check to allow u-boot,dm-pre-reloc devices to be
probed.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2023-01-12 14:06:16 -05:00
Sean Anderson
f4426fd68d net: fm: Support loading firmware from a filesystem
This adds a new method to load Fman firmware from a filesystem. This
allows users to use regular files instead of hard-coded offsets for the
firmware.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-01-12 14:06:16 -05:00
Sean Anderson
e4f0cc5ddf net: fm: Add firmware name parameter
In order to read the firmware from the filesystem, we need a file name.
Read the firmware name from the device tree, using the firmware-name
property. This property is commonly used in Linux to determine the
correct name to use (and can be seen in several device trees in U-Boot).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-01-12 14:06:16 -05:00
Sean Anderson
0998a20cfc misc: fs_loader: Add function to get the chosen loader
The fs_loader device is used to pull in settings via the chosen node.
However, there was no library function for this, so arria10 was doing it
explicitly. This function subsumes that, and uses ofnode_get_chosen_node
instead of navigating the device tree directly. Because fs_loader pulls
its config from the environment by default, it's fine to create a device
with nothing backing it at all. Doing this allows enabling
CONFIG_FS_LOADER without needing to modify the device tree.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-01-12 14:06:15 -05:00
Kshitiz Varshney
0d795c356a Uboot RNG Driver using Data Co-processor
This commit introduces Random number generator to uboot. It uses DCP
driver for number generation.
RNG driver can be invoked by using below command on uboot prompt:-
           rng <number of bytes>

Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-12 11:25:46 -05:00
Olivier Moysan
17bae7766c adc: stm32mp15: add calibration support
Add support of offset and linear calibration for STM32MP15.
The calibration is performed once at probe. The ADC is set in power on
state for calibration. It remains in this state after calibration,
to give to the kernel the opportunity to retrieve calibration data,
directly from the ADC.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-12 16:25:51 +01:00
Fabrice Gasnier
ba1fa2abde usb: onboard-hub: add driver to manage onboard hub supplies
The main issue the driver addresses is that a USB hub needs to be
powered before it can be discovered. This is often solved by using
"regulator-always-on".

This driver is inspired by the Linux v6.1 driver. It only enables (or
disables) the hub vdd (3v3) supply, so it can be enumerated.
Scanning of the device tree is done in a similar manner to the sandbox,
by the usb-uclass. DT part looks like:

&usbh_ehci {
	...
	#address-cells = <1>;
	#size-cells = <0>;
	hub@1 {
		compatible = "usb424,2514";
		reg = <1>;
		vdd-supply = <&v3v3>;
	};
};

When the bus gets probed, the driver is automatically probed/removed from
the bus tree, as an example on stm32:
STM32MP> usb start
starting USB...
STM32MP> dm tree
 Class     Index  Probed  Driver                Name
-----------------------------------------------------------
 usb           0  [ + ]   ehci_generic          |   |-- usb@5800d000
 usb_hub       0  [ + ]   usb_onboard_hub       |   |   `-- hub@1
 usb_hub       1  [ + ]   usb_hub               |   |       `-- usb_hub

STM32MP> usb tree
USB device tree:
  1  Hub (480 Mb/s, 0mA)
  |  u-boot EHCI Host Controller
  |
  +-2  Hub (480 Mb/s, 2mA)

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-01-12 16:19:53 +01:00
Pali Rohár
3133651aa4 ata: Fix dependency for CONFIG_SATA_SIL
sata_sil.c is PCI driver and without CONFIG_PCI is building of U-Boot failing:

      LD      u-boot
    ld.bfd: drivers/ata/sata_sil.o: in function `sil_exec_cmd':
    drivers/ata/sata_sil.c:148: undefined reference to `dm_pci_phys_to_bus'
    ld.bfd: drivers/ata/sata_sil.o: in function `sil_pci_probe':
    drivers/ata/sata_sil.c:687: undefined reference to `dm_pci_get_bdf'
    ld.bfd: drivers/ata/sata_sil.c:691: undefined reference to `dm_pci_read_config16'
    ld.bfd: drivers/ata/sata_sil.c:701: undefined reference to `dm_pci_map_bar'
    ld.bfd: drivers/ata/sata_sil.c:704: undefined reference to `dm_pci_map_bar'
    ld.bfd: drivers/ata/sata_sil.c:713: undefined reference to `dm_pci_write_config16'
    ld.bfd: drivers/ata/sata_sil.c:717: undefined reference to `dm_pci_read_config16'
    ld.bfd: drivers/ata/sata_sil.o: in function `sil_cmd_identify_device':
    drivers/ata/sata_sil.c:256: undefined reference to `dm_pci_phys_to_bus'
    ld.bfd: drivers/ata/sata_sil.o: in function `sil_sata_rw_cmd':
    drivers/ata/sata_sil.c:330: undefined reference to `dm_pci_phys_to_bus'
    ld.bfd: drivers/ata/sata_sil.o: in function `sil_sata_rw_cmd_ext':
    drivers/ata/sata_sil.c:377: undefined reference to `dm_pci_phys_to_bus'
    make: *** [Makefile:1778: u-boot] Error 1

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-01-11 15:02:24 -05:00
Sean Anderson
f3d914cfdd fastboot: Add OEM run command
This adds the UUU UCmd functionality as an OEM command. While the
fastboot tool allows sending arbitrary commands as long as they are
prefixed with "oem". This allows running generic U-Boot commands over
fastboot without UUU, which is especially useful when not using USB.
This is really the route we should have gone in the first place when
adding these commands.

While we're here, clean up the UUU Kconfig a bit.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2023-01-11 15:02:24 -05:00
Patrick Delaunay
d037990046 fastboot: remove #ifdef CONFIG when it is possible
Much of the fastboot code predates the introduction of Kconfig and
has quite a few #ifdefs in it which is unnecessary now that we can use
IS_ENABLED() et al.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # on vim3l
2023-01-11 15:02:24 -05:00
Patrick Delaunay
59dacc3190 optee: bind the TA drivers on OP-TEE node
In U-Boot driver model the devices can be referenced by
phandle in the U-Boot configuration nodes.

Without a valid node provided during the bind, the driver
associated to OP-TEE TA can't be referenced.

For example to force the sequence number with alias
(.flags = DM_UC_FLAG_SEQ_ALIAS)

 	aliases {
		rng0 = &optee;
 	};

or other configuration:

board-sysinfo {
   compatible = "vendor,sysinfo-board";
   ramdom = <&optee>;
}

With this patch all drivers bound from OP-TEE service
discovery are now associated are associated to OP-TEE
node, allowing to identify by phandle the driver
provided by the TA for one UCLASS without modifying
device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-11 15:02:24 -05:00
Sean Anderson
46b2e5e92c reboot-mode: Add NVMEM reboot mode
This adds an NVMEM reboot mode driver, similar to Linux's
implementation. This allows using the same device tree binding for Linux
and U-Boot in most cases.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-11 11:54:50 -05:00
Sean Anderson
546795b579 rtc: abx8xx: Add support for reading RAM
This adds support for reading the battery-backed memory present on these
RTCs. This modifies the read/write methods to access the RAM instead of
raw register offsets. No one was using these in-tree, so we should be
fine changing them.

We use the "standard" address space window to access the RAM. The
extension RAM address register has some reserved bits, but we write the
whole thing for simplicity (as these bits default to 0).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2023-01-11 11:54:50 -05:00
Jim Liu
7ee1c4d1d1 pinctrl: nuvoton: add NPCM7xx/NPCM8xx reset type detect
add reset type detect and persist setting.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2023-01-10 15:39:06 -05:00
Victor Lim
e72023c490 mtd: spi-nor-ids: add gigadevice part #
adding gigadevice part numbers

Signed-off-by: Victor Lim <vlim@gigadevice.com>
Link: https://lore.kernel.org/r/20230109234946.14540-2-vlim@gigadevice.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-10 12:37:02 +01:00
Michal Simek
4b422a12df net: zynq_gem: Add support for new compatible str with xlnx prefix
cdns prefix was deprecated and replaced by xlnx one.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7d1312d741349451b36558baa3e9132247303992.1670599167.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Tom Rini
cebdfc22da Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-09 11:30:08 -05:00
Tom Rini
fe33066d24 Pull request for u-boot-nand-20230108
- rawnand: omap_gpmc: driver model support
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Merge tag 'u-boot-nand-20230108' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash into next

Pull request for u-boot-nand-20230108

- rawnand: omap_gpmc: driver model support
2023-01-08 13:12:42 -05:00
Roger Quadros
7363cf0581 mtd: rawnand: omap_elm: u-boot driver model support
Support u-boot driver model. We still retain
support legacy way of doing things if ELM_BASE
is defined in <asm/arch/hardware.h>

We could completely get rid of that if all
platforms defining ELM_BASE get rid of that definition
and enable CONFIG_SYS_NAND_SELF_INIT and are verified
to work.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org
Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
2023-01-08 10:38:50 +01:00
Roger Quadros
c2147bc7ec mtd: rawnand: omap_gpmc: Enable SYS_NAND_PAGE_COUNT for OMAP_GPMC
The symbol is required for NAND support in SPL when using
OMAP_GPMC driver.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20221220102203.52398-7-rogerq@kernel.org
2023-01-08 10:38:50 +01:00
Roger Quadros
b747090705 mtd: rawnand: omap_gpmc: Add SPL NAND support
Enables SPL NAND support for ARCH_K3 by enabling
SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT.

Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH
instead.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
2023-01-08 10:38:50 +01:00
Roger Quadros
ff0d078942 mtd: rawnand: omap_gpmc: support u-boot driver model
Adds driver model support.

We need to be able to self initialize the NAND controller/chip
at probe and so enable CONFIG_SYS_NAND_SELF_INIT.

Doing so requires nand_register() API which is provided by nand.c
and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT.
But nand.c also provides nand_init() so we need to get rid of nand_init()
in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
2023-01-08 10:38:50 +01:00
Roger Quadros
fa87360b3a mtd: rawnand: nand_base: Allow base driver to be used in SPL without nand_bbt
nand_bbt.c is not being built with the nand_base driver during SPL
build. This results in build failures if we try to access any nand_bbt
related functions.

Don't use any nand_bbt functions for SPL build.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20221220102203.52398-3-rogerq@kernel.org
2023-01-08 10:38:30 +01:00
Roger Quadros
04fcd25873 mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction
The BCH detection hardware can generate ECC bytes for multiple
sectors in one go. Use that feature.

correct() only corrects one sector at a time so we need to call it
repeatedly for each sector.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
2023-01-08 10:33:20 +01:00
Tom Rini
b82f12b642 First set of u-boot-at91 features for the 2023.04 cycle
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Merge tag 'u-boot-at91-2023.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next

First set of u-boot-at91 features for the 2023.04 cycle:

This feature set includes the new DM-based NAND flash driver (old non-DM
driver is still kept for backwards compatibility), and the move to DM
NAND flash driver for sam9x60ek board. Feature set also includes
devicetree alignment for sama7g5 with Linux, devicetree alignment on USB
with Linux for all boards (sama5, sam9x60), chip id for sama7g5, minor
configs and tweaks.
2023-01-06 11:53:26 -05:00
Marek Vasut
bee3551e00 Revert "Revert "cmd: pxe_utils: Check fdtcontroladdr in label_boot""
This reverts commit ed6251187a.

Superseded by "cmd: pxe_utils: Limit fdtcontroladdr usage to non-fitImage"
which is less heavy-handed approach and retains part of the original
behavior for non-fitImage.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-06 08:14:19 -05:00
Dai Okamura
4671435c54 i2c: uniphier-f: correct error recovery
The uniphier i2c block can recognize some handshake errors.
But driver handles all error detections as no error if no timeout.
So this makes unrecoverable state.

This replaces the return values with the right ones to tell the i2c
framework the errors:
- EDEADLK for arbitration lost error
- ENODATA for no answer error

Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2023-01-06 08:14:19 -05:00
Sergiu Moga
61040097a9 reset: at91: Add reset driver for basic assert/deassert operations
Add support for at91 reset controller's basic assert/deassert
operations. Since this driver conflicts with the
SYSRESET driver because they both bind to the same RSTC node,
implement a custom bind hook that would manually bind the
sysreset driver, if enabled, to the same RSTC DT node.
Furthermore, delete the no longer needed compatibles from the
SYSRESET driver and rename it to make sure than any possible
conflicts are avoided.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Tested-by: Mihai Sain <mihai.sain@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2023-01-05 10:06:35 +02:00
Stefan Bosch
5745de2c9d arm: s5p4418: dm_serial: switch to DM_SERIAL
Switch the S5P4418-SOC and therefore the s5p4418_nanopi2 board to
DM_SERIAL.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2023-01-02 16:06:08 -05:00
Stefan Bosch
5ec6cbcc7f arm: s5p4418: dm_serial: add driver source code
Add dm_serial driver source code for S5P4418 SOC. Extend the "arm,pl011"
driver by init of UART-clock and UART-reset.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2023-01-02 16:06:08 -05:00
Lokanathan, Raaj
357c352cdc Add CONFIG_SYS_NAND_SELF_INIT to Kconfig for NAND DENALI driver
Add the CONFIG_SYS_NAND_SELF_INIT to the Kconfig to follow the changes from
mainline.

Signed-off-by: Lokanathan, Raaj <raaj.lokanathan@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
2023-01-02 16:01:40 -05:00
Pali Rohár
1138bbe05e serial: Use -EAGAIN in getc and putc
U-Boot serial code already handles -EAGAIN value from getc and putc
callbacks. So change drivers code to return -EAGAIN when HW is busy instead
of doing its own busy loop and waiting until HW is ready.

Signed-off-by: Pali Rohár <pali@kernel.org>
2023-01-02 16:01:40 -05:00
Pali Rohár
59440d83d3 serial: Do not write additional \r before \n for dm_serial drivers
serial-uclass.c code already puts \r before \n for all dm_serial drivers.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-02 16:01:40 -05:00
Sergei Antonov
fcb624be47 rtc: add ht1380 driver
Support Holtek HT1380/HT1381 Serial Timekeeper Chip. It provides seconds
, minutes, hours, day of the week, date, month and year information.

Datasheet:
https://www.holtek.com.tw/documents/10179/11842/ht1380_1v130.pdf

Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-02 16:01:40 -05:00
Dai Okamura
ef75d482aa pinctrl: uniphier: add ethernet TX pin data for PXs3
PXs3 Ref boards need to change the strength of ethernet ports
for stability, like LD20's one.

This adds the table data and fixes the boot issue on PXs3 Ref board.

Fixes: 0852033309 ("ARM: uniphier: sync with Linux 5.8-rc4")
Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
2023-01-02 14:10:23 -05:00
Dai Okamura
1e91a0ea32 pinctrl: uniphier: add check if pins are valid
The pinctrl datas of uniphier SoCs are the minimal subsets of kernel's one,
and some tables has no data to save the footprint size.
If the board dts tries to match a pin name on no pins defined SoC,
the footprint magic code causes "Synchronous Abort".

This checks if the 'pins' data is valid,
and if empty, avoids the abort with the warning as follows:

  WARNING at drivers/pinctrl/uniphier/pinctrl-uniphier-core.c:36/uniphier_pinctrl_get_pins_count()!
  pinctrl_select_state_full: pinctrl_config_one: err=-38

Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
2023-01-02 14:10:23 -05:00
Stefan Roese
5387b093cb timer: orion-timer: Fix problem with early static variable
We've noticed that at least one Kirkwood board (Pogo v4) has problems
with the new orion DM timer implementation. Debugging revealed that this
issue is related with the static variable "early_init_done" which does
not work correctly before relocation in all cases.

This patch removes this static variable and replaces it's functionality
via a function that detects if the timer is already initialized.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pali Rohár <pali@kernel.org>
Cc: Michael Walle <michael@walle.cc>
Cc: Tony Dinh <mibodhi@gmail.com>
Tested-by: Tony Dinh <mibodhi@gmail.com>
2023-01-02 09:14:16 +01:00
Sean Anderson
bcc85b96b5 cmd: source: Support specifying config name
As discussed previously [1,2], the source command is not safe to use with
verified boot unless there is a key with required = "images" (which has its
own problems). This is because if such a key is absent, signatures are
verified but not required. It is assumed that configuration nodes will
provide the signature. Because the source command does not use
configurations to determine the image to source, effectively no
verification takes place.

To address this, allow specifying configuration nodes. We use the same
syntax as the bootm command (helpfully provided for us by fit_parse_conf).
By default, we first try the default config and then the default image. To
force using a config, # must be present in the command (e.g. `source
$loadaddr#my-conf`). For convenience, the config may be omitted, just like
the address may be (e.g. `source \#`). This also works for images
(`source :` behaves exactly like `source` currently does).

[1] https://lore.kernel.org/u-boot/7d711133-d513-5bcb-52f2-a9dbaa9eeded@prevas.dk/
[2] https://lore.kernel.org/u-boot/042dcb34-f85f-351e-1b0e-513f89005fdd@gmail.com/

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-31 13:35:19 -05:00
Sean Anderson
30fb045f2d treewide: Use NULL for script image name
Two callers of image_source_script specify an image name. However, both
use the deprecated @ syntax, indicating that they have not been updated
in a while. If CONFIG_FIT_SIGNATURE is enabled, we will reject such
names outright. Back in commit 152576a598 ("stm32mp: stm32prog: handle
U-Boot script in flashlayout alternate"), we even renamed one of the
nodes. Instead of hard-coding a script image name, just use the default
image.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-12-31 13:35:19 -05:00
Jim Liu
dbedf4a56b power: regulator: Add support for NPCM8xx
Add support for setting nuvoton BMC NPCM845 voltage supply.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-12-26 15:44:00 +09:00
Tom Rini
648d675a2f cf_spi.c: Rename CONFIG_SPI_IDLE_VAL to SPI_IDLE_VAL
This value is never changed by boards, so just rename it to
SPI_IDLE_VAL to fit with the rest of the code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 13:01:13 -05:00
Tom Rini
50e88c0fea pci-rcar-gen3: Rename CONFIG_SEND_ENABLE
We rename the symbol CONFIG_SEND_ENABLE to just SEND_ENABLE, and remove
the second whitespace following the define.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 13:01:13 -05:00
Tom Rini
1e01950333 post: Move CONFIG_SYS_POST to CFG_SYS_POST
Migrate the rest of the CONFIG_SYS_POST macros over to CFG_SYS_POST
namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 13:01:13 -05:00
Tom Rini
0478dac62a kbuild: Remove uncmd_spl logic
At this point in the conversion there should be no need to have logic to
disable some symbol during the SPL build as all symbols should have an
SPL counterpart.

The main real changes done here are that we now must make proper use of
CONFIG_IS_ENABLED(DM_SERIAL) rather than many of the odd tricks we
developed prior to CONFIG_IS_ENABLED() being available.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:13 -05:00
Tom Rini
1d0eaf2f32 global: Migrate CONFIG_USB_ISP1301_I2C_ADDR to CFG
Perform a simple rename of CONFIG_USB_ISP1301_I2C_ADDR to CFG_USB_ISP1301_I2C_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
61693acbce global: Migrate CONFIG_USART_ID to CFG
Perform a simple rename of CONFIG_USART_ID to CFG_USART_ID

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
805482d187 global: Migrate CONFIG_USART_BASE to CFG
Perform a simple rename of CONFIG_USART_BASE to CFG_USART_BASE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
e7cebff656 global: Migrate CONFIG_TSEC_TBICR_SETTINGS to CFG
Perform a simple rename of CONFIG_TSEC_TBICR_SETTINGS to CFG_TSEC_TBICR_SETTINGS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
d8964b3e1d global: Migrate CONFIG_SYS_I2C_DIRECT_BUS to CFG
Perform a simple rename of CONFIG_SYS_I2C_DIRECT_BUS to CFG_SYS_I2C_DIRECT_BUS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
97148cb614 global: Migrate CONFIG_SH_ETHER_USE_PORT to CFG
Perform a simple rename of CONFIG_SH_ETHER_USE_PORT to CFG_SH_ETHER_USE_PORT

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
7c480bab14 global: Migrate CONFIG_SH_ETHER_PHY_ADDR to CFG
Perform a simple rename of CONFIG_SH_ETHER_PHY_ADDR to CFG_SH_ETHER_PHY_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
ff53ecc387 global: Migrate CONFIG_SH_ETHER_CACHE_WRITEBACK to CFG
Perform a simple rename of CONFIG_SH_ETHER_CACHE_WRITEBACK to CFG_SH_ETHER_CACHE_WRITEBACK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
c253cea724 global: Migrate CONFIG_SH_ETHER_CACHE_INVALIDATE to CFG
Perform a simple rename of CONFIG_SH_ETHER_CACHE_INVALIDATE to CFG_SH_ETHER_CACHE_INVALIDATE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
24513c3ac8 global: Migrate CONFIG_SH_ETHER_ALIGNE_SIZE to CFG
Perform a simple rename of CONFIG_SH_ETHER_ALIGNE_SIZE to CFG_SH_ETHER_ALIGNE_SIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
77d0870c29 global: Migrate CONFIG_SCSI_DEV_LIST to CFG
Perform a simple rename of CONFIG_SCSI_DEV_LIST to CFG_SCSI_DEV_LIST

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:11 -05:00
Tom Rini
dbfaeecf59 global: Migrate CONFIG_SCIF_A to CFG
Perform a simple rename of CONFIG_SCIF_A to CFG_SCIF_A

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:11 -05:00
Tom Rini
193b3fe175 global: Migrate CONFIG_POWER_PFUZE3000_I2C_ADDR to CFG
Perform a simple rename of CONFIG_POWER_PFUZE3000_I2C_ADDR to CFG_POWER_PFUZE3000_I2C_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:52 -05:00
Tom Rini
aa3efb6c64 global: Migrate CONFIG_POWER_PFUZE100_I2C_ADDR to CFG
Perform a simple rename of CONFIG_POWER_PFUZE100_I2C_ADDR to CFG_POWER_PFUZE100_I2C_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:52 -05:00
Tom Rini
6d38c69e83 global: Migrate CONFIG_POWER_LTC3676_I2C_ADDR to CFG
Perform a simple rename of CONFIG_POWER_LTC3676_I2C_ADDR to CFG_POWER_LTC3676_I2C_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:52 -05:00
Tom Rini
b861574bd9 global: Migrate CONFIG_PL01x_PORTS to CFG
Perform a simple rename of CONFIG_PL01x_PORTS to CFG_PL01x_PORTS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
f410d0ac8a global: Migrate CONFIG_PL011_CLOCK to CFG
Perform a simple rename of CONFIG_PL011_CLOCK to CFG_PL011_CLOCK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
e9212bffe3 global: Migrate CONFIG_PHY_ET1011C_TX_CLK_FIX to CFG
Perform a simple rename of CONFIG_PHY_ET1011C_TX_CLK_FIX to CFG_PHY_ET1011C_TX_CLK_FIX

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
52139620be global: Migrate CONFIG_PCIE_IMX_POWER_GPIO to CFG
Perform a simple rename of CONFIG_PCIE_IMX_POWER_GPIO to CFG_PCIE_IMX_POWER_GPIO

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
7906f91789 global: Migrate CONFIG_PCIE_IMX_PERST_GPIO to CFG
Perform a simple rename of CONFIG_PCIE_IMX_PERST_GPIO to CFG_PCIE_IMX_PERST_GPIO

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
dd11fdc31f global: Migrate CONFIG_MXC_USB_FLAGS et al to CFG
Perform simple renames of:
   CONFIG_MXC_USB_FLAGS to CFG_MXC_USB_FLAGS
   CONFIG_MXC_USB_PORT to CFG_MXC_USB_PORT
   CONFIG_MXC_USB_PORTSC to CFG_MXC_USB_PORTSC

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
4db386655a global: Migrate CONFIG_MXC_UART_BASE to CFG
Perform a simple rename of CONFIG_MXC_UART_BASE to CFG_MXC_UART_BASE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
d1c723895b global: Migrate CONFIG_MXC_NAND_REGS_BASE to CFG
Perform a simple rename of CONFIG_MXC_NAND_REGS_BASE to CFG_MXC_NAND_REGS_BASE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
55eef1d629 global: Migrate CONFIG_MXC_NAND_IP_REGS_BASE to CFG
Perform a simple rename of CONFIG_MXC_NAND_IP_REGS_BASE to CFG_MXC_NAND_IP_REGS_BASE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
1d457dbb91 global: Migrate CONFIG_MAX_MEM_MAPPED to CFG
Perform a simple rename of CONFIG_MAX_MEM_MAPPED to CFG_MAX_MEM_MAPPED

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
bd79d3d616 global: Migrate CONFIG_LPC32XX_NAND_SLC_WWIDTH to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_WWIDTH to CFG_LPC32XX_NAND_SLC_WWIDTH

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
308ed80839 global: Migrate CONFIG_LPC32XX_NAND_SLC_WSETUP to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_WSETUP to CFG_LPC32XX_NAND_SLC_WSETUP

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
b0c548273e global: Migrate CONFIG_LPC32XX_NAND_SLC_WHOLD to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_WHOLD to CFG_LPC32XX_NAND_SLC_WHOLD

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
fa32dc7d15 global: Migrate CONFIG_LPC32XX_NAND_SLC_WDR_CLKS to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_WDR_CLKS to CFG_LPC32XX_NAND_SLC_WDR_CLKS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
fa0e72a34e global: Migrate CONFIG_LPC32XX_NAND_SLC_RWIDTH to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_RWIDTH to CFG_LPC32XX_NAND_SLC_RWIDTH

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
416ef8c7c6 global: Migrate CONFIG_LPC32XX_NAND_SLC_RSETUP to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_RSETUP to CFG_LPC32XX_NAND_SLC_RSETUP

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
bba52ab080 global: Migrate CONFIG_LPC32XX_NAND_SLC_RHOLD to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_RHOLD to CFG_LPC32XX_NAND_SLC_RHOLD

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
c102eb5ca7 global: Migrate CONFIG_LPC32XX_NAND_SLC_RDR_CLKS to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_RDR_CLKS to CFG_LPC32XX_NAND_SLC_RDR_CLKS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
39fa17718f global: Migrate CONFIG_LPC32XX_NAND_MLC_WR_LOW to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_WR_LOW to CFG_LPC32XX_NAND_MLC_WR_LOW

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
196690dfda global: Migrate CONFIG_LPC32XX_NAND_MLC_WR_HIGH to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_WR_HIGH to CFG_LPC32XX_NAND_MLC_WR_HIGH

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
259ec2ce11 global: Migrate CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY to CFG_LPC32XX_NAND_MLC_TCEA_DELAY

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
3c35c036ad global: Migrate CONFIG_LPC32XX_NAND_MLC_RD_LOW to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_RD_LOW to CFG_LPC32XX_NAND_MLC_RD_LOW

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
ab8c6e370c global: Migrate CONFIG_LPC32XX_NAND_MLC_RD_HIGH to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_RD_HIGH to CFG_LPC32XX_NAND_MLC_RD_HIGH

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
ea93286e5f global: Migrate CONFIG_LPC32XX_NAND_MLC_NAND_TA to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_NAND_TA to CFG_LPC32XX_NAND_MLC_NAND_TA

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
dff9de5c2c global: Migrate CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY to CFG_LPC32XX_NAND_MLC_BUSY_DELAY

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
e9f508cf01 global: Migrate CONFIG_KSNET_SERDES_SGMII_BASE to CFG
Perform a simple rename of CONFIG_KSNET_SERDES_SGMII_BASE to CFG_KSNET_SERDES_SGMII_BASE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
81d239aede global: Migrate CONFIG_KSNET_SERDES_SGMII2_BASE to CFG
Perform a simple rename of CONFIG_KSNET_SERDES_SGMII2_BASE to CFG_KSNET_SERDES_SGMII2_BASE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
d036606142 global: Migrate CONFIG_KSNET_SERDES_LANES_PER_SGMII to CFG
Perform a simple rename of CONFIG_KSNET_SERDES_LANES_PER_SGMII to CFG_KSNET_SERDES_LANES_PER_SGMII

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
e6014294dd global: Migrate CONFIG_IMX6_PWM_PER_CLK to CFG
Perform a simple rename of CONFIG_IMX6_PWM_PER_CLK to CFG_IMX6_PWM_PER_CLK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:10:40 -05:00
Tom Rini
35661f86eb global: Migrate CONFIG_I2C_MVTWSI_BASE1 to CFG
Perform a simple rename of CONFIG_I2C_MVTWSI_BASE1 to CFG_I2C_MVTWSI_BASE1

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:10:40 -05:00
Tom Rini
45ede979e8 global: Migrate CONFIG_I2C_MVTWSI_BASE0 to CFG
Perform a simple rename of CONFIG_I2C_MVTWSI_BASE0 to CFG_I2C_MVTWSI_BASE0

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:10:40 -05:00
Tom Rini
d2cd9f4121 global: Migrate CONFIG_FTRTC010_PCLK to CFG
Perform a simple rename of CONFIG_FTRTC010_PCLK to CFG_FTRTC010_PCLK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:09:43 -05:00
Tom Rini
bf09562222 global: Migrate CONFIG_FTRTC010_EXTCLK to CFG
Perform a simple rename of CONFIG_FTRTC010_EXTCLK to CFG_FTRTC010_EXTCLK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:09:43 -05:00
Tom Rini
193d7ab1e3 global: Migrate CONFIG_FSL_PMIC_MODE to CFG
Perform a simple rename of CONFIG_FSL_PMIC_MODE to CFG_FSL_PMIC_MODE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:09:43 -05:00
Tom Rini
f200d710d8 global: Migrate CONFIG_FSL_PMIC_CS to CFG
Perform a simple rename of CONFIG_FSL_PMIC_CS to CFG_FSL_PMIC_CS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:09:43 -05:00
Tom Rini
3a8be4da79 global: Migrate CONFIG_FSL_PMIC_CLK to CFG
Perform a simple rename of CONFIG_FSL_PMIC_CLK to CFG_FSL_PMIC_CLK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:09:43 -05:00
Tom Rini
e3e4efc04f global: Migrate CONFIG_FSL_PMIC_BITLEN to CFG
Perform a simple rename of CONFIG_FSL_PMIC_BITLEN to CFG_FSL_PMIC_BITLEN

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:09:43 -05:00
Tom Rini
72fc264504 global: Migrate CONFIG_FPGA_DELAY to CFG
Perform a simple rename of CONFIG_FPGA_DELAY to CFG_FPGA_DELAY

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:09:42 -05:00
Tom Rini
fa760c3240 global: Migrate CONFIG_FEC_MXC_PHYADDR to CFG
Perform a simple rename of CONFIG_FEC_MXC_PHYADDR to CFG_FEC_MXC_PHYADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:09:42 -05:00
Tom Rini
2aac334a9b global: Migrate CONFIG_FB_ADDR to CFG
Perform a simple rename of CONFIG_FB_ADDR to CFG_FB_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:09:42 -05:00
Tom Rini
42119de8b5 global: Migrate CONFIG_DW_WDT_CLOCK_KHZ to CFG
Perform a simple rename of CONFIG_DW_WDT_CLOCK_KHZ to CFG_DW_WDT_CLOCK_KHZ

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:07:03 -05:00
Tom Rini
218ce3695b global: Remove undef CONFIG_... for unused values
We have a number of places that undef CONFIG_... while we never
reference CONFIG_... in the first place. Remove these lines.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:07:03 -05:00
Tom Rini
d5c4b8b063 log: Remove some places where we redefine LOGLEVEL
We cannot redefine a CONFIG value per file in this manner.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:07:03 -05:00
Tom Rini
991bc16951 atmel_nand: Remove undef during SPL_BUILD
We cannot disable features in SPL in this manner, remove the undef here.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:07:03 -05:00
Tom Rini
2c065aeeee mtd: ubi: Finish moving configuration to Kconfig
We have some unused and undefined symbols to remove references to, so do
that. Move the final things that we do set (or need to keep unset) to
Kconfig instead.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:07:03 -05:00
Tom Rini
f00f676af6 Convert CONFIG_SYS_FPGA_CHECK_BUSY to Kconfig
This converts the following to Kconfig:
    CONFIG_SYS_FPGA_CHECK_BUSY

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:07:03 -05:00
Tom Rini
e1befc8512 OP-TEE autodiscovery
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Merge tag 'tpm-23122022' of https://source.denx.de/u-boot/custodians/u-boot-tpm

OP-TEE autodiscovery
2022-12-23 07:46:41 -05:00
Etienne Carriere
fe8a4ed011 tee: optee: discover services dependent on tee-supplicant
Makes OP-TEE to enumerate also services depending on tee-supplicant
support in U-Boot. This change allows OP-TEE services like fTPM TA
to be discovered and get a TPM device registered in U-Boot.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-12-23 10:26:15 +02:00
Etienne Carriere
476a3d58df tee: optee: don't fail probe because of optee-rng
Fixes optee-rng driver bind sequence in optee driver to print a warning
message but not report an error status when a optee-rng service driver
fails to be bound as the optee driver itself is still fully functional.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-12-23 10:26:11 +02:00
Jim Liu
dd5f07eb6b net: nuvoton: fix build broken for use phy_get_interface_by_name
The original patch is use phy_get_interface_by_name to set interface.
The new patch is use dev_read_phy_mode to replace it.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-12-22 15:39:13 -05:00
Tom Rini
46df77669e nxp: Rename CONFIG_U_BOOT_HDR_SIZE to FSL_U_BOOT_HDR_SIZE
This is always defined to 16K, so we move this over to
include/fsl_validate.h to start with. Next, we rename this from CONFIG_
to FSL_. Coalesce the various comments around this definition to be in
fsl_validate.h as well to explain the usage.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:49 -05:00
Tom Rini
0c3a6d443f usb: Remove CONFIG_USBD_HS
This define is not enabled by the only platform which currently enables
the legacy option of CONFIG_USB_DEVICE. We can drop this code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:49 -05:00
Tom Rini
8747decc9b net: vsc9953: Remove this driver
No platforms enable this driver as there's no T1040D4RDB nor T1040RDB
support at this time.  Remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:49 -05:00
Tom Rini
4fd9373bbb net: Remove more legacy functions
Remove some of the board and arch specific non-DM_ETH helper code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:49 -05:00
Tom Rini
c46597155e sandbox: Finish migration to Kconfig
Stop using CONFIG_SANDBOX_ARCH and use CONFIG_SANDBOX instead. For the
SPI related defines, set them directly in Kconfig. This now empties
arch/sandbox/include/asm/config.h.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-22 10:31:48 -05:00
Tom Rini
f55281665a arm: ti814x: Remove remaining support code
When the ti814x_evm config was removed most, but not all, of the
relevant support code was remove.  Get rid of what was missed.

Fixes: 50b5326868 ("ti814x: Remove platform")
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:48 -05:00
Tom Rini
71894173bb Convert CONFIG_MXC_NAND_HWECC to Kconfig
This converts the following to Kconfig:
   CONFIG_MXC_NAND_HWECC

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:48 -05:00
Tom Rini
829e9d2236 ddr: fsl: Remove CONFIG_MEM_INIT_VALUE
The way all of the memory init code here works is that we pass
0xDEADBEEF around for the initial value (as it's a well known 'poison'
value and so easily recognized in debuggers, etc). The only point of
this CONFIG symbol was to pass in a different value for that purpose.
Drop this symbol and cleanup the code slightly.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:48 -05:00
Tom Rini
2cc61a631b malta: Rename CONFIG_MALTA to CONFIG_TARGET_MALTA
Fixup this last remnant of CONFIG_MALTA.

Cc: Paul Burton <paul.burton@mips.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:48 -05:00
Tom Rini
acdf89ec06 Convert CONFIG_KSNET_NETCP_V1_0 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_KSNET_NETCP_V1_0
   CONFIG_KSNET_NETCP_V1_5

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:48 -05:00
Tom Rini
308520b8f2 global: Remove unused CONFIG symbols
This removes the following unreferenced CONFIG symbols:
   CONFIG_FDTADDR
   CONFIG_FDTFILE
   CONFIG_FLASH_SECTOR_SIZE
   CONFIG_FSL_CPLD
   CONFIG_HDMI_ENCODER_I2C_ADDR
   CONFIG_I2C_MVTWSI
   CONFIG_I2C_RTC_ADDR
   CONFIG_IRAM_END
   CONFIG_IRAM_SIZE
   CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
   CONFIG_L1_INIT_RAM
   CONFIG_MACB_SEARCH_PHY
   CONFIG_MIU_2BIT_21_7_INTERLEAVED
   CONFIG_MTD_NAND_VERIFY_WRITE
   CONFIG_MVGBE_PORTS
   CONFIG_NETDEV
   CONFIG_NUM_DSP_CPUS
   CONFIG_PHY_BASE_ADR
   CONFIG_PHY_INTERFACE_MODE
   CONFIG_PSRAM_SCFG
   CONFIG_RAMBOOT_SPIFLASH
   CONFIG_RAMBOOT_TEXT_BASE
   CONFIG_RD_LVL
   CONFIG_ROCKCHIP_SDHCI_MAX_FREQ
   CONFIG_SETUP_INITRD_TAG
   CONFIG_SH_QSPI_BASE
   CONFIG_SMDK5420
   CONFIG_SOCRATES
   CONFIG_SPI_ADDR
   CONFIG_SPI_FLASH_QUAD
   CONFIG_SPI_FLASH_SIZE
   CONFIG_SPI_HALF_DUPLEX
   CONFIG_SPI_N25Q256A_RESET
   CONFIG_TEGRA_SLINK_CTRLS
   CONFIG_TPM_TIS_BASE_ADDRESS
   CONFIG_UBOOT_SECTOR_COUNT
   CONFIG_UBOOT_SECTOR_START
   CONFIG_VAR_SIZE_SPL
   CONFIG_VERY_BIG_RAM

And also:
   BL1_SIZE
   PHY_NO
   RESERVE_BLOCK_SIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:48 -05:00
Tom Rini
1353b25ec5 i2c: Remove CONFIG_I2C_MULTI_BUS
This functionality is part of the legacy I2C subsystem and is currently
unused anywhere.  Remove the remaining references.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:48 -05:00
Tom Rini
3f7a496531 Convert CONFIG_POWER_PCA9450 to Kconfig
This converts the following to Kconfig:
   CONFIG_POWER_PCA9450

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:48 -05:00
Tom Rini
5388aa2851 Convert CONFIG_FSL_ESDHC_PIN_MUX to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_ESDHC_PIN_MUX

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:48 -05:00
Tom Rini
3a581af21a Convert CONFIG_FLASH_SPANSION_S29WS_N et al to Kconfig
This converts the following to Kconfig:

   CONFIG_FLASH_SPANSION_S29WS_N
   CONFIG_FLASH_VERIFY
   CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
   CONFIG_FSL_ISBC_KEY_EXT
   CONFIG_FSL_TRUST_ARCH_v1
   CONFIG_FSL_SDHC_V2_3
   CONFIG_MAX_DSP_CPUS
   CONFIG_MIU_2BIT_INTERLEAVED
   CONFIG_SERIAL_BOOT
   CONFIG_SPI_BOOTING
   CONFIG_X86EMU_RAW_IO

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:48 -05:00
Tom Rini
98fbad631f Convert CONFIG_FLASH_SHOW_PROGRESS to Kconfig
This converts the following to Kconfig:
   CONFIG_FLASH_SHOW_PROGRESS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:48 -05:00
Tom Rini
21491883d2 fec_mxc: Remove CONFIG_FEC_FIXED_SPEED support
This option is only used on one platform currently. However, with PHYLIB
enabled, which this platform also does, this option is not checked and
the functional use case is handled. Remove this code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:47 -05:00
Tom Rini
9b0240f8c6 Convert CONFIG_DM9000_BYTE_SWAPPED et al to Kconfig
This converts the following to Kconfig:
   CONFIG_DM9000_BYTE_SWAPPED
   CONFIG_DM9000_NO_SROM
   CONFIG_DM9000_USE_16BIT
   CONFIG_DM9000_DEBUG
   CONFIG_MXC_GPT_HCLK
   CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:47 -05:00
Tom Rini
2440b5bb52 Convert CONFIG_HSMMC2_8BIT to Kconfig
This converts the following to Kconfig:
   CONFIG_HSMMC2_8BIT

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:47 -05:00
Tom Rini
7d212af2b1 usb: Update USB_STORAGE dependencies
As it's no longer possible to have !DM_USB set, we can remove these
dependencies.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-21 19:04:33 -05:00
Tom Rini
14f43797d0 Prepare v2023.01-rc4
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Merge tag 'v2023.01-rc4' into next

Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-21 13:09:01 -05:00
Eugen Hristev
9859b9a722 sysreset: at91: add compatible with microchip, sama7g5-rstc
As documented in bindings doc in kernel 6.0:
https://elixir.bootlin.com/linux/v6.0/source/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2022-12-20 11:59:07 +02:00
Etienne Carriere
33ba80303e tpm2: ftpm: open session with privileged ree login
Opens the fTPM session with TEE_LOGIN_REE_KERNEL as fTPM may restrict
access to that login when Linux based OS is running as applications are
expected to got through the Linux TPMv2 driver.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-12-20 09:37:36 +02:00
Tom Rini
daa531cc5c Merge tag 'u-boot-rockchip-20221219' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Only call binman when TPL available;
- rk3128 DTS fix;
- Fix GPT table corruption for rk3399 puma ;
- Fix i2c for rk3399 Pinebookpro;
- Enable UEFI capsule update for RockPi4;
2022-12-19 08:33:24 -05:00
John Keeping
b5194c2258 phy: rockchip: handle clock without enable function
If a clock doesn't supply the enable hook, clk_enable() will return
-ENOSYS.  In this case the clock is always enabled so there is no error
and the phy initialisation should continue.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-12-19 10:56:12 +08:00
Johan Jonker
4d89330b8a rockchip: rk3128-cru: sync the clock dt-binding header from Linux
In order to update the DT for rk3128
sync the clock dt-binding header.
This is the state as of v6.0 in Linux.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-12-19 10:56:12 +08:00
Tom Rini
55e374f508 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
This cleans up each board's defconfig, and fixes the serial console on
some Olimex board. Also we lose another legacy config variable.
The rest are minor cleanups, that actually shouldn't change anything
in the build.

Passed the gitlab CI, plus briefly tested on Pine64-LTS, LicheePi Nano,
and BananaPi M1.
2022-12-18 08:08:55 -05:00
Samuel Holland
6cad8bea4f pinctrl: sunxi: Add P2WI and RSB pinmuxes
P2WI and RSB are used to communicate with a PMIC. Most SoCs have only
one possible pinmux. F1C100s has two possibilities, with different mux
values, so omit it until some board needs one of them.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-12-13 20:33:37 +00:00
Tom Rini
ed6251187a Revert "cmd: pxe_utils: Check fdtcontroladdr in label_boot"
With the change here, all extlinux.conf files with only "KERNEL
/fitImage" don't work anymore. One common example of this would be those
files generated by thee Poky/OE WIC bootimg-partition bootloader
partition generator.

This reverts commit d5ba6188df.

Reported-by: Neil Armstrong <neil.armstrong@linaro.org>
Reported-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-13 09:26:25 -05:00
Patrick Delaunay
8b83d54f9e configs: remove support of MTDIDS_DEFAULT/MTDPARTS_DEFAULT
Complete the migration of MTDPARTS_DEFAULT / MTDIDS_DEFAULT in Kconfig;
this patch removes the support of MTDIDS_DEFAULT / MTDPARTS_DEFAULT
in the configuration files (include/configs/*.h).

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-12-12 16:46:07 -05:00
Ben Dooks
4c56d75117 drivers: pci: pcie_dw_common: add upper-limit to iATU
The 4.6 spec added an upper 32bits to the ATU limit, and since this
driver is already assuming the unrolled feature added in the 4.8
specification this really should be set.

This is causing a bug with testing against the QEMU model as it
defaults the viewports to fully open and not setting this causes
the config viewport to become most of memory (obviously stopping
the emulated system working correctly)

Signed-off-by: Ben Dooks <ben.dooks@sifive.com>
2022-12-12 14:03:11 -05:00
Patrick Delaunay
30257f4699 dm: pmic: ignore disabled node in pmic_bind_children
Ignore the disabled children node in pmic_bind_children() so the
disabled regulators in device tree are not registered.

This patch is based on the dm_scan_fdt_node() code - only the
activated nodes are bound -  and it solves possible issue when a
deactivated regulator is bound, error for duplicated regulator name
for example.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-12 11:25:28 +01:00
Patrick Delaunay
91dae6d0a1 phy: usbphyc: use regulator_set_enable_if_allowed for disabling vbus supply
Use regulator_set_enable_if_allowed() api instead of regulator_set_enable()
while disabling vbus supply. This way the driver doesn't see an error
when it disable an always-on regulator for VBUS.

This patch is needed for STM32MP157C-DK2 board when the regulator
v3v3: buck4 used as the phy vbus supply in kernel device tree
is always on with the next hack for low power use-case:

&usbphyc_port0 {
        ...
	/*
	 * Hack to keep hub active until all connected devices are suspended
	 * otherwise the hub will be powered off as soon as the v3v3 is disabled
	 * and it can disturb connected devices.
	 */
	connector {
		compatible = "usb-a-connector";
		vbus-supply = <&v3v3>;
	};
};

Without this patch and the previous update in DT the command
"usb stop" failed and the next command "usb start" cause a crash.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2022-12-12 11:25:19 +01:00
Dario Binacchi
17c2ccde22 mtd: nand: mxs_nand_spl: don't read useless pages
The patch prevents pages beyond the last from being unnecessarily read.
This occurs when the last page to be read is not the last page of the
last block. Before this change we would have read all the pages up to
the end of the last block.

Suggested-by: Michael Trimarchi <michael@amarulasolutions.com>
Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/all/20221120095705.3019295-1-dario.binacchi@amarulasolutions.com
2022-12-10 14:35:55 +01:00
Dario Binacchi
670789f5ba mtd: nand: drop EXPORT_SYMBOL_GPL for nanddev_erase()
This function is only used within this module, so it is no longer
necessary to use EXPORT_SYMBOL_GPL().

This patch parallels the work done in the following patch:
https://lore.kernel.org/linux-mtd/20221018170205.1733958-1-dario.binacchi@amarulasolutions.com

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/all/20221108090719.3631621-1-dario.binacchi@amarulasolutions.com
2022-12-10 14:35:55 +01:00
Michael Trimarchi
c21b0ca525 mtd: nand: make Samsung SLC NAND usable again
Upstream linux commit 69fc01296c9281

commit a1286a1fc4 ("mtd: nand: Move Samsung specific init/detection
logic in nand_samsung.c") introduced a regression for Samsung SLC NAND
chips. Prior to this commit chip->bits_per_cell was initialized by calling
nand_get_bits_per_cell() before using nand_is_slc().
With the offending commit this call is skipped, leaving
chip->bits_per_cell cleared to zero when the manufacturer specific
'.detect' function calls nand_is_slc() which in turn interprets
bits_per_cell != 1 as indication for an MLC chip.
The effect is that e.g. a K9F1G08U0F NAND chip is falsely detected as
MLC NAND with 4KiB page size rather than SLC with 2KiB page size.

Add a call to nand_get_bits_per_cell() before calling the .detect hook
function in nand_manufacturer_detect(), so that the nand_is_slc()
calls in the manufacturer specific code will return correct results.

Reported-by: Marcin Gołaś <marcingol30@gmail.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20221021060536.11747-1-michael@amarulasolutions.com
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-12-10 14:35:55 +01:00
Roger Quadros
ec2c9240d5 mtd: rawnand: omap_gpmc: Reduce .bss usage
Allocate omap_ecclayout on the heap as we have
limited .bss space on AM64 R5 SPL configuration.

Reduces .bss usage by 2984 bytes.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-12-10 14:35:54 +01:00
Roger Quadros
664d536926 mtd: rawnand: nand_spl_loaders: Fix cast type build warning
Fixes the below build warning on 64-bit platforms.

drivers/mtd/nand/raw/nand_spl_loaders.c:26:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
      dst = (void *)((int)dst - page_offset);

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/all/20221011115012.6181-8-rogerq@kernel.org
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-12-10 14:35:54 +01:00
Roger Quadros
cd72a950e0 mtd: rawnand: omap_gpmc: Optimize NAND reads
Rename omap_nand_read() to omap_nand_read_buf() to reflect
actual behaviour.

Use FIFO read address instead of raw read address for reads.

The GPMC automatically converts 32-bit/16-bit reads to NAND
device specific reads (8/16 bit). Use the largest possible
read granularity size for more efficient reads.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-12-10 11:11:25 +01:00
Roger Quadros
7e4a494c5f mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms
Pointer size cannot be assumed to be 32-bit, so use
use uintptr_t instead of uint32_t.

Fixes the below build warning on 64-bit builds.

drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
  head = ((uint32_t) buf) % 4;

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-12-10 11:11:25 +01:00
Roger Quadros
472229fcfc mtd: rawnand: omap_gpmc: Enable build for K2/K3 platforms
The GPMC module is present on some K2 and K3 SoCs.
Enable building GPMC NAND driver for K2/K3 platforms.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/all/20221011115012.6181-3-rogerq@kernel.org
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-12-10 11:11:25 +01:00
Roger Quadros
c6bafdae50 mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h
We want to get rid of <asm/arch/mem.h> so don't
enforce it for new platforms.

This also means GPMC_MAX CS doesn't have to be defined
by platform code.

Define it locally here for now.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-12-10 11:11:25 +01:00
Bryan Brattlof
d90c8bc441 board: ti: introduce the basic files needed to support the am62a
Introduce the bare minimum SD and UART support for the am62a sk.

Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-12-09 14:10:28 -05:00
Bryan Brattlof
b6cbcd6155 arm: mach-k3: am62a: introduce auto-generated SoC data
Introduce the auto-generated clock tree and power domain data needed to
attach the am62a into the power-domain and clock frameworks of uboot

Signed-off-by: Bryan Brattlof <bb@ti.com>
2022-12-09 14:10:28 -05:00
Bryan Brattlof
e38025c8b5 soc: ti: k3-socinfo: add am62a SoC entry
Add identification support for TI's am62ax family of SoCs

Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-12-09 14:10:28 -05:00
Bryan Brattlof
f54febe1b1 ram: k3-ddrss: add am62a controller support
TI's am62a family of SoCs uses a new 32bit DDR controller that shares
much of the same functionality with the existing am64 and j721e
controllers.

Select this controller by default when u-boot is build for the am62a

Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-12-09 14:10:28 -05:00
Bryan Brattlof
ee31be429b ram: k3-ddrss: add auto-generated macros for am62a support
The new 32bit DDR controller for TI's am62a family of SoCs shares much
of the same functionality with the existing 16bit (am64) and 32bit
(j721e) controllers, so this patch reorganizes the existing
auto-generated macros for the 16bit and 32bit controllers to make room
for the macros for the am62a's controller

This patch consists mostly of header/macro renames and additions with a
new Kconfig option (K3_AM62A_DDRSS) allowing us to select these new
macros during compilation.

Signed-off-by: Bryan Brattlof <bb@ti.com>
2022-12-09 14:10:28 -05:00
Tom Rini
8f17040877 - Drop MMCI interrupt-names in STM32H743, STM32MP15 and STM322MP13 DT
DHSOM:
   - Enable assorted ST specific commands
   - Add version variable
   - Add boot counter
 STM32MP13:
   - Add sdmmc cd-gpios for STM32MP135F-DK
   - Add clock & reset support
 STM32 ADC:
   - Split channel init into several routines
   - Add support of generic channels binding
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Merge tag 'u-boot-stm32-20221207' of https://source.denx.de/u-boot/custodians/u-boot-stm

- Drop MMCI interrupt-names in STM32H743, STM32MP15 and STM322MP13 DT

DHSOM:
  - Enable assorted ST specific commands
  - Add version variable
  - Add boot counter
STM32MP13:
  - Add sdmmc cd-gpios for STM32MP135F-DK
  - Add clock & reset support
STM32 ADC:
  - Split channel init into several routines
  - Add support of generic channels binding
2022-12-08 11:25:08 -05:00
Balamanikandan Gunasundar
2dc1b8fe17 mfd: syscon: atmel-smc: Add new helpers to ease SMC regs manipulation
Add helper functions for atmel Static Memory Controller. The functions
are required to configure SMC. This file is inherited from the work
done by Boris Brezillon for Linux

Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
2022-12-08 18:06:27 +02:00
Balamanikandan Gunasundar
68ddf18dc3 memory: atmel-ebi: add Atmel EBI (External Bus Interface) driver
The EBI is used to access peripherals like NAND, SRAM, NOR etc. Add
this driver to probe the nand flash controller. This is a dummy driver
and not yet a complete device driver for EBI.

Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
2022-12-08 18:06:27 +02:00
Balamanikandan Gunasundar
a490e1b7c0 nand: atmel: Add pmecc driver
Add driver for atmel pmecc. This implementation is ported from
Linux. The reference taken is linux-5.4-at91.

Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
2022-12-08 18:06:27 +02:00
Balamanikandan Gunasundar
6a8dfd5722 nand: atmel: Add DM based NAND driver
This implementation is ported from the rework done by Boris Brezillon
in Linux. This porting is done based on linux-5.4-at91. The driver is
tested in sam9x60ek, sama5d3_xplained, sam9x75eb and sama7g54-ddr3-eb.

Changes done includes

- Adapt GPIO descriptor apis for U-Boot. Use gpio_request_by_name_nodev,
  dm_gpio_get_value etc.
- Use U_BOOT_DRIVER instead of platform_driver.
- Replace struct platform_device with struct udevice
- Check the status of nfc exec operation by polling the status
  register instead of interrupt based handling
- DMA operations not supported. Remove it
- Adapt DT parsing to U-Boot APIs

Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
2022-12-08 18:06:18 +02:00
Pali Rohár
bd0ed9a2d2 ata: ahci-pci: Replace magic constant by macro
Replace 0x1b21 by macro PCI_VENDOR_ID_ASMEDIA with the same value.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-08 10:46:01 -05:00
Patrick Delaunay
55b0affd26 firmware: scmi: use protocol node name to bind the scmi regulator driver
In scmi firmware driver, it is better to bind the scmi protocol driver
"scmi_voltage_domain" with the node name of the protocol 17 and not
the sub-node named "regulator", because is a fixed string which doesn't
provide information and because it is not aligned with the other scmi
protocol nodes.

For example on stm32mp135f-dk board with device tree in stm32mp131.dtsi

scmi: scmi {
	compatible = "linaro,scmi-optee";
	#address-cells = <1>;
	#size-cells = <0>;
	linaro,optee-channel-id = <0>;
	shmem = <&scmi_shm>;
	scmi_clk: protocol@14 {
		reg = <0x14>;
		#clock-cells = <1>;
	};
	scmi_reset: protocol@16 {
		reg = <0x16>;
		#reset-cells = <1>;
	};
	scmi_voltd: protocol@17 {
		reg = <0x17>;
		scmi_regu: regulators {
			#address-cells = <1>;
			#size-cells = <0>;
			scmi_reg11: voltd-reg11 {
				reg = <VOLTD_SCMI_REG11>;
				regulator-name = "reg11";
			};
			scmi_reg18: voltd-reg18 {
				reg = <VOLTD_SCMI_REG18>;
				regulator-name = "reg18";
			};
			scmi_usb33: voltd-usb33 {
				reg = <VOLTD_SCMI_USB33>;
				regulator-name = "usb33";
			};
		};
	};
};

Before the patch:

> dm tree

 scmi_agent    0  [ + ]   scmi-over-optee       |-- scmi
 clk           1  [ + ]   scmi_clk              |   |-- protocol@14
 ...
 reset         1  [   ]   scmi_reset_domain     |   |-- protocol@16
 nop           2  [ + ]   scmi_voltage_domain   |   `-- regulators
 regulator     0  [ + ]   scmi_regulator        |       |-- voltd-reg11
 regulator     1  [ + ]   scmi_regulator        |       |-- voltd-reg18
 regulator     2  [ + ]   scmi_regulator        |       |-- voltd-usb33
 ...

after the patch:

> dm tree

 scmi_agent    0  [ + ]   scmi-over-optee       |-- scmi
 clk           1  [ + ]   scmi_clk              |   |-- protocol@14
 ...
 reset         1  [   ]   scmi_reset_domain     |   |-- protocol@16
 nop           2  [ + ]   scmi_voltage_domain   |   `-- protocol@17
 regulator     0  [ + ]   scmi_regulator        |       |-- voltd-reg11
 regulator     1  [ + ]   scmi_regulator        |       |-- voltd-reg18
 regulator     2  [ + ]   scmi_regulator        |       |-- voltd-usb33
 ...

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-12-08 09:29:02 -05:00
Szymon Heidrich
51a0e215ec usb: gadget: rndis: Prevent InformationBufferOffset manipulation
Prevent access to arbitrary memory locations in gen_ndis_set_resp
via manipulation of buf->InformationBufferOffset. Original
implementation permits manipulation of InformationBufferOffset to
exploit OID_GEN_CURRENT_PACKET_FILTER to set arbitrary memory contents
within a 32byte offset as the devices packet filter. The packet filter
value may be next retrieved using gen_ndis_query_resp so it is possible
to extract specific memory regions two bytes a time.

The rndis_query_response was not modified as neither the buffer offset
nor length passed to gen_ndis_query_resp is used.

Signed-off-by: Szymon Heidrich <szymon.heidrich@gmail.com>
2022-12-08 14:30:39 +01:00
Hugo SIMELIERE
14dc0ab138 usb: gadget: dfu: Fix check of transfer direction
Commit fbce985e28 to fix CVE-2022-2347
blocks DFU usb requests.
The verification of the transfer direction was done by an equality
but it is a bit mask.

Signed-off-by: Hugo SIMELIERE <hsimeliere.opensource@witekio.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Sultan Qasim Khan <sultan.qasimkhan@nccgroup.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
2022-12-08 14:30:39 +01:00
Tom Rini
e524f3a449 net: Remove eth_legacy.c
As there are no more non-DM_ETH cases for networking, remove this legacy
file and update the Makefile to match current usage.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
9e0bcf8043 qe: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
2098a3b8fe usb: gadget: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
b8daa6e9ee usb: eth: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code fro usb_ether itself.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
0a9cbd4f3c usb: eth: smsc95xx: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
82cdcd5792 usb: eth: r8152: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
05d654b564 usb: eth: msc7830: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
d9e81b0dd7 usb: eth: asix88179: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
3aa2003b51 usb: eth: asix: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
8a9e3464e4 net: keystone_net: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
f8dc288c7f net: cpsw: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
8f5c7cc96b net: sunxi_emac: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
61af2af3f7 net: smc911x: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
85fdaea66c net: sh_eth: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
f1ee1e1ef1 net: rtl8169: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
f6fa0715ce net: rtl8139: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
36af92ba85 net: phy: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
32dc677276 net: pcnet: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
fa9ea7607f net: netconsole: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
c7f15a3ee8 net: mvgbe: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
c00e9467bc net: mcfmii: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
047a086fa3 net: macb: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
cde5a844fb net: ldpaa_eth: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
3c7e652bbb net: fsl-mc: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
b669c54bfd net: fec_mxc: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
ecca44805d net: ethoc: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
4fb814f571 net: eepro100: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
53fa409f59 net: e1000: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
9f2d365ed3 net: dm9000x: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:17 -05:00
Tom Rini
acb30ccc7c net: designware: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:16 -05:00
Tom Rini
d55a003904 net: dc2114x: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:16 -05:00
Tom Rini
cc2bf624eb net: fm: Remove non-DM_ETH code
As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:16 -05:00
Tom Rini
2f420f135f net: tsec: Remove non-DM_ETH support code
As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code.  Doing this removes some board support code
which was also unused. Finally, this removes some CONFIG symbols that
otherwise needed to be migrated to Kconfig, but were unused in code now.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 16:04:16 -05:00
Tom Rini
f6301702c1 net: Remove extraneous dependencies
With DM_ETH being required now for all drivers, we don't need this
listed on individual drivers as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07 12:20:17 -05:00
Olivier Moysan
a9aa2aef5f adc: stm32mp15: add support of generic channels binding
Add support of generic IIO channels binding:
./devicetree/bindings/iio/adc/adc.yaml
Keep support of st,adc-channels for backward compatibility.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-12-07 17:00:26 +01:00
Olivier Moysan
1727d46bf9 adc: stm32mp15: split channel init into several routines
Split stm32_adc_chan_of_init channel initialization function into
several routines to increase readability and prepare channel
generic binding handling.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-12-07 17:00:26 +01:00
Gabriel Fernandez
c8df960c8d clk: stm32mp13: introduce STM32MP13 RCC driver
STM32MP13 RCC driver uses Common Clock Framework and also a
'clk-stm32-core' API. Then STM32MPx RCC driver will contain only data
configuration (gates, mux, dividers and the way to check security)
or some specific clocks.
This API will be used by all new other generations of ST Socs.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-12-07 16:49:35 +01:00
Tom Rini
9cebc4ad8e post: Migrate to Kconfig
We move the existing CONFIG_POST_* functionality over to CFG_POST and
then introduce CONFIG_POST to Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:11:50 -05:00
Tom Rini
d948c8988c sandbox: Rework how SDL is enabled / disabled
Given that we can use Kconfig logic directly to see if we have a program
available on the host or not, change from passing NO_SDL to instead
controlling CONFIG_SANDBOX_SDL in Kconfig directly. Introduce
CONFIG_HOST_HAS_SDL as the way to test for sdl2-config and default
CONFIG_SANDBOX_SDL on if we have that, or not.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:11:50 -05:00
Tom Rini
5afc87eadb net: ftmac100: Remove non-DM_ETH code
At this point all users of this driver enable DM_ETH, so remove the
legacy code paths.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-12-05 16:08:38 -05:00
Tom Rini
be3bea2ba3 Convert CONFIG_VSC7385_ENET et al to Kconfig
This converts the following to Kconfig:
   CONFIG_VSC7385_ENET
   CONFIG_VSC9953

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:08:38 -05:00
Tom Rini
a9c3bce362 Convert CONFIG_USB_GADGET_AT91 to Kconfig
This converts the following to Kconfig:
   CONFIG_USB_GADGET_AT91

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:08:37 -05:00
Tom Rini
fcd7ba655e Convert CONFIG_TPS6586X_POWER et al to Kconfig
This converts the following to Kconfig:
   CONFIG_TPS6586X_POWER
   CONFIG_TWL6030_POWER

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:08:37 -05:00
Tom Rini
8ce59b5932 Convert CONFIG_SPD_EEPROM to Kconfig
This converts the following to Kconfig:
   CONFIG_SPD_EEPROM

Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:08:37 -05:00
Tom Rini
d91365203c Convert CONFIG_SMSC_LPC47M et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SMSC_LPC47M
   CONFIG_SMSC_SIO1007

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:08:37 -05:00
Tom Rini
1c34f7885d Convert CONFIG_SH_GPIO_PFC et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SH_GPIO_PFC
   CONFIG_TMU_TIMER

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:08:37 -05:00
Tom Rini
ea467ea1cd Convert CONFIG_RTC_DS1337 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_RTC_DS1337
   CONFIG_RTC_DS1337_NOOSC
   CONFIG_RTC_DS1338
   CONFIG_RTC_DS1374
   CONFIG_RTC_DS3231
   CONFIG_RTC_MC13XXX
   CONFIG_RTC_MXS
   CONFIG_RTC_PT7C4338

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:08:37 -05:00
Tom Rini
c3187fb144 Convert CONFIG_PCA953X to Kconfig
This converts the following to Kconfig:
   CONFIG_PCA953X

Cc: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:07:13 -05:00
Tom Rini
9200011e95 Convert CONFIG_NAND_KMETER1 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_NAND_ECC_BCH
   CONFIG_NAND_KIRKWOOD
   CONFIG_NAND_KMETER1

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:07:13 -05:00
Tom Rini
6c03a65275 Convert CONFIG_MXS_OCOTP to Kconfig
This converts the following to Kconfig:
   CONFIG_MXS_OCOTP

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:07:13 -05:00
Tom Rini
2568bd6db7 arm: Remove unused mx27 code
We no longer have any i.MX27 platforms, remove the remaining support
code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:07:13 -05:00
Tom Rini
d5596cbc6e arm: lpc32xx: Remove unused hsuart driver
This driver is not enabled in any config currently, remove it.

Cc: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:07:13 -05:00
Tom Rini
0ea156ba00 Convert CONFIG_IMX_VIDEO_SKIP et al to Kconfig
This converts the following to Kconfig:
   CONFIG_IMX_VIDEO_SKIP
   CONFIG_IMX_HDMI

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:07:12 -05:00
Tom Rini
d9feb83505 Convert CONFIG_POWER_LTC3676 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_POWER_FSL
   CONFIG_POWER_FSL_MC13892
   CONFIG_POWER_HI6553
   CONFIG_POWER_LTC3676
   CONFIG_POWER_PFUZE100
   CONFIG_POWER_PFUZE3000
   CONFIG_POWER_SPI
   CONFIG_POWER_TPS65090_EC
   CONFIG_POWER_TPS65218
   CONFIG_POWER_TPS65910

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:07:12 -05:00
Tom Rini
022dc9e505 Convert CONFIG_HIKEY_GPIO et al to Kconfig
This converts the following to Kconfig:
   CONFIG_HIKEY_GPIO
   CONFIG_TCA642X

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:06:43 -05:00
Tom Rini
060613f119 Convert CONFIG_FSL_IIM to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_IIM

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:06:43 -05:00
Tom Rini
518c5dfab0 power: pmic: Guard non-DM_PMIC drivers with a check for POWER_LEGACY
As we have more legacy PMIC drivers to move to Kconfig, guard them all
with POWER_LEGACY or SPL_POWER_LEGACY. Do the same kind of check for
building the drivers too. This also means that we need to resort the
list slightly in the Makefile.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:43 -05:00
Tom Rini
65cc0e2a65 global: Move remaining CONFIG_SYS_* to CFG_SYS_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do
not easily transition to Kconfig. In many cases they likely should come
from the device tree instead. Move these out of CONFIG namespace and in
to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:08 -05:00
Tom Rini
aa6e94deab global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:07 -05:00
Tom Rini
ecc8d425fd global: Move remaining CONFIG_SYS_PCI* to CFG_SYS_PCI*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_PCI and
CONFIG_SYS_PCIE namespace do not easily transition to Kconfig. In many
cases they likely should come from the device tree instead. Move these
out of CONFIG namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:07 -05:00
Tom Rini
a6b537266f rtc: Remove unused drivers
These RTC drivers are currently unused and reference other unused CONFIG
variables, so remove them.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:07 -05:00
Tom Rini
cdc5ed8f1f global: Move remaining CONFIG_SYS_NUM_* to CFG_SYS_NUM_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NUM
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:07 -05:00
Tom Rini
91092132ba global: Move remaining CONFIG_SYS_NS16550_* to CFG_SYS_NS16550_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NS16550
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:07 -05:00
Tom Rini
9591b63531 Convert CONFIG_SYS_NS16550_MEM32 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_NS16550_MIN_FUNCTIONS
   CONFIG_SYS_NS16550_MEM32
   CONFIG_SYS_NS16550_PORT_MAPPED
   CONFIG_SYS_NS16550_REG_SIZE
   CONFIG_SYS_NS16550_SERIAL

To do this we also introduce CONFIG_SPL_SYS_NS16550_SERIAL so that
platforms can enable the legacy driver here for SPL.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:06:07 -05:00
Tom Rini
57c3afbc27 powerpc: Rename CONFIG_NS16550_MIN_FUNCTIONS
This symbol is specific to the PowerPC SPL implementation, so rename
this to reflect that it's in SPL and used / tested there, so that we can
then safely migrate it to Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:05:38 -05:00
Tom Rini
4e5909450e global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:05:38 -05:00
Tom Rini
0cd0325964 Convert CONFIG_SYS_NAND_SIZE to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_SIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:05:38 -05:00
Tom Rini
a9f03760c1 Convert CONFIG_SYS_NAND_PAGE_2K et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_PAGE_2K
   CONFIG_SYS_NAND_PAGE_4K

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:05:38 -05:00
Tom Rini
1a792803d8 Convert CONFIG_SYS_NAND_NO_SUBPAGE_WRITE to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_NO_SUBPAGE_WRITE

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:05:38 -05:00
Tom Rini
4d3495deb6 Convert CONFIG_SYS_NAND_MAX_OOBFREE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_MAX_OOBFREE
   CONFIG_SYS_NAND_MAX_ECCPOS

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:05:38 -05:00
Tom Rini
b41641d52e mtd: nand: raw: atmel_nand: Use ATMEL_BASE_ECC directly
This is the only driver, and only one platform makes use of, setting
CONFIG_SYS_NAND_ECC_BASE. Reference ATMEL_BASE_ECC directly in this
case.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:05:38 -05:00
Tom Rini
41fa8f471d Convert CONFIG_SYS_NAND_HW_ECC to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_HW_ECC

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:05:38 -05:00
Tom Rini
60db32502c Convert CONFIG_SYS_NAND_HW_ECC_OOBFIRST to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_HW_ECC_OOBFIRST

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:05:38 -05:00
Tom Rini
715cce65b8 Convert CONFIG_SYS_NAND_DBW_8 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_DBW_8
   CONFIG_SYS_NAND_DBW_16

Note that all instances of the code check for CONFIG_SYS_NAND_DBW_16
being defined, and then "else" to CONFIG_SYS_NAND_DBW_8 whereas all of
the configs set CONFIG_SYS_NAND_DBW_8. So we introduce
CONFIG_SYS_NAND_DBW_16 as an option.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:05:38 -05:00
Heinrich Schuchardt
968eaaeaa7 test: test sandbox sound driver more rigorously
Consider unexpected values for frequency:

* negative frequency
* zero frequency
* frequency exceeding sampling frequency

As in these cases the sum of the samples is zero also check the count of
the samples.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 17:43:21 +01:00
Heinrich Schuchardt
d0e8777bee sound: avoid endless loop
'sound play 1 100000' results in an endless loop on the sandbox.

If the frequency exceeds half the sampling rate, zero out the output
buffer.

Fixes: 511ed5fdd3 ("SOUND: SAMSUNG: Add I2S driver")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 17:43:21 +01:00
Tom Rini
a50622d78c Xilinx changes for v2023.01-rc3-v2
xilinx:
 - Fix MAC address selection for System Controller from FRU
 - Cleanup Kconfig (ZYNQ_MAC_IN_EEPROM symbol)
 
 versal:
 - Create u-boot.elf for mini spi configurations
 
 versal-net:
 - Enable MT35XU flash
 
 zynq:
 - Add missing timer to DT for mini configurations
 
 zynqmp:
 - Do not include psu_init to U-Boot by default
 - Do not enable IPI by default to mini U-Boot
 - Update Luca's fragment
 - Fix SPL_FS_LOAD_PAYLOAD_NAME usage
 
 spi:
 - gqspi: Fix tapdelay values
 - gqspi: Fix 64bit address support
 - cadence: Remove condition for calling enable linear mode
 - nor-core: Invert logic to reflect sst26 flash unlocked
 
 net:
 - Add PCS/PMA phy support
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Merge tag 'xilinx-for-v2023.01-rc3-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2023.01-rc3-v2

xilinx:
- Fix MAC address selection for System Controller from FRU
- Cleanup Kconfig (ZYNQ_MAC_IN_EEPROM symbol)

versal:
- Create u-boot.elf for mini spi configurations

versal-net:
- Enable MT35XU flash

zynq:
- Add missing timer to DT for mini configurations

zynqmp:
- Do not include psu_init to U-Boot by default
- Do not enable IPI by default to mini U-Boot
- Update Luca's fragment
- Fix SPL_FS_LOAD_PAYLOAD_NAME usage

spi:
- gqspi: Fix tapdelay values
- gqspi: Fix 64bit address support
- cadence: Remove condition for calling enable linear mode
- nor-core: Invert logic to reflect sst26 flash unlocked

net:
- Add PCS/PMA phy support
2022-12-05 08:33:19 -05:00
Algapally Santosh Sagar
7ad3c09e79 mtd: spi-nor-core: Invert logic to reflect sst26 flash unlocked
flash_is_locked is changed to flash_is_unlocked with commit 513c6071ce
("mtd: spi: Convert is_locked callback to is_unlocked"). sst26_is_locked()
is also changed to sst26_is_unlocked() but the logic remained same.
Invert the logic for the flash lock/unlock to work properly.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20221122051833.13306-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-12-05 10:01:45 +01:00
Ashok Reddy Soma
0d1a55fcbc spi: cadence-qspi: Remove condition for calling enable linear mode
cadence_qspi_apb_enable_linear_mode() has a weak function defined, so no
need to gaurd this under if (CONFIG_IS_ENABLED(ARCH_VERSAL)).

In cadence_qspi_apb_write_execute(), enable linear mode is called twice by
mistake, remove extra one.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20221129114134.18909-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-12-05 08:55:55 +01:00
Venkatesh Yadav Abbarapu
906e20a613 spi: zynqmp_qspi: Add support for 64-bit read/write
When we pass the 64-bit address to read/write, only lower 32-bit
address is getting updated. Program the upper 32-bit address in the
DMA destination memory address MSBs register, which can handle upto
44-bit destination address.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20221125104413.26140-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-12-05 08:55:54 +01:00
T Karthik Reddy
a5e770b21c spi: zynqmp_gqspi: Update tapdelay value
The driver was using an incorrect value for GQSPI_LPBK_DLY_ADJ_DLY_1
tapdelay for Versal for frequencies above 100MHz. Change it from 2 to 1
based on the recommended value in IP spec.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20221123090451.11409-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-12-05 08:55:54 +01:00
Andy Chiu
f3558be91e net: xilinx_axi: check PCS/PMA PHY status in setup_phy
Both PCS/PMA PHY and the external PHY need to have a valid link status
in order to have Ethernet traffic. Check and wait this status at
setup_phy() so that we could diagnose if there is a PHY issue.

Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
Link: https://lore.kernel.org/r/20221101035800.912644-3-andy.chiu@sifive.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-12-05 08:55:54 +01:00
Andy Chiu
e23544cffe net: xilinx_axi: add PCS/PMA PHY
If we bridge an external PHY to Xilinx's PCS/PMA PHY and would like to
get and set the real status of the PHY facing the external world. Then
we should phy_connect() to the external PHY instead of the PCS/PMA one.
Thus, we add a pcs-handle DT entry, which have been merged in Linux, and
leave the configuration of it to the driver itself.

Unlike Linux, where the PCS/PMA PHY is managed by phylink, managing the
PCS/PMA PHY is only internal to the driver in U-Boot. The PCS/PMA PHY
pressents only when the phy-mode is configured as SGMII or 1000Base-X,
so it is always 1 Gbps and full-duplex and we may skip passing link
information out.

Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
Link: https://lore.kernel.org/r/20221101035800.912644-2-andy.chiu@sifive.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-12-05 08:55:54 +01:00
Jim Liu
d7b8fa1a6c i2c: nuvoton: renamed the NPCM i2c driver
The Makefile name is npcm_i2c but the driver is npcm-i2c.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-12-05 06:00:37 +01:00
Paul Barker
07744f2ac0 bus: Optionally include TI sysc driver in SPL/TPL
The TI sysc bus driver is required to allow access to the SPI bus on
am335x platforms. To support SPI boot this driver needs to be enabled in
the SPL/TPL as appropriate.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2022-12-02 08:39:00 -05:00
Paul Barker
e92f47c06a bus: TI sysc driver requires DM
This driver does not build if CONFIG_DM is disabled as it uses the
function `dev_get_priv`.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2022-12-02 08:39:00 -05:00
Paul Barker
dec64d55af dm: core: Fix iteration over driver_info records
We should only perform additional iteration steps when needed to
initialize the parent of a device. Other binding errors (such as a
missing driver) should not lead to additional iteration steps.

Unnecessary iteration steps can cause issues when memory is tightly
constrained (such as in the TPL/SPL) since device_bind_by_name()
unconditionally allocates memory for a struct udevice. On the SanCloud
BBE this led to boot failure caused by memory exhaustion in the SPL
when booting from SPI flash.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2022-12-02 08:39:00 -05:00
Tim Harvey
5e6c069b2c phy: add driver for Intel XWAY PHY
Add a driver for the Intel XWAY GbE PHY:
 - configure RGMII using dt phy-mode and standard delay properties
 - use genphy_config

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-11-28 13:06:40 -05:00
Yaron Micher
d1559435d7 net: macb: Fix race caused by flushing unwanted descriptors
The rx descriptor list is in cached memory, and there may be multiple
descriptors per cache-line. After reclaim_rx_buffers marks a descriptor
as unused it does a cache flush, which causes the entire cache-line to
be written to memory, which may override other descriptors in the same
cache-line that the controller may have written to.

The fix skips freeing descriptors that are not the last in a cache-line,
and if the freed descriptor is the last one in a cache-line, it marks
all the descriptors in the cache-line as unused.
This is similarly to what is done in drivers/net/fec_mxc.c

In my case this bug caused tftpboot to fail some times when other
packets are sent to u-boot in addition to the ongoing tftp (e.g. ping).
The driver would stop receiving new packets because it is waiting
on a descriptor that is marked unused, when in reality the descriptor
contains a new unprocessed packet but while freeing the previous buffer
descriptor & flushing the cache, the driver accidentally marked the
descriptor as unused.

Signed-off-by: Yaron Micher <yaronm@hailo.ai>
2022-11-28 13:06:40 -05:00
Tim Harvey
3cdbbe52f7 drivers: net: aquantia: fix typos
Fix a couple of typos:
- s/Acquantia/Aquantia/
- s/firmare/firmware/

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-11-28 13:06:39 -05:00
Marek Vasut
e9d3fc7e46 net: dwc_eth_qos: Add support for bulk RX descriptor cleaning
Add new desc_per_cacheline property which lets a platform run RX descriptor
cleanup after every power-of-2 - 1 received packets instead of every packet.
This is useful on platforms where (axi_bus_width EQOS_AXI_WIDTH_n * DMA DSL
inter-descriptor word skip count + DMA descriptor size) is less than cache
line size, which necessitates packing multiple DMA descriptors into single
cache line.

In case of TX descriptors, this is not a problem, since the driver always
does synchronous TX, i.e. the TX descriptor is always written, flushed and
polled for completion in eqos_send().

In case of RX descriptors, it is necessary to update their status in bulk,
i.e. after the entire cache line worth of RX descriptors has been used up
to receive data.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-11-28 10:25:17 -05:00
Marek Vasut
f94d008a9d net: dwc_eth_qos: Split TX and RX DMA rings
Separate TX and RX DMA rings to make their handling slightly clearer.
This is a preparatory patch for bulk RX descriptor flushing.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-11-28 10:25:17 -05:00
Joel Stanley
3167b4d722 liteeth: LiteX Ethernet device
LiteX is a soft system-on-chip that targets FPGAs. LiteETH is a basic
network device that is commonly used in LiteX designs.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-11-28 10:25:17 -05:00
Marek Vasut
db5bace4f6 usb: dwc3: Drop support for "snps, ref-clock-period-ns" DT property
Drop support for quickly deprecated DT property "snps,ref-clock-period-ns"
to prevent its proliferation.

Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
2022-11-27 15:34:56 +01:00
Sean Anderson
c55ac51a55 usb: dwc3: Program GFLADJ
GUCTL.REFCLKPER can only account for clock frequencies with integer
periods. To address this, program REFCLK_FLADJ with the relative error
caused by period truncation. The formula given in the register reference
has been rearranged to allow calculation based on rate (instead of
period), and to allow for fixed-point arithmetic.

Additionally, calculate a value for 240MHZDECR. This configures a
simulated 240Mhz clock using a counter with one fractional bit (PLS1).

This register is programmed only for versions >= 2.50a, since this is
the check also used by commit db2be4e9e30c ("usb: dwc3: Add frame length
adjustment quirk").

[ marek: Ported from Linux kernel commit
         596c87856e08d ("usb: dwc3: Program GFLADJ") ]

Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Marek Vasut <marex@denx.de> # Port from Linux
2022-11-27 15:34:56 +01:00
Sean Anderson
6bae0eb5b8 usb: dwc3: Calculate REFCLKPER based on reference clock
Instead of using a special property to determine the reference clock
period, use the rate of the reference clock. When we have a legacy
snps,ref-clock-period-ns property and no reference clock, use it
instead. Fractional clocks are not currently supported, and will be
dealt with in the next commit.

[ marek: Ported from Linux kernel commit
         5114c3ee24875 ("usb: dwc3: Calculate REFCLKPER based on reference clock") ]

Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Marek Vasut <marex@denx.de> # Port from Linux
2022-11-27 15:34:56 +01:00
Balaji Prakash J
57548e8bc7 usb: dwc3: reference clock period configuration
Set reference clock period when it differs from dwc3 default hardware
set.

We could calculate clock period based on reference clock frequency. But
this information is not always available. This is the case of PCI bus
attached USB host. For that reason we use a custom property.

Tested (USB2 only) on IPQ6010 SoC based board with 24 MHz reference
clock while hardware default is 19.2 MHz.

[ baruch: rewrite commit message; drop GFLADJ code; remove 'quirk-' from
  property name; mention tested hardware ]

[ marek: Ported from Linux kernel commit
         7bee318838890 ("usb: dwc3: reference clock period configuration") ]

Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Balaji Prakash J <bjagadee@codeaurora.org>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Marek Vasut <marex@denx.de> # Port from Linux
2022-11-27 15:34:56 +01:00
Marek Vasut
8ae84e6453 usb: dwc3: Cache ref_clk pointer in struct dwc3
Cache ref_clk clock pointer in struct dwc3 . This is a preparatory
patch for subsequent backports from Linux kernel which configure
GFLADJ register content based on the ref_clk rate and therefore need
access to the ref_clk pointer.

It is possible to extract the clock pointer from existing clk_bulk
list of already claimed clock, no need to call clk_get*() again.

Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
2022-11-27 15:34:56 +01:00
Marek Vasut
55a95f8f58 usb: Expand buffer size in usb_find_and_bind_driver()
The "generic_bus_%x_dev_%x" string which is printed into this buffer
can be up to 34 characters long ("generic_bus_12345678_dev_12345678").
The buffer would be clipped by snprintf() if both %x were at maximum
range. Make sure the buffer is long enough to cover such possibility.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-27 12:04:36 +01:00
Dylan Hung
8c7b55724c ram: ast2600: Align the RL and WL setting
Use macro to represent the RL and WL setting to ensure the PHY and
controller setting are aligned.

Review-by: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
2022-11-24 16:26:01 -05:00
Dylan Hung
bd1e195421 ram: ast2600: Improve ddr4 timing and signal quality
Adjust the following settings to get better timing and signal quality.

1. write DQS/DQ delay
- 1e6e2304[0]
- 1e6e2304[15:8]

2. read DQS/DQ delay
- 0x1e6e0298[0]
- 0x1e6e0298[15:8]

3. CLK/CA timing
- 0x1e6e01a8[31]

4. Read and write termination
- change RTT_ROM from 40 ohm to 48 ohm (MR1[10:8])
- change RTT_PARK from disable to 48 ohm (MR5[8:6])
- change RTT_WR from 120 ohm to disable (MR2[11:9])
- change PHY ODT from 40 ohm to 80 ohm (0x1e6e0130[10:8])

Note1: Both DDR-PHY and DDR controller have their own registers for DDR4
Mode Registers (MR0~MR6).  This patch introduces macros to synchronize
the MR value on both sides.

Note2: the waveform meansurement can be found in item #21 of Aspeed
AST26x0 Application note (AP note).

Review-by: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
2022-11-24 16:25:58 -05:00
Dylan Hung
581df347db ram: ast2600: Fix incorrect statement of the register polling
The condition "~data" in the if-statement is a typo.  The original
intention is to poll if SDRAM_PHYCTRL0_INIT bit equals to 0. So use
"data == 0" for instead.

Besides, the bit[1] of "phy_status" register is hardwired to
SDRAM_PHYCTRL0_INIT (with inverse logic). Since SDRAM_PHYCTRL0_INIT has
already done, remove the unnecessary checking of phy_status[1].

Fixes: fde9314346 ("ram: aspeed: Add AST2600 DRAM control support")
Review-by: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
2022-11-24 16:25:54 -05:00
Tom Rini
d5d9f32579 - Implement setbrg op to meson serial device
- Re-add the old PHY reset binding for nanopi-k2
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Merge tag 'u-boot-amlogic-20221122' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- Implement setbrg op to meson serial device
- Re-add the old PHY reset binding for nanopi-k2
2022-11-23 10:05:26 -05:00
Heinrich Schuchardt
b3a680a47a sandbox: check lseek return value in handle_ufi_command
Invoking lseek() may result in an error. Handle it.

Addresses-Coverity-ID: 376212 ("Error handling issues  (CHECKED_RETURN)")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-11-22 15:13:35 -07:00
Edoardo Tomelleri
66006f86e8 arm: amlogic: add setbrg op to serial device
Implement setbrg in amlogic/meson serial device with driver model
similar to how the meson_uart.c driver does it in Linux. Also
configure (probe) the serial device with the new reg5 register.

Signed-off-by: Edoardo Tomelleri <e.tomell@gmail.com>
Link: https://lore.kernel.org/r/20220918161701.572814-1-e.tomell@gmail.com
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2022-11-22 18:53:21 +01:00
Tom Rini
521277ec15 Xilinx changes for v2023.01-rc3
microblaze:
 - Enable 32 bit addressing mode for SPIs
 
 zynq:
 - Minor DT fixes (PL clock enabling)
 
 zynqmp:
 - Disable watchdog by default
 - Remove unused xlnx,eeprom chosen support
 - Add missing symlink for vck190 SC revB
 - Use mdio bus with ethernet-phy-id description
 
 versal:
 - Add mini qspi/ospi configuration
 
 versal-net:
 - Add soc driver
 - Fix Kconfig entry for SOC
 - Fix loading address location for MINI configuration
 - Disable LMB for mini configuration
 
 net:
 - Fix ethernet-phy-id usage in the code
 
 pinctrl:
 - Revert high impedance/output enable support
 
 timer:
 - Fix timer relocation for Microblaze
 - Fix timer wrap in 32bit Xilinx timer driver
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Merge tag 'xilinx-for-v2023.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2023.01-rc3

microblaze:
- Enable 32 bit addressing mode for SPIs

zynq:
- Minor DT fixes (PL clock enabling)

zynqmp:
- Disable watchdog by default
- Remove unused xlnx,eeprom chosen support
- Add missing symlink for vck190 SC revB
- Use mdio bus with ethernet-phy-id description

versal:
- Add mini qspi/ospi configuration

versal-net:
- Add soc driver
- Fix Kconfig entry for SOC
- Fix loading address location for MINI configuration
- Disable LMB for mini configuration

net:
- Fix ethernet-phy-id usage in the code

pinctrl:
- Revert high impedance/output enable support

timer:
- Fix timer relocation for Microblaze
- Fix timer wrap in 32bit Xilinx timer driver
2022-11-22 12:33:48 -05:00
Ashok Reddy Soma
ce8adf1a41 spi: cadence-qspi: Fix compilation error in mini u-boot flash reset
When cadence_qspi_versal_flash_reset() function is called in mini
u-boot where there is no firmware support, it is missing defines for
macro's BOOT_MODE_POR_0 & BOOT_MODE_POR_1. Remove them and replace with
already define macro's which have same values as these.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20221116141155.14788-3-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-22 15:02:07 +01:00
Ashok Reddy Soma
450d8eb54f qspi: versal-net: Add condition for tapdelay register
Add CONFIG_ARCH_VERSAL_NET to select tapdelay register for versal-net.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2500dd688214e2ec2d54ed3fabbfee0b1ca861a6.1668613229.git.michal.simek@amd.com
2022-11-22 15:02:07 +01:00
Michal Simek
64fc7fc887 soc: xilinx: versal-net: Add soc_xilinx_versal_net driver
Add soc_xilinx_versal_net driver to identify the family & revision of
versal-net SoC. Add Kconfig option CONFIG_SOC_XILINX_VERSAL_NET to
enable/disable this driver. To enable this driver by default, add this
config to xilinx_versal_net_virt_defconfig file. This driver will be
probed using platdata U_BOOT_DEVICE structure which is specified in
mach-versal-net/cpu.c.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/613d6bcffd9070f62cf348079ed16c120f8fc56f.1668612993.git.michal.simek@amd.com
2022-11-22 15:02:07 +01:00
Michal Simek
2e9946aba8 net: phy: Fix ethernet-phy-id <dot> in the code
Use dot instead of comma. The fix doesn't affect anything but it is good to
be aligned with used pattern. The first is used only for string size
calculation and the second change is in the comment.

Fixes: db681d4929 ("net: phy: Add new read ethernet phy id function")
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-22 15:02:07 +01:00
Ovidiu Panait
b34bc22bd9 timer: xilinx-timer: use timer_conv_64() to fix timer wrap around
Current xilinx_timer_get_count() implementation does not take into account
the periodic 32-bit wrap arounds, as it directly returns the 32-bit counter
register value. The roll-overs cause problems in the upper timer layers, as
generic timer code expects an incrementing 64-bit value from get_count() to
work correctly.

Add the missing 64-bit up-conversion to fix random hangs/delays in
__udelay().

Fixes: a36d86720f ("microblaze: Convert axi timer to DM driver")
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20221012053656.1492457-3-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-22 15:02:07 +01:00
Ovidiu Panait
8272d4cb89 timer-uclass: relocate ops pointers for CONFIG_NEEDS_MANUAL_RELOC
Relocate timer_ops pointers when CONFIG_NEEDS_MANUAL_RELOC is enabled.

The (gd->flags & GD_FLG_RELOC) check was added to make sure the reloc_done
logic works for drivers that use DM_FLAG_PRE_RELOC.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20221012053656.1492457-2-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-22 15:02:07 +01:00
Ovidiu Panait
1e766a04c7 timer-uclass: add timer_get_ops() macro
Align timer uclass with the other subsystems and provide a timer_get_ops()
convenience macro.

Using this instead of the generic device_get_ops() also prevents
-Wdiscarded-qualifiers warnings when used with non-const variables.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20221012053656.1492457-1-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-22 15:02:07 +01:00
Venkatesh Yadav Abbarapu
ba74bcf3e0 xilinx: common: Remove zynq_board_read_rom_ethaddr()
Removing the zynq_board_read_rom_ethaddr() function as
xlnx,eeprom is not used anymore. As all board dts to use
nvmem alias instead of xlnx,eeprom.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20221017094818.17996-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-22 15:02:07 +01:00
Michal Simek
716527299a Revert "pinctrl: zynqmp: Add support for output-enable and bias-high-impedance"
This reverts commit 123462e5e5.

On systems with older PMUFW using these pinctrl properties can cause system
hang because there is missing feature autodetection.
When it is implemented support for these two properties should go back.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c2900319ea80484f21692997f296269aee701c1f.1665659138.git.michal.simek@amd.com
2022-11-22 15:02:07 +01:00
Stefan Roese
5cbd029539 watchdog: Drop GD_FLG_WDT_READY as it's not used any more
Since commit c2fd0ca1a8
("watchdog: Integrate watchdog triggering into the cyclic framework")
GD_FLG_WDT_READY has become write-only. This patch now removes this
flag completely.

The vacant spot in gd_flags is filled with the newly introduced
GD_FLG_CYCLIC_RUNNING flag.

Suggested-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-11-22 08:56:26 +01:00
Quentin Schulz
dca313ff9d watchdog: designware: make reset really optional
Checking for DM_RESET is not enough since not all watchdog
implementations use a reset lane. Such is the case for Rockchip
implementation for example. Since reset_assert_bulk will only succeed if
the resets property exists in the watchdog DT node, it needs to be
called only if a reset property is present.

This adds a condition on the resets property presence in the watchdog DT
node before assuming a reset lane needs to be fetched with
reset_assert_bulk, by calling ofnode_read_prop.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2022-11-22 08:56:26 +01:00
Venkatesh Yadav Abbarapu
fbce985e28 usb: gadget: dfu: Fix the unchecked length field
DFU implementation does not bound the length field in USB
DFU download setup packets, and it does not verify that
the transfer direction. Fixing the length and transfer
direction.

CVE-2022-2347

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2022-11-21 09:23:00 -05:00
Conor Dooley
4e405c68fb clk: microchip: mpfs: fix criticality of peripheral clocks
Sync the critical clocks in the U-Boot driver with those marked as
critical in Linux. The Linux driver has an explanation of why each clock
is considered to be critical, so import that too.

Fixes: 2f27c9219e ("clk: Add Microchip PolarFire SoC clock driver")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
2022-11-15 15:37:17 +08:00
Conor Dooley
88b697fb37 clk: microchip: mpfs: fix periph clk parentage
Not all "periph" clocks are children of the AHB clock, some have the AXI
clock as their parent & the mtimer clock is derived from the external
reference clock directly. Stop assuming the AHB clock to be the parent
of all "periph" clocks and define their correct parents instead.

Fixes: 2f27c9219e ("clk: Add Microchip PolarFire SoC clock driver")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Tested-by: Padmarao Begari <padmarao.begari@microchip.com>
2022-11-15 15:37:17 +08:00
Conor Dooley
32cfdd5163 clk: microchip: mpfs: fix reference clock handling
The original devicetrees for PolarFire SoC messed up & defined the
msspll's output as a fixed-frequency, 600 MHz clock & used that as the
input for the clock controller node. The msspll is not a fixed
frequency clock and later devicetrees handled this properly. Check the
devicetree & if it is one of the fixed ones, register the msspll.
Otherwise, skip registering it & pass the reference clock directly to
the cfg clock registration function so that existing devicetrees are
not broken by this change.

As the MSS PLL is not a "cfg" or a "periph" clock, add a new driver for
it, based on the one in Linux.

Fixes: 2f27c9219e ("clk: Add Microchip PolarFire SoC clock driver")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Tested-by: Padmarao Begari <padmarao.begari@microchip.com>
2022-11-15 15:37:17 +08:00
Conor Dooley
fb103971fe clk: microchip: mpfs: convert parent rate acquistion to get_get_rate()
Currently the clock driver for PolarFire SoC takes a very naive approach
to the relationship between clocks. It reads the dt to get an input
clock, assumes that that is fixed frequency, reads the "clock-frequency"
property & uses that to set up both the "cfg" and "periph" clocks.

Simplifying for the sake of incremental fixes, the "correct" parentage for
the clocks currently supported in U-Boot is that the "cfg" clocks should
be children of the fixed frequency clock in the dt. The AHB clock is one
of these "cfg" clocks and is the parent of the "periph" clocks.

Instead of passing the clock rate of the fixed-frequency clock to the
"cfg" and "periph" registration functions and the name of the parents,
pass their actual parents & use clk_get_rate() to determine their parents
rates.

The "periph" clocks are purely gate clocks and should not be reading the
AHB clocks registers to determine their rates, as they can simply report
the output of clk_get_rate() on their parent.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
2022-11-15 15:37:17 +08:00
Tom Rini
c4ee4fe92e For 2022.01
-----------
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/14083
 
 - Fix UART
 - moved to binman (MX8 boards)
 - Toradex: sync DTS with Linux
 - Gateworks: fixes
 - New boards : MSC SM2S iMX8MP
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Merge tag 'u-boot-imx-20221114' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

For 2022.01
-----------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/14083

- Fix UART
- moved to binman (MX8 boards)
- Toradex: sync DTS with Linux
- Gateworks: fixes
- New boards : MSC SM2S iMX8MP
2022-11-14 09:33:36 -05:00
Sergei Antonov
b0c485fd38 i2c: i2c-gpio: add newline
Add newline at the end of the printed string.

Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-11-14 07:24:47 +01:00
Conor Dooley
6d133b3158 i2c: microchip: fix erroneous late ack send
A late ack is currently being sent at the end of a transfer due to
incorrect logic in mchp_corei2c_empty_rx(). Currently the Assert Ack
bit is being written to the controller's control reg after the last
byte has been received, causing it to sent another byte with the ack.
Instead, the AA flag should be written to the control register when
the penultimate byte is read so it is sent out for the last byte.

Reported-by: Andreas Buerkler <andreas.buerkler@enclustra.com>
Fixes: 0dc0d1e094 ("i2c: Add Microchip PolarFire SoC I2C driver")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>

Removed Tag by hs: Fixes: 0190d48488 ("i2c: microchip: fix ack sending logic")
2022-11-14 07:21:58 +01:00
Conor Dooley
95b22bd6dc i2c: microchip: fix ack sending logic
"Master receive mode" was not correctly sending ACKs/NACKs in the
interrupt handler. Bring the handling of M_SLAR_ACK, M_RX_DATA_ACKED &
M_RX_DATA_NACKED in line with the Linux driver.

Fixes: 0dc0d1e094 ("i2c: Add Microchip PolarFire SoC I2C driver")
Reported-by: Shravan Chippa <shravan.chippa@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-11-14 07:20:10 +01:00
Fabio Estevam
fc1c1760de Revert "serial: mxc: have putc use the TXFIFO"
This reverts commit c7878a0483.

Since commit c7878a0483 ("serial: mxc: have putc use the TXFIFO"),
serial console corruption can be seen when priting inside board_init().

Revert it to avoid the regression.

Reported-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>
2022-11-12 14:16:26 +01:00
Tom Rini
6cc04547cb global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespace
Migrate all of COFIG_SYS_FSL* to the CFG_SYS namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 10:08:55 -05:00
Tom Rini
5155207ae1 global: Migrate CONFIG_SYS_MPC8* symbols to the CFG_SYS namespace
Migrate all of COFIG_SYS_MPC* to the CFG_SYS namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-11-10 10:08:55 -05:00
Tom Rini
d236210c11 Convert CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 10:08:55 -05:00
Tom Rini
15713fc855 mediatek: Include <linux/sizes.h> where needed
These files reference SZ_ macros without including <linux/sizes.h>,
correct this.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 10:08:55 -05:00
Tom Rini
75fc79e530 Convert CONFIG_SYS_MMC_MAX_BLK_COUNT to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_MMC_MAX_BLK_COUNT

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-11-10 10:08:55 -05:00
Tom Rini
a918df21f0 Convert CONFIG_SYS_MAX_NAND_DEVICE to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_MAX_NAND_DEVICE

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 10:08:54 -05:00
Tom Rini
e28e0f47f3 rtc: Remove unused drivers
These drivers are not enabled anywhere, remove them.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 09:45:54 -05:00
Tom Rini
c56289ddaf Convert CONFIG_SYS_INTERLAKEN et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_INTERLAKEN
   CONFIG_SYS_ISA_IO
   CONFIG_SYS_ISA_IO_BASE_ADDRESS

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 09:45:54 -05:00
Tom Rini
9244b2fda9 Convert CONFIG_SYS_I2C_INIT_BOARD to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_I2C_INIT_BOARD

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 09:45:53 -05:00
Michal Suchanek
168a0e45fc dm: blk: Add probe in blk_first_device/blk_next_device
The description claims that the device is probed but it isn't.

Add the device_probe() call.

Also consolidate the iteration into one function.

Fixes: 8a5cbc065d ("dm: blk: Use uclass_find_first/next_device() in blk_first/next_device()")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
2022-11-07 16:24:30 -07:00
Simon Glass
952018117a dm: sandbox: Switch over to using the new host uclass
Update the sandbox implementation to use UCLASS_HOST and adjust all
the pieces to continue to work:

- Update the 'host' command to use the new API
- Replace various uses of UCLASS_ROOT with UCLASS_HOST
- Disable test_eficonfig since it doesn't work (this should have a unit
  test to allow this to be debugged)
- Update the blk test to use the new API
- Drop the old header file

Unfortunately it does not seem to be possible to split this change up
further.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
10aae1145c dm: sandbox: Create a block driver
Create a block driver for the new HOST uclass. This handles attaching and
detaching host files.

For now the uclass is not used but this will be plumbed in with future
patches.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
9bd1aa8af2 dm: sandbox: Create a new HOST uclass
Sandbox supports block devices which can access files on the host machine.
At present there is no uclass for this. The devices are attached to the
root devic. The block-device type is therefore set to UCLASS_ROOT which
is confusing.

Block devices should be attached to a 'media' device instead, something
which handles access to the actual media and provides the block driver
for the block device.

Create a new uclass to handle this. It supports two operations, to attach
and detach a file on the host machine.

For now this is not fully plumbed in.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
41e751091d dm: blk: Tidy up obtaining a block device from its parent
This function now finds its block-device child by looking for a child
device of the correct uclass (UCLASS_BLK). It cannot produce a device of
any other type, so drop the superfluous check.

Provide a version which does not probe the device, since that is often
needed when setting up the device's platdata.

Also fix up the function's comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
5ea894ac42 dm: test: Clear the block cache after running a test
Some tests access data in block devices and so cause the cache to fill
up. This results in memory being allocated.

Some tests check the malloc usage at the beginning and then again at the
end, to ensure there is no memory leak caused by the test. The block cache
makes this difficult, since the any test may cause entries to be allocated
or even freed, if the cache becomes full.

It is simpler to clear the block cache after each test. This ensures that
it will not introduce noise in tests which check malloc usage.

Add the logic to clear the cache, using the existing blkcache_invalidate()
function. Drop the duplicate code at the same time.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Simon Glass
ff1f0e414a dm: sandbox: Drop non-BLK code from host implementation
This is not used anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-11-07 16:24:30 -07:00
Martyn Welch
e055457759 drivers: power: pmic: Enable use of rn5t567 PMIC in SPL
The support added later in this series tweaks the PMIC voltages in the
SPL. Enable support for the rn5t567 in SPL builds to allow this to be done
cleanly.

Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-11-07 22:45:05 +01:00
Martyn Welch
da470ddbb3 drivers: power: pmic: Add support for rn5t568 PMIC
Add support for the rn5t568 PMIC to the rn5t567 driver.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Jaehoon Chung <j80.chung@samsung.com>
2022-11-07 22:45:05 +01:00
Adam Ford
4dbe07f275 regulator: bd718x7: Only bind children when PMIC_CHILDREN is enabled
If the bd718x7 is required, but PMIC_CHILDREN is disabled, this
driver throws a compile error.  Fix this by putting the function
to bind children into an if-statement checking for PMIC_CHILDREN.

Allowing PMIC_CHILDREN to be disabled in SPL saves some space and
still permits some read/write functions to access the PMIC in
early startup.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-11-07 22:45:04 +01:00
Chris Packham
c249938214 pinctrl: mvebu: Add AlleyCat5 support
This uses the same IP block as the Armada-8K SoCs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-11-07 07:46:28 +01:00
Chris Packham
515fe1ee4e usb: ehci: ehci-marvell: Support for marvell,ac5-ehci
Unlike the other 64-bit mvebu SoCs the AlleyCat5 uses the older ehci
block from the 32-bit SoCs. Adapt the ehci-marvell.c driver to cope with
the fact that the ac5 does not have the mbus infrastructure the 32-bit
SoCs have and ensure USB_EHCI_IS_TDI is selected.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-11-07 07:46:28 +01:00
Chris Packham
aaee5720f2 net: mvneta: Add support for AlleyCat5
Add support for the AlleyCat5 SoC. This lacks the mbus from the other
users of the mvneta.c driver so a new compatible string is needed to
allow for a different window configuration.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-11-07 07:46:28 +01:00
Samuel Holland
f4917b4933 usb: ohci: Use a flexible array member for portstatus
The struct is only used to overlay the MMIO region, so the behavior is
the same. This obsoletes the Kconfig option for the number of ports.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-11-03 23:24:09 +01:00
Tom Rini
36bc9b6113 Merge branch '2022-11-02-assorted-updates'
- Improve arm semihosting, NPCM8xx pinctrl driver, SP804 uclass timer
  driver (and enable on relevant platforms), pvblock cleanup, eeprom cmd
  bugfix, add RTI watchdog nodes to k3-am64-main, evb-ast2500 config
  updates.
2022-11-03 08:29:10 -04:00
Tom Rini
c07babda65 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-riscv 2022-11-03 08:27:44 -04:00
Padmarao Begari
eac3bbe5d8 spi: Add Microchip PolarFire SoC QSPI driver
Add QSPI driver code for the Microchip PolarFire SoC.
This driver supports the QSPI standard, dual and quad
mode interfaces.

Co-developed-by: Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>
Signed-off-by: Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
2022-11-03 13:27:56 +08:00
Yu Chien Peter Lin
a5dfa3b8a0 riscv: Rename Andes PLIC to PLICSW
As PLICSW is used to trigger the software interrupt, we should rename
Andes PLIC configuration and file name to reflect the usage. This patch
also updates PLMT and PLICSW compatible strings to be consistent with
OpenSBI fdt driver.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-11-03 13:27:56 +08:00
Nylon Chen
3708739ef2 led: led_pwm: typo 'iverted' on code comment
change iverted to inverted.

Signed-off-by: Nylon Chen <nylon.chen@sifive.com>
2022-11-02 13:58:17 -04:00
Bin Meng
ea253ad7b5 treewide: Remove the unnecessary space before semicolon
%s/return ;/return;

Signed-off-by: Bin Meng <bmeng@tinylab.org>
2022-11-02 13:58:17 -04:00
Michal Suchanek
0b999d2082 xen: pvblock: Use uclass_probe_all
Also eliminate useless code and variables.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-02 13:58:17 -04:00
Andre Przywara
731d108dd0 timer: add SP804 UCLASS timer driver
The "Arm Ltd. Dual-Timer Module (SP804)" is a simple 32-bit count-down
timer IP with interrupt functionality, and is used in some SoCs from
various vendors.

Add a simple DM compliant timer driver, to allow users of the SP804 to
switch to DM_TIMER.

This relies on the input clock to be accessible via the DM clock
framework, which should be fine as we probably look at fixed-clock's
here anyway.
We re-program the control register in the probe() function, but keep
the divider in place, in case this has been set to something on purpose
before.

The TRM for the timer IP can be found here:
https://developer.arm.com/documentation/ddi0271/latest

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-11-02 13:58:17 -04:00
Jim Liu
1c1036499f pinctrl: nuvoton: Add NPCM8xx pinctrl driver
Add Nuvoton BMC NPCM845 Pinmux and Pinconf support.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Signed-off-by: Stanley Chu <yschu@nuvoton.com>
2022-11-02 13:31:40 -04:00
Tom Rini
ec5b8804de Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spi.git
- NPCM PSPI controller (Jim)
2022-11-02 09:09:57 -04:00
Sughosh Ganu
8679405241 FWU: Add support for the FWU Multi Bank Update feature
The FWU Multi Bank Update feature supports updating firmware images
to one of multiple sets(also called banks) of images. The firmware
images are clubbed together in banks, with the system booting images
from the active bank. Information on the images such as which bank
they belong to is stored as part of the metadata structure, which is
stored on the same storage media as the firmware images on a dedicated
partition.

At the time of update, the metadata is read to identify the bank to
which the images need to be flashed(update bank). On a successful
update, the metadata is modified to set the updated bank as active
bank to subsequently boot from.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-10-31 14:47:32 -04:00
Sughosh Ganu
554b38f7a5 FWU: Add FWU metadata access driver for GPT partitioned block devices
In the FWU Multi Bank Update feature, the information about the
updatable images is stored as part of the metadata, on a separate
partition. Add a driver for reading from and writing to the metadata
when the updatable images and the metadata are stored on a block
device which is formatted with GPT based partition scheme.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-10-31 14:47:32 -04:00
Sughosh Ganu
2eaedc9516 FWU: Add FWU metadata structure and driver for accessing metadata
In the FWU Multi Bank Update feature, the information about the
updatable images is stored as part of the metadata, which is stored on
a dedicated partition. Add the metadata structure, and a driver model
uclass which provides functions to access the metadata. These are
generic API's, and implementations can be added based on parameters
like how the metadata partition is accessed and what type of storage
device houses the metadata.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-10-31 14:47:32 -04:00
Simon Glass
372a7d925b dm: mmc: Allow sandbox emulator to build without writes
When MMC_WRITE is disabled this driver produced a build error. Fix this.

Also update a comment while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-31 11:02:44 -04:00
Simon Glass
879a9416d1 dm: blk: mmc: Tidy up some Makefile rules for SPL
Use the correct SPL_TPL_ variable so that these features can be enabled in
TPL and VPL as needed.

Disable it by default in TPL to avoid any code-size increase. No boards
are actually using it since the Makefile rules don't allow including
drivers/block/ with TPL_DM enabled. It can be manually enabled as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-31 11:02:44 -04:00
Simon Glass
2ff3db3a1c usb: Update the test to cover reading and writing
Add test coverage for blk_write() as well.

The blk_erase() is not tested for now as the USB stor interface does not
support erase.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-31 11:02:44 -04:00
Simon Glass
606b926f9d dm: blk: Add udevice functions
At present we have functions called blk_dread(), etc., which take a
struct blk_desc * to refer to the block device. Add some functions which
use udevice instead, since this is more in keeping with how driver model
is supposed to work.

Update one of the tests to use this.

Note that it would be nice to update the functions in disk-uclass.c to use
these new functions. However they are not quite the same. For example,
disk_blk_read() adds the partition offset to 'start' when calling the
cache read/fill functions, but does not with part_blk_read(), which does
the addition itself. So as designed the code is duplicated.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-31 11:02:44 -04:00
William Zhang
35751c7f3f timer: sti: convert sti-timer to arm a9 global timer
STI timer is actually ARM Cortex A9 global timer. Convert the driver to
use generic global timer name and make it consistent with Linux kernel
global timer driver. This also allows any A9 based device to use this
driver.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-10-31 08:55:59 -04:00
William Zhang
8c1a9c7de7 arm: bcmbca: replace ARCH_BCM6753 symbols in Kconfig with BCM6855
As CONFIG_ARCH_BCM6753 is replaced with CONFIG_BCM6855, update the
driver Kconfig to use the new config symbol.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-10-31 08:55:59 -04:00
William Zhang
2dab3ee50c arm: bcmbca: replace ARCH_BCM6858 symbols in Kconfig with BCM6858
As CONFIG_ARCH_BCM6858 is replaced with CONFIG_BCM6858, update the
driver Kconfig to use the new config symbol.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-10-31 08:55:59 -04:00
William Zhang
4dcd23f70b arm: bcmbca: replace ARCH_BCM68360 symbols in Kconfig with BCM6856
As CONFIG_ARCH_BCM68360 is replaced with CONFIG_BCM6856, update the
driver Kconfig to use the new config symbol.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-10-31 08:55:51 -04:00
William Zhang
fa9ff775de arm: bcmbca: replace ARCH_BCM63158 symbols in Kconfig with BCM63158
As CONFIG_ARCH_BCM63158 is replaced with CONFIG_BCM63158, update the
Kconfig to use the new config symbol.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-10-31 08:55:40 -04:00
Tom Rini
218e2c45af - fix [hv]sync active vs back porch in dw_mipi_dsi
- simplefb rotation support
  - support splash as raw image from MMC
  - enhancements to Truetype console (multiple fonts and sizes)
  - drop old LCD support
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Merge tag 'video-20221030' of https://source.denx.de/u-boot/custodians/u-boot-video

 - fix [hv]sync active vs back porch in dw_mipi_dsi
 - simplefb rotation support
 - support splash as raw image from MMC
 - enhancements to Truetype console (multiple fonts and sizes)
 - drop old LCD support
2022-10-30 17:16:35 -04:00
Simon Glass
b86986c7b3 video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO
Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Simon Glass
9330abfb4a pci: Drop test for DM_VIDEO
This is not needed anymore, since there is no other option.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Simon Glass
feda193c8b video: Make all video options depend on DM_VIDEO
Rather than sprinkly this file with 'depends' statements, make all options
depend on DM_VIDEO.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Simon Glass
eaf7075528 video: Drop SPLASHIMAGE_CALLBACK
This is not used anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Simon Glass
70cc7b614f video: Drop use of the lcd header file
This file is being removed so drop remaining references to it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Simon Glass
8b1129588c video: Drop CONFIG_LCD
This option is not used anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Simon Glass
d32eb92e91 video: Drop CONFIG_VIDEO
This option is not used anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Simon Glass
baefc72192 tegra: Drop old LCD code
This relies on the old LCD implementation which is to be removed. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Simon Glass
5ce85e069f nexell: Drop old LCD code
This relies on the old LCD implementation which is to be removed. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Simon Glass
365e52dd25 video: samsung: Drop old LCD code
This relies on the old LCD implementation which is to be removed. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Simon Glass
6b9a829d27 video: Drop atmel LCD code
This has not been migrated to DM_VIDEO since 2019. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Simon Glass
26cf75f92d video: Drop ld9040 driver
This is not used anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:16 +01:00
Simon Glass
be5fadaaf6 video: atmel: Drop pre-DM parts of video driver
This relies on the old LCD implementation which is to be removed. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:16 +01:00
Simon Glass
82f7b869f5 video: Drop CONFIG_AM335X_LCD
This relies on the old LCD implementation which is to be removed. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:16 +01:00
Simon Glass
2285864a3e video: Drop VCXK video controller
This relies on the old LCD implementation which is to be removed. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:16 +01:00
Simon Glass
1dc6517649 Drop CONFIG_LCD_LOGO
This relies on the old LCD implementation which is to be removed. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:16 +01:00
Simon Glass
ba97899349 video: Drop CONFIG_LCD_INFO
This option is not used anymore since the LCD implementation is being
removed. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:16 +01:00
Simon Glass
816605652d video: Drop CONFIG_LCD_INFO_BELOW_LOGO
This option is not used anymore since the LCD implementation is being
removed. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:16 +01:00
Simon Glass
2fd5a57af6 Convert CONFIG_VIDEO_LOGO_MAX_SIZE to Kconfig
This converts the following to Kconfig:
   CONFIG_VIDEO_LOGO_MAX_SIZE

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:16 +01:00
Simon Glass
e655003384 video: Rename CONFIG_SYS_VIDEO_LOGO_MAX_SIZE
This option should not have the SYS_ in it. Drop it so it fits in with the
other video options.

Also simplify the alignment code in gunzip_bmp(), since malloc() always
returns a 32-bit-aligned pointer.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:16 +01:00
Simon Glass
4adc28ebc6 Convert CONFIG_HIDE_LOGO_VERSION to Kconfig
This converts the following to Kconfig:
   CONFIG_HIDE_LOGO_VERSION

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:16 +01:00
Simon Glass
988d19dd5b video: Split SPLASH_SCREEN_ALIGN from bmp command
The bmp command already has a way to centre the image. Using this CONFIG
option to also centre it makes it impossible to control where images are
placed on the screen. Drop the extra check.

Simplify the Kconfig file we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:16 +01:00
Simon Glass
c830e285f4 video: Add a way to get the default font height
This is not as simple as it seems. Add a function to provide it so that
the upcoming menu feature can space lines out correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:01:40 +01:00
Simon Glass
e90322f87c video: Add a function to get the dimensions of a BMP image
This is useful for some other users, so break this out into a function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:01:40 +01:00
Simon Glass
430e1676a7 video: Add commands to list and change fonts
Add a new 'font' command which allows the fonts to be listed as well as
selecting a different font and size.

Allow the test to run on sandbox, where multiple font/size combinations
are supported, as well as sandbox_flattree, where they are not.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:01:40 +01:00
Simon Glass
57a847cd40 video: Add a way to change the font name and size
It is useful to be able to support multiple fonts. Add a function to
handle this as well as one to list the available fonts.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:01:40 +01:00
Simon Glass
518d844a5e video: Add a function to select the truetype metrics
Move this code into a function so we can call it later when we want to
change the font.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:01:40 +01:00
Simon Glass
39fa02d955 video: Record the truetype font name
Add this to the metrics so we can later adjust the font size without
changing the font itself.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:01:40 +01:00
Simon Glass
31efa25095 video: Refactor to allow more than one font size
At present the truetype console supports only a single font and size. It
is useful to be able to support different combinations. As a first step,
move the metrics into there own structure and allow having multiple
metrics.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:01:40 +01:00
Simon Glass
5330612f21 video: Tidy up the check for valid fonts
Put this check into a function so we can use it elsewhere. Also drop the
macros which do the same thing but are not actually used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:01:40 +01:00
Simon Glass
0d3890188d video: Add function to obtain the U-Boot logo
It is useful to show the logo from other code, coming in a later feature.
Add a function to obtain it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:01:40 +01:00
Simon Glass
50d562c01f video: Allow filling the display with a colour
Generalise the video_clear() function to allow filling with a different
colour.

Tidy up the comments while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:01:40 +01:00
Simon Glass
820b5894c1 video: Move and rename DM_HX8238D option
This is actually a panel, not a video device. Rename the option, move it
into the right place and make it depend on PANEL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:01:40 +01:00
Simon Glass
f029f90e7d video: Move the console commands to cmd/
Move these commands and the implementation to the cmd/ directory, which is
where most commands are kept.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
[agust: keep vidconsole_position_cursor() in vidconsole uclass]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2022-10-30 19:55:22 +01:00
Simon Glass
92fd6a1220 video: Use vidconsole_put_string() to write a string
Use the existing function rather that duplicating the code. Also fix up
the missing error handling.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 09:56:02 +01:00
Simon Glass
6b6dc0d2fb video: Provide a function to set the cursor position
Add an exported function which allows the cursor position to be set to
pixel granularity. Make use of this in the existing code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 09:53:47 +01:00
Simon Glass
a032e4b55e video: Move console colours to the video uclass
At present these are attached to vidconsole which means that the video
uclass requires that a console is enabled. This is not the intention.
The colours are a reasonable way of indexing common colours in any case,
so move them to the video uclass instead.

Rename vid_console_color() to video_index_to_colour() now that it is more
generic. Also fix the inconsistent spelling in these functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 08:43:24 +01:00
Takumi Sueda
db2c8ed3a5 video: simplefb: add rotation support
It introduces the way to rotate the screen for boards with rotated screen.

Signed-off-by: Takumi Sueda <puhitaku@gmail.com>
2022-10-30 08:28:40 +01:00
John Keeping
7209272497 video: dw_mipi_dsi: fix [hv]sync active vs back porch
The wrong fields are pulled out of the timings here so the values
programmed into the DSI_VID_HSA_LINES/DSI_VID_HBP_LINES and
DSI_VID_VSA_LINES/DSI_VID_VBP_LINES registers are swapped.

Use the right fields so that the correct values are programmed.

Fixes: d4f7ea83fc ("video: add MIPI DSI host controller bridge")
Signed-off-by: John Keeping <john@metanate.com>
2022-10-30 08:19:45 +01:00
Michal Suchanek
f21954750a dm: core: Do not stop uclass iteration on error
When probing a device fails NULL pointer is returned, and following
devices in uclass list cannot be iterated. Skip to next device on error
instead.

With that the only condition under which these simple iteration
functions return error is when the dm is not initialized at uclass_get
time. This is not all that interesting, change return type to void.

Fixes: 6494d708bf ("dm: Add base driver model support")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-29 07:36:33 -06:00
Michal Suchanek
4954937d92 dm: treewide: Do not use the return value of simple uclass iterator
uclass_first_device/uclass_next_device return value will be removed,
don't use it.

With the current implementation dev is equivalent to !ret. It is
redundant to check both, ret check can be replaced with dev check, and
ret check inside the iteration is dead code.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-29 07:36:33 -06:00
Michal Suchanek
58ddb937e1 dm: core: Switch uclass_*_device_err to use uclass_*_device_check
Clarify documentation, fix a few more cases that could be broken by the
change.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
2022-10-29 07:36:33 -06:00
William Zhang
6792bd999b dm: tpl: Add fdt address translation support in TPL
This is needed in the platforms that use "ranges" node property for
address translation in their dts for TPL.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-29 07:36:33 -06:00
Simon Glass
d138792112 dm: core: Fix lists_bind_fdt() using non-existent of_match
The call to device_bind_with_driver_data() passes id->data but if
the entry has no of_match then the id has not been set by the selected
driver.

Normally this passes unnoticed since a previous driver likely had an
of_match value, so the id is set to that. Of course it is not correct
to pass the id->data from a different driver.

With clang-14 the driver ordering is such that the id is never actually
set in the 'bind /usb@1 usb_ether' line in test_bind_unbind_with_node()
thus causing a crash.

Fix this by passing 0 if the of_match for a driver does not exist.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-29 07:36:33 -06:00
Rasmus Villemoes
10e66449d7 gpio-uclass: fix gpio lookup by label
Matching anything that just happens to have the sought-for label as a
prefix is wrong. For example, if the board designer has designated 10
lines for debug purposes, named "debug1" through "debug10", and we are
looking up "debug1", if debug10 happens to be met first during the
iteration we'd wrongly return that.

In theory, this can break existing users that could rely on this
quirk, but OTOH keeping the current broken semantics can cause a lot
of grief for people hitting this in the future and not understanding
why they don't find the line they expect. Considering how few in-tree
defconfigs currently set DM_GPIO_LOOKUP_LABEL (ignoring sandbox, only
four "real" boards), let's fix it before the use becomes more
widespread.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-10-29 07:36:33 -06:00
Jim Liu
c1dc8473fa spi: nuvoton: add NPCM PSPI controller driver
Add Nuvoton NPCM BMC Peripheral SPI controller driver.
NPCM750 include two general-purpose SPI interface.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-27 12:41:36 +05:30
Roger Quadros
9b0b5648d6 memory: Add TI GPMC driver
The GPMC is a unified memory controller dedicated for interfacing
with external memory devices like
 - Asynchronous SRAM-like memories and ASICs
 - Asynchronous, synchronous, and page mode burst NOR flash
 - NAND flash
 - Pseudo-SRAM devices

This driver will take care of setting up the GPMC based on
the settings specified in the Device tree and then
probe its children.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
2022-10-26 15:21:12 -04:00
Roger Quadros
2c120375e9 dm: memory: Introduce new uclass
Introduce UCLASS_MEMORY for future Memory Controller
device drivers.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-26 15:21:11 -04:00
Benjamin Bara
b567eae0c5 crypto: hash: sw: fix Kconfig dependencies
Fix SHA512 config name and add missing SHA384 config.

Signed-off-by: Benjamin Bara <Benjamin.Bara@skidata.com>
2022-10-26 15:21:11 -04:00
Tom Rini
b487387226 Merge https://source.denx.de/u-boot/custodians/u-boot-pmic 2022-10-26 07:46:48 -04:00
Tom Rini
c2c485db45 Merge https://source.denx.de/u-boot/custodians/u-boot-watchdog
- nuvoton: add expire function for generic reset (Jim)
- handle watchdogs during keyed autoboot (Rasmus)
- cyclic: Don't disable cylic function upon exceeding CPU time (Stefan)
- ulp wdog: Updates to support iMX93 and DM (Alice)
2022-10-26 07:45:55 -04:00
Michal Suchanek
0b9186277a power: fan53555: Fix missing newline in error message
Avoid concatenation with following message.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-26 11:47:25 +09:00
John Keeping
8edf7ac09f power: regulator: fix autoset error handling
If a regulator does not support .set_suspend_enable or
.set_suspend_value then ret is set to ENOSYS early in the function.

The most serious impact of this is that when no automatic setting of
voltage is needed then the final regulator_set_enable() is skipped
because ret has not been cleared.

It seems that the error handling for regulator_set_suspend_value() is
also wrong as if this succeeds then the normal boot-on checks are still
required, and again ENOSYS needs special treatment here.

Fixes: 11406b8f7e ("dm: regulator: support regulator more state")
Signed-off-by: John Keeping <john@metanate.com>
2022-10-26 11:47:12 +09:00
Tom Rini
f9d16f2c0d Merge https://source.denx.de/u-boot/custodians/u-boot-spi
- Add s28hl512t, s28hl01gt (Takahiro)
- Rework s25hx_t_post_bfpt_fixup() (Takahiro)
2022-10-25 09:54:59 -04:00
Tom Rini
26bfb853ca Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc 2022-10-24 21:28:14 -04:00
Tom Rini
7d8ab3cd63 u-boot-imx-20221024
-------------------
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/13916
 
 - for 2022.01
 - rework Kontron boards (mx6 and mx8)
 - fixes for Toradex
 - fixes (SPI, CAAM, )
 - sync DT with Linux
 - fixes for Gateworks GW7903 and GW7904 PMIC
 - Engicam i.Core MX8M Plus EDIMM2.2
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Merge tag 'u-boot-imx-20221024' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20221024
-------------------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/13916

- for 2022.01
- rework Kontron boards (mx6 and mx8)
- fixes for Toradex
- fixes (SPI, CAAM, )
- sync DT with Linux
- fixes for Gateworks GW7903 and GW7904 PMIC
- Engicam i.Core MX8M Plus EDIMM2.2
2022-10-24 10:04:30 -04:00
Rasmus Villemoes
c9473b2c37 imx8m: fix reading of DDR4 MR registers [again]
Commit 290ffe5788 (imx8m: fix reading of DDR4 MR registers) lifted a
private definition of lpddr4_mr_read() from imx8mm-cl-iot-gate board
code to drivers/ddr/imx/imx8m/ddrphy_utils.c, because that version
actually seems to work in practice.

However, commit 99c7cc58e1 (ddr: imx: Add i.MX9 DDR controller driver)
reintroduced the broken version in drivers/ddr/imx/imx8m/ddr_init.c,
copied most of the rest of ddrphy_utils.c to
drivers/ddr/imx/phy/ddrphy_utils.c, and stopped building
drivers/ddr/imx/imx8m/ddrphy_utils.c [and that file was then finally
completely removed with 7e9bd84883 (imx8m: ddrphy_utils: Remove unused
file)].

I assume this must have broken the imx8mm-cl-iot-gate board, at least
those that have not had their eeprom programmed with the proper
information. It certainly did break our out-of-tree board which always
reads back the ID register and uses that for a sanity check.

So apply the fix from 290ffe5788 once again.

Fixes: 99c7cc58e1 (ddr: imx: Add i.MX9 DDR controller driver)
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-10-24 11:34:33 +02:00
Alice Guo
5e112c7ca8 watchdog: ulp_wdog: add driver model for ulp watchdog driver
Enable driver model for ulp watchdog timer. When CONFIG_WDT=y and the
status of device node is "okay", initr_watchdog will be called and
finally calls ulp_wdt_probe() and ulp_wdt_start().

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-10-24 11:10:21 +02:00
Alice Guo
a7fd633501 watchdog: ulp_wdog: enable watchdog interrupt on imx93
The reset source of the external PMIC on i.MX93 is WDOG_ANY PAD and the
source of WDOG_ANY PAD is interrupt. Therefore, using PMIC to reset
needs to enable the watchdog interrupt.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-10-24 11:10:21 +02:00
Alice Guo
ef0ad9b07d watchdog: ulp_wdog: Update watchdog driver for imx93
The WDOG clocks are sourced from the fixed 32KHz (lpo_clk).When the
timeout period exceeds 2 seconds, the value written to the TOVAL
register is larger than 16-bit can represent. Enabling watchdog
prescaler to solve this problem.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-10-24 11:10:21 +02:00
Ye Li
a79f2007d0 ulp_wdog: Update ulp wdog driver for 32bits command
To use 32bits refresh and unlock command as default, check the CMD32EN
bit to select the corresponding commands.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-10-24 11:10:21 +02:00
Rasmus Villemoes
10107efedd sandbox: add SIGALRM-based watchdog device
In order to test that U-Boot actually maintains the watchdog device(s)
during long-running busy-loops, such as those where we wait for the
user to stop autoboot, we need a watchdog device that actually does
something during those loops; we cannot test that behaviour via the DM
test framework.

So introduce a relatively simple watchdog device which is simply based
on calling the host OS' alarm() function; that has the nice property
that a new call to alarm() simply sets a new deadline, and alarm(0)
cancels any existing alarm. These properties are precisely what we
need to implement start/reset/stop. We install our own handler so that
we get a known message printed if and when the watchdog fires, and by
just invoking that handler directly, we get expire_now for free.

The actual calls to the various OS functions (alarm, signal, raise)
need to be done in os.c, and since the driver code cannot get access
to the values of SIGALRM or SIG_DFL (that would require including a
host header, and that's only os.c which can do that), we cannot simply
do trivial wrappers for signal() and raise(), but instead create
specialized functions just for use by this driver.

Apart from enabling this driver for sandbox{,64}_defconfig, also
enable the wdt command which was useful for hand-testing this new
driver (especially with running u-boot under strace).

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-10-24 11:10:21 +02:00
Rasmus Villemoes
2783670583 watchdog: introduce a u-boot,autostart property
This is a companion to u-boot,noautostart. If one has a single
watchdog device that one does want to have auto-started, but several
others that one doesn't, the only way currently is to set the
CONFIG_WATCHDOG_AUTOSTART and then use the opt-out for the majority.

The main motivation for this is to add an autostarted watchdog device
to the sandbox (to test a fix) without having to set AUTOSTART in
sandbox_defconfig and add the noautostart property to the existing
devices. But it's also nice for symmetry, and the logic in
init_watchdog_dev() becomes simpler to read because we avoid all the
negations.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-10-24 11:09:19 +02:00
Jim Liu
0ab55cb6f7 wdt: nuvoton: add expire function for generic reset
Add expire_now function for generic sysreset request

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-10-24 11:06:24 +02:00
Venkatesh Yadav Abbarapu
337af54a36 mmc: Fix static checker warnings
Correct pointer dereferencing check to be more consistent.

Eliminate the below smatch warning:
drivers/mmc/mmc.c:3118 mmc_init_device()
warn: variable dereferenced before check 'm' (see line 3116)

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-24 18:02:54 +09:00
John Keeping
7ff2f30b63 mmc: dwmmc: only clear handled interrupts
Unconditionally clearing DTO when RXDR is set leads to spurious timeouts
in FIFO mode transfers if events occur in the following order:

	mask = dwmci_readl(host, DWMCI_RINTSTS);

	// Hardware asserts DWMCI_INTMSK_DTO here

	dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_DTO);

	if (mask & DWMCI_INTMSK_DTO) {
		// Unreachable as DTO is cleared without being handled!
		return 0;
	}

Only clear interrupts that we have seen and are handling so that DTO is
not missed.

Signed-off-by: John Keeping <john@metanate.com>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (Rock PI 4B)
Tested-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-24 18:02:41 +09:00
Yann Gautier
359c176de5 mmc: stm32_sdmmc2: manage vqmmc
The SDMMC IOs can be in an IO domain, that has to be enabled.
This is done by enabling vqmmc in the driver.
This has no impact on configurations not using an IO domain, the check
can then be executed on all platforms managing regulator, and the vqmmc
regulator enabled on all platforms having it in their DT.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-24 18:02:15 +09:00
Yann Gautier
27fbce4326 mmc: stm32_sdmmc2: protect against unsupported modes
The UHS modes for SD, HS200 and HS400 modes for eMMC are not supported
by the stm32_sdmmc2 driver.
Make it clear by removing the corresponding caps after parsing the DT.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-24 18:02:07 +09:00
Yann Gautier
be1872982e mmc: stm32_sdmmc2: add dual data rate support
To support dual data rate with STM32 sdmmc2 driver, the dedicated bit
(DDR - BIT(18)) needs to be set in the CLKRC register. Clock bypass
(no divider) is not allowed in this case. This is required for the
eMMC DDR modes.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-24 18:01:59 +09:00
Kunihiko Hayashi
12fc8efe5a mmc: f_sdh30: Add support for F_SDH30_E51
Add Socionext F_SDH30_E51 IP support. The features of this IP includes
CMD/DAT line delay and force card insertion mode for non-removable cards.
And the IP needs to add some quirks.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
2022-10-24 18:01:32 +09:00
Kunihiko Hayashi
2b0dd4174f mmc: sdhci: Add new quirks for SUPPORT_SINGLE
This patch defines a quirk to disable the block count
for single block transactions.

This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-24 18:01:23 +09:00
Sergei Antonov
fc6b5d8260 mmc: ftsdc010: make command timeout 250 ms as in the comment
Get rid of discrepancy beween comment /* 250 ms */ and code
which shifts by 4 thus dividing by 16.
So change code to shift by 2 and make the timeout value 250 ms.

Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-24 18:01:07 +09:00
Takahiro Kuwano
e28d3ead72 mtd: spi-nor-core: Fix index value for SCCR dwords
Array index for SCCR 22th DWORD should be 21.

Fixes: bebdc23750 ("mtd: spi-nor: Parse SFDP SCCR Map")
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-23 10:52:16 +05:30