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Convert CONFIG_SYS_NAND_NO_SUBPAGE_WRITE to Kconfig
This converts the following to Kconfig: CONFIG_SYS_NAND_NO_SUBPAGE_WRITE Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
parent
4d3495deb6
commit
1a792803d8
9 changed files with 10 additions and 6 deletions
5
README
5
README
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@ -1806,11 +1806,6 @@ Low Level (hardware related) configuration options:
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If defined, the x86 reset vector code is included. This is not
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needed when U-Boot is running from Coreboot.
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- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
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Option to disable subpage write in NAND driver
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driver that uses this:
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drivers/mtd/nand/raw/davinci_nand.c
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Freescale QE/FMAN Firmware Support:
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-----------------------------------
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@ -78,6 +78,7 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_USE_FLASH_BBT=y
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CONFIG_SYS_NAND_NO_SUBPAGE_WRITE=y
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CONFIG_NAND_DAVINCI=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=30000000
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@ -53,6 +53,7 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_USE_FLASH_BBT=y
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CONFIG_SYS_NAND_NO_SUBPAGE_WRITE=y
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CONFIG_NAND_DAVINCI=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=30000000
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@ -78,6 +78,7 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_USE_FLASH_BBT=y
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CONFIG_SYS_NAND_NO_SUBPAGE_WRITE=y
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CONFIG_NAND_DAVINCI=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=30000000
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@ -53,6 +53,7 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_USE_FLASH_BBT=y
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CONFIG_SYS_NAND_NO_SUBPAGE_WRITE=y
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CONFIG_NAND_DAVINCI=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=30000000
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@ -78,6 +78,7 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_USE_FLASH_BBT=y
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CONFIG_SYS_NAND_NO_SUBPAGE_WRITE=y
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CONFIG_NAND_DAVINCI=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=30000000
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@ -56,6 +56,7 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_USE_FLASH_BBT=y
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CONFIG_SYS_NAND_NO_SUBPAGE_WRITE=y
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CONFIG_NAND_DAVINCI=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=30000000
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@ -41,6 +41,10 @@ config SYS_NAND_USE_FLASH_BBT
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help
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Enable the BBT (Bad Block Table) usage.
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config SYS_NAND_NO_SUBPAGE_WRITE
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bool "Disable subpage write support"
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depends on NAND_ARASAN || NAND_DAVINCI || NAND_KIRKWOOD
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config NAND_ATMEL
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bool "Support Atmel NAND controller"
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select SYS_NAND_SELF_INIT
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@ -68,7 +68,6 @@
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#define CONFIG_SYS_NAND_LARGEPAGE
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#define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, }
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#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
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#define DFU_ALT_INFO_MMC \
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"dfu_alt_info_mmc=" \
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