Due to the large number of clocks, I decided to use the CCF. The overall
structure is modeled after the imx code. Clocks parameters are stored in
several arrays, and are then instantiated at run-time. There are some
translation macros (FOOIFY()) which allow for more dense packing.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
CC: Lukasz Majewski <lukma@denx.de>
- dts clean up to use -u-boot for px30, rk3399 boards
- dts sycn from upstream kernel for rk3328, rk3399
- add rockchip rng driver
- new board support: rk3328-roc-cc, rk3399-roc-pc,Nanopi M4 2GB
This syncs the rk3328 clock header file from Linux kernel next-20200324,
to support newer hardware blocks when syncing the device tree files.
The last non-merge commit to touch it was
0dc14b013f79 ("clk: rockchip: add clock id for watchdog pclk on rk3328")
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Loic Devulder <ldevulder@suse.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Synchronize R-Car Gen2 device trees with Linux 5.6.2,
commit 9fbe5c87eaa9b72db08425c52c373eb5f6537a0a .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- add GXBB USB PHY driver
- enable access to SPI NOR Flash on VIM2 and VIM3/VIM3L boards
- fix USB PHYs Power-Up on on VIM3/VIM3L boards
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAl6n6mUACgkQd9zb2sjI
SdFBsw//VP2GwJZDDVR7WRSPq2I1EXK8vqwzVhOX40oQXp+RaLZCvdnAyPwRr0Gw
ZJSPTh5PzTZcbK3eId7tPA4uTHkkhlNyzh2nJHCsR5t8dmbKaKBM8xhkzbv3Dt1k
bLCu42gvActHI3eucFNIpCGXAsK6VNp4A/lsW04Ukc6c9MPk1OkvpbFBaHYsiIh4
AtAWLX77d4VX+RxTlMz3oRr2Z0+MjQqHWrFkkdq9btn3OESuw7fNTCtUfFCMhEvd
HfXwyhVX0LIuEH4OOIj19T8ilEYEYhPWhqnZC+YuDc95EymtVZQmTLp1D4NSsCzs
fBiswAhrd9Dot/jZearMmT+FXFPitsdewwSIlpNgmzMIGZWRRWUP6yKAHPj2OCNF
Epuu3jdITOYBQS8cgnR1lmN1s0jJ+RYHm7LT1c0ekHRCmcfLMLdbuMtImzllXtvl
GYx8Fu0qw4Rm0djHGQ2gDSDinYLEzb8pqhoqmfVTN/Vq0L2LDxV0sC5xGM1m2X80
BHte8hPPLAvkRnb8EPscdt7lSWi1admc0N+0Sa2AQ6S/W7g8oLIXYIfgwcPkwUEZ
Y7hUenqE+RJ3Do7xnrYre+JH4jIK00bZIxDvHuIm9KxtpDYIMF7hic1T2Q3jmkgB
H6QpueLM62uUG8ejj0eQO9UXiSsVnax5TZ639BbkZ8wXHMqNQHw=
=e10O
-----END PGP SIGNATURE-----
Merge tag 'u-boot-amlogic-20200428' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- fix sd-emmc controller A init on G12A/G12B/SM1 SoCs
- add GXBB USB PHY driver
- enable access to SPI NOR Flash on VIM2 and VIM3/VIM3L boards
- fix USB PHYs Power-Up on on VIM3/VIM3L boards
Add support for additional timer clock which belongs to tunnel
domain.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This patch adds .dtsi file(sync with Linux 5.5-rc6 with hash "b3a987b0264d")
and required binding for S700 SoC that is a 64-bit Quad-core ARM
Cortex-A53 cores.
It also provisions dts file to be built based on selected
platform(CONFIG_MACH_S900/S700).
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Synchronize device tree bindings with v5.5-rc6 tag with commit id
"b3a987b0264d".
Also, it removes older clock binding defined for S900 along with undocumented
compatible string "actions,s900-serial" from serial driver and adapts clock
driver to cater to new bindings.
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Sync the device tree and dt-bindings from Linux v5.6-rc2
11a48a5a18c6 ("Linux 5.6-rc2")
The only exception to this is the mmc pinctrl pin bias of gxl SoC family.
This is a fix which found its way to u-boot but not Linux yet.
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
So far we have avoided adding a clock driver for Intel devices. But the
Designware I2C driver needs a different clock (133MHz) on Intel devices
than on others (166MHz). Add a simple driver that provides this
information.
This driver can be expanded later as needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Sync the device tree files and device tree header files from upstream
Linux kernel, as of 2020-01-08. The commit synced to in the sunxi repo
98d25b0b266d Merge branch 'sunxi/dt-for-5.6' into sunxi/for-next
which is also part of next-20200108.
Changes brought in include:
- cleanup of pinmux node names
- addition of Security ID, MBUS, CSI, crypto engine, video codec,
pmu, and thermal sensor device nodes for both SoCs
- addition of deinterlacing engine device node on H3
- cleanup of RTC device node and addition of its clocks
- various board cleanups and improvements
- removal of pinmux node for GPIO lines
- cpufreq / DVFS
- HDMI output
- UART-based Bluetooth
- audio codec
- USB ports
- new boards
Most of the changes don't concern U-boot.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
from https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git/
tag "ux500-armsoc-v5.6-2"
commit 224bf0fe7292 ("ARM: dts: ux500: samsung-golden: Add Bluetooth")
(queued for merge in Linux 5.6)
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Add clock manager driver for Agilex. Provides clock initialization
and get_rate functions.
agilex-clock.h is from Linux commit ID cd2e1ad12247.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Device tree and binding alignment with kernel v5.3
and converted to SPDX.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Add clk controller driver for RK3308 SOC.
This patch depends on Elaine's pll patch[0].
[0]http://patchwork.ozlabs.org/patch/1183718/
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The px30 contains 2 separate clock controllers, pmucru and cru.
Add drivers for them.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This updates the i.MX8MQ device trees and, necessarily, also the
i.MX8MQ clock bindings. These are taken verbatim from from the
Linux kernel version v5.4-rc2, which three small changes which
were already part of the previous device tree:
* Keep the PSCI reserved memory range
* Keep the alias for ethernet, so that the MAC address can be set
* Keep the modified #include for the IOMUXC pins
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Acked-by: Peng Fan <peng.fan@nxp.com>
- bmips: various small fixes
- mtmips: add new drivers for clock, reset-controller and pinctrl
- mtmips: add support for high speed UART
- mtmips: update/enhance drivers for SPI and ethernet
- mtmips: add support for MMC
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiQkHUH+J02LLC9InKPlOlyTyXBgFAl2zFisACgkQKPlOlyTy
XBgf9RAAkNwLjqUcBz3Ob1briRG5HF4D6bZCpjtkTIO8a2fanUHbSehh30TX8x2X
z0t/9Sd4OZwAeTxfQ/AlbbVdiB9IMgEb6lJ30Vr88MRNoPhABIQ8hw5xAzFi/6x9
88YolS/HQo6iR9rzSlaKjdIHhPTH5oQzRJ3JLqSwZzfUNy+zqINEhs3SYCnD2lyV
gTgiIT3Y5nKrhVHPUCy+jQG+wwWej2NFgwn71vR3/PSQJwxBuasg0qqOKD9hRtpC
XL6VErE7bf00elO8xjEObYrmB2FpffXJdkazS2HtRYNyKx0quaRNXJt7wqxEVP9L
M6SmL+S7zBFAetc/iyrlaakPvn7ImehSZkgLYaTPc3yzO+6bgq9tLfBERn/B/s5g
YyIzPGF66L96nuu0eVGCgSoUBjzBE8l2QTI8dho5xJxjWAUJOWSB0egqfFZzYVFu
4X37w6Z0j6uTK2oEl7KgJdc0JsZRsAJ8ZiqgOeNeMUTl2RnjGt0Oa7E24Va3n3hM
5vuEba9nPUFmdC5vlSd2RUK/dB587uKV93r5j54U62clpbiK+VMaRuRVX64ytZvB
B/0fKyCu+y7bxeZe4/X27jBUOk5yCuxbNI66m+cnnvfHqEmhz5PfDCEK1Dr29oqf
sCJLgTr7ahyuW4kEoL7KCOBEugPI85fp8/OlqC63M6/Kft0w5sA=
=6G/J
-----END PGP SIGNATURE-----
Merge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mips
- bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
- mtmips: add new drivers for clock, reset-controller and pinctrl
- mtmips: add support for high speed UART
- mtmips: update/enhance drivers for SPI and ethernet
- mtmips: add support for MMC
This patch adds a clock driver for MediaTek MT7628/7688 SoC.
It provides clock gate control as well as getting clock frequency for
CPU/SYS/XTAL and some peripherals.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Add dt clock header which can be included by dtses. And also use zynqmp-clk
compatible string.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
In Linux meson-g12-common.dtsi was introduced as well as new g12b nodes
and headers, as dependencies of new meson-g12b-a311d-khadas-vim3.dts.
Copied from da0c9ea146cb ("Linux 5.4-rc2")
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Sync kernel dts for i.MX6UL from
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Import R8A77980 V3H DTs and headers from Linux 5.2.7 , commit 5697a9d3d55f.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Sync the Amlogic Meson G12A DT and Bindings file with the Linux 5.3-rc1
from the commit 5f9e832c1370 ("Linus 5.3-rc1").
Also remove the meson-g12a-u-boot.dtsi and meson-g12a-u200-u-boot.dtsi,
now conflicting with the main DT content.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
The location and license header of DT bindings header for SiFive
clock driver has changed in upstream Linux hence this patch.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Updating the bcm283x device tree sources adds the device trees for
- Raspberry Pi 3 Model A+
- Raspberry Pi 3 Model B+
- Raspberry Pi Compute Module IO board rev1
- Raspberry Pi Compute Module 3 IO board V3.0
- Raspberry Pi Zero
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Add platform code and DTs for Renesas RZ/A1 R7S72100 SoC.
Distinguishing feature of this SoC is that it has up to
10 MiB of on-SoC static RAM (SRAM).
The DTs are imported from Linux 5.0.11, commit d5a2675b207d .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
------------------------
- warp7 to DM
- kp_imx53 to DM
- Warnings in DT
- MX8QM support
- colibri-imx6ull to DM
- imx7d-pico to DM
- ocotp for MX8
-----BEGIN PGP SIGNATURE-----
iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAlzDBtoPHHNiYWJpY0Bk
ZW54LmRlAAoJECjE2NMq1et3UpQL/ipaUejQOOr00oOgUBQqt3JCPZ7KNu8ruih/
nIFUDrI8nP+4psaOhRp1sEPFJUxUjdIqODeAZD8zrlEi1pXNAgPWYrFRfbz54bzw
jLsqqMz1/djQseLydQTcqZTSz8Ys7o+8OfKH64fdsZn+y9no9tHBN5hz5qWdXexN
kbyykkg8TJC3eUyRZqKuULOqzDV9BAdASOXu7UTa04sEekLdVvS2+zkUdB6UVZTN
LOAzm+7xY8Tey1BZxLuZUJDpHzFEMvPvlbbQRrxeDn/feZJwNgIP6hGcMeVOwOIf
KEwFn/m/HI2JWS4taXb5aT+v3xmiQvyCC3jNW0XTf5rq02pbfgyPsVhGQIGyU2yY
Fj7zIN7hVCLJNBpctvXyuAd1MjOlGEPIrHNjRnIZjtr7/iA1AIRn7Hg4cGNCHw6V
5gdza3B/xFODN+Ts6O+UVIukI61MJ6mGGdNCueOnWDviNROOL82D7Jh02KfNNNxR
q+yPsHSpo6rC1MGXv4SOReZtgpng/w==
=CzWQ
-----END PGP SIGNATURE-----
Merge tag 'u-boot-imx-20190426' of git://git.denx.de/u-boot-imx
Porting to DM and i.MX8
------------------------
- warp7 to DM
- kp_imx53 to DM
- Warnings in DT
- MX8QM support
- colibri-imx6ull to DM
- imx7d-pico to DM
- ocotp for MX8
Import Linux 5.1-rc1 DT from 9e98c678c2d6 ("Linux 5.1-rc1") for the
meson-g12a-u200 board, the meson-g12a.dtsi and the corresponding bindings.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Usually the Linux dts changes were synced in specific tags in Allwinner,
to keep track for whats been synced so-far and plan for future syncs.
But this patch sync sun50i-h6* dts(i) files from Linux w/o any specific
tag since these dts(i) changes are required for new H6 boards support.
Linux commit details about the sun50i-h6* sync:
"arm64: dts: allwinner: h6: move MMC pinctrl to dtsi"
(sha1: 6ba2e45d57afdfd982d12f168edd6a79a65075d8)
Linux commit details about the sun8i-tcon-top.h sync:
"dt-bindings: display: sunxi-drm: Add TCON TOP description"
(sha1: 59a9c39544cd1e5952c2a33028d71aa8180648f8)
Part of the sync initiated by 'Clément Péron'.
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
- Add st,digbypass on clk_hse node (needed for board rev.C)
- MLAHB/AHB max frequency increased from 200 to 209MHz, with:
- PLL3P set to 208.8MHz for MCU sub-system
- PLL3Q set to 24.57MHz for 48kHz SAI/SPI2S
- PLL3R set to 11.29MHz for 44.1kHz SAI/SPI2S
- PLL4P set to 99MHz for SDMMC and SPDIFRX
- PLL4Q set to 74.25MHz for EVAL board
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
It adds missing pinctrl headers, updates clock header and sync up Poplar
device tree with kernel 4.20 release.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Update sun50i-a64-ccu.h from the Linux sunxi/dt64-for-4.20 tree:
commit 679294497be31596e1c9c61507746d72b6b05f26
Author: Rodrigo Exterckötter Tjäder <rodrigo@tjader.xyz>
Date: Wed Sep 26 19:48:24 2018 +0000
arm64: dts: allwinner: a64: a64-olinuxino: set the PHY TX delay
This should be a part of previous sync patch from
commit 1b39a1834e
Author: Andre Przywara <andre.przywara@arm.com>
Date: Mon Oct 29 00:56:47 2018 +0000
sunxi: A64: Update .dts/.dtsi files
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Update all A80 devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commits.
arch/arm/boot/dts/sun9i-a80*:
commit 190e3138f9577885691540dca59c2f07540bde04
Merge: cafc87023b0d a7affb13b271
Author: Arnd Bergmann <arnd@arndb.de>
Date: Tue Mar 27 14:58:00 2018 +0200
Merge tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
include/dt-bindings/*/sun9i-a80-*:
commit 783ab76ae553abc23f80ef7511052d055697531b
Author: Chen-Yu Tsai <wens@csie.org>
Date: Sat Jan 28 20:22:36 2017 +0800
clk: sunxi-ng: Add A80 Display Engine CCU
Note: sun9i-a80-cx-a99.dts is updated only uart0, since the same
dts is not available in Linux.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Add initial support for the Ingenic JZ47xx MIPS SoC.
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Marek Vasut <marex@denx.de>
This patch synchronizes the am33xx SoC specific files with those from
Linux 4.20.0. Hence all board maintainers of am33xx based boards are
on the cc list.
The main purpose of this patch is to prevent further diverging of the
dts files from U-Boot and those from Linux. It aims to set the stage
for the synchronization of board specific dts files. Example: I'm the
maintainer of the PDU001 board: once this patch is applied successfully
I will make changes to the board specific dts file in Linux only and
then post a patch with a copy of this exact dts file to U-Boot. This
will make U-Boot and Linux remain in sync.
The stumbling block of https://patchwork.ozlabs.org/patch/943627 was
removed by the patch https://patchwork.ozlabs.org/patch/962428 from
Lokesh Vutla (many thanks!). This omap-serial driver allows using the
Linux am33xx.dtsi file in U-Boot.
Other changes to dts and dtsi files made by this patch are mainly to
prevent _new_ warnings during the build process. Especially the warning
at pinmux@800 stating 'unnecessary #address-cells/#size-cells without
"ranges" or child "reg"' was not removed. This warning is a good example
showing the benefit of the synchronization: if it needs to be fixed it
will be fixed in Linux and ported back to U-Boot.
Buildman reports all 46 am33xx SoC based boards to build fine, with
warnings of course. Nevertheless this patch should be tested thoroughly
on as many boards as possible to prevent any collateral damage.
Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
Synchronize DTs with mainline Linux 4.19.6 ,
commit 96db90800c06d3fe3fa08eb6222fe201286bb778
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
Make adjustments to the rv1108 clock driver in order to align it
with the internal Rockchip version.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This adds device tree for MT7623 development board - Bananapi R2
Detailed hardware information for BPI-R2 which could be found on
http://wiki.banana-pi.org/Banana_Pi_BPI-R2.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds MT7629 device tree and the includes it needs.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Synchronize the Amlogic AXG Device Tree files and bindings include from
the recent Linux 4.20-rc1, because it includes patches fixing support for
U-boot.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Update all A10 devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
commit 5d9ef839f874f4e3923c8a9ae7b136c6c3912cd5
Author: Stefan Mavrodiev <stefan@olimex.com>
Date: Wed May 16 14:38:08 2018 +0300
ARM: dts: sun7i: Add Olimex A20-SOM-EVB-eMMC board
Note:
- Update sun7i-a20-primo73.dts as per Linux, since
this dts is U-Boot specific.
- Drop sun7i-a20-olimex-som-evb-emmc.dts since no board
added for this.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Update all A10s/A13/gr8/r8devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commit:
commit 190e3138f9577885691540dca59c2f07540bde04
Merge: cafc87023b0d a7affb13b271
Author: Arnd Bergmann <arnd@arndb.de>
Date: Tue Mar 27 14:58:00 2018 +0200
Merge tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Update all A10 devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
commit 590b0c0cfc6162aeebbf43eaafb9753b56df1532
Author: Pascal Roeleven <dev@pascalroeleven.nl>
Date: Fri Apr 20 12:21:12 2018 +0200
ARM: dts: sun4i: Fix incorrect clocks for displays
Note: Update pinctrl-0 for sun4i-a10-inet-3f.dts, sun4i-a10-inet-3w.dts
like other dts file since there dts file are U-Boot specific.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Update all A83T devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
commit 221cb9fd2ee3042689fe0e6613d0f34eb46a5af6
Author: Mylène Josserand <mylene.josserand@bootlin.com>
Date: Fri May 4 21:05:44 2018 +0200
ARM: dts: sun8i: Add enable-method for SMP support for the A83T SoC
Note: bananapi-m3 and cubietruck-plus board dts files has
usb_otg enabled in U-Boot which were not present in Linux.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Allwinner H6 is a new SoC from Allwinner features USB3 and PCIe
interfaces.
This patch adds support for it.
The corresponding DTSI file, from Linux next-20180720, is also
introduced.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Update the device tree files from the Linux tree as of v4.18-rc3,
exactly Linux commit:
commit 55c5ba5e49a0a124ed416880e8227b493474495e
Author: Chen-Yu Tsai <wens@csie.org>
Date: Tue Apr 24 19:34:22 2018 +0800
arm64: dts: allwinner: h5: Add cpu0 label for first cpu
Since the H3 and H5 are very similar (aside from the actual ARM cores),
they share most the SoC .dtsi and thus have to be updated together.
One tiny change is the removal of the "arm/" prefix from the include
path in the sun50i-h5.dtsi, which is needed because we don't share the
same sophisticated DT directory layout of Linux.
Also we need to fix up the board .dts files already, since the .dtsi
removes some pins, so the .dts can't reference them anymore. This is to
maintain bisectability.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Updates the device tree file from the the Linux tree as of v4.18-rc3,
exactly Linux commit:
commit c1cff65f9b16b31e731e2e75bbe06638c86e1996
Author: Harald Geyer <harald@ccbib.org>
Date: Thu Mar 15 16:25:08 2018 +0000
arm64: dts: allwinner: a64: add simplefb for A64 SoC
This also pulls in the newly required include files for the clock and
reset bindings, also removes the now redundant part from our
*-u-boot.dtsi overlay file.
I kept the PWM node from U-Boot, as we recently gained this explicitly
for U-Boot's own usage and I don't want to regress here. This node is in
the queue for mainline Linux already, so the next sync will make it all
equal again.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
Add minimal devicetree for STM32MP157C-ED1 board,
with only the devices to allow boot from SDCARD:
- RCC for clock and reset
- UART4 for console
- I2C and PMIC
- DDR
- SDMMC0 for SDCard
Waiting Kernel upstream for alignment.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
The RK3288 CRU-node assigns rates to a number of clocks that are not
implemented in the RK3288 clock-driver (but which have been
sufficiently initialised from rkclk_init()): for these clocks, we
implement the gmac clock set parent, but simply ignore the
others' set_rate() operation and return 0 to signal success.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The rk3328 soc has two gmac controllers, one is gmac2io,
the other is gmac2phy. We use the gmac2io rgmii interface
for 1000M phy here.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Import the Renesas R8A7794 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Import the Renesas R8A7793 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Import the Renesas R8A7792 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Import the Renesas R8A7791 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Import the Renesas R8A7790 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Update default AXI, TUN, ARC clock set options:
instead of changing only IDIV divider settings adjust also domain PLL
settings.
Add support of TUN_ROM and TUN_PWM clocks (subclocks of TUNN_PLL)
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Synopsys HSDK clock controller generates and supplies clocks to various
controllers and peripherals within the SoC.
Each clock has assigned identifier and client device tree nodes can use
this identifier to specify the clock which they consume. All available
clocks are defined as preprocessor macros in the
dt-bindings/clock/snps,hsdk-cgu.h header and can be used in device
tree sources.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Add bits to support yet another SoC, the R8A77995 D3 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add bits to support yet another SoC, the R8A77970 V3M .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add dts binding header for rk3128, files origin from kernel.
Series-Changes: 2
- fix i2c address
- add saradc and usb phy node
- emmc using fifo mode for there is no dma support in rk3128 emmc
- add some clock id in cru.h
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Upstream Linux has received a few device tree updates to the RPi
which we should propagate into the builtin U-Boot one as well to
gain hardware support.
This patch bumps the dts files to their 4.14 Linux counterparts
with the exception of sdhost on 32bit RPi versions. There we stay
with iproc as the sdhost driver is missing in U-Boot.
Signed-off-by: Alexander Graf <agraf@suse.de>
The kernel DT of the SinA33 has evolved quite a bit. Make sure we sync it
and its upstream DTSI to be able to use the OTG. The DTs were taken from
the 4.13 kernel release.
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
SARADC integer divider control register is 10-bits width.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This driver implements basic clock setup, only clock gating
is implemented.
This driver doesn't implement .of_match as it's binded
by MFD RCC driver.
Files include/dt-bindings/clock/stm32h7-clks.h and
doc/device-tree-bindings/clock/st,stm32h7-rcc.txt
will be available soon in a kernel tag, as all the
bindings have been acked by Rob Herring [1].
[1] http://lkml.iu.edu/hypermail/linux/kernel/1704.0/00935.html
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.12-rc6,
commit 6f7da290413ba713f0cdd9ff1a2a9bb129ef4f6c . This includes both M3
and H3 ULCB and Salvator-X boards.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Use the same clocks macro than the one used by kernel DT.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
Import Amlogic Meson DTS files from Linux kernel version 4.12
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The dts files are from kernel and with modify to adapt U-Boot.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The RK3368 is an octa-core Cortex-A53 SoC from Rockchip.
This adds basic support to chain-load U-Boot from Rockchip's
miniloader.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Linux device tree for the Allwinner A64 SoC has changed a lot since
the U-Boot version was merged.
Let's replace the current DT with a exact copy of the Linux one as of:
commit c6778ff813d2ca3e3c8733c87dc8b6831a64578b
Merge: 0ff4c01 3c0e3abd
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date: Tue May 9 10:07:33 2017 -0700
This is the DT used in Linux 4.12-rc1.
Since U-Boot has an Ethernet driver (while Linux does not yet), we
provide the required DT nodes for it in an ...-u-boot.dtsi file, to both
mark them as U-Boot specific and to allow easier upgrading once Linux gets
the driver and its own binding later.
Compared to the existing Ethernet DT nodes we just slightly tweak the clock
and reset nodes in there to match the new bindings used by Linux for those.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Sync with Linux commit 308ac756("Merge tag 'gpio-v4.11-3'").
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefan Agner <stefan.agner@toradex.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Add support for clocks needed by MACs to ast2500 clock driver.
The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and
PCLK_MAC2 for MAC1 and MAC2 respectively.
The rate of D2-PLL is hardcoded to 250MHz -- the value used in Aspeed
SDK. It is not entirely clear from the datasheet how this clock is used
by MACs, so not clear if the rate would ever need to be different. So,
for now, hardcoding it is probably safer.
The rate of PCLK_MAC{1,2} is chosen based on MAC speed selected through
hardware strapping.
So, the network driver would only need to enable these clocks, no need
to configure the rate.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As we have now V3s support in board code, the V3s DTSI file should also
be added.
Add also some CCU include headers to satisfy the DTSI file.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
As a prerequisite for adding a Meson GX MMC driver update the
Meson GXBB / Odroid-C2 device tree in Uboot with the latest
version from Linux.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Introduce device tree support.
dts from kernel commit c4f3f22edd Merge tag 'linux-kselftest-4.11-rc1'
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Add dts binding header for rk3328, files origin from kernel.
Signed-off-by: William Zhang <william.zhang@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bring in required device clock binding files from Linux.
The clock trees for rk3066 and rk3188 are largely similar, which makes
them share the common parts in a shared header. While we focus on rk3188
for now, bring in both headers already for completeness sake.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
This device tree has been extracted from v4.9 kernel
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Clock Driver
This driver is ast2500-specific and is not compatible with earlier
versions of this chip. The differences are not that big, but they are
in somewhat random places, so making it compatible with ast2400 is not
worth the effort at the moment.
SDRAM MC driver
The driver is very ast2500-specific and is completely incompatible
with previous versions of the chip.
The memory controller is very poorly documented by Aspeed in the
datasheet, with any mention of the whole range of registers missing. The
initialization procedure has been basically taken from Aspeed SDK, where
it is implemented in assembly. Here it is rewritten in C, with very limited
understanding of what exactly it is doing.
Reviewed-by: Simon Glass <sjg@chromium.org>
Add i.MX6UL dtsi support from Linux.
Here is the last commit:
"ARM: dts: add gpio-ranges property to iMX GPIO controllers"
(sha1: bb728d662bed0fe91b152550e640cb3f6caa972c)
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Add CX9020 board based on mx53loco.
Add simplified imx53 base device tree from kernel v4.8-rc8, to reuse
serial_mxc with DTE and prepare for device tree migration of other
functions and imx53 devices.
The CX9020 differs from i.MX53 Quick Start Board by:
- use uart2 instead of uart1
- DVI-D connector instead of VGA
- no audio
- CCAT FPGA connected to emi
- enable rtc
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
This patch adds dt-bindings as used by the linux kernel device trees
for the bcm283x family.
Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add i.mx6ul clock header, copied from kernel commit (29b4817d401).
i.MX6ULL reuse the file in Linux Kernel, so let's keep the same.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
The primary benefit of this change is that it adds all missing clocks and
resets properties to peripherals. This will allow peripheral drivers to
migrate to the standard clock and reset APIs in the future.
Main changes:
* Brought in the correct Tegra210 CAR binding; the old file in U-Boot
appears to be a renamed version of the Tegra124 bindings rather than
the real Tegra210 version.
* Conversion of SPI and UART nodes to standard DMA bindings. U-Boot
doesn't use DMA so isn't affected.
* Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all
information required by U-Boot, so U-Boot is not affected.
* Conversion of many magic numbers to named defines.
* Addition of many nodes not used by U-Boot, including separation of the
Tegra LIC (Legacy IRQ controller) and GIC.
* Node sort order fixes.
Remaining deltas relative to the Linux DT:
* U-Boot has enabled PCIe for Tegra210, but the kernel hasn't yet.
* The GPIO node compatible value in the kernel explicitly includes
Tegra124 values whereas U-Boot does not. I'll send a kernel patch to
correct this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The primary benefit of this change is that it adds all missing clocks and
resets properties to peripherals. This will allow peripheral drivers to
migrate to the standard clock and reset APIs in the future.
Main changes:
* Conversion of SPI nodes to standard DMA bindings. U-Boot doesn't use
DMA so isn't affected.
* Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all
information required by U-Boot, so U-Boot is not affected.
* Boards need to define the clk32k_in clock that feeds the Tegra PMC.
* Addition of tegra114-mc.h since tegra114.dtsi now includes it.
* Conversion of many magic numbers to named defines.
* Addition of many nodes not used by U-Boot.
* Node sort order fixes.
Remaining deltas relative to the Linux DT:
* USB node compatible values in U-Boot explicitly list Tegra114 values
whereas the kernel does not. I'll send a kernel patch to correct this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The primary benefit of this change is that it adds all missing clocks and
resets properties to peripherals. This will allow peripheral drivers to
migrate to the standard clock and reset APIs in the future.
Main changes:
* Modification of PCIe memory region addresses. The HW memory layout is
programmable, so this should work fine, and Beaver PCIe was tested
without issue.
* Removal of pcie_xclk from the PCIe node and clock binding header. This
clock doesn't exist and isn't used; only a reset with this ID exists.
* Conversion of SPI nodes to standard DMA bindings. U-Boot doesn't use
DMA so isn't affected.
* Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all
information required by U-Boot, so U-Boot is not affected.
* Changed the phy_type value for the second USB port. This required board
DTs to be updated to keep the same configuration.
* Boards need to define the clk32k_in clock that feeds the Tegra PMC.
* Addition of tegra30-mc.h since tegra30.dtsi now includes it.
* Conversion of many magic numbers to named defines.
* Addition of many nodes not used by U-Boot.
* Node sort order fixes.
Remaining deltas relative to the Linux DT:
* None.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This brings in a few minor fixes since the last sync. The largest change
is the removal of the definition for TEGRA20_CLK_PCIE_XCLK. This clock
doesn't actually exist.
Remaining deltas:
* Addition of u-boot,dm-pre-reloc property to a couple of nodes.
* Addition of the NAND controller, which Linux doesn't yet support.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
