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https://github.com/AsahiLinux/u-boot
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clk: renesas: Synchronize Gen2 tables with Linux 5.0
Synchronize R-Car Gen2 clock tables with Linux 5.0, commit 1c163f4c7b3f621efff9b28a47abb36f7378d783 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Marek Vasut
Marek Vasut
parent
c4ea43d12f
commit
a3c31e98a1
11 changed files with 28 additions and 62 deletions
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@ -1,3 +1,4 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* r8a7790 Clock Pulse Generator / Module Standby and Software Reset
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*
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@ -6,10 +7,6 @@
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* Based on clk-rcar-gen2.c
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*
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* Copyright (C) 2013 Ideas On Board SPRL
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*/
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#include <common.h>
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@ -139,6 +136,7 @@ static const struct mssr_mod_clk r8a7790_mod_clks[] = {
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DEF_MOD("cmt1", 329, R8A7790_CLK_R),
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DEF_MOD("usbhs-dmac0", 330, R8A7790_CLK_HP),
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DEF_MOD("usbhs-dmac1", 331, R8A7790_CLK_HP),
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DEF_MOD("rwdt", 402, R8A7790_CLK_R),
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DEF_MOD("irqc", 407, R8A7790_CLK_CP),
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DEF_MOD("intc-sys", 408, R8A7790_CLK_ZS),
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DEF_MOD("audio-dmac1", 501, R8A7790_CLK_HP),
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@ -1,4 +1,4 @@
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// SPDX-License-Identifier: GPL-2.0+
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Renesas R8A7791 CPG MSSR driver
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*
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@ -6,8 +6,11 @@
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*
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* Based on the following driver from Linux kernel:
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* r8a7791 Clock Pulse Generator / Module Standby and Software Reset
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*
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* Copyright (C) 2015-2017 Glider bvba
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*
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* Based on clk-rcar-gen2.c
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*
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* Copyright (C) 2013 Ideas On Board SPRL
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*/
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@ -54,7 +57,6 @@ static const struct cpg_core_clk r8a7791_core_clks[] = {
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/* Core Clock Outputs */
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DEF_BASE("z", R8A7791_CLK_Z, CLK_TYPE_GEN2_Z, CLK_PLL0),
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DEF_BASE("lb", R8A7791_CLK_LB, CLK_TYPE_GEN2_LB, CLK_PLL1),
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DEF_BASE("adsp", R8A7791_CLK_ADSP, CLK_TYPE_GEN2_ADSP, CLK_PLL1),
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DEF_BASE("sdh", R8A7791_CLK_SDH, CLK_TYPE_GEN2_SDH, CLK_PLL1),
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DEF_BASE("sd0", R8A7791_CLK_SD0, CLK_TYPE_GEN2_SD0, CLK_PLL1),
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@ -67,6 +69,7 @@ static const struct cpg_core_clk r8a7791_core_clks[] = {
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DEF_FIXED("hp", R8A7791_CLK_HP, CLK_PLL1, 12, 1),
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DEF_FIXED("i", R8A7791_CLK_I, CLK_PLL1, 2, 1),
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DEF_FIXED("b", R8A7791_CLK_B, CLK_PLL1, 12, 1),
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DEF_FIXED("lb", R8A7791_CLK_LB, CLK_PLL1, 24, 1),
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DEF_FIXED("p", R8A7791_CLK_P, CLK_PLL1, 24, 1),
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DEF_FIXED("cl", R8A7791_CLK_CL, CLK_PLL1, 48, 1),
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DEF_FIXED("m2", R8A7791_CLK_M2, CLK_PLL1, 8, 1),
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@ -125,6 +128,7 @@ static const struct mssr_mod_clk r8a7791_mod_clks[] = {
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DEF_MOD("cmt1", 329, R8A7791_CLK_R),
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DEF_MOD("usbhs-dmac0", 330, R8A7791_CLK_HP),
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DEF_MOD("usbhs-dmac1", 331, R8A7791_CLK_HP),
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DEF_MOD("rwdt", 402, R8A7791_CLK_R),
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DEF_MOD("irqc", 407, R8A7791_CLK_CP),
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DEF_MOD("intc-sys", 408, R8A7791_CLK_ZS),
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DEF_MOD("audio-dmac1", 501, R8A7791_CLK_HP),
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@ -1,3 +1,4 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* r8a7792 Clock Pulse Generator / Module Standby and Software Reset
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*
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@ -6,10 +7,6 @@
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* Based on clk-rcar-gen2.c
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*
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* Copyright (C) 2013 Ideas On Board SPRL
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*/
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#include <common.h>
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@ -52,7 +49,6 @@ static const struct cpg_core_clk r8a7792_core_clks[] = {
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DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
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/* Core Clock Outputs */
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DEF_BASE("lb", R8A7792_CLK_LB, CLK_TYPE_GEN2_LB, CLK_PLL1),
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DEF_BASE("qspi", R8A7792_CLK_QSPI, CLK_TYPE_GEN2_QSPI, CLK_PLL1_DIV2),
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DEF_FIXED("z", R8A7792_CLK_Z, CLK_PLL0, 1, 1),
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@ -62,6 +58,7 @@ static const struct cpg_core_clk r8a7792_core_clks[] = {
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DEF_FIXED("hp", R8A7792_CLK_HP, CLK_PLL1, 12, 1),
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DEF_FIXED("i", R8A7792_CLK_I, CLK_PLL1, 3, 1),
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DEF_FIXED("b", R8A7792_CLK_B, CLK_PLL1, 12, 1),
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DEF_FIXED("lb", R8A7792_CLK_LB, CLK_PLL1, 24, 1),
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DEF_FIXED("p", R8A7792_CLK_P, CLK_PLL1, 24, 1),
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DEF_FIXED("cl", R8A7792_CLK_CL, CLK_PLL1, 48, 1),
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DEF_FIXED("m2", R8A7792_CLK_M2, CLK_PLL1, 8, 1),
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@ -97,6 +94,7 @@ static const struct mssr_mod_clk r8a7792_mod_clks[] = {
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DEF_MOD("tpu0", 304, R8A7792_CLK_CP),
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DEF_MOD("sdhi0", 314, R8A7792_CLK_SD),
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DEF_MOD("cmt1", 329, R8A7792_CLK_R),
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DEF_MOD("rwdt", 402, R8A7792_CLK_R),
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DEF_MOD("irqc", 407, R8A7792_CLK_CP),
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DEF_MOD("intc-sys", 408, R8A7792_CLK_ZS),
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DEF_MOD("audio-dmac0", 502, R8A7792_CLK_HP),
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@ -1,3 +1,4 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* r8a7794 Clock Pulse Generator / Module Standby and Software Reset
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*
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@ -6,10 +7,6 @@
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* Based on clk-rcar-gen2.c
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*
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* Copyright (C) 2013 Ideas On Board SPRL
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*/
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#include <common.h>
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@ -54,7 +51,6 @@ static const struct cpg_core_clk r8a7794_core_clks[] = {
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DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
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/* Core Clock Outputs */
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DEF_BASE("lb", R8A7794_CLK_LB, CLK_TYPE_GEN2_LB, CLK_PLL1),
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DEF_BASE("adsp", R8A7794_CLK_ADSP, CLK_TYPE_GEN2_ADSP, CLK_PLL1),
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DEF_BASE("sdh", R8A7794_CLK_SDH, CLK_TYPE_GEN2_SDH, CLK_PLL1),
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DEF_BASE("sd0", R8A7794_CLK_SD0, CLK_TYPE_GEN2_SD0, CLK_PLL1),
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@ -68,6 +64,7 @@ static const struct cpg_core_clk r8a7794_core_clks[] = {
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DEF_FIXED("hp", R8A7794_CLK_HP, CLK_PLL1, 12, 1),
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DEF_FIXED("i", R8A7794_CLK_I, CLK_PLL1, 2, 1),
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DEF_FIXED("b", R8A7794_CLK_B, CLK_PLL1, 12, 1),
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DEF_FIXED("lb", R8A7794_CLK_LB, CLK_PLL1, 24, 1),
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DEF_FIXED("p", R8A7794_CLK_P, CLK_PLL1, 24, 1),
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DEF_FIXED("cl", R8A7794_CLK_CL, CLK_PLL1, 48, 1),
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DEF_FIXED("cp", R8A7794_CLK_CP, CLK_PLL1, 48, 1),
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@ -120,6 +117,7 @@ static const struct mssr_mod_clk r8a7794_mod_clks[] = {
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DEF_MOD("cmt1", 329, R8A7794_CLK_R),
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DEF_MOD("usbhs-dmac0", 330, R8A7794_CLK_HP),
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DEF_MOD("usbhs-dmac1", 331, R8A7794_CLK_HP),
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DEF_MOD("rwdt", 402, R8A7794_CLK_R),
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DEF_MOD("irqc", 407, R8A7794_CLK_CP),
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DEF_MOD("intc-sys", 408, R8A7794_CLK_ZS),
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DEF_MOD("audio-dmac0", 502, R8A7794_CLK_HP),
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@ -1,10 +1,6 @@
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/*
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* Copyright (C) 2015 Renesas Electronics Corp.
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/* SPDX-License-Identifier: GPL-2.0+
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* Copyright (C) 2015 Renesas Electronics Corp.
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*/
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#ifndef __DT_BINDINGS_CLOCK_R8A7790_CPG_MSSR_H__
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/*
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* Copyright (C) 2015 Renesas Electronics Corp.
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/* SPDX-License-Identifier: GPL-2.0+
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* Copyright (C) 2015 Renesas Electronics Corp.
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*/
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#ifndef __DT_BINDINGS_CLOCK_R8A7791_CPG_MSSR_H__
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/*
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* Copyright (C) 2015 Renesas Electronics Corp.
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/* SPDX-License-Identifier: GPL-2.0+
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* Copyright (C) 2015 Renesas Electronics Corp.
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*/
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#ifndef __DT_BINDINGS_CLOCK_R8A7792_CPG_MSSR_H__
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/*
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/* SPDX-License-Identifier: GPL-2.0
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*
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* r8a7793 clock definition
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*
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* Copyright (C) 2014 Renesas Electronics Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __DT_BINDINGS_CLOCK_R8A7793_H__
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/*
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* Copyright (C) 2015 Renesas Electronics Corp.
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/* SPDX-License-Identifier: GPL-2.0+
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* Copyright (C) 2015 Renesas Electronics Corp.
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*/
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#ifndef __DT_BINDINGS_CLOCK_R8A7793_CPG_MSSR_H__
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/*
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/* SPDX-License-Identifier: GPL-2.0+
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*
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* Copyright (C) 2014 Renesas Electronics Corporation
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* Copyright 2013 Ideas On Board SPRL
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __DT_BINDINGS_CLOCK_R8A7794_H__
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/*
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* Copyright (C) 2015 Renesas Electronics Corp.
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/* SPDX-License-Identifier: GPL-2.0+
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* Copyright (C) 2015 Renesas Electronics Corp.
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*/
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#ifndef __DT_BINDINGS_CLOCK_R8A7794_CPG_MSSR_H__
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