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sunxi: H3/H5 Sync DT files from upstream Linux kernel as of next-20200108

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Sync the device tree files and device tree header files from upstream
Linux kernel, as of 2020-01-08. The commit synced to in the sunxi repo

    98d25b0b266d Merge branch 'sunxi/dt-for-5.6' into sunxi/for-next

which is also part of next-20200108.

Changes brought in include:

  - cleanup of pinmux node names
  - addition of Security ID, MBUS, CSI, crypto engine, video codec,
    pmu, and thermal sensor device nodes for both SoCs
  - addition of deinterlacing engine device node on H3
  - cleanup of RTC device node and addition of its clocks
  - various board cleanups and improvements
    - removal of pinmux node for GPIO lines
    - cpufreq / DVFS
    - HDMI output
    - UART-based Bluetooth
    - audio codec
    - USB ports
  - new boards

Most of the changes don't concern U-boot.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
Chen-Yu Tsai 2020-01-12 23:36:13 +08:00 committed by Jagan Teki
parent 5692e8f7b4
commit b5fe523bbc
43 changed files with 1551 additions and 724 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

9
arch/arm/dts/Makefile
View file

@ -515,8 +515,12 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
sun8i-h2-plus-orangepi-r1.dtb \
sun8i-h2-plus-orangepi-zero.dtb \
sun8i-h3-bananapi-m2-plus.dtb \
sun8i-h3-bananapi-m2-plus-v1.2.dtb \
sun8i-h3-beelink-x2.dtb \
sun8i-h3-emlid-neutis-n5h3-devboard.dtb \
sun8i-h3-libretech-all-h3-cc.dtb \
sun8i-h3-mapleboard-mp130.dtb \
sun8i-h3-nanopi-duo2.dtb \
sun8i-h3-nanopi-m1.dtb \
sun8i-h3-nanopi-m1-plus.dtb \
sun8i-h3-nanopi-neo.dtb \
@ -528,7 +532,8 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
sun8i-h3-orangepi-pc-plus.dtb \
sun8i-h3-orangepi-plus.dtb \
sun8i-h3-orangepi-plus2e.dtb \
sun8i-h3-orangepi-zero-plus2.dtb
sun8i-h3-orangepi-zero-plus2.dtb \
sun8i-h3-rervision-dvk.dtb
dtb-$(CONFIG_MACH_SUN8I_R40) += \
sun8i-r40-bananapi-m2-ultra.dtb \
sun8i-v40-bananapi-m2-berry.dtb
@ -538,6 +543,8 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-bananapi-m2-plus.dtb \
sun50i-h5-emlid-neutis-n5-devboard.dtb \
sun50i-h5-libretech-all-h3-cc.dtb \
sun50i-h5-libretech-all-h3-it.dtb \
sun50i-h5-libretech-all-h5-cc.dtb \
sun50i-h5-nanopi-neo2.dtb \
sun50i-h5-nanopi-neo-plus2.dtb \
sun50i-h5-orangepi-zero-plus.dtb \

11
arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts Normal file
View file

@ -0,0 +1,11 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
/dts-v1/;
#include "sun50i-h5.dtsi"
#include <arm/sunxi-bananapi-m2-plus-v1.2.dtsi>
/ {
model = "Banana Pi BPI-M2-Plus v1.2 H5";
compatible = "bananapi,bpi-m2-plus-v1.2", "allwinner,sun50i-h5";
};

139
arch/arm/dts/sun50i-h5-emlid-neutis-n5-devboard.dts
View file

@ -1,43 +1,8 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
// Copyright (C) 2018 Aleksandr Aleksandrov <aleksandr.aleksandrov@emlid.com>
/*
* Copyright (C) 2018 Aleksandr Aleksandrov <aleksandr.aleksandrov@emlid.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
* DTS for Emlid Neutis N5 Dev board.
*/
/dts-v1/;
@ -46,17 +11,9 @@
/ {
model = "Emlid Neutis N5 Developer board";
compatible = "emlid,emlid-neutis-n5-devboard",
"emlid,emlid-neutis-n5",
"allwinner,sun50i-h5";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
compatible = "emlid,neutis-n5-devboard",
"emlid,neutis-n5",
"allwinner,sun50i-h5";
connector {
compatible = "hdmi-connector";
@ -69,19 +26,8 @@
};
};
reg_usb0_vbus: usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb0-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
status = "okay";
};
vdd_cpux: gpio-regulator {
compatible = "regulator-gpio";
pinctrl-names = "default";
regulator-name = "vdd-cpux";
regulator-type = "voltage";
regulator-boot-on;
@ -91,54 +37,15 @@
regulator-ramp-delay = <50>; /* 4ms */
gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
gpios-states = <0x1>;
states = <1100000 0x0
1300000 0x1>;
states = <1100000 0>, <1300000 1>;
};
};
&cpu0 {
cpu-supply = <&vdd_cpux>;
};
&codec {
allwinner,audio-routing =
"Line Out", "LINEOUT",
"LINEIN", "Line In",
"MIC1", "Mic",
"MIC2", "Mic",
"Mic", "MBIAS";
status = "okay";
};
&de {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&ehci2 {
status = "okay";
};
&ehci3 {
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&ohci2 {
status = "okay";
};
&ohci3 {
status = "okay";
};
@ -159,26 +66,6 @@
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usbphy {
usb0_id_det-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
usb0_vbus-supply = <&reg_usb0_vbus>;
&i2c1 {
status = "okay";
};

95
arch/arm/dts/sun50i-h5-emlid-neutis-n5.dtsi
View file

@ -1,96 +1,11 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
// Copyright (C) 2018 Aleksandr Aleksandrov <aleksandr.aleksandrov@emlid.com>
/*
* Copyright (C) 2018 Aleksandr Aleksandrov <aleksandr.aleksandrov@emlid.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
* DTSI for Emlid Neutis N5 SoM.
*/
/dts-v1/;
#include "sun50i-h5.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
reset-gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */
post-power-on-delay-ms = <200>;
};
};
&mmc1 {
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&r_pio>;
interrupts = <0 5 IRQ_TYPE_LEVEL_LOW>; /* PL5 */
interrupt-names = "host-wake";
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_pins>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
status = "okay";
};
#include <sunxi-h3-h5-emlid-neutis.dtsi>

10
arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts
View file

@ -1,8 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2018 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
// Copyright (C) 2018 BayLibre, SAS
// Author: Neil Armstrong <narmstrong@baylibre.com>
/dts-v1/;
#include "sun50i-h5.dtsi"
@ -12,3 +10,7 @@
model = "Libre Computer Board ALL-H3-CC H5";
compatible = "libretech,all-h3-cc-h5", "allwinner,sun50i-h5";
};
&mmc2 {
mmc-ddr-3_3v;
};

11
arch/arm/dts/sun50i-h5-libretech-all-h3-it.dts Normal file
View file

@ -0,0 +1,11 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2019 Chen-Yu Tsai <wens@csie.org>
/dts-v1/;
#include "sun50i-h5.dtsi"
#include <sunxi-libretech-all-h3-it.dtsi>
/ {
model = "Libre Computer Board ALL-H3-IT H5";
compatible = "libretech,all-h3-it-h5", "allwinner,sun50i-h5";
};

61
arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts Normal file
View file

@ -0,0 +1,61 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
#include "sun50i-h5-libretech-all-h3-cc.dts"
/ {
model = "Libre Computer Board ALL-H5-CC H5";
compatible = "libretech,all-h5-cc-h5", "allwinner,sun50i-h5";
aliases {
spi0 = &spi0;
};
reg_gmac_3v3: gmac-3v3 {
compatible = "regulator-fixed";
regulator-name = "gmac-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <5000>;
enable-active-high;
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
vin-supply = <&reg_vcc5v0>;
};
};
&codec {
/* No line out; only onboard microphone */
allwinner,audio-routing =
"MIC1", "Mic",
"Mic", "MBIAS";
};
/* This board has external PHY */
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii";
/delete-property/ allwinner,leds-active-low;
status = "okay";
};
&external_mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&spi0 {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
};
};

53
arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
View file

@ -1,45 +1,6 @@
/*
* Copyright (C) 2017 Antony Antony <antony@phenome.org>
* Copyright (C) 2016 ARM Ltd.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2017 Antony Antony <antony@phenome.org>
// Copyright (C) 2016 ARM Ltd.
/dts-v1/;
#include "sun50i-h5.dtsi"
@ -78,7 +39,6 @@
reg_gmac_3v3: gmac-3v3 {
compatible = "regulator-fixed";
pinctrl-names = "default";
regulator-name = "gmac-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
@ -96,7 +56,6 @@
vdd_cpux: gpio-regulator {
compatible = "regulator-gpio";
pinctrl-names = "default";
regulator-name = "vdd-cpux";
regulator-type = "voltage";
regulator-boot-on;
@ -106,13 +65,11 @@
regulator-ramp-delay = <50>; /* 4ms */
gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
gpios-states = <0x1>;
states = <1100000 0x0
1300000 0x1>;
states = <1100000 0>, <1300000 1>;
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
post-power-on-delay-ms = <200>;
};
@ -191,7 +148,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

45
arch/arm/dts/sun50i-h5-nanopi-neo2.dts
View file

@ -1,44 +1,5 @@
/*
* Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
/dts-v1/;
#include "sun50i-h5.dtsi"
@ -142,7 +103,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

47
arch/arm/dts/sun50i-h5-orangepi-pc2.dts
View file

@ -1,44 +1,5 @@
/*
* Copyright (C) 2016 ARM Ltd.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2016 ARM Ltd.
/dts-v1/;
#include "sun50i-h5.dtsi"
@ -180,7 +141,7 @@
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
@ -221,7 +182,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

52
arch/arm/dts/sun50i-h5-orangepi-prime.dts
View file

@ -1,47 +1,7 @@
/*
* Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz>
*
* Based on sun50i-h5-orangepi-pc2.dts, which is:
* Copyright (C) 2016 ARM Ltd.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz>
// Based on sun50i-h5-orangepi-pc2.dts, which is:
// Copyright (C) 2016 ARM Ltd.
/dts-v1/;
#include "sun50i-h5.dtsi"
@ -187,7 +147,7 @@
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
@ -224,7 +184,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

11
arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
View file

@ -1,9 +1,6 @@
/*
* Copyright (C) 2016 ARM Ltd.
* Copyright (C) 2018 Hauke Mehrtens <hauke@hauke-m.de>
*
* SPDX-License-Identifier: (GPL-2.0+ OR X11)
*/
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2016 ARM Ltd.
// Copyright (C) 2018 Hauke Mehrtens <hauke@hauke-m.de>
/dts-v1/;
#include "sun50i-h5.dtsi"
@ -127,7 +124,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

46
arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
View file

@ -1,44 +1,5 @@
/*
* Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
/dts-v1/;
@ -78,7 +39,6 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
post-power-on-delay-ms = <200>;
};
@ -134,7 +94,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

186
arch/arm/dts/sun50i-h5.dtsi
View file

@ -1,44 +1,5 @@
/*
* Copyright (C) 2016 ARM Ltd.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2016 ARM Ltd.
#include <sunxi-h3-h5.dtsi>
@ -48,34 +9,44 @@
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <0>;
enable-method = "psci";
};
cpu@1 {
compatible = "arm,cortex-a53", "arm,armv8";
cpu1: cpu@1 {
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <1>;
enable-method = "psci";
};
cpu@2 {
compatible = "arm,cortex-a53", "arm,armv8";
cpu2: cpu@2 {
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <2>;
enable-method = "psci";
};
cpu@3 {
compatible = "arm,cortex-a53", "arm,armv8";
cpu3: cpu@3 {
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <3>;
enable-method = "psci";
};
};
pmu {
compatible = "arm,cortex-a53-pmu",
"arm,armv8-pmuv3";
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
@ -92,6 +63,117 @@
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
soc {
syscon: system-control@1c00000 {
compatible = "allwinner,sun50i-h5-system-control";
reg = <0x01c00000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
sram_c1: sram@18000 {
compatible = "mmio-sram";
reg = <0x00018000 0x1c000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00018000 0x1c000>;
ve_sram: sram-section@0 {
compatible = "allwinner,sun50i-h5-sram-c1",
"allwinner,sun4i-a10-sram-c1";
reg = <0x000000 0x1c000>;
};
};
};
video-codec@1c0e000 {
compatible = "allwinner,sun50i-h5-video-engine";
reg = <0x01c0e000 0x1000>;
clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
<&ccu CLK_DRAM_VE>;
clock-names = "ahb", "mod", "ram";
resets = <&ccu RST_BUS_VE>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
allwinner,sram = <&ve_sram 1>;
};
crypto: crypto@1c15000 {
compatible = "allwinner,sun50i-h5-crypto";
reg = <0x01c15000 0x1000>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
clock-names = "bus", "mod";
resets = <&ccu RST_BUS_CE>;
};
mali: gpu@1e80000 {
compatible = "allwinner,sun50i-h5-mali", "arm,mali-450";
reg = <0x01e80000 0x30000>;
/*
* While the datasheet lists an interrupt for the
* PMU, the actual silicon does not have the PMU
* block. Reads all return zero, and writes are
* ignored.
*/
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "gp",
"gpmmu",
"pp",
"pp0",
"ppmmu0",
"pp1",
"ppmmu1",
"pp2",
"ppmmu2",
"pp3",
"ppmmu3",
"pmu";
clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
clock-names = "bus", "core";
resets = <&ccu RST_BUS_GPU>;
assigned-clocks = <&ccu CLK_GPU>;
assigned-clock-rates = <384000000>;
};
ths: thermal-sensor@1c25000 {
compatible = "allwinner,sun50i-h5-ths";
reg = <0x01c25000 0x400>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
resets = <&ccu RST_BUS_THS>;
clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
clock-names = "bus", "mod";
nvmem-cells = <&ths_calibration>;
nvmem-cell-names = "calibration";
#thermal-sensor-cells = <1>;
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 0>;
};
gpu_thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 1>;
};
};
};
&ccu {
@ -129,3 +211,11 @@
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
compatible = "allwinner,sun50i-h5-pinctrl";
};
&rtc {
compatible = "allwinner,sun50i-h5-rtc";
};
&sid {
compatible = "allwinner,sun50i-h5-sid";
};

40
arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts
View file

@ -28,7 +28,6 @@
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pwr_led {
label = "bananapi-m2-zero:red:pwr";
@ -39,7 +38,6 @@
gpio_keys {
compatible = "gpio-keys";
pinctrl-names = "default";
sw4 {
label = "power";
@ -48,13 +46,34 @@
};
};
reg_vdd_cpux: vdd-cpux-regulator {
compatible = "regulator-gpio";
regulator-name = "vdd-cpux";
regulator-type = "voltage";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-ramp-delay = <50>; /* 4ms */
gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */
enable-active-high;
gpios-states = <0x1>;
states = <1100000 0>, <1300000 1>;
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
clocks = <&rtc 1>;
clock-names = "ext_clock";
};
};
&cpu0 {
cpu-supply = <&reg_vdd_cpux>;
};
&ehci0 {
status = "okay";
};
@ -94,14 +113,27 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
uart-has-rtscts;
status = "okay";
bluetooth {
compatible = "brcm,bcm43438-bt";
clocks = <&rtc 1>;
clock-names = "lpo";
vbat-supply = <&reg_vcc3v3>;
vddio-supply = <&reg_vcc3v3>;
device-wakeup-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
host-wakeup-gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
shutdown-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
};
};
&usb_otg {

2
arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts
View file

@ -68,7 +68,6 @@
};
};
/*
&spi0 {
status = "okay";
@ -76,7 +75,6 @@
compatible = "mxicy,mx25l12805d", "jedec,spi-nor";
};
};
*/
&ohci1 {
/*

22
arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
View file

@ -89,6 +89,22 @@
gpio = <&pio 0 20 GPIO_ACTIVE_HIGH>;
};
reg_vdd_cpux: vdd-cpux-regulator {
compatible = "regulator-gpio";
regulator-name = "vdd-cpux";
regulator-type = "voltage";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-ramp-delay = <50>; /* 4ms */
gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
enable-active-high;
gpios-states = <1>;
states = <1100000 0>, <1300000 1>;
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>;
@ -96,6 +112,10 @@
};
};
&cpu0 {
cpu-supply = <&reg_vdd_cpux>;
};
&ehci0 {
status = "okay";
};
@ -157,7 +177,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

13
arch/arm/dts/sun8i-h3-bananapi-m2-plus-v1.2.dts Normal file
View file

@ -0,0 +1,13 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
*/
/dts-v1/;
#include "sun8i-h3.dtsi"
#include "sunxi-bananapi-m2-plus-v1.2.dtsi"
/ {
model = "Banana Pi BPI-M2-Plus v1.2 H3";
compatible = "bananapi,bpi-m2-plus-v1.2", "allwinner,sun8i-h3";
};

11
arch/arm/dts/sun8i-h3-beelink-x2.dts
View file

@ -90,6 +90,8 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
clocks = <&rtc 1>;
clock-names = "ext_clock";
};
sound_spdif {
@ -141,8 +143,9 @@
};
&ir {
linux,rc-map-name = "rc-tanix-tx3mini";
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
@ -155,6 +158,8 @@
&mmc1 {
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
@ -193,13 +198,13 @@
&spdif {
pinctrl-names = "default";
pinctrl-0 = <&spdif_tx_pins_a>;
pinctrl-0 = <&spdif_tx_pin>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

72
arch/arm/dts/sun8i-h3-emlid-neutis-n5h3-devboard.dts Normal file
View file

@ -0,0 +1,72 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* DTS for Emlid Neutis N5 Dev board.
*
* Copyright (C) 2019 Georgii Staroselskii <georgiii.staroselskii@emlid.com>
*/
/dts-v1/;
#include "sun8i-h3-emlid-neutis-n5h3.dtsi"
/ {
model = "Emlid Neutis N5H3 Developer board";
compatible = "emlid,neutis-n5h3-devboard",
"emlid,neutis-n5h3",
"allwinner,sun8i-h3";
vdd_cpux: gpio-regulator {
compatible = "regulator-gpio";
regulator-name = "vdd-cpux";
regulator-type = "voltage";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-ramp-delay = <50>; /* 4ms */
gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
gpios-states = <0x1>;
states = <1100000 0x0>, <1300000 0x1>;
};
connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
};
&cpu0 {
cpu-supply = <&vdd_cpux>;
};
&codec {
status = "okay";
};
&emac {
phy-handle = <&int_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
status = "okay";
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&i2c1 {
status = "okay";
};

11
arch/arm/dts/sun8i-h3-emlid-neutis-n5h3.dtsi Normal file
View file

@ -0,0 +1,11 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* DTSI for Emlid Neutis N5 SoM.
*
* Copyright (C) 2019 Georgii Staroselskii <georgii.staroselskii@emlid.com>
*/
/dts-v1/;
#include "sun8i-h3.dtsi"
#include <sunxi-h3-h5-emlid-neutis.dtsi>

152
arch/arm/dts/sun8i-h3-mapleboard-mp130.dts Normal file
View file

@ -0,0 +1,152 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2017 Centrum Embedded Systems, Jia-Bin Huang <jb@ces.com.tw>
* Copyright (C) 2018 Jonathan McDowell <noodles@earth.li>
*/
/dts-v1/;
#include "sun8i-h3.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "MapleBoard MP130";
compatible = "mapleboard,mp130", "allwinner,sun8i-h3";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
pwr_led {
label = "mp130:orange:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
status_led {
label = "mp130:orange:status";
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
};
};
r_gpio_keys {
compatible = "gpio-keys";
power {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */
};
user {
label = "user";
linux,code = <BTN_0>;
gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>;
};
};
};
&codec {
allwinner,audio-routing =
"Line Out", "LINEOUT",
"LINEIN", "Line In";
status = "okay";
};
&ehci1 {
status = "okay";
};
&ehci2 {
status = "okay";
};
&ehci3 {
status = "okay";
};
&emac {
phy-handle = <&int_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
status = "okay";
};
&ir {
pinctrl-names = "default";
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_pins>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&ohci1 {
status = "okay";
};
&ohci2 {
status = "okay";
};
&ohci3 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "disabled";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "disabled";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "disabled";
};
&usb_otg {
dr_mode = "peripheral";
status = "okay";
};
&usbphy {
/* USB VBUS is always on */
status = "okay";
};

173
arch/arm/dts/sun8i-h3-nanopi-duo2.dts Normal file
View file

@ -0,0 +1,173 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2019 Karl Palsson <karlp@tweak.net.au>
*/
/dts-v1/;
#include "sun8i-h3.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "FriendlyARM NanoPi Duo2";
compatible = "friendlyarm,nanopi-duo2", "allwinner,sun8i-h3";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
pwr {
label = "nanopi:red:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
default-state = "on";
};
status {
label = "nanopi:green:status";
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
};
};
r_gpio_keys {
compatible = "gpio-keys";
k1 {
label = "k1";
linux,code = <BTN_0>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */
};
};
reg_vdd_cpux: vdd-cpux-regulator {
compatible = "regulator-gpio";
regulator-name = "vdd-cpux";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-always-on;
regulator-boot-on;
regulator-ramp-delay = <50>; /* 4ms */
enable-active-high;
enable-gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
gpios-states = <0x1>;
states = <1100000 0>, <1300000 1>;
};
reg_vcc_dram: vcc-dram {
compatible = "regulator-fixed";
regulator-name = "vcc-dram";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
vin-supply = <&reg_vcc5v0>;
};
reg_vdd_sys: vdd-sys {
compatible = "regulator-fixed";
regulator-name = "vdd-sys";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
vin-supply = <&reg_vcc5v0>;
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
clocks = <&rtc 1>;
clock-names = "ext_clock";
};
};
&cpu0 {
cpu-supply = <&reg_vdd_cpux>;
};
&ehci0 {
status = "okay";
};
&mmc0 {
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
vmmc-supply = <&reg_vcc3v3>;
};
&mmc1 {
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
sdio_wifi: sdio_wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&pio>;
interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
interrupt-names = "host-wake";
};
};
&ohci0 {
status = "okay";
};
&reg_usb0_vbus {
gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>;
uart-has-rtscts;
status = "okay";
bluetooth {
compatible = "brcm,bcm43438-bt";
clocks = <&rtc 1>;
clock-names = "lpo";
vbat-supply = <&reg_vcc3v3>;
vddio-supply = <&reg_vcc3v3>;
device-wakeup-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
host-wakeup-gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */
shutdown-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
};
};
&usb_otg {
status = "okay";
dr_mode = "otg";
};
&usbphy {
usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
usb0_vbus-supply = <&reg_usb0_vbus>;
status = "okay";
};

28
arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts
View file

@ -64,9 +64,23 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
};
connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
};
&de {
status = "okay";
};
&ehci1 {
@ -94,9 +108,19 @@
};
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};

2
arch/arm/dts/sun8i-h3-nanopi-m1.dts
View file

@ -93,7 +93,7 @@
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};

2
arch/arm/dts/sun8i-h3-nanopi-neo-air.dts
View file

@ -105,7 +105,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

25
arch/arm/dts/sun8i-h3-nanopi.dtsi
View file

@ -59,8 +59,6 @@
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&leds_npi>, <&leds_r_npi>;
status {
label = "nanopi:blue:status";
@ -78,8 +76,6 @@
r_gpio_keys {
compatible = "gpio-keys";
input-name = "k1";
pinctrl-names = "default";
pinctrl-0 = <&sw_r_npi>;
k1 {
label = "k1";
@ -104,28 +100,9 @@
status = "okay";
};
&pio {
leds_npi: led_pins {
pins = "PA10";
function = "gpio_out";
};
};
&r_pio {
leds_r_npi: led_pins {
pins = "PL10";
function = "gpio_out";
};
sw_r_npi: key_pins {
pins = "PL3";
function = "gpio_in";
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

34
arch/arm/dts/sun8i-h3-orangepi-2.dts
View file

@ -75,8 +75,6 @@
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&leds_opc>, <&leds_r_opc>;
status_led {
label = "orangepi:red:status";
@ -92,8 +90,6 @@
r_gpio_keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&sw_r_opc>;
sw2 {
label = "sw2";
@ -110,8 +106,6 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
pinctrl-0 = <&wifi_pwrseq_pin_orangepi>;
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 WIFI_EN */
};
};
@ -152,7 +146,7 @@
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
@ -179,30 +173,6 @@
};
};
&pio {
leds_opc: led_pins {
pins = "PA15";
function = "gpio_out";
};
};
&r_pio {
leds_r_opc: led_pins {
pins = "PL10";
function = "gpio_out";
};
sw_r_opc: key_pins {
pins = "PL3", "PL4";
function = "gpio_in";
};
wifi_pwrseq_pin_orangepi: wifi_pwrseq_pin {
pins = "PL7";
function = "gpio_out";
};
};
&reg_usb1_vbus {
gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>;
status = "okay";
@ -210,7 +180,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

27
arch/arm/dts/sun8i-h3-orangepi-lite.dts
View file

@ -74,8 +74,6 @@
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&leds_opc>, <&leds_r_opc>;
pwr_led {
label = "orangepi:green:pwr";
@ -91,8 +89,6 @@
r_gpio_keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&sw_r_opc>;
sw4 {
label = "sw4";
@ -126,7 +122,7 @@
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
@ -160,28 +156,9 @@
status = "okay";
};
&pio {
leds_opc: led_pins {
pins = "PA15";
function = "gpio_out";
};
};
&r_pio {
leds_r_opc: led_pins {
pins = "PL10";
function = "gpio_out";
};
sw_r_opc: key_pins {
pins = "PL3";
function = "gpio_in";
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

28
arch/arm/dts/sun8i-h3-orangepi-one.dts
View file

@ -73,8 +73,6 @@
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&leds_opc>, <&leds_r_opc>;
pwr_led {
label = "orangepi:green:pwr";
@ -90,8 +88,6 @@
r_gpio_keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&sw_r_opc>;
sw4 {
label = "sw4";
@ -113,8 +109,7 @@
gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
enable-active-high;
gpios-states = <0x1>;
states = <1100000 0x0
1300000 0x1>;
states = <1100000 0>, <1300000 1>;
};
};
@ -166,25 +161,6 @@
status = "okay";
};
&pio {
leds_opc: led_pins {
pins = "PA15";
function = "gpio_out";
};
};
&r_pio {
leds_r_opc: led_pins {
pins = "PL10";
function = "gpio_out";
};
sw_r_opc: key_pins {
pins = "PL3";
function = "gpio_in";
};
};
&reg_usb0_vbus {
gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
status = "okay";
@ -192,7 +168,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

27
arch/arm/dts/sun8i-h3-orangepi-pc.dts
View file

@ -73,8 +73,6 @@
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&leds_opc>, <&leds_r_opc>;
pwr_led {
label = "orangepi:green:pwr";
@ -90,8 +88,6 @@
r_gpio_keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&sw_r_opc>;
sw4 {
label = "sw4";
@ -152,7 +148,7 @@
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
@ -179,13 +175,6 @@
status = "okay";
};
&pio {
leds_opc: led_pins {
pins = "PA15";
function = "gpio_out";
};
};
&r_i2c {
status = "okay";
@ -210,18 +199,6 @@
};
};
&r_pio {
leds_r_opc: led_pins {
pins = "PL10";
function = "gpio_out";
};
sw_r_opc: key_pins {
pins = "PL3";
function = "gpio_in";
};
};
&reg_usb0_vbus {
gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
status = "okay";
@ -229,7 +206,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

23
arch/arm/dts/sun8i-h3-orangepi-plus.dts
View file

@ -63,8 +63,6 @@
reg_usb3_vbus: usb3-vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&usb3_vbus_pin_a>;
regulator-name = "usb3-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
@ -74,6 +72,10 @@
};
};
&cpu0 {
cpu-supply = <&reg_vdd_cpux>;
};
&ehci3 {
status = "okay";
};
@ -112,10 +114,19 @@
bias-pull-up;
};
&pio {
usb3_vbus_pin_a: usb3_vbus_pin {
pins = "PG11";
function = "gpio_out";
&r_i2c {
status = "okay";
reg_vdd_cpux: regulator@65 {
compatible = "silergy,sy8106a";
reg = <0x65>;
regulator-name = "vdd-cpux";
silergy,fixed-microvolt = <1200000>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1400000>;
regulator-ramp-delay = <200>;
regulator-boot-on;
regulator-always-on;
};
};

2
arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts
View file

@ -134,6 +134,6 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

114
arch/arm/dts/sun8i-h3-rervision-dvk.dts Normal file
View file

@ -0,0 +1,114 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2019 Bootlin
* Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
*/
/dts-v1/;
#include "sun8i-h3.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "RerVision H3-DVK";
compatible = "rervision,h3-dvk", "allwinner,sun8i-h3";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
};
&de {
status = "okay";
};
&ehci1 {
status = "okay";
};
&ehci2 {
status = "okay";
};
&ehci3 {
status = "okay";
};
&emac {
phy-handle = <&int_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
status = "okay";
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&mmc0 {
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
vmmc-supply = <&reg_vcc3v3>;
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_pins>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&ohci1 {
status = "okay";
};
&ohci2 {
status = "okay";
};
&ohci3 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};
&usb_otg {
status = "okay";
dr_mode = "peripheral";
};
&usbphy {
status = "okay";
};

86
arch/arm/dts/sun8i-h3.dtsi
View file

@ -47,19 +47,19 @@
compatible = "operating-points-v2";
opp-shared;
opp@648000000 {
opp-648000000 {
opp-hz = /bits/ 64 <648000000>;
opp-microvolt = <1040000 1040000 1300000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp@816000000 {
opp-816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <1100000 1100000 1300000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp@1008000000 {
opp-1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <1200000 1200000 1300000>;
clock-latency-ns = <244144>; /* 8 32k periods */
@ -80,7 +80,7 @@
#cooling-cells = <2>;
};
cpu@1 {
cpu1: cpu@1 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <1>;
@ -90,7 +90,7 @@
#cooling-cells = <2>;
};
cpu@2 {
cpu2: cpu@2 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <2>;
@ -100,7 +100,7 @@
#cooling-cells = <2>;
};
cpu@3 {
cpu3: cpu@3 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <3>;
@ -111,6 +111,15 @@
};
};
pmu {
compatible = "arm,cortex-a7-pmu";
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
@ -120,9 +129,22 @@
};
soc {
system-control@1c00000 {
deinterlace: deinterlace@1400000 {
compatible = "allwinner,sun8i-h3-deinterlace";
reg = <0x01400000 0x20000>;
clocks = <&ccu CLK_BUS_DEINTERLACE>,
<&ccu CLK_DEINTERLACE>,
<&ccu CLK_DRAM_DEINTERLACE>;
clock-names = "bus", "mod", "ram";
resets = <&ccu RST_BUS_DEINTERLACE>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
interconnects = <&mbus 9>;
interconnect-names = "dma-mem";
};
syscon: system-control@1c00000 {
compatible = "allwinner,sun8i-h3-system-control";
reg = <0x01c00000 0x30>;
reg = <0x01c00000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@ -142,6 +164,26 @@
};
};
video-codec@1c0e000 {
compatible = "allwinner,sun8i-h3-video-engine";
reg = <0x01c0e000 0x1000>;
clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
<&ccu CLK_DRAM_VE>;
clock-names = "ahb", "mod", "ram";
resets = <&ccu RST_BUS_VE>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
allwinner,sram = <&ve_sram 1>;
};
crypto: crypto@1c15000 {
compatible = "allwinner,sun8i-h3-crypto";
reg = <0x01c15000 0x1000>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
clock-names = "bus", "mod";
resets = <&ccu RST_BUS_CE>;
};
mali: gpu@1c40000 {
compatible = "allwinner,sun8i-h3-mali", "arm,mali-400";
reg = <0x01c40000 0x10000>;
@ -166,6 +208,26 @@
assigned-clocks = <&ccu CLK_GPU>;
assigned-clock-rates = <384000000>;
};
ths: thermal-sensor@1c25000 {
compatible = "allwinner,sun8i-h3-ths";
reg = <0x01c25000 0x400>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
resets = <&ccu RST_BUS_THS>;
clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
clock-names = "bus", "mod";
nvmem-cells = <&ths_calibration>;
nvmem-cell-names = "calibration";
#thermal-sensor-cells = <0>;
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 0>;
};
};
};
@ -216,3 +278,11 @@
&pio {
compatible = "allwinner,sun8i-h3-pinctrl";
};
&rtc {
compatible = "allwinner,sun8i-h3-rtc";
};
&sid {
compatible = "allwinner,sun8i-h3-sid";
};

30
arch/arm/dts/sunxi-bananapi-m2-plus-v1.2.dtsi Normal file
View file

@ -0,0 +1,30 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
*/
#include "sunxi-bananapi-m2-plus.dtsi"
/ {
/*
* Bananapi M2+ v1.2 uses a GPIO line to change the effective
* resistance on the CPU regulator's feedback pin.
*/
reg_vdd_cpux: vdd-cpux {
compatible = "regulator-gpio";
regulator-name = "vdd-cpux";
regulator-type = "voltage";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-ramp-delay = <50>; /* 4ms */
gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */
gpios-states = <0x1>;
states = <1100000 0>, <1300000 1>;
};
};
&cpu0 {
cpu-supply = <&reg_vdd_cpux>;
};

7
arch/arm/dts/sunxi-bananapi-m2-plus.dtsi
View file

@ -69,7 +69,6 @@
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pwr_led {
label = "bananapi-m2-plus:red:pwr";
@ -80,7 +79,6 @@
gpio_keys {
compatible = "gpio-keys";
pinctrl-names = "default";
sw4 {
label = "power";
@ -101,7 +99,6 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
clocks = <&rtc 1>;
clock-names = "ext_clock";
@ -153,7 +150,7 @@
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
@ -210,7 +207,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};

170
arch/arm/dts/sunxi-h3-h5-emlid-neutis.dtsi Normal file
View file

@ -0,0 +1,170 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* DTSI for Emlid Neutis SoMs.
*
* Copyright (C) 2019 Georgii Staroselskii <georgii.staroselskii@emlid.com>
*/
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */
post-power-on-delay-ms = <200>;
clocks = <&rtc 1>;
clock-names = "ext_clock";
};
};
&cpu0 {
cpu-supply = <&vdd_cpux>;
};
&reg_usb0_vbus {
gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
status = "okay";
};
&de {
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&ohci2 {
status = "okay";
};
&ohci3 {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&ehci2 {
status = "okay";
};
&ehci3 {
status = "okay";
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
};
&mmc1 {
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&r_pio>;
interrupts = <0 5 IRQ_TYPE_LEVEL_LOW>; /* PL5 */
interrupt-names = "host-wake";
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_pins>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
uart-has-rtscts;
status = "okay";
bluetooth {
compatible = "brcm,bcm43438-bt";
clocks = <&rtc 1>;
clock-names = "lpo";
vbat-supply = <&reg_vcc3v3>;
vddio-supply = <&reg_vcc3v3>;
shutdown-gpios = <&pio 2 4 GPIO_ACTIVE_HIGH>; /* PC4 */
device-wakeup-gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
};
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "okay";
};
&usbphy {
usb0_id_det-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
usb0_vbus-supply = <&reg_usb0_vbus>;
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&codec {
allwinner,audio-routing =
"Line Out", "LINEOUT",
"LINEIN", "Line In",
"MIC1", "Mic",
"MIC2", "Mic",
"Mic", "MBIAS";
};
&i2c0 {
status = "okay";
};

137
arch/arm/dts/sunxi-h3-h5.dtsi
View file

@ -86,6 +86,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-accuracy = <50000>;
clock-output-names = "osc24M";
};
@ -93,15 +94,8 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "osc32k";
};
iosc: internal-osc-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <16000000>;
clock-accuracy = <300000000>;
clock-output-names = "iosc";
clock-accuracy = <50000>;
clock-output-names = "ext_osc32k";
};
};
@ -115,15 +109,16 @@
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
dma-ranges;
ranges;
display_clocks: clock@1000000 {
/* compatible is in per SoC .dtsi file */
reg = <0x01000000 0x100000>;
clocks = <&ccu CLK_DE>,
<&ccu CLK_BUS_DE>;
clock-names = "mod",
"bus";
clocks = <&ccu CLK_BUS_DE>,
<&ccu CLK_DE>;
clock-names = "bus",
"mod";
resets = <&ccu RST_BUS_DE>;
#clock-cells = <1>;
#reset-cells = <1>;
@ -152,12 +147,6 @@
};
};
syscon: syscon@1c00000 {
compatible = "allwinner,sun8i-h3-system-controller",
"syscon";
reg = <0x01c00000 0x1000>;
};
dma: dma-controller@1c02000 {
compatible = "allwinner,sun8i-h3-dma";
reg = <0x01c02000 0x1000>;
@ -239,6 +228,17 @@
#size-cells = <0>;
};
sid: eeprom@1c14000 {
/* compatible is in per SoC .dtsi file */
reg = <0x1c14000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
ths_calibration: thermal-sensor-calibration@34 {
reg = <0x34 4>;
};
};
usb_otg: usb@1c19000 {
compatible = "allwinner,sun8i-h3-musb";
reg = <0x01c19000 0x400>;
@ -249,6 +249,7 @@
phys = <&usbphy 0>;
phy-names = "usb";
extcon = <&usbphy 0>;
dr_mode = "otg";
status = "disabled";
};
@ -375,7 +376,7 @@
ccu: clock@1c20000 {
/* compatible is in per SoC .dtsi file */
reg = <0x01c20000 0x400>;
clocks = <&osc24M>, <&osc32k>;
clocks = <&osc24M>, <&rtc 0>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
@ -386,14 +387,21 @@
reg = <0x01c20800 0x400>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
interrupt-controller;
#interrupt-cells = <3>;
emac_rgmii_pins: emac0 {
csi_pins: csi-pins {
pins = "PE0", "PE2", "PE3", "PE4", "PE5",
"PE6", "PE7", "PE8", "PE9", "PE10",
"PE11";
function = "csi";
};
emac_rgmii_pins: emac-rgmii-pins {
pins = "PD0", "PD1", "PD2", "PD3", "PD4",
"PD5", "PD7", "PD8", "PD9", "PD10",
"PD12", "PD13", "PD15", "PD16", "PD17";
@ -401,22 +409,22 @@
drive-strength = <40>;
};
i2c0_pins: i2c0 {
i2c0_pins: i2c0-pins {
pins = "PA11", "PA12";
function = "i2c0";
};
i2c1_pins: i2c1 {
i2c1_pins: i2c1-pins {
pins = "PA18", "PA19";
function = "i2c1";
};
i2c2_pins: i2c2 {
i2c2_pins: i2c2-pins {
pins = "PE12", "PE13";
function = "i2c2";
};
mmc0_pins: mmc0 {
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
function = "mmc0";
@ -424,7 +432,7 @@
bias-pull-up;
};
mmc1_pins: mmc1 {
mmc1_pins: mmc1-pins {
pins = "PG0", "PG1", "PG2", "PG3",
"PG4", "PG5";
function = "mmc1";
@ -432,7 +440,7 @@
bias-pull-up;
};
mmc2_8bit_pins: mmc2_8bit {
mmc2_8bit_pins: mmc2-8bit-pins {
pins = "PC5", "PC6", "PC8",
"PC9", "PC10", "PC11",
"PC12", "PC13", "PC14",
@ -442,54 +450,59 @@
bias-pull-up;
};
spdif_tx_pins_a: spdif {
spdif_tx_pin: spdif-tx-pin {
pins = "PA17";
function = "spdif";
};
spi0_pins: spi0 {
spi0_pins: spi0-pins {
pins = "PC0", "PC1", "PC2", "PC3";
function = "spi0";
};
spi1_pins: spi1 {
spi1_pins: spi1-pins {
pins = "PA15", "PA16", "PA14", "PA13";
function = "spi1";
};
uart0_pins_a: uart0 {
uart0_pa_pins: uart0-pa-pins {
pins = "PA4", "PA5";
function = "uart0";
};
uart1_pins: uart1 {
uart1_pins: uart1-pins {
pins = "PG6", "PG7";
function = "uart1";
};
uart1_rts_cts_pins: uart1_rts_cts {
uart1_rts_cts_pins: uart1-rts-cts-pins {
pins = "PG8", "PG9";
function = "uart1";
};
uart2_pins: uart2 {
uart2_pins: uart2-pins {
pins = "PA0", "PA1";
function = "uart2";
};
uart3_pins: uart3 {
uart2_rts_cts_pins: uart2-rts-cts-pins {
pins = "PA2", "PA3";
function = "uart2";
};
uart3_pins: uart3-pins {
pins = "PA13", "PA14";
function = "uart3";
};
uart3_rts_cts_pins: uart3_rts_cts {
uart3_rts_cts_pins: uart3-rts-cts-pins {
pins = "PA15", "PA16";
function = "uart3";
};
};
timer@1c20c00 {
compatible = "allwinner,sun4i-a10-timer";
compatible = "allwinner,sun8i-a23-timer";
reg = <0x01c20c00 0xa0>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
@ -543,6 +556,14 @@
};
};
mbus: dram-controller@1c62000 {
compatible = "allwinner,sun8i-h3-mbus";
reg = <0x01c62000 0x1000>;
clocks = <&ccu CLK_MBUS>;
dma-ranges = <0x00000000 0x40000000 0xc0000000>;
#interconnect-cells = <1>;
};
spi0: spi@1c68000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x01c68000 0x1000>;
@ -579,6 +600,7 @@
compatible = "allwinner,sun6i-a31-wdt";
reg = <0x01c20ca0 0x20>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&osc24M>;
};
spdif: spdif@1c21000 {
@ -744,6 +766,20 @@
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
csi: camera@1cb0000 {
compatible = "allwinner,sun8i-h3-csi";
reg = <0x01cb0000 0x1000>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CSI>,
<&ccu CLK_CSI_SCLK>,
<&ccu CLK_DRAM_CSI>;
clock-names = "bus", "mod", "ram";
resets = <&ccu RST_BUS_CSI>;
pinctrl-names = "default";
pinctrl-0 = <&csi_pins>;
status = "disabled";
};
hdmi: hdmi@1ee0000 {
compatible = "allwinner,sun8i-h3-dw-hdmi",
"allwinner,sun8i-a83t-dw-hdmi";
@ -756,7 +792,7 @@
resets = <&ccu RST_BUS_HDMI1>;
reset-names = "ctrl";
phys = <&hdmi_phy>;
phy-names = "hdmi-phy";
phy-names = "phy";
status = "disabled";
ports {
@ -781,7 +817,7 @@
compatible = "allwinner,sun8i-h3-hdmi-phy";
reg = <0x01ef0000 0x10000>;
clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
<&ccu 6>;
<&ccu CLK_PLL_VIDEO>;
clock-names = "bus", "mod", "pll-0";
resets = <&ccu RST_BUS_HDMI0>;
reset-names = "phy";
@ -789,17 +825,20 @@
};
rtc: rtc@1f00000 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f00000 0x54>;
/* compatible is in per SoC .dtsi file */
reg = <0x01f00000 0x400>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clock-output-names = "osc32k", "osc32k-out", "iosc";
clocks = <&osc32k>;
#clock-cells = <1>;
};
r_ccu: clock@1f01400 {
compatible = "allwinner,sun8i-h3-r-ccu";
reg = <0x01f01400 0x100>;
clocks = <&osc24M>, <&osc32k>, <&iosc>,
<&ccu 9>;
clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
<&ccu CLK_PLL_PERIPH0>;
clock-names = "hosc", "losc", "iosc", "pll-periph";
#clock-cells = <1>;
#reset-cells = <1>;
@ -811,12 +850,12 @@
};
ir: ir@1f02000 {
compatible = "allwinner,sun5i-a13-ir";
compatible = "allwinner,sun6i-a31-ir";
clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>;
clock-names = "apb", "ir";
resets = <&r_ccu RST_APB0_IR>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x01f02000 0x40>;
reg = <0x01f02000 0x400>;
status = "disabled";
};
@ -837,19 +876,19 @@
compatible = "allwinner,sun8i-h3-r-pinctrl";
reg = <0x01f02c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
interrupt-controller;
#interrupt-cells = <3>;
ir_pins_a: ir {
r_ir_rx_pin: r-ir-rx-pin {
pins = "PL11";
function = "s_cir_rx";
};
r_i2c_pins: r-i2c {
r_i2c_pins: r-i2c-pins {
pins = "PL0", "PL1";
function = "s_i2c";
};

65
arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi
View file

@ -16,6 +16,17 @@
stdout-path = "serial0:115200n8";
};
connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
leds {
compatible = "gpio-leds";
@ -44,8 +55,8 @@
reg_vcc1v2: vcc1v2 {
compatible = "regulator-fixed";
regulator-name = "vcc1v2";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&reg_vcc5v0>;
@ -95,8 +106,8 @@
reg_vdd_cpux: vdd-cpux {
compatible = "regulator-fixed";
regulator-name = "vdd-cpux";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&reg_vcc5v0>;
@ -105,6 +116,26 @@
};
};
&codec {
allwinner,audio-routing =
"Line Out", "LINEOUT",
"MIC1", "Mic",
"Mic", "MBIAS";
status = "okay";
};
&cpu0 {
cpu-supply = <&reg_vdd_cpux>;
};
&de {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
@ -124,17 +155,26 @@
status = "okay";
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
&mmc0 {
vmmc-supply = <&reg_vcc_io>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
cd-inverted;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
};
@ -147,6 +187,10 @@
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
@ -161,7 +205,12 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "host";
status = "okay";
};

180
arch/arm/dts/sunxi-libretech-all-h3-it.dtsi Normal file
View file

@ -0,0 +1,180 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2019 Chen-Yu Tsai <wens@csie.org>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
serial0 = &uart0;
spi0 = &spi0;
};
chosen {
stdout-path = "serial0:115200n8";
};
connector {
compatible = "hdmi-connector";
type = "d";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
leds {
compatible = "gpio-leds";
status_led {
label = "librecomputer:blue:status";
gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */
};
};
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&reg_vcc5v0>;
};
/* This represents the board's 5V input */
reg_vcc5v0: vcc5v0 {
compatible = "regulator-fixed";
regulator-name = "vcc5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
reg_vcc_dram: vcc-dram {
compatible = "regulator-fixed";
regulator-name = "vcc-dram";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&reg_vcc5v0>;
gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
enable-active-high;
};
reg_vcc_io: vcc-io {
compatible = "regulator-fixed";
regulator-name = "vcc-io";
/* This is simply a MOSFET switch */
regulator-always-on;
regulator-boot-on;
vin-supply = <&reg_vcc3v3>;
gpio = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
};
reg_vcc_usbwifi: vcc-usbwifi {
compatible = "regulator-fixed";
regulator-name = "vcc-usbwifi";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&reg_vcc5v0>;
gpio = <&pio 6 4 GPIO_ACTIVE_HIGH>; /* PG4 */
enable-active-high;
};
reg_vdd_cpux: vdd-cpux {
compatible = "regulator-fixed";
regulator-name = "vdd-cpux";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&reg_vcc5v0>;
gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
enable-active-high;
};
};
&cpu0 {
cpu-supply = <&reg_vdd_cpux>;
};
&cpu1 {
cpu-supply = <&reg_vdd_cpux>;
};
&cpu2 {
cpu-supply = <&reg_vdd_cpux>;
};
&cpu3 {
cpu-supply = <&reg_vdd_cpux>;
};
&de {
status = "okay";
};
&ehci1 {
status = "okay";
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc_io>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
};
&pio {
vcc-pa-supply = <&reg_vcc_io>;
vcc-pc-supply = <&reg_vcc_io>;
vcc-pd-supply = <&reg_vcc_io>;
vcc-pe-supply = <&reg_vcc_io>;
vcc-pf-supply = <&reg_vcc_io>;
vcc-pg-supply = <&reg_vcc_io>;
};
&r_pio {
vcc-pl-supply = <&reg_vcc3v3>;
};
&spi0 {
status = "okay";
spiflash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "peripheral";
status = "okay";
};
&usbphy {
usb1_vbus-supply = <&reg_vcc_usbwifi>;
status = "okay";
};

11
include/dt-bindings/clock/sun8i-h3-ccu.h
View file

@ -43,6 +43,10 @@
#ifndef _DT_BINDINGS_CLK_SUN8I_H3_H_
#define _DT_BINDINGS_CLK_SUN8I_H3_H_
#define CLK_PLL_VIDEO 6
#define CLK_PLL_PERIPH0 9
#define CLK_CPUX 14
#define CLK_BUS_CE 20
@ -91,7 +95,7 @@
#define CLK_BUS_UART1 63
#define CLK_BUS_UART2 64
#define CLK_BUS_UART3 65
#define CLK_BUS_SCR 66
#define CLK_BUS_SCR0 66
#define CLK_BUS_EPHY 67
#define CLK_BUS_DBG 68
@ -139,7 +143,10 @@
#define CLK_AVS 110
#define CLK_HDMI 111
#define CLK_HDMI_DDC 112
#define CLK_MBUS 113
#define CLK_GPU 114
/* New clocks imported in H5 */
#define CLK_BUS_SCR1 115
#endif /* _DT_BINDINGS_CLK_SUN8I_H3_H_ */

5
include/dt-bindings/reset/sun8i-h3-ccu.h
View file

@ -98,6 +98,9 @@
#define RST_BUS_UART1 50
#define RST_BUS_UART2 51
#define RST_BUS_UART3 52
#define RST_BUS_SCR 53
#define RST_BUS_SCR0 53
/* New resets imported in H5 */
#define RST_BUS_SCR1 54
#endif /* _DT_BINDINGS_RST_SUN8I_H3_H_ */