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mips: bmips: add bcm6345-clk driver support for BCM6328
This driver can control up to 32 clocks. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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2 changed files with 32 additions and 0 deletions
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <dt-bindings/clock/bcm6328-clock.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "skeleton.dtsi"
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clock-frequency = <50000000>;
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u-boot,dm-pre-reloc;
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};
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periph_clk: periph-clk {
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compatible = "brcm,bcm6345-clk";
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reg = <0x10000004 0x4>;
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#clock-cells = <1>;
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};
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};
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ubus {
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25
include/dt-bindings/clock/bcm6328-clock.h
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25
include/dt-bindings/clock/bcm6328-clock.h
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/*
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* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
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*
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* Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __DT_BINDINGS_CLOCK_BCM6328_H
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#define __DT_BINDINGS_CLOCK_BCM6328_H
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#define BCM6328_CLK_PHYMIPS 0
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#define BCM6328_CLK_ADSL_QPROC 1
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#define BCM6328_CLK_ADSL_AFE 2
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#define BCM6328_CLK_ADSL 3
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#define BCM6328_CLK_MIPS 4
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#define BCM6328_CLK_SAR 5
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#define BCM6328_CLK_PCM 6
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#define BCM6328_CLK_USBD 7
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#define BCM6328_CLK_USBH 8
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#define BCM6328_CLK_HSSPI 9
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#define BCM6328_CLK_PCIE 10
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#define BCM6328_CLK_ROBOSW 11
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#endif /* __DT_BINDINGS_CLOCK_BCM6328_H */
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