Commit graph

822 commits

Author SHA1 Message Date
Timur Tabi
82c9dfdc20 powerpc/fsl: add 'pixis_reset dump' command
Add the 'pixis_reset dump' command, which displays the contents of the PIXIS
registers.  This command is only available if DEBUG is defined.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-28 22:09:23 -05:00
Timur Tabi
eb0d47e181 powerpc/86xx: remove empty board_early_init_f()
Remove an empty board_early_init_f() from the MPC8641HPCN board.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-28 22:08:16 -05:00
Timur Tabi
ba8e76bd49 powerpc: use 'video-mode' environment variable to configure DIU
Use the 'video-mode' environment variable (for Freescale chips that have a
DIU display controller) to designate the full video configuration.  Previously,
the DIU driver used the 'monitor' variable, and it was used only to determine
the output video port.

The old definition of the "monitor" environment variable only determines
which video port to use for output.  This variable was set to a number (0,
1, or sometimes 2) to specify a DVI, LVDS, or Dual-LVDS port.  The
resolution was hard-coded into board-specific code.  The Linux command-line
arguments needed to be hard-coded to the proper video definition string.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-04-28 21:31:16 +02:00
Kumar Gala
e02aea61cb powerpc: Add P3041DS/P5020DS board support (uses corenet_ds code)
The P3041DS & P5020DS boards are almost identical (except for the
processor in them).  Additionally they are based on the P4080DS board
design so we use the some board code for all 3 boards.

Some ngPIXIS (FPGA) registers where reserved on P4080DS and now have
meaning on P3041DS/P5020DS.  We utilize some of these for SERDES clock
configuration.

Additionally, the P3041DS/P5020DS support NAND.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-27 22:29:04 -05:00
Ramneek Mehresh
2bad42a0c8 powerpc/85xx: Add support for 2nd USB controller on p1_p2_rdb
Second USB controller only works for SPI and SD boot because of pin muxing

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
2011-04-27 22:29:03 -05:00
Fabio Estevam
e9e0790cff MX31: mx31pdk: Make the board name simpler.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-04-27 19:38:05 +02:00
Stefano Babic
8627111543 IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers
As exception among the i.MX processors, the i.MX31 has headers
without general names (mx31-regs.h, mx31.h instead of imx-regs.h and
clock.h). This requires several nasty #ifdef in the drivers to
include the correct header. The patch cleans up the driver and
renames the header files as for the other i.MX processors.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-04-27 19:38:05 +02:00
Liu Hui-R64343
ec665d75a7 MX53: drop config.mk from mx53evk
The config.mk file in board directory is now obsolete and
should be removed. Add option for the IMX image into
boards.cfg

Signed-off-by: Jason Liu <r64343@freescale.com>
2011-04-27 19:38:05 +02:00
Stefano Babic
c7bdcb61f3 MX51: drop config.mk from mx51evk
The config.mk file in board directory is now obsolete and
should be removed. Add option for the IMX image into
boards.cfg

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-04-27 19:38:04 +02:00
Andy Fleming
865ff85640 fsl: Change fsl_phy_enet_if to phy_interface_t
The fsl_phy_enet_if enum was, essentially, the phy_interface_t enum.
This meant that drivers which used fsl_phy_enet_if to deal with
PHY interfaces would have to convert between the two (or we would have
to have them mirror each other, and deal with the ensuing maintenance
headache). Instead, we switch all clients of fsl_phy_enet_if over to
phy_interface_t, which should become the standard, anyway.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-20 15:09:35 -05:00
Andy Fleming
063c12633d tsec: Convert tsec to use PHY Lib
This converts tsec to use the new PHY Lib.  All of the old PHY support
is ripped out.  The old MDIO driver is split off, and placed in
fsl_mdio.c.  The initialization is modified to initialize the MDIO
driver as well.  The powerpc config file is modified to configure PHYLIB
if TSEC_ENET is configured.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-20 15:09:34 -05:00
Shaohui Xie
2a9fab82b7 powerpc/85xx: Add PBL boot from SPI flash support on P4080DS
PBL(pre-boot loader): SPI flash used as RCW(Reset Configuration Word) and
PBI(pre-boot initialization) source, CPC(CoreNet Platform Cache) used as
1M SRAM where PBL will copy whole U-BOOT image to, U-boot can boot from
CPC after PBL completes RCW and PBI phases.

Signed-off-by: Chunhe Lan <b25806@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-10 11:17:55 -05:00
Jiang Yutang
b93f81a418 powerpc/85xx: Add support usb2/etsec and tdm/audio pin multiplex on P1022DS
For soc which have pin multiplex relation, some of them can't enable
simultaneously. This patch add environment var 'hwconfig' content
defination for them. you can enable some one function by setting
environment var 'hwconfig' content and reset board. Detail setting
please refer doc/README.p1022ds

Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-10 11:17:55 -05:00
Jerry Huang
1ac63e4094 powerpc/85xx: Enable eSDHC boot support on P2020 DS
We implement our own mmc_get_env_addr since the environment variables are
written to just after the u-boot image on SDCard, so we must read the MBR
to get the start address and code length of the u-boot image, then
calculate the address of the env.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 22:26:32 -05:00
Jiang Yutang
9899ac1951 powerpc/85xx: Add 36-bit address map support to P1022DS
Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:43 -05:00
Poonam Aggrwal
e0082f7cb4 powerpc/85xx: Add 36-bit physical addressing support for P1_P2_RDB
Add support for 36-bit address map for NOR, SD, and SPI boot cfgs.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <priyanka.jain@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Poonam Aggrwal
66c74fca18 powerpc/85xx: Optimized DDR settings for 800MT/s on P1/P2 RDB
Changed the following DDR timing parameters for 800Mt/s:
tRRT    BL/2+1 to  BL/2
tWWT    BL/2+1 to  BL/2
tWRT    BL/2+1 to  BL/2
tRWT    BL/2+1 to  BL/2
REFINT  6500ns to  7800ns

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Poonam Aggrwal
3313b20b95 powerpc/85xx: Removed P1/P2 RDB RevB support
RevB boards never really made it outside of Freescale and have been
replaced with RevC & RevD which had various board bug fixes.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Priyanka Jain
cac29f25fd powerpc/85xx: Read board switch settings on p1_p2_rdb
PCA9557 is parallel I/O expansion device on I2C bus which stores various
board switch settings like NOR Flash-Bank selection, SD Data width.

On board:
switch SW5[6] is to select width for eSDHC
        ON  - 4-bit [Enable eSPI]
        OFF - 8-bit [Disable eSPI]

switch SW4[8] is to select NOR Flash Bank for Booting
        OFF - Primary Bank
        ON  - Secondary Bank

Read board switch settings on p1_p2_rdb and configure corresponding
eSDHC width.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Priyanka Jain
0c871e952e powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdb
Using DDR as RAMBOOT base instead of L2SRAM for SDCard and SPI Flash
boot loaders because:
- P1_P2_RDB boards have soldered DDR so no need for SPD
- Also P102x has 256K L2 cache size so becomes a limiting factor for
  size of image that could be loaded in SRAM mode and would require three
  stage boot loader (TPL).

Changes done:
 1. CONFIG_SYS_TEXT_BASE to 0x11000000
 2. CONFIG_RESET_VECTOR_ADDRESS to 0x1107fffc

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Timur Tabi
f098c9c880 fsl: obsolete NXID v0 EEPROMs, automatically upgrade them to NXID v1
The NXID EEPROM format comes in two versions, v0 and v1.  The only
difference is in the number of MAC addresses that can be stored.  NXID v0
supports eight addresses, and NXID v1 supports 23.

Rather than allow a board to choose which version to support, NXID v0 is
now considered deprecated.  The EEPROM code is updated to support only
NXID v1, but it can still read EEPROMs formatted with v0.  In these cases,
the EEPROM data is loaded and the CRC is verified, but the data is stored
into a v1 data structure.  If the EEPROM data is written back, it is
written in v1 format.  This allows existing v0-formatted EEPROMs to
continue providing MAC addresses, but any changes to the data will force
an upgrade to the v1 format, while retaining all data.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
York Sun
dea8bd627c powerpc/85xx: Update fixed DDR3 timing table for P4080DS
Most of time U-boot doesn't get an exact clock number. For example, clock
900MHz may be detected as 899.99MHz. 800MHz could be 799.99MHz. Update the
table to align the desired clocks in the middle.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Kumar Gala
c39f44dc6f powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from board
Move fsl_ddr_get_spd into common mpc8xxx/ddr/main.c as most boards
pretty much do the same thing.  The only variations are in how many
controllers or DIMMs per controller exist.  To make this work we
standardize on the names of the SPD_EEPROM_ADDRESS defines based on the
use case of the board.

We allow boards to override get_spd to either do board specific fixups
to the SPD data or deal with any unique behavior of how the SPD eeproms
are wired up.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Kumar Gala
5df4b0ad0d powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq()
Every 85xx board implements fsl_ddr_get_mem_data_rate via get_ddr_freq()
and every 86xx board uses get_bus_freq().  If implement get_ddr_freq()
as a static inline to call get_bus_freq() we can remove
fsl_ddr_get_mem_data_rate altogether and just call get_ddr_freq()
directly.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Kumar Gala
00203c6464 powerpc/85xx: Remove config.mk for nand linker script
Move the include of mpc85xx/u-boot-nand.lds to utilize
CONFIG_SYS_LDSCRIPT rather than having an explicit config.mk

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Kumar Gala
561e710a97 powerpc: Move cpu specific lmb reserve to arch_lmb_reserve
We've been utilizing board_lmb_reserve to reserve the boot page for MP
systems.  We can just move this into arch_lmb_reserve for 85xx & 86xx
systems rather than duplicating in each board port.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Jerry Huang
9c4d8767ed powerpc/85xx: Add eSDHC support on P2020DS
We enable SDHC_CD and SDHC_WP signals (pin muxed with GPIO8 & GPIO9
respectively).

We enable EXT2, FAT, and parition support for both MMC & USB configs.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Jin Qing <b24347@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Kumar Gala
f0f899432e powerpc/85xx: Declare fsl_ddr_set_memctl_regs in <asm/fsl_ddr_sdram.h>
Remove declerations of fsl_ddr_set_memctl_regs in board files with and
place it into a common header.

Based on patch from Poonam Aggrwal.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Kumar Gala
5cfbc458d4 powerpc/85xx: Remove DATARATE_*_MHZ defines in static ddr init
Rather than having #defines DATARATE_*_MHZ, lets just match what we do on
the SPD code and convert the DDR frequency into MHZ and just compare
with a constant.

Based on patch from Poonam Aggrwal.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Timur Tabi
aa8d3fb8f4 p1022ds: allow for board-specific ngPIXIS functions
The ngPIXIS is an FPGA used on the reference boards of most Freescale PowerPC
SOCs.  Although programming the ngPIXIS is mostly standard on all boards that
have it, the P1022DS is unique in that the ngPIXIS needs to be programmed in
"indirect" mode whenever the video display (DIU) is active.

To support indirect mode, and to make it easier to support other quirks on
future reference boards, the low-level ngPIXIS functions are all marked as
weak, so that board-specific code can override any of them.  We take advantage
of this feature on the P1022DS, so that we can properly reset the board when
the DIU is active.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Wolfgang Denk
c04bf5e9a4 Merge branch 'master' of git://git.denx.de/u-boot-arm 2011-03-27 21:20:29 +02:00
Po-Yu Chuang
44c6e6591c rename _end to __bss_end__
Currently, _end is used for end of BSS section.  We want _end to mean
end of u-boot image, so we rename _end to __bss_end__ first.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
2011-03-27 19:18:37 +02:00
Prabhakar Kushwaha
b0c5ceb305 powerpc/85xx: Fix PCI memory map setup on P1_P2_RDB
Update the PCIe address map to match standard FSL memory map.
Additionally, fix the TLBs so the cover the PCIe address space properly
so cards plugged in like an e1000 work correctly.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-24 09:46:21 -05:00
York Sun
634bc55429 powerpc/mpc8572ds: revise board specific timing for dual-rank DIMMs
Tested all possible values for clk_adjust and write_data_delay for dual
rank UDIMM and RDIMM to revise the tables.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-24 09:20:50 -05:00
York Sun
d89a976c13 powerpc/corenet_ds: revise platform dependent parameters
This patch revised clk_adjust and wrlvl_start timings for corenet_ds, based
on testing on Virtium VL33B5163F-K9S and Kingston KVR1333D3Q8R9S/4G.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-05 10:13:50 -06:00
York Sun
59a4089f82 corenet_ds: pick the middle value for all tested timing parameters
For DDR3 controller, the clk_adjust and wrlvl_start are platform-dependent.
The best values should be picked up from the middle of all working
combinations. This patch updates the table with confirmed values tested on
Hynix dual-rank UDIMMs (HMT125U7BFR8C-H9) at 1300MT/s, 1200MT/s, 1000MT/s,
900MT/s, 800MT/s and Kingston quad-rank RDIMMs (KVR1333D3Q8R9S/4G) at 1300MT/s,
1200MT/s, 1000MT/s.

Signed-off-by: York Sun <yorksun@freescale.com>
2011-03-05 10:13:50 -06:00
Fabio Estevam
9b6442f99c mx31pdk: Make the full boot log visible
Use board_early_init_f so that the full boot log output can be displayed.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-02-21 08:30:54 +01:00
Fabio Estevam
ed3df72db1 mx31pdk: Use the new relocation scheme
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-02-21 08:30:54 +01:00
Timur Tabi
3fee334c85 fsl: update CRC after setting EEPROM identifier
The "mac id" command is used to initialize the EEPROM data to a specific
format, but it was not updating the CRC.  This didn't cause any real
problems, because writing the data to the EEPROM will always update the
CRC anyway, but it did result in a bogus CRC warning.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-09 23:30:39 -06:00
Stefano Babic
eae4988b45 Add support for Freescale's mx35pdk board.
The patch adds suupport for the Freescale's mx35pdk board
(known as well as mx35_3stack).

The board boots from the NOR flash. Following devices
are supported:
 - two ethernet devices (FEC and SMC911x on debug board)
 - I2C
 - PMIC (MC13892) via I2C interface
 - UART
 - NOR flash (64MB)
 - NAND flash (2GB)
 - basic access to mc9sdz60 registers via I2C interface

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-02-02 00:54:43 +01:00
Marek Vasut
c4a3c7442b MX51EVK: Use SWx macros in PMIC init
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-02-02 00:54:42 +01:00
Liu Hui-R64343
94391fbcee MX5:MX53: add initial support for MX53EVK board
Add initial support for MX53EVK board support.
FEC, SD/MMC, UART, I2C, have been supported.

Signed-off-by: Jason Liu <r64343@freescale.com>
2011-02-02 00:54:42 +01:00
Liu Hui-R64343
877eb0f915 MX51EVK: UART does not print out the early information
The early bootup information is not print out due to
the UART pin iomux not set up correctly before board_init

Add the board_early_init_f function and enable the
CONFIG_BOARD_EARLY_INIT_F. Move the UART pin setting
from board_init to board_early_init_f function.

This patch also move the FEC pin iomux setup to the
board_early_init_f.

Signed-off-by: Jason Liu <r64343@freescale.com>
2011-02-02 00:54:41 +01:00
Prabhakar Kushwaha
b707090432 ppc/85xx: Fix compile err when PCI disabled on P1_P2_RDB
u-boot cannot be compiled after disabling CONFIG_PCI.

Place PCI related codes under #ifdef CONFIG_PCI

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:24 -06:00
York Sun
6b06d7dc07 corenet_ds: Extend board specific parameters
Extend board specific parameters to include cpo, write leveling override
Extend write leveling sample to 0xf
Adding rcw overrid for quad-rank RDIMMs

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:24 -06:00
Kumar Gala
7a577fda22 powerpc/85xx: Move RESET_VECTOR_ADDRESS into config.h
Rather than defining it config.mk we can set it in config.h and remove
config.mk from several boards that don't need it.

We mimic what 4xx does and introduce CONFIG_RESET_VECTOR_ADDRESS for
config.h to set.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
2011-01-19 22:58:23 -06:00
Kumar Gala
3dbd5d7d7e powerpc/8xxx: Move fsl_is_spd() into generic 8xxx ddr code
Move the parsing of hwconfig to determine if to use spd into common code
so we can share it across all boards instead of duplicating it
everywhere.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:22 -06:00
Kumar Gala
1b77ca8afa powerpc/86xx: Convert MPC8641HPCN to use common SRIO init code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:21 -06:00
Kumar Gala
e5fe96b1ab powerpc/85xx: Convert MPC8569MDS to use common SRIO init code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:21 -06:00
Kumar Gala
5f7bbd13a8 powerpc/85xx: Convert MPC8568MDS to use common SRIO init code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:21 -06:00
Kumar Gala
8b47d7ec9b powerpc/85xx: Convert MPC8548CDS to use common SRIO init code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:21 -06:00
Kumar Gala
a09b9b68d4 powerpc/8xxx: Refactor SRIO initialization into common code
Moved the SRIO init out of corenet_ds and into common code for
8xxx/QorIQ processors that have SRIO.  We mimic what we do with PCIe
controllers for SRIO.

We utilize the fact that SRIO is over serdes to determine if its
configured or not and thus can setup the LAWs needed for it dynamically.

We additionally update the device tree (to remove the SRIO nodes) if the
board doesn't have SRIO enabled.

Introduced the following standard defines for board config.h:

CONFIG_SYS_SRIO - Chip has SRIO or not
CONFIG_SRIO1 - Board has SRIO 1 port available
CONFIG_SRIO2 - Board has SRIO 2 port available

(where 'n' is the port #)
CONFIG_SYS_SRIOn_MEM_VIRT - virtual address in u-boot
CONFIG_SYS_SRIOn_MEM_PHYS - physical address (for law setup)
CONFIG_SYS_SRIOn_MEM_SIZE - size of window (for law setup)

[ These mimic what we have for PCI and PCIe controllers ]

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
2011-01-14 01:32:21 -06:00
Kumar Gala
e650ae1bb7 powerpc/85xx: Rework corenet_ds pci_init_board to use common FSL PCIe code
Remove duplicated code in corenet_ds boards and utilize the common
fsl_pcie_init_board().

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:21 -06:00
Kumar Gala
b8526212ca powerpc/86xx: Rework MPC8610HPCD pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8610HPCD board and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
06eb4d8c68 powerpc/85xx: Rework P1_P2_RDB pci_init_board to use common FSL PCIe code
Remove duplicated code in P1_P2_RDB boards and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
94f2bc4860 powerpc/85xx: Rework MPC8569MDS pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8569MDS board and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
3f6f9d7641 powerpc/85xx: Rework MPC8568MDS pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8568MDS board and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
f5fa8f3669 powerpc/85xx: Rework MPC8548CDS pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8548CDS board and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
64e55d5ed4 powerpc/86xx: Rework MPC8641HPCN pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8641HPCN board and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
5f7b31b000 powerpc/85xx: Rework MPC8536DS pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8536DS board and utilize the common
fsl_pcie_init_board().

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
64a1686a55 powerpc/85xx: Rework MPC8544DS pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8544DS board and utilize the common
fsl_pcie_init_ctrl().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

We don't use the full fsl_pcie_init_ctrl() since we have to handle PCIE3
specially to setup the additional memory map region and we utilize a
single LAW to cover the controller.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
4d5723da57 powerpc/85xx: Rework P2020DS pci_init_board to use common FSL PCIe code
Remove duplicated code in P2020DS board and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
18ea555130 powerpc/85xx: Rework MPC8572DS pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8572DS board and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Chenhui Zhao <b26998@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Kumar Gala
a4aafcc990 powerpc/fsl-pci: Add generic code to setup PCIe controllers
Since all the PCIe controllers are connected over SERDES on the SoCs we
can utilize is_serdes_configured() to determine if a controller is
enabled.  After which we can setup the ATMUs and LAWs for the controller
in a common fashion and allow board code to specify what the controller
is connected to for reporting reasons.

We also provide a per controller (rather than all) for some systems that
may have special requirements.

Finally, we refactor the code used by the P1022DS to utilize the new
generic code.

Based on patch by: Li Yang <leoli@freescale.com>

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Becky Bruce
7ea3871e06 MPC8xxx DDR: align informational prints
Add spaces to cause the informational prints to line up with
the ones from init_func_ram() in board.c.  Output now looks like
this:

....
DRAM:  Detected 4096 MB of memory
       This U-Boot only supports < 4G of DDR
       You could rebuild it with CONFIG_PHYS_64BIT
       DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off)
....

The prints from lbc_sdram_init() have also been modified to line
line up and changed to start with "LBC SDRAM" instead of the
confusing "SDRAM".

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Becky Bruce
70961ba414 mpc85xx: rename sdram_init() lbc_sdram_init()
sdram_init() is used to initialize sdram on the lbc.  Rename it
accordingly.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Becky Bruce
38dba0c2ff mpc85xx boards: initdram() cleanup/bugfix
Correct initdram to use phys_size_t to represent the size of
dram; instead of changing this all over the place, and correcting
all the other random errors I've noticed, create a
common initdram that is used by all non-corenet 85xx parts.  Most
of the initdram() functions were identical, with 2 common differences:

1) DDR tlbs for the fixed_sdram case were set up in initdram() on
some boards, and were part of the tlb_table on others.  I have
changed them all over to the initdram() method - we shouldn't
be accessing dram before this point so they don't need to be
done sooner, and this seems cleaner.

2) Parts that require the DDR11 erratum workaround had different
implementations - I have adopted the version from the Freescale
errata document.  It also looks like some of the versions were
buggy, and, depending on timing, could have resulted in the
DDR controller being disabled.  This seems bad.

The xpedite boards had a common/fsl_8xxx_ddr.c; with this
change only the 517 board uses this so I have moved the ddr code
into that board's directory in xpedite517x.c

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Kumar Gala
058d7dc7ba powerpc/85xx: Cleanup SGMII detection and reporting
Use new is_serdes_configured to determine if TSECs are in SGMII mode and
report that on the various boards that use or can be configured in SGMII
mode in board_eth_init() instead of in the PCI init code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Kumar Gala
5d27e02c04 powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured
Now that we have serdes support for all 85xx/86xx/Pxxx chips we can
replace the is_fsl_pci_cfg() code with the is_serdes_configured().

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Kumar Gala
cb14e93b55 powerpc/85xx: Add support for booting from NAND on MPC8572DS
Mimic support that exists on MPC8536DS on the MPC8572DS to allow booting
from NAND.

Signed-off-by: Jin Qing <b24347@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:18 -06:00
Mike Frysinger
8ef583a035 miiphy: convert to linux/mii.h
The include/miiphy.h header duplicates a lot of things from linux/mii.h.
So punt all the things that overlap to keep the API simple and to make
merging between U-Boot and Linux simpler.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-09 18:06:50 +01:00
Wolfgang Denk
006915fbb0 Merge branch 'master' of ../master into next 2010-12-16 23:00:53 +01:00
Timur Tabi
fdb9482b42 p1022ds: fix switching of DIU/LBC signals
On the P1022, the pins which drive the video display (DIU) are muxed with the
local bus controller (LBC), so if the DIU is active, the pins need to be
temporarily muxed to LBC whenever accessing NOR flash.

The code which handled this transition is checking and changing the wrong
bits in PMUXCR.

Also add a follow-up read after a write to NOR flash if we're going to
mux back to DIU after the write, as described in the P1022 RM.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-12-13 10:05:51 -06:00
Anatolij Gustschin
14f88c43fc video: move fsl_diu_fb driver to drivers/video
Since the driver is used not only on Freescale boards,
we move it to a common place for video drivers as
suggested by Wolfgang. The patch also cleans up the
top level Makefile.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-12-01 20:48:13 +01:00
Kumar Gala
b194577b29 hwconfig: Fix dummy initialization of {board, cpu}_hwconfig
Since board_hwconfig & cpu_hwconfig are defined as weak and dont have a
default value they will get put into the BSS if they aren't defined
elsewhere.  This is problematic as we try to utilize hwconfig before
we've relocated and thus BSS isn't setup.

Instead of giving dummy values in the board files that utilize this
feature, we can just initialize the variables to an empty string and
thus move them out of the BSS if they aren't defined elsewhere.

Also made board_hwconfig & cpu_hwconfig arrays to reduce size associated
with string pointers vs arrays.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-11-30 22:11:19 +01:00
Mike Frysinger
882b7d726f do_reset: unify duplicate prototypes
The duplication of the do_reset prototype has gotten out of hand,
and they're not all in sync.  Unify them all in command.h.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-11-28 21:47:24 +01:00
Wolfgang Denk
e2c2a95e60 74xx_7xx: Cleanup for partial linking and --gc-sections
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2010-11-27 23:35:12 +01:00
Wolfgang Denk
566d49a3f5 512x: Cleanup for partial linking and --gc-sections
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Timur Tabi <timur@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
2010-11-27 23:35:11 +01:00
Sebastien Carlier
6d8962e814 Switch from archive libraries to partial linking
Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils.  As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".

This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.

The name of each former library archive is preserved except for
extensions which change from ".a" to ".o".  This commit updates
references accordingly where needed, in particular in some linker
scripts.

This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols.  Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.

Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
2010-11-17 21:02:18 +01:00
Peter Tyser
e7060dc570 mpc85xx: Fix SERDES/eTSEC message indentation
Previously some mpc85xx boards printed indented messages such as the
following on bootup:
  printf("    eTSEC4 is in sgmii mode.\n");
  printf("    Serdes2 disalbed\n");

The bootup appearance looks cleaner if the indentation is removed which
aligns these messages with other bootup output.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
CC: galak@kernel.crashing.org
2010-11-14 23:46:44 +01:00
Peter Tyser
8ca78f2c89 fsl: Clean up printing of PCI boot info
Previously boards used a variety of indentations, newline styles, and
colon styles for the PCI information that is printed on bootup.  This
patch unifies the style to look like:

...
NAND:  1024 MiB
PCIE1: connected as Root Complex
           Scanning PCI bus 01
        04  01  8086  1010  0200  00
        04  01  8086  1010  0200  00
        03  00  10b5  8112  0604  00
        02  01  10b5  8518  0604  00
        02  02  10b5  8518  0604  00
        08  00  1957  0040  0b20  00
        07  00  10b5  8518  0604  00
        09  00  10b5  8112  0604  00
        07  01  10b5  8518  0604  00
        07  02  10b5  8518  0604  00
        06  00  10b5  8518  0604  00
        02  03  10b5  8518  0604  00
        01  00  10b5  8518  0604  00
PCIE1: Bus 00 - 0b
PCIE2: connected as Root Complex
           Scanning PCI bus 0d
        0d  00  1957  0040  0b20  00
PCIE2: Bus 0c - 0d
In:    serial
...

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
CC: wd@denx.de
CC: sr@denx.de
CC: galak@kernel.crashing.org
2010-11-14 23:46:42 +01:00
Timur Tabi
46299078e6 powerpc/corenet_ds: display the RCW at boot
Display the 64-byte Reset Configuration Word (RCW) during boot, so that
there's no confusion as to what RCW U-boot is using.

Reset Configuration Word (RCW):
       00000000: 4a500000 00000000 18181818 00008888
       00000010: 28402400 00002000 fe800000 01200000
       00000020: 00000000 00000000 00000000 000b0000
       00000030: 00000000 00000000 00000000 00000000

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-11-12 09:45:16 -06:00
Priyanka Jain
39c2a6eb75 p1_p2_rdb: to set SQW/INT pin of RTC as INT line
SQW/INT pin in RTC can be used for generating square wave(by default) or
as interrupt line.  U-boot is registering this pin for interrupts.
Configuring SQW/INT bit as interrupt line during board initialization
to avoid spurious interrupts generated by square wave.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-11-12 09:45:11 -06:00
Shawn Guo
1ab027cbf6 mx51evk: support new relocation scheme
This patch is to fix build breakage and support new relocation
scheme for mx51evk.

- Correct IRAM base address and add size definition

  The IRAM starts from 0x1FFE0000 on final revsion i.mx51 than
  0x1FFE8000 which is for older revision.

- Include imx-regs.h in mx51evk.h

  Definitions like CSD0_BASE_ADDR and IRAM_BASE_ADDR can be
  referred to.

- Define CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE

  They are used to define init RAM layout.

- Remove comment for CONFIG_SYS_GBL_DATA_SIZE which has been
  buried by Wolfgang's commit below

  25ddd1fb: Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value

Signed-off-by: Shawn Guo <shawn.gsc@gmail.com>
2010-10-28 11:43:23 +02:00
Shawn Guo
888b4f435f mx51evk: Fix 2 hours reset issue
The mx51evk u-boot has an issue that system will get reset
every 2 hours.

MC13892 has an inside charge timer which expires in 120 minutes.
If ICHRG and CHGAUTOB are not set properly, this timer expiration
will get system power recycled.

Since mx51evk has no Li-Ion battery on board, the patch sets
ICHRG in externally powered mode and sets CHGAUTOB bit to avoid
automatic charging, so that system will not get reset by this
timer expiration.

The patch also corrects the bit field definition of register 48
(Charger 0) per latest MC13892 Reference Manual.

Signed-off-by: Shawn Guo <shawn.gsc@gmail.com>
2010-10-28 11:42:34 +02:00
Jason Liu
95707aaa9e MX5:use common u-boot.lds of cpu layer
Remove u-boot.lds from mx5 and use the common u-boot.lds
of cpu layer. This patch also fix the building errors:

arch/arm/cpu/armv7/start.o: In function `_rel_dyn_start_ofs':
arch/arm/cpu/armv7/start.S:283: undefined reference to `__rel_dyn_start'
arch/arm/cpu/armv7/start.o: In function `_rel_dyn_end_ofs':
arch/arm/cpu/armv7/start.S:283: undefined reference to `__rel_dyn_end'
arch/arm/cpu/armv7/start.o: In function `_dynsym_start_ofs':
arch/arm/cpu/armv7/start.S:283: undefined reference to `__dynsym_start'

Signed-off-by: Jason Liu <r64343@freescale.com>
2010-10-28 10:32:20 +02:00
Kumar Gala
bd9715e3db 86xx: Create common linker script
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:41 -05:00
Peter Tyser
9a268e4b7c mpc8641hpcn: Update PCI code
Update to use the recent, common FSL PCI initialization code.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:40 -05:00
York Sun
28a966715b Adding fixed sdram setting for cornet_ds board
800, 900, 1000, 1200MT/s data rate parameters are added for fixed sdram
setting. SPD based parameters and fixed parameters can be toggled by hwconfig.
To use fixed parameters,

hwconfig=fsl_ddr:sdram=fixed

To use SPD parameters,

hwconfig=fsl_ddr:ctlr_intlv=cacheline,bank_intlv=cs0_cs1

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:39 -05:00
Kumar Gala
a1964ea5c2 powerpc/8xxx: Add fdt_fixup_phy_connection helper
Add a common helper that will set the PHY connection type based on enum.
We use this on eTSEC, UCC, and will with Fman in the future.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:27:18 -05:00
Wolfgang Denk
083d506937 Merge branch 'master' of git://git.denx.de/u-boot-imx
Conflicts:
	board/logicpd/imx31_litekit/config.mk
	boards.cfg

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-19 20:58:16 +02:00
Damien Dusha
29c6fbe047 MPC5121: Add USB EHCI support
Signed-off-by: Francesco Rendine <francesco.rendine@valueteam.com>
Signed-off-by: Damien Dusha <d.dusha@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>

Coding style cleanup; slight file restructuring.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Remy Bohmer <linux@bohmer.net>
2010-10-18 22:33:32 +02:00
Wolfgang Denk
1211a46485 config.mk cleanup: drop "-I$(TOPDIR)/board" entries
After the recent cleanups, a number of config.mk files consist only of
a "PLATFORM_CPPFLAGS += -I$(TOPDIR)/board" entry whih is not needed.
Remove such entries.  In most cases, that means that the whole
config.mk file can be removed.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:14:22 +02:00
Wolfgang Denk
2ae1824196 Makefile: move all Power Architecture boards into boards.cfg
Clean up Makefile, and drop a lot of the config.mk files on the way.

We now also automatically pick all boards that are listed in
boards.cfg (and with all configurations), so we can drop the redundant
entries from MAKEALL to avoid building these twice.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:12:04 +02:00
Wolfgang Denk
14d0a02a16 Rename TEXT_BASE into CONFIG_SYS_TEXT_BASE
The change is currently needed to be able to remove the board
configuration scripting from the top level Makefile and replace it by
a simple, table driven script.

Moving this configuration setting into the "CONFIG_*" name space is
also desirable because it is needed if we ever should move forward to
a Kconfig driven configuration system.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:07:10 +02:00
Wolfgang Denk
d24f2d321d mkconfig: change CONFIG_MK_ prefix into plain CONFIG_
When planning for more generalization and Makefile cleanup it became
obvious that the introduction of a separate CONFIG_MK_ name space for
config options that were set through scripting in the Makefile was
not a good idea.

Originally the idea was to provide a script-free approach to supply
configuration options - there was no real need for a separate name
space. But when we now convert the existing Makefile entries to make
use of this approach, it would mean that we have to touch a large
number of board config files and add #ifdef / #define sequences to
"convert" from the CONFIG_MK_ to the CONFIG_ name space.

It seems much cleaner to get rid of this somewhat arbitrary _MK
string now for the few boards that actually use it.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 22:01:21 +02:00
Kim Phillips
e2229352c1 mpc83xx: fix 837x MDS PCI HOST build
commit 6aa3d3bfaa
"83xx: Remove warmboot parameter from PCI init functions" missed
one mpc83xx_pcie_init callsite, causing this build error:

Configuring for MPC837XEMDS_HOST board...
pci.c: In function 'pci_init_board':
pci.c:141: error: too many arguments to function 'mpc83xx_pcie_init'

this patch extends the commit to include that callsite.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-10-18 21:53:30 +02:00
Wolfgang Denk
ae188d48ec MPC832XEMDS: fix pci.c build warning
Doubled use of DECLARE_GLOBAL_DATA_PTR caused compile warning:

pci.c:71: warning: register used for two global register variables

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
2010-10-18 21:50:24 +02:00
Jason Liu
ff9f475d5d MX5: rename mx51 to mx5
Rename mx51 to mx5 in order to support more mx51
like-style SOCs such as MX53 and the followings.

Signed-off-by: Jason Liu <r64343@freescale.com>
2010-10-18 10:43:19 +02:00
Wolfgang Denk
cacc342d5a Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-10-17 20:25:05 +02:00
Wolfgang Denk
6ca803750e Merge branch 'master' of git://git.denx.de/u-boot-imx 2010-10-17 19:57:38 +02:00
Loic Minier
edad84c299 mx51evk: add u-boot.imx to ALL target
Signed-off-by: Loic Minier <loic.minier@linaro.org>
CC: stefano babic <sbabic@denx.de>
2010-10-14 10:23:24 +02:00
mark.vels@team-embedded.nl
812493ad87 Fix define for MPC5121 ADS board.
Originally the Makefile defines CONFIG_ADS5121_REV2 when configuring
for board mpc5121ads_rev2. The config in include/configs/mpc5121ads.h
expects a define CONFIG_MPC5121ADS_REV2 for this.
Therefore there are two defines used but only 1 is defined.
This patch renames references to CONFIG_ADS5121_REV2 to CONFIG_MPC5121ADS_REV2
to have one common define.

This patch fixes faulty mem size detection caused by wrong config in
include/configs/mpc5121ads.h

Signed-off-by: Mark Vels <mark.vels@team-embedded.nl>
2010-10-13 21:28:54 +02:00
Wolfgang Denk
e67f462864 Merge branch 'master' of git://git.denx.de/u-boot-imx 2010-10-11 10:19:04 +02:00
Timur Tabi
bfb707191a fsl: add support for NXID v1 EEPROM format
Freescale application note AN3638 describes an update to the NXID format,
which stores MAC addresses and related data on an on-board EEPROM.  The new
version adds support for up to 23 MAC addresses, instead of just 8.  Since
the initial implementation of NXID had a "0" in the 'version' field, this
new version is called "v1".

Boards that are shipped with EEPROMs in the NXID v1 format should define
CONFIG_SYS_I2C_EEPROM_NXID_1 instead of CONFIG_SYS_I2C_EEPROM_NXID.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:57:07 -05:00
Kumar Gala
1bf8e9fd74 powerpc/85xx: Add support for 4th PCI controller on corenet_ds
We configure the controller but dont have virtual address space thus any
devices on the 4th controller are not accessible in u-boot.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Timur Tabi
3addcb9343 fsl: verify writes to the MAC address EEPROM
Update the code which writes to the on-board EEPROM so that it can detect if
the write failed because the EEPROM is write-protected.  Most of the 8xxx-class
Freescale reference boards use an AT24C02 EEPROM to store MAC addresses and
similar information.  With this patch, if the EEPROM is protected, the
"mac save" command will display an error message indicating that the write
has not succeeded.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Timur Tabi
a2d12f8812 p1022ds: add audclk hwconfig setting to enable codec reference clock
The Freescale P1022DS can use either a 12.288MHz or a 11.2896MHz reference
clock for the audio codec, but by default both are disabled.  Add a 'audclk'
hwconfig option that allows the user to choose which clock he wants.

The 12.288MHz clock allows the codec to use sampling rates of 16, 24, 32, 48,
64, and 96KHz.  The 11.2896 clock allows 14700, 22050, 29400, 44100, 58800, and
88200Hz.

Also configure a pin muxing to select some SSI signals, which will disable
I2C1.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Haiying Wang
b6bde93090 mpc8569mds: fix some ddr settings
Enable half drive strength, set RTT to 60Ohm and set write leveling override.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Haiying Wang
3aed550742 mpc8569mds: fix consuming long time while relocating code.
The original code maps boot flash as non-cacheable region. When calling
relocate_code in flash to copy u-boot from flash to ddr, every loop copy command
is read from flash. The flash read speed will be the bottleneck, which consuming
long time to do this operation. To resovle this, map the boot flash as
write-through cache via tlb. And set tlb to remap the flash after code
executing in ddr, to confirm flash erase operation properly done.

Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Stefano Babic
4d0e49d336 MX51: Drop unused header file for mx51evk
As stated in 2720178533,
the mx51evk has not CPLD and all references must be removed.
This patch drop a .h file that still remains in board
directory.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-09-29 11:24:31 +02:00
Timur Tabi
55b05237b9 p1022ds: use weak CFI flash accessors when DIU is enabled
On the Freescale P1022, the DIU and the LBC share address pins, which means
that when the DIU is active (e.g. the console is on the DVI display), NOR flash
cannot be accessed.  So we use the weak accessor function feature of the CFI
flash code to temporarily switch the pin mux from DIU to LBC whenever we want
to read or write flash.  This has a significant performance penalty, but it's
the only way to make it work.

This change allows the 'saveenv' command to work when the video display is
enabled.  Erasing flash and writing to flash (with the 'cp' command) works,
but reading from flash (with the 'md' and 'cp' commands) does not.  Also, while
flash is being written, the video display will be blank.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-09-25 14:42:11 +02:00
Timur Tabi
d5e01e49f8 p1022ds: add video support
Add support for the DIU controller.  If CONFIG_VIDEO is defined, then
the console will appear on a DVI monitor instead of the serial port.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-09-25 13:10:10 +02:00
Anatolij Gustschin
9e70d1378c fsl_diu_fb: further refactoring of FSL DIU code
Move common code to the fsl_diu_fb.c file and remove obsolete
code from board files (aria, mpc8610hpcd and pdm360ng).
Move fsl_diu_fb.h file to the include directory.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-09-25 13:10:03 +02:00
Peter Tyser
6aa3d3bfaa 83xx: Remove warmboot parameter from PCI init functions
This change lays the groundwork for the BOOTFLAG_* flags being removed.

This change has the small affect of delaying 100ms on PCI initialization
after a warm boot as opposed to the optimal 1ms on some boards.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

included the mpc8308_p1m board.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-09-23 21:14:42 +02:00
Ilya Yanok
65ea758939 MPC8308RDB: various clean ups
This patch cleans up the Freescale MPC8308RDB Development board support.
Things fixed:
 - Removed unused PCIE2 definitions from configuration
 - SICR{L,H} defines used for System I/O Configuration Registers values
   instead of hardcoding
 - CONFIG_SYS_SCCR_PCIEXP1CM used to enable PCIE clock instead of
   writing to SCCR from the board code
 - sleep mode stuff removed as MPC8308 has no support for deep sleep and
   PMCCR1 register. board_early_init_f() removed.
 - MPC8308 has no ERRATA for DDR controller so workaround removed
 - 'assignment in if statement' issues solved
 - use LBLAWAR_* defines instead of hardcoding

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-09-23 21:14:08 +02:00
Timur Tabi
e69e520f9d fsl: refactor MPC8610 and MPC5121 DIU code to use existing bitmap and logo features
The Freescale MPC8610 and MPC5121 DIU code had re-implement two features that already
existed in U-Boot: bitmap drawing and top-of-screen logo (CONFIG_VIDEO_LOGO).
So delete the 8610-specific code and use the built-in features instead.

Signed-off-by: Timur Tabi <timur@freescale.com>
2010-09-21 22:46:02 +02:00
York Sun
8d9207c792 Fix parameters to support RDIMM for P2020DS
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-31 11:23:04 -05:00
Lian Minghuan
0e159024ea powerpc/85xx: Fix SRIO LAW setup on corenet_ds boards
In function board_early_init_r(), serdes will not be initialize yet.
Thus sRIO was always considered disabled.  Move the check for sRIO into
misc_init_r() which is called after fsl_serdes_init().

Also, fixed warning associated with gur variable possibly not being
used.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Lian Minghuan <B31939@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-19 02:06:14 -05:00
york
90870d9846 powerpc/8xxx: Fix quad-rank DIMMs support on corenet_ds board.
The board specific parameters associated with quad rank dimms where
missing.  This fixes it so the board will function if quad rank dimms
are placed in it.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-19 02:06:14 -05:00
Heiko Schocher
48690d8024 net ppc: fix ethernet device names with spaces
since commit 1384f3bb8a ethernet names
with spaces drop a

Warning: eth device name has a space!

message. This patch fix it for:

- "FEC ETHERNET" devices found on
  mpc512x, mpc5xxx, mpc8xx and mpc8220 boards.
  renamed to "FEC".
- "SCC ETHERNET" devices found on
  mpc8xx, mpc82xx based boards. Renamed to "SCC".
- "HDLC ETHERNET" devices found on mpc8xx boards
  Renamed to "HDLC"
- "FCC ETHERNET" devices found on mpc8260 and mpc85xx based
  boards. Renamed to "FCC"

Tested on the kup4k board.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-08-09 11:52:28 -07:00
Kumar Gala
d17123696c powerpc/p4080: Add support for the P4080DS board
Add support for the P4080DS board, with the following features:

* 36-bit only
* Boots from NOR flash
* FMAN drivers NOT supported
* SPD DDR initialization

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Ashish Kalra <Ashish.Kalra@freescale.com>
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Lan Chunhe-B25806 <b25806@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-01 11:18:40 -05:00
york
394c46caf9 powerpc/p2020ds: Integrated with P2020DS DDR change and enabled hwconfig
Enabled SPD
Enabled DDR2
Enabled hwconfig

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:10 -05:00
york
076bff8f47 powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4
Verified on MPC8641HPCN with four DDR2 dimms. Each dimm has dual
rank with 512MB each rank.

Also check dimm size and rank size for memory controller interleaving

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:09 -05:00
york
d51cc7a0cd powerpc/p2020: Move INIT_RAM_ADDR physical address higher for 36-bit for P2020DS
If 36-bit is enabled, move INIT_RAM_ADDR physical address higher
to free lowest 4GB address space.

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:07:53 -05:00
Wolfgang Denk
47e26b1bf9 cmd_usage(): simplify return code handling
Lots of code use this construct:

	cmd_usage(cmdtp);
	return 1;

Change cmd_usage() let it return 1 - then we can replace all these
ocurrances by

	return cmd_usage(cmdtp);

This fixes a few places with incorrect return code handling, too.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-07-24 20:43:57 +02:00
Kumar Gala
6525d51fa5 powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases
Previously we used an alias the pci node to determine which node to
fixup or delete.  Now we use the new fdt_node_offset_by_compat_reg to
find the node to update.

Additionally, we replace the code in each board with a single macro call
that makes assumes uniform naming and reduces duplication in this area.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:40:06 -05:00
Kumar Gala
46f3e3851d powerpc/86xx: Rename PCI1/2 to PCIE1/2 on MPC8641HPCN & SBC8641
The MPC8641 boards actually only have PCIE not PCI.  Rename so we are
uniform with regards to names so we can replace this code with templated
code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:37:11 -05:00
Kumar Gala
dd2cda3dbd powerpc/86xx: Move PCI/PCIe address defines into common immap_86xx.h
Remove dupliacted setting of PCI/PCIe address and offsets in board
config.h.  Renamed CONFIG_SYS_PCI1/2_ADDR to CONFIG_SYS_PCI1/2ADDR on
MPC8641 boards since its really PCIE controllers and not PCI.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:37:11 -05:00
Kumar Gala
9f43d7997e powerpc/85xx: Move p1022ds slot code into board file
The code to map SERDES configs to slot names is board specific and not
chip specific.  Thus it should live in board/freescale/p1022ds/ and not
in arch/powerpc/cpu/.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:10 -05:00
Kumar Gala
c7e1a43de6 ppc/85xx: Convert MPC8536DS to using board common ICS307 code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:10 -05:00
Kumar Gala
509c4c4ce2 ppc/85xx: Convert MPC8572DS to using board common ICS307 code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:10 -05:00
Timur Tabi
c59e1b4d07 powerpc: add support for the Freescale P1022DS reference board
Specifics:

1) 36-bit only
2) Booting from NOR flash only
3) Environment stored in NOR flash only
4) No SPI support
5) No DIU support

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:10 -05:00
Becky Bruce
f51cdaf191 83xx/85xx/86xx: LBC register cleanup
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers.  Merge
this into a single spot.

To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.

In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.

I have done a successful ppc build all and tested a board or two from
each processor family.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:09 -05:00
Kumar Gala
ebf9d5261e Move ICS CLK chip frequency calculation code into a common board library
We have several boards that use the same ICS307 CLK chip to drive the
System clock and DDR clock.  Move the code into a common location so we
share it.

Convert the P2020DS board as the first to use the new common ICS307
code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Timur Tabi <timur@freescale.com>
2010-07-16 10:55:08 -05:00
Kumar Gala
b4a60e521c ppc/85xx: Add a structure defn for PIXIS registers
The various boards that have PIXIS FPGAs have slightly different
register definitions, however there is some common functionality (like
reset, ICS307 clk control, etc) that can be shared.

The struct definition exists for MPC8536DS, MPC8544DS, MPC8572DS,
MPC8610HPCD, and MPC8641HPCN boards.

Also fixed ngpixis to be __packed__ instead of aligned.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:08 -05:00
Ilya Yanok
5fb17030d5 MPC8308RDB: minimal support for devboard from Freescale
This patch provides support for MPC8308RDB development board from
Freescale with a minimal set of features:
 Dual UART is supported
 NOR flash is supported
 Both TSEC Ethernet controllers are supported
 PCI Express initialization is supported

The following features are enabled in configuration but not fully tested:
 I2C (used to get the board revision)
 I2C-connected RTC
 VSC7385 switch

There is one (hopefully) minor issue: on soft reset the board sometimes
resets twice. I've not managed to find the fix for this problem yet.
As a workaround instruction cache can be disabled.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-07-09 16:10:36 -05:00
Wolfgang Denk
54841ab50c Make sure that argv[] argument pointers are not modified.
The hush shell dynamically allocates (and re-allocates) memory for the
argument strings in the "char *argv[]" argument vector passed to
commands.  Any code that modifies these pointers will cause serious
corruption of the malloc data structures and crash U-Boot, so make
sure the compiler can check that no such modifications are being done
by changing the code into "char * const argv[]".

This modification is the result of debugging a strange crash caused
after adding a new command, which used the following argument
processing code which has been working perfectly fine in all Unix
systems since version 6 - but not so in U-Boot:

int main (int argc, char **argv)
{
	while (--argc > 0 && **++argv == '-') {
/* ====> */	while (*++*argv) {
			switch (**argv) {
			case 'd':
				debug++;
				break;
			...
			default:
				usage ();
			}
		}
	}
	...
}

The line marked "====>" will corrupt the malloc data structures and
usually cause U-Boot to crash when the next command gets executed by
the shell.  With the modification, the compiler will prevent this with
an
	error: increment of read-only location '*argv'

N.B.: The code above can be trivially rewritten like this:

	while (--argc > 0 && **++argv == '-') {
		char *arg = *argv;
		while (*++arg) {
			switch (*arg) {
			...

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2010-07-04 23:55:42 +02:00
Wolfgang Denk
0a9463e935 Merge branch 'master' into next 2010-06-30 01:02:11 +02:00
Poonam Aggrwal
75997dc54f 85xx/p1_p2_rdb: Added RevD board version support
- Also modified the code to use io accessors.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2010-06-29 21:07:26 +02:00
Poonam Aggrwal
d3bee08332 85xx/p1_p2_rdb: Modify the CLK_CTRL value for DDR at 667MHz
Use a slighly larger value of CLK_CTRL for DDR at 667MHz
which fixes random crashes while linux booting.

Applicable for both NAND and NOR boot.

Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2010-06-29 21:01:07 +02:00
Anatolij Gustschin
1054382007 video: cfb_console: add weak default video_set_lut()
Do not enforce drivers to provide empty video_set_lut()
if they do not implement indexed color (8 bpp) frame
buffer support. Add default function to the cfb_console
driver and remove empty video_set_lut() functions.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-06-14 12:28:28 +02:00
Timur Tabi
5f4d36825a fsl: rename 'dma' to 'brdcfg1' in the ngPIXIS structure
The ngPIXIS is a board-specific FPGA, but the definition of the registers
is mostly consistent.  On boards where it matter, register 9 is called
'brdcfg1' instead of 'dma', so rename the variable in the ngpixis_t
definition.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-05-30 11:10:32 -05:00
Kumar Gala
6ece2550d1 Convert Makefiles from COBJS-${} to COBJS-$()
Match style we use almost everywhere else

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-05-26 22:27:38 +02:00
Wolfgang Denk
8a452c2c17 Merge branch 'master' of git://git.denx.de/u-boot-imx 2010-05-21 22:22:23 +02:00
Wolfgang Denk
2f05e394fc fsl_diu_fb.c: fix build warnings
Commit 15351855 "fsl-diu: Using I/O accessor to CCSR space" caused a
number of "passing argument 2 of 'out_be32' makes integer from pointer
without a cast" warnings; fix these.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Dave Liu <daveliu@freescale.com>
Cc: Jerry Huang <Chang-Ming.Huang@freescale.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
2010-05-17 23:34:18 +02:00
Kumar Gala
f54fe87ace 85xx/fsl-sata: Use is_serdes_configured() to determine if SATA is enabled
On the MPC85xx platform if we have SATA its connected on SERDES.
Determing if SATA is enabled via sata_initialize should not be board
specific and thus we move it out of the MPC8536DS board code.

Additionally, now that we have is_serdes_configured() we can determine
if the given SATA port is enabled and error out if its not in the
driver.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-05-12 04:53:51 -05:00
Kumar Gala
54648985e2 85xx/mpc8536ds: Use is_serdes_configured() to determine of PCIe enabled
The new is_serdes_configured covers a broader range of devices than the
PCI specific code.  Use it instead as we convert away from the
is_fsl_pci_cfg() code.

Additionally move to setting LAWs for PCI based on if its configured.
Also updated PCI FDT fixup code to remove PCI controllers from dtb if
they are configured.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-05-12 04:53:51 -05:00
Jerry Huang
1535185577 fsl-diu: Using I/O accessor to CCSR space
Using PPC I/O accessor to DIU I/O space instead of directly
read/write. It will prevent the dozen of compiler order issue
and PPC hardware order issue for accessing I/O space.

Using the toolchain(tc-fsl-x86lnx-e500-dp-4.3.74-2.i386.rpm)
can show up the order issue of DIU driver.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-05-12 04:53:49 -05:00
Stefano Babic
b4377e12e9 Add SPI support to mx51evk board
The patch adds SPI devices to the mx51evk board.
The MC13892 chip (PMIC) is supported.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-05-05 09:48:41 +02:00
Stefano Babic
68c07a0c21 MX51evk: Removed warnings
Changes reflect modifications in the fsl_esdhc driver
(the clk_enable field war removed in the configuration structure).

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-05-05 09:48:41 +02:00
Stefano Babic
dfe83352cb mx51evk: correct list of possible BOOT_FROM values
Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-04-30 05:23:25 -05:00
Fabio Estevam
2720178533 MX51EVK: Remove CPLD related code
There is no CPLD on MX51EVK board, so remove CPLD related function.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2010-04-30 05:23:23 -05:00
Wolfgang Denk
8e98f5f70b Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx 2010-04-27 23:02:12 +02:00
Kumar Gala
7e1afb62a7 ppc: Split MPC83xx SERDES code from MPC85xx/MPC86xx/QorIQ
The MPC83xx SERDES control is different from the other FSL PPC chips.
For now lets split it out so we can standardize on interfaces for
determining of a device on SERDES is configured.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2010-04-26 22:37:57 -05:00
Kumar Gala
1749c3da8d ppc/85xx: Fixup PCI nodes for P1_P2_RDB
While we had ft_pci_board_setup it wasn't being called by
ft_board_setup.  Fix that so we actually update the device tree PCI
nodes on P1_P2_RDB boards.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-04-26 22:37:50 -05:00
Anatolij Gustschin
a3921eefa1 mpc5121: add support for PDM360NG board
PDM360NG is a MPC5121E based board by ifm ecomatic gmbh.

Signed-off-by: Michael Weiss <michael.weiss@ifm.com>
Signed-off-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-04-24 22:56:37 +02:00
Stefan Roese
a47a12becf Move arch/ppc to arch/powerpc
As discussed on the list, move "arch/ppc" to "arch/powerpc" to
better match the Linux directory structure.

Please note that this patch also changes the "ppc" target in
MAKEALL to "powerpc" to match this new infrastructure. But "ppc"
is kept as an alias for now, to not break compatibility with
scripts using this name.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Anatolij Gustschin <agust@denx.de>
2010-04-21 23:42:38 +02:00
Peter Tyser
a414553485 m68k: Move cpu/$CPU to arch/m68k/cpu/$CPU
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:24 +02:00
Peter Tyser
84ad688473 arm: Move cpu/$CPU to arch/arm/cpu/$CPU
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:24 +02:00
Peter Tyser
8d1f268204 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:16 +02:00
Peter Tyser
78acc472d9 Rename lib_generic/ to lib/
Now that the other architecture-specific lib directories have been
moved out of the top-level directory there's not much reason to have the
'_generic' suffix on the common lib directory.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:04 +02:00
Peter Tyser
ea0364f1bb Move lib_$ARCH directories to arch/$ARCH/lib
Also move lib_$ARCH/config.mk to arch/$ARCH/config.mk

This change is intended to clean up the top-level directory structure
and more closely mimic Linux's directory organization.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:03 +02:00
Peter Tyser
03b7004dda Create CPUDIR variable
The CPUDIR variable points to the location of a target's CPU directory.
Currently, it is set to cpu/$CPU.  However, using $CPUDIR will allow for
more flexibility in the future.  It lays the groundwork for reorganizing
U-Boot's directory structure to support a layout such as:

  arch/$ARCH/cpu/$CPU/* (architecture with multiple CPU types)
  arch/$ARCH/cpu/*      (architecture with one CPU type)

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:12:59 +02:00
Timur Tabi
5a46960883 p2020ds: add alternate boot bank support using the ngPIXIS FPGA
The Freescale P2020DS board uses a new type of PIXIS FPGA, called the ngPIXIS.
The ngPIXIS has one distinct new feature: the values of the on-board switches
can be selectively overridden with shadow registers.  This feature is used to
boot from a different NOR flash bank, instead of having a register dedicated
for this purpose.  Because the ngPIXIS is so different from the previous PIXIS,
a new file is introduced: ngpixis.c.

Also update the P2020DS checkboard() function to use the new macros defined
in the header file.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-04-07 00:21:28 -05:00
Timur Tabi
2feb4af001 fsl: improve the PIXIS code and fix a few bugs
Refactor and document the Freescale PIXIS code, used on most 85xx and 86xx
boards.  This makes the code easier to read and more flexible.

Delete pixis.h, because none of the exported functions were actually being
used by any other file.  Make all of the functions in pixis.c 'static'.
Remove "#include pixis.h" from every file that has it.

Remove some unnecessary #includes.

Make 'pixis_base' into a macro, so that we don't need to define it in every
function.

Add "while(1);" loops at the end of functions that reset the board, so that
execution doesn't continue while the reset is in progress.

Replace in_8/out_8 calls with clrbits_8, setbits_8, or clrsetbits_8, where
appropriate.

Replace ulong/uint with their spelled-out equivalents.  Remove unnecessary
typecasts, changing the types of some variables if necessary.

Add CONFIG_SYS_PIXIS_VCFGEN0_ENABLE and CONFIG_SYS_PIXIS_VBOOT_ENABLE to make
it easier for specific boards to support variations in the PIXIS registers
sets.  No current boards appears to need this feature.

Fix the definition of CONFIG_SYS_PIXIS_VBOOT_MASK for the MPC8610 HPCD.
Apparently, "pixis_reset altbank" has never worked on this board.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-04-07 00:21:27 -05:00
Wolfgang Denk
ffa37fc98d Merge branch 'next' 2010-04-01 11:28:32 +02:00
Timur Tabi
9ff32d8ccf mpc86xx: set the DDR BATs after calculating true DDR size
After determining how much DDR is actually in the system, set DBAT0 and
IBAT0 accordingly.  This ensures that the CPU won't attempt to access
(via speculation) addresses outside of actual memory.

On 86xx systems, DBAT0 and IBAT0 (the BATs for DDR) are initialized to 2GB
and kept that way.  If the system has less than 2GB of memory (typical for
an MPC8610 HPCD), the CPU may attempt to access this memory during
speculation.  The zlib code is notorious for generating such memory reads,
and indeed on the MPC8610, uncompressing the Linux kernel causes a machine
check (without this patch).

Currently we are limited to power of two sized DDR since we only use a
single bat.  If a non-power of two size is used that is less than
CONFIG_MAX_MEM_MAPPED u-boot will crash.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-03-30 10:50:22 -05:00
TsiChung Liew
9d3a86aec5 ColdFire: Fix m54455EVB save environment bug
The ATMEL flash does not have buffer write feature. Assgined
buffer_size = 1, so that when there is a write to the flash
will not use buffer write function.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2010-03-24 11:09:42 -05:00
TsiChung Liew
53e4290f20 ColdFire: M5271EVB DRAM Bring up issue
Fix proper portsize: The register for portsize is either 00b, 01b,
or 1xb. The value that previous assigned is 32d.
Fix DRAM bring up: insert asm("nop") for every DRAM register setup

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2010-03-24 11:09:15 -05:00
TsiChung Liew
d04c1efae3 ColdFire: Correct bit definition
Use correct definition for _MASK and _UNMASK. It was combined in
the previous used and causes confusion.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2010-03-24 11:09:03 -05:00
Wolfgang Denk
93910edb59 Prepare v2010.03-rc1
Coding style cleanup, update CHANGELOG.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-12 23:06:04 +01:00
Stefano Babic
e4d3449201 MX51: removed warnings for the mx51evk
The patch removes warnings at compile time and provides
some cleanup code:
- Removed comment on NAND (not yet supported) from lowlevel_init.S
- Removed NFMS bit definition from imx-regs.h
  The bit is only related to MX.25/35 and can lead to confusion
- Moved is_soc_rev() to soc specific code (removed from mx51evk.c)

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-03-07 12:36:36 -06:00
Stefano Babic
c5fb70c911 Add initial support for Freescale mx51evk board
The patch adds initial support for the Freescale mx51evk board.
Network (FEC) and SD controller (fsl_esdhc) are supported.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fred Fan <fanyefeng@gmail.com>
2010-03-07 12:36:36 -06:00
Wolfgang Denk
05c2f4fe29 Merge branch 'master' of git://git.denx.de/u-boot-net 2010-02-03 20:10:20 +01:00
Heiko Schocher
582c55a027 83xx, uec: split enet_interface in two variables
There's no sensible reason to unite speed and interface type into
one variable.  So split this variable enet_interface into two
vars: enet_interface_type, which hold the interface type and speed.

Also: add the possibility for switching between 10 and 100 MBit
interfaces on the fly, when running in FAST_ETH mode.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-01-31 22:37:12 -08:00
Liu Yu
674ef7bd02 Nand boot: Add nand boot support for MPC8569mds board
This patch add nand boot support for MPC8569mds board.

Signed-off-by: Liu Yu <yu.liu@freescale.com>
2010-01-27 14:22:40 -06:00
Liu Yu
d918038269 ppc/85xx: Add PIB/ATM support for MPC8569mds
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-25 22:13:26 -06:00
Peter Tyser
64917ca389 PCIe, USB: Replace 'end point' references with 'endpoint'
When referring to PCIe and USB 'endpoint' is the standard naming
convention.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Remy Bohmer <linux@bohmer.net>
2010-01-17 23:06:44 +01:00
Wolfgang Denk
02c631e6ee Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2010-01-12 23:30:40 +01:00
Anton Vorontsov
2e95004deb mpc83xx: Add NAND boot support for MPC8315E-RDB boards
The core support for NAND booting is there already, so this patch
is pretty straightforward.

There is one trick though: top level Makefile expects nand_spl to
be in nand_spl/board/$(BOARDDIR), but we can fully reuse the code
from mpc8313erdb boards, and so to not duplicate the code we just
symlink nand_spl/board/freescale/mpc8315erdb to mpc8313erdb.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>

o silence make during ln echo
o update documentation
o and avoid:

$ ./MAKEALL MPC8315ERDB_NAND
Configuring for MPC8315ERDB board...
sdram.o: In function `fixed_sdram':
/home/r1aaha/git/u-boot/nand_spl/board/freescale/mpc8313erdb/sdram.c:72: undefined reference to `udelay'

by renaming udelay -> __udelay in the spirit of commit
3eb90bad65 "Generic udelay() with watchdog
support".

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-07 18:33:52 -06:00
Anton Vorontsov
c4ca10f1db mpc85xx: Add 4-bits eSDHC support for MPC8569E-MDS boards
Thanks to "Errata to MPC8569E PowerQUICC III Integrated Host Processor
Family Reference Manual, Rev. 0" document, which describes all eSDHC
pins, we can add 4-bits eSDHC support for MPC8569E-MDS boards.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:10 -06:00
Kumar Gala
abc76eb6a6 ppc/85xx: Map boot page guarded for MP boot
We already map the page cache-inhibited.  There is no reason we
shouldn't also be marking it guarded to prevent speculative accesses.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:09 -06:00
Kumar Gala
5fb6ea3ad3 ppc/85xx: Make flash TLB entry determined at runtime on FSL boards
Rather than hard coding which TLB entry the FLASH is mapped with we can
use find_tlb_idx to determine the entry.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:08 -06:00
Kumar Gala
9263e829f0 ppc/85xx: Move to using fsl_setup_hose on P2020 DS
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host.  Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:07 -06:00
Kumar Gala
1e21ba8f6d ppc/85xx: Move to using fsl_setup_hose on P1/P2 RDB
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host.  Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:07 -06:00
Kumar Gala
42c01b9d1f ppc/85xx: Move to using fsl_setup_hose on MPC8572 DS
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host.  Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:06 -06:00
Kumar Gala
5e3d7050cf ppc/86xx: Clean up MPC8610 HPCD PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:06 -06:00
Kumar Gala
7b626880b4 ppc/85xx: Clean up MPC8548 CDS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:06 -06:00
Kumar Gala
4681457e2a ppc/85xx: Clean up MPC8568 MDS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:05 -06:00
Kumar Gala
c847e98b14 ppc/85xx: Clean up MPC8569 MDS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:05 -06:00
Kumar Gala
645d5a7838 ppc/85xx: Clean up MPC8544 DS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:05 -06:00
Mingkai Hu
8a414c4258 ppc/85xx: Clean up MPC8536 DS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:05 -06:00
Heiko Schocher
00b6d927ba 5xxx, fdt: move fdt_fixup_memory() to cpu.c file
u-boot updates, before starting Linux, the memory node in the
DTS. As this is a "standard" feature, move this functionality
to the cpu.c file for mpc5xxx and mpc512x processors.

Signed-off-by: Heiko Schocher <hs@denx.de>
2009-12-08 22:13:02 +01:00
Wolfgang Denk
2a49bf3149 Merge branch 'master' into next
Conflicts:
	board/esd/plu405/plu405.c
	drivers/rtc/ftrtc010.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-12-05 02:11:59 +01:00
Ingo van Lil
3eb90bad65 Generic udelay() with watchdog support
According to the PPC reference implementation the udelay() function is
responsible for resetting the watchdog timer as frequently as needed.
Most other architectures do not meet that requirement, so long-running
operations might result in a watchdog reset.

This patch adds a generic udelay() function which takes care of
resetting the watchdog before calling an architecture-specific
__udelay().

Signed-off-by: Ingo van Lil <inguin@gmx.de>
2009-12-05 01:08:53 +01:00
Marcel Ziswiler
cada315100 mpc8260: move FDT memory node fixup into common CPU code.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
Tested-by: Heiko Schocher <hs@denx.de>
2009-11-22 23:16:28 +01:00
Becky Bruce
107b579c75 86xx: Remove redundant code in initdram
The same code exists both inside an #ifdef and outside of it.
Remove the extra code for all the 86xx boards.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-11-04 21:37:12 -06:00
Kumar Gala
01471d538f Revert "ppc/85xx/pci: fsl_pci_init: pcie agent mode support"
This reverts commit 70ed869ea5.

There isn't any need to modify the API for fsl_pci_init_port to pass the
status of host/agent(end-point) status.  We can determine that
internally to fsl_pci_init_port.  Revert the patch that makes the API
change.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-11-04 09:14:59 -06:00
Anton Vorontsov
3fca803759 mpc85xx: Configure QE USB for MPC8569E-MDS boards
Setup QE pin multiplexing for USB function, configure needed BCSRs
and add some fdt fixups.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 10:04:17 -05:00
Anton Vorontsov
14809b6c21 mpc85xx: Configure QE UART for MPC8569E-MDS boards
To make QE UART usable by Linux we should setup pin multiplexing
and turn UCC2 Ethernet node into UCC2 QE UART node.

Also, QE UART is mutually exclusive with UART0, so we can't enable
it if eSDHC is in 4-bits mode on pilot boards, or if it's a prototype
board with eSDHC in 1- or 4-bits mode.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 10:04:11 -05:00
Anton Vorontsov
70d665b1d2 mpc85xx: Setup QE pinmux for SPI Flash on MPC8569E-MDS boards
SPI Flash (M25P40) is connected to the SPI1 bus, we need a few
qe_iop entries to actually enable SPI1 on these boards.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 09:44:40 -05:00
Anton Vorontsov
65dec3b459 mpc85xx: Setup SRIO memory region LAW for MPC8569E-MDS boards
This patch sets memory window for Serial RapidIO on MPC8569E-MDS
boards.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 09:44:37 -05:00
Anton Vorontsov
a29155e122 mpc85xx: Add eLBC NAND support for MPC8569E-MDS boards
Simply add some defines, and adjust TLBe setup to include some
space for eLBC NAND.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 09:44:32 -05:00
Anton Vorontsov
7f52ed5ef1 mpc85xx: Add eSDHC support for MPC8569E-MDS boards
eSDHC is mutually exlusive with UART0 (in 4-bits mode) and I2C2
(in 1-bit mode). When eSDHC is used, we should switch u-boot console to
UART1, and make the proper device-tree fixups.

Because of an erratum in prototype boards it is impossible to use eSDHC
without disabling UART0 (which makes it quite easy to 'brick' the board
by simply issung 'setenv hwconfig esdhc', and not able to interact with
U-Boot anylonger).

So, but default we assume that the board is a prototype, which is a most
safe assumption. There is no way to determine board revision from a
register, so we use hwconfig.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 09:36:48 -05:00
Vivek Mahajan
70ed869ea5 ppc/85xx/pci: fsl_pci_init: pcie agent mode support
Originally written by Jason Jin and Mingkai Hu for mpc8536.

When QorIQ based board is configured as a PCIe agent, then unlock/enable
inbound PCI configuration cycles and init a 4K inbound memory window;
so that a PCIe host can access the PCIe agents SDRAM at address 0x0

* Supported in fsl_pci_init_port() after adding pcie_ep as a param
* Revamped copyright in drivers/pci/fsl_pci_init.c
* Mods in 85xx based board specific pci init after this change

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 09:33:51 -05:00
Poonam Aggrwal
273a28ad9e 85xx/p1_p2_rdb: Fixing DDR configuration for 800MHz data rate
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 09:12:36 -05:00
Poonam Aggrwal
924024c396 85xx/p1_p2rdb: Fix crash while configuring 32 bit DDR i/f for P1020RDB.
The data being modified was in NOR flash which caused the crash.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 09:12:32 -05:00
Dipen Dudhat
fad15096e3 ppc/P1_P2_RDB: On-chip BootROM support
On Chip BootROM support for P1 and P2 series RDB platforms.

This patch is derived from latest On Chip BootROM support on MPC8536DS

Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-16 10:21:39 -05:00
Dipen Dudhat
f7780ec977 ppc/P1_P2_RDB: NAND Boot Support
NAND Boot support for P1 and P2 series RDB platforms.

This patch is derived from NAND Boot support on MPC8536DS.

Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-16 10:21:39 -05:00
Wolfgang Denk
cd77dd109c Merge branch 'reloc' 2009-10-09 00:03:18 +02:00
Wolfgang Denk
da01f53404 mpc512x: fix fixed_sdram() init code.
Commit 054197ba and later fixes used an array to initialize some of
the MDDRC parameters; however, the use of an array turned out to be a
bad idea as it was not possible to correlate structure entries to
array indices in readable and reliable way. Now we use a struct
instead, which makes this self-explanatory.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-08 00:23:12 +02:00
Peter Tyser
b32a894011 ppc: Remove pci config table pointer relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 10:17:56 +02:00
Peter Tyser
858290178f ppc: Enable full relocation to RAM
The following changes allow U-Boot to fully relocate from flash to
RAM:
 - Remove linker scripts' .fixup sections from the .text section
 - Add -mrelocatable to PLATFORM_RELFLAGS for all boards
 - Define CONFIG_RELOC_FIXUP_WORKS for all boards

Previously, U-Boot would partially relocate, but statically initialized
pointers needed to be manually relocated.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 10:15:45 +02:00
Wolfgang Denk
1d96cfe8f5 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2009-09-30 23:39:36 +02:00
Mingkai Hu
e40ac4870c On-chip ROM boot: MPC8536DS support
The MPC8536E is capable of booting from the on-chip ROM - boot from
eSDHC and boot from eSPI. When power on, the porcessor excutes the
ROM code to initialize the eSPI/eSDHC controller, and loads the mian
U-Boot image from the memory device that interfaced to the controller,
such as the SDCard or SPI EEPROM, to the target memory, e.g. SDRAM or
L2SRAM, then boot from it.

The memory device should contain a specific data structure with control
word and config word at the fixed address. The config word direct the
process how to config the memory device, and the control word direct
the processor where to find the image on the memory device, or where
copy the main image to. The user can use any method to store the data
structure to the memory device, only if store it on the assigned address.

The on-chip ROM code will map the whole 4GB address space by setting
entry0 in the TLB1, so the main image need to switch to Address space 1
to disable this mapping and map the address space again.

This patch implements loading the mian U-Boot image into L2SRAM, so
the image can configure the system memory by using SPD EEPROM.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-30 08:42:11 -05:00
Mingkai Hu
9a1a0aedbb NAND boot: MPC8536DS support
MPC8536E can support booting from NAND flash which uses the
image u-boot-nand.bin. This image contains two parts: a 4K
NAND loader and a main U-Boot image. The former is appended
to the latter to produce u-boot-nand.bin. The 4K NAND loader
includes the corresponding nand_spl directory, along with the
code twisted by CONFIG_NAND_SPL. The main U-Boot image just
like a general U-Boot image except the parts that included by
CONFIG_SYS_RAMBOOT.

When power on, eLBC will automatically load from bank 0 the
4K NAND loader into the FCM buffer RAM where CPU can execute
the boot code directly. In the first stage, the NAND loader
copies itself to RAM or L2SRAM to free up the FCM buffer RAM,
then loads the main image from NAND flash to RAM or L2SRAM
and boot from it.

This patch implements the NAND loader to load the main image
into L2SRAM, so the main image can configure the RAM by using
SPD EEPROM. In the first stage, the NAND loader copies itself
to the second to last 4K address space, and uses the last 4K
address space as the initial RAM for stack.

Obviously, the size of L2SRAM shouldn't be less than the size
of the image used. If so, the workaround is to generate another
image that includes the code to configure the RAM by SPD and
load it to L2SRAM first, then relocate the main image to RAM
to boot up.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-30 08:42:06 -05:00
Anton Vorontsov
da6eea0f48 mpc83xx: mpc8360emds: Add QE USB device tree fixups
With this patch we can change QE USB mode without need to hand-edit
the device tree.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-09-25 18:25:51 -05:00
Anton Vorontsov
89da44ce3f mpc83xx: mpc8360emds: Use RGMII-ID mode, add workarounds for rev. 2.1 CPUs
This patch fixes various ethernet issues with gigabit links handling
in U-Boot. The workarounds originally implemented by Kim Phillips for
Linux kernel.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-09-25 18:25:51 -05:00
Anton Vorontsov
034477bb31 mpc83xx: mpc8360emds: Don't use LBC SDRAM when DDR is available
Since commit 5c2ff323a9 ("mpc8360emds:
rework LBC SDRAM setup"), LBC SDRAM is available for use in Linux.

Though, it appears that QE Ethernet in Gigabit mode can't transmit
large packets when it tries to work with a data in LBC SDRAM (memtest
didn't discover any issues, is LBC SDRAM just too slow?).

With this patch we can still use the board without DDR memory, but
if DDR is available, we don't use LBC SDRAM.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-09-25 18:25:51 -05:00
Wolfgang Denk
984f10baac mpc5121ads: fix breakage introduced when reordering elpida_mddrc_config[]
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-09-25 14:16:00 +02:00
Martha M Stan
a5aa3998ab Add Elpida Memory Configuration to mpc5121ads Boards
Signed-off-by: Martha M Stan <mmarx@silicontkx.com>

Minor coding style cleanup.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-09-25 00:45:38 +02:00
Martha M Stan
054197ba8e mpc512x: Streamlined fixed_sdram() init sequence.
Signed-off-by: Martha M Stan <mmarx@silicontkx.com>

Minor cleanup:

Re-ordered default_mddrc_config[] to have matching indices.

This allows to use the same index "N" for source and target fields;
before, we had code like this

	out_be32(&im->mddrc.ddr_time_config2, mddrc_config[3]);

which always looked like a copy & paste error because 2 != 3.

Also, use NULL when meaning a null pointer.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-09-25 00:45:30 +02:00
Peter Tyser
8439f05cfd mpc8610hpcd: Use common 86xx fdt fixup code
Using the common 86xx fdt fixups removes some board-specific code and
should make the mpc8610hpcd easier to maintain in the long run.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:05:25 -05:00
Poonam Aggrwal
82b7725b6d ppc/85xx: 32bit DDR changes for P1020/P1011
The P1020/P1011 SOCs support max 32bit DDR width as opposed to P2020/P2010
where max DDR data width supported is 64bit.

As a next step the DDR data width initialization would be made more dynamic
with more flexibility from the board perspective and user choice.
Going forward we would also remove the hardcodings for platforms with onboard
memories and try to use the FSL SPD code for DDR initialization.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:59 -05:00
Kumar Gala
002741ae86 ppc/85xx: Clean up use of LAWAR defines
On 85xx platforms we shouldn't be using any LAWAR_* defines
but using the LAW_* ones provided by fsl-law.h.  Rename any such
uses and limit the LAWAR_ to the 83xx platform as the only user so
we will get compile errors in the future.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:58 -05:00
Kumar Gala
f61dae7c9d ppc/85xx: Clean up mpc8572DS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:58 -05:00
Kumar Gala
4958af8735 ppc/85xx: Clean up p2020ds PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:58 -05:00
Kumar Gala
93a83872c7 ppc/85xx: Clean up p1_p2_rdb PCI setup
General code cleanup to use in/out IO accessors as well as making
the code that prints out info sane between board and generic fsl pci
code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:58 -05:00
Mingkai Hu
6e1385d5f8 NAND boot: change NAND loader's relocate SP to CONFIG param
So that we can set the NAND loader's relocate stack pointer
to the value other than the relocate address + 0x10000.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-15 21:30:09 -05:00
Kumar Gala
6c97a20d0b ppc/85xx: Introduce RESET_VECTOR_ADDRESS to handle non-standard link address
Some board ports place TEXT_BASE at a location that would cause the
RESET_VECTOR_ADDRESS not to be at 0xfffffffc when we link.  By default
we assume RESET_VECTOR_ADDRESS will be 0xfffffffc if the board doesn't
explicitly set it.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
2009-09-09 21:04:47 -05:00
Kumar Gala
3e7b6c1f2d ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host
Refactor the code into a simple bitmask lookup table that determines if
a given PCI controller is enabled and if its in host/root-complex or
agent/end-point mode.

Each processor in the PQ3/MPC86xx family specified different encodings
for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-08 09:10:07 -05:00
Kumar Gala
2abbd31da6 ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist
The ddr_pd_cntl isn't defined in any reference manual and thus we wil
remove especially since we set it to 0, which would most likely be its
POR value.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-08 09:10:04 -05:00
Anton Vorontsov
9c671e7062 fsl: sys_eeprom: Fix 'may be used uninitialized' warning
The warning is bogus, so silence it by initializing the 'ret' variable.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-08 09:10:03 -05:00
Timur Tabi
2d04db088e fsl: simplify the "mac id" command, improve boot-time informational message
The "mac id" command took a 4-character parameter as the identifier string.
However, for any given board, only one kind of identifier is acceptable, so it
makes no sense to ask the user to type it in.  Instead, if the user enters
"mac id", the identifier (and also the version, if it's NXID) will
automatically be set to the correct value.

Improve the message that is displayed when EEPROM is read during boot.  It now
displays "EEPROM:" and then either an error message or the EEPROM identifier
if successful.

If the identifier in EEPROM is valid, then always reject a bad CRC, even if the
CRC field has not been initialized.

Don't force the MAC address count to MAX_NUM_PORTS or less.  Forcing the value
to be changed resulting in an in-memory copy that does not match what's in
hardware, even though the user did not request that change.

Finally, always update the CRC value in the in-memory copy after any field
is changed, so that the CRC is always correct.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:52 -05:00
Poonam Aggrwal
33f3f34255 85xx: Added PCIe support for P1 P2 RDB
Call fsl_pci_init_port() to initialize all the PCIe ports on the board.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:46 -05:00
Kumar Gala
b560ab85ed 85xx: Init pci ethernet cards if we enable any on MPC8572DS
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:40 -05:00
Kumar Gala
ec79d33b2c 85xx: Move to a common linker script
There are really no differences between all the 85xx linker scripts so
we can just move to a single common one.  Board code is still able to
override the common one if need be.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:39 -05:00
Poonam Aggrwal
728ece343e 85xx: Add support for P2020RDB board
The code base adds P1 & P2 RDB platforms support.
The folder and file names can cater to future SOCs of P1/P2 family.
P1 & P2 processors are 85xx platforms, part of Freescale QorIQ series.

Tested following on P2020RDB:
1. eTSECs
2. DDR, NAND, NOR, I2C.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:38 -05:00
Kumar Gala
73aacc5228 86xx: Remove redudant PLATFORM_CPPFLAGS
For historic reasons we had defined some additional PLATFORM_CPPFLAGS like:

PLATFORM_CPPFLAGS += -DCONFIG_MPC86xx=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC8641=1

However these are all captured in the config.h and thus redudant.  Also
moved common 86xx flags into cpu/mpc86xx/config.mk.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:37 -05:00
Kumar Gala
53efa1f1ac 85xx: Remove redudant PLATFORM_CPPFLAGS
For historic reasons we had defined some additional PLATFORM_CPPFLAGS
like:

PLATFORM_CPPFLAGS += -DCONFIG_E500=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC8548=1

However these are all captured in the config.h and thus redudant.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:37 -05:00
Kumar Gala
ecead84d56 85xx: Cleanup whitespace in mpc8536ds.c
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:36 -05:00
Kumar Gala
cb151aa2cf pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init
Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows
before it calls fsl_pci_init.  There isn't any reason to just call it
from fsl_pci_init and simplify things a bit.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:35 -05:00
Kumar Gala
fb3143b35e pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init
Every platform that calls fsl_pci_init calls pci_setup_indirect before
it calls fsl_pci_init.  There isn't any reason to just call it from
fsl_pci_init and simplify things a bit.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:35 -05:00
Ben Warren
b1c0eaac11 Convert CS8900 Ethernet driver to CONFIG_NET_MULTI API
All in-tree boards that use this controller have CONFIG_NET_MULTI added
Also:
  - changed CONFIG_DRIVER_CS8900 to CONFIG_CS8900
  - changed CS8900_BASE to CONFIG_CS8900_BASE
  - changed CS8900_BUS?? to CONFIG_CS8900_BUS??
  - cleaned up line lengths
  - modified VCMA9 command function that accesses the device
  - removed MAC address initialization from lib_arm/board.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Tested-by: Wolfgang Denk <wd@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
2009-08-25 13:35:54 -07:00
Wolfgang Denk
cb32ed1fc2 Merge branch 'next' of git://git.denx.de/u-boot-coldfire 2009-08-04 21:54:11 +02:00
Kumar Gala
4c2e3da82d Update Freescale copyrights to remove "All Rights Reserved"
"All Rights Reserved" conflicts with the GPL.

Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
2009-07-29 09:59:22 +02:00
Ben Warren
736fead8fd Convert SMC911X Ethernet driver to CONFIG_NET_MULTI API
All in-tree boards that use this controller have CONFIG_NET_MULTI added
Also:
 - changed CONFIG_DRIVER_SMC911X* to CONFIG_SMC911X*
 - cleaned up line lengths
 - modified all boards that override weak function in this driver
 - added

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Tested-by: Mike Frysinger <vapier@gentoo.org>
2009-07-22 22:53:44 -07:00
Kumar Gala
048e7efe91 85xx/86xx: Replace in8/out8 with in_8/out_8 on FSL boards
The pixis code used in8/out8 all over the place.  Replace it with
in_8/out_8 macros.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 10:16:55 -05:00
Peter Tyser
e7ee23ec17 86xx: Rename ccsr_ddr's sdram_mode_1, sdram_cfg_1 fields
Rename sdram_mode_1 to sdram_mode and sdram_cfg_1 to sdram_cfg to match
the 86xx user's manual and other Freescale architectures

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 09:43:47 -05:00