Commit graph

228 commits

Author SHA1 Message Date
Sricharan
2e5ba48928 omap5: clocks: Add clocks support for omap5 platform.
Adding the correct configurations required for
dplls, clocks, for omap5 Soc.

Also changes are done to retain some part of the code common
for OMAP4/5 and move only the remaining to the Soc specific
directories.

Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-15 22:25:50 +01:00
Sricharan
508a58fa8e omap5: Add minimal support for omap5430.
This patch adds the minimal support for OMAP5. The platform and machine
specific headers and sources updated for OMAP5430.

OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture.
It's a dual core SOC with GIC used for interrupt handling and SCU for cache
coherency.

Also moved some part of code from the basic platform support that can be made
common for OMAP4/5. Rest is kept out seperately. The same approach is followed
for clocks and emif support in the subsequent patches.

Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-15 22:25:50 +01:00
Sricharan
ce170beeb7 omap4: make omap4 code common for future reuse
Much of omap4 soc support code can be reused for omap5.
Move them to the omap-common directory to facilitate
this.

Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-15 22:25:50 +01:00
Fabio Estevam
41c881c0ca mx53: Turn off child clocks before reconfigure perclk_root
In addition to ensuring that PERCLK remains at least 2.5 times slower
than the AHB clock, certain steps need to be followed to ensure robust
operation of PERCLK when reconfiguring the PERCLK clock source.

To properly configure the PERCLK clock source, the following steps are
required:

1.In the CCGR registers, gate the clocks to all PERCLK-dependent
  modules.
2.Select the desired input clock for the PERCLK root clock (to be either
  source from the peripherals main source clock or the
  lp_apm clock source). Refer to the CMCBR register,  perclk_lp_apm_sel bit.
3.Configure the perclk_pred1, perclk_pred2, and perclk_podf dividers
  to the desired setting.  Refer to the CBCDR register for details.
4.In the CCGR registers, enable the desired clocks for the
  PERCLK-dependent module clocks.

If these steps aren't followed, GPT timer may stop and the kernel stops
at "Calibrating delay loop".

Signed-off-by: Terry Lv <r65388@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-11-04 22:06:37 +01:00
Ilya Yanok
b88befa550 omap/spl: actually enable the console
Currently OMAP SPL code does all the initialization but does not set the
gd->have_console value so no output is actually performed. This patch
sets gd->have_console to 1.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-03 22:56:23 +01:00
Wolfgang Denk
cca4e4aec1 Reduce build times
U-Boot Makefiles contain a number of tests for compiler features etc.
which so far are executed again and again.  On some architectures
(especially ARM) this results in a large number of calls to gcc.

This patch makes sure to run such tests only once, thus largely
reducing the number of "execve" system calls.

Example: number of "execve" system calls for building the "P2020DS"
(Power Architecture) and "qong" (ARM) boards, measured as:
	-> strace -f -e trace=execve -o /tmp/foo ./MAKEALL <board>
	-> grep execve /tmp/foo | wc -l

	Before: After:	Reduction:
==================================
P2020DS 20555	15205	-26%
qong	31692	14490	-54%

As a result, built times are significantly reduced, typically by
30...50%.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: Albert Aribaud <albert.aribaud@free.fr>
cc: Graeme Russ <graeme.russ@gmail.com>
cc: Mike Frysinger <vapier@gentoo.org>
Tested-by: Graeme Russ <graeme.russ@gmail.com>
Tested-by: Matthias Weisser <weisserm@arcor.de>
Tested-by: Sanjeev Premi <premi@ti.com>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Macpaul Lin <macpaul@gmail.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-11-03 20:44:58 +01:00
Wolfgang Denk
87a5d60103 Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
  ARM: Add Calxeda Highbank platform
  dkb: make mmc command as default enabled
  Marvell: dkb: add mmc support
  ARM: pantheon: add mmc definition
  davinci: remove config.mk file from the sources
  ARM:AM33XX: Add support for TI AM335X EVM
  ARM:AM33XX: Added timer support
  ARM:AM33XX: Add emif/ddr support
  ARM:AM33XX: Add clock definitions
  ARM:AM33XX: Added support for AM33xx
  omap3/emif4: fix registers definition
  davinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUM
  davinci: emac: add support for more than 1 PHYs
  davinci: emac: add new features to autonegotiate for EMAC
  da850evm: Move LPSC configuration to board_early_init_f()
  omap4_panda: Build in cmd_gpio support on panda
  omap: Don't use gpio_free to change direction to input
  mmc: omap: Allow OMAP_HSMMC[23]_BASE to be unset
  OMAP3: overo : Add environment variable optargs to bootargs
  OMAP3: overo: Move ethernet CS4 configuration to execute based on board id
  OMAP3: overo : Use ttyO2 instead of ttyS2.
  da830: add support for NAND boot mode
  dm36x: revert cache disable patch
  dm644X: revert cache disable patch
  devkit8000: Add malloc space
  omap: spl: fix build break due to changes in FAT
  OMAP3 SPL: Provide weak omap_rev_string
  omap: beagle: Use ubifs instead of jffs2 for nand boot
  omap: overo: Disable pull-ups on camera PCLK, HS and VS signals
  omap: overo: Configure mux for gpio10
  SPL: Add DMA library
  omap3: Add interface for omap3 DMA
  omap3: Add DMA register accessors
  omap3: Add Base register for DMA
  arm, davinci: add missing LSPC define for MMC/SD1
  U-Boot/SPL: omap4: Make ddr pre-calculated timings as default.
  DaVinci: correct MDSTAT.STATE mask
  omap4: splitting padconfs into common, 4430 and 4460
  omap4: adding revision detection for 4460 ES1.1
  omap4: replacing OMAP4_CONTROL with OMAP4430_CONTROL
  gplug: fixed build error as a result of code cleanup patch
  kirkwood_spi: add dummy spi_init()
  gpio: mvmfp: reduce include platform file
  ARM: orion5x: reduce dependence of including platform file
  serial: reduce include platform file for marvell chip
  ARM: kirkwood: reduce dependence of including platform file
  ARM: armada100: reduce dependence of including platform file
  ARM: pantheon: reduce dependence of including platform file
  Armada100: Add env storage support for Marvell gplugD
  Armada100: Add SPI flash support for Marvell gplugD
  Armada100: Add SPI support for Marvell gplugD
  SPI: Add SPI driver support for Marvell Armada100
  dreamplug: initial board support.
  imx: fix coding style
  misc: pmic: drop old Freescale's pmic driver
  MX31: mx31pdk: use new pmic driver
  MX31: mx31ads: use new pmic driver
  MX31: mx31_litekit: use new pmic driver
  MX5: mx53evk: use new pmic driver
  MX5: mx51evk: use new pmic driver
  MX35: mx35pdk: use new pmic driver
  misc: pmic: addI2C  support to pmic_fsl driver
  misc: pmic: use I2C_SET_BUS in pmic I2C
  MX5: efikamx/efikasb: use new pmic driver
  MX3: qong: use new pmic driver
  RTC: Switch mc13783 to generic pmic code
  MX5: vision2: use new pmic driver
  misc: pmic: Freescale PMIC switches to generic PMIC driver
  misc:pmic:samsung Enable PMIC driver at GONI target
  misc:pmic:max8998 MAX8998 support at a new PMIC driver.
  misc:pmic:core New generic PMIC driver
  mx31pdk: Remove unneeded config
  mx31: provide readable WEIM CS accessor
  MX51: vision2: Set global macros
  I2C: Add i2c_get/set_speed() to mxc_i2c.c
  ARM: Update mach-types
  devkit8000: Add config to enable SPL MMC boot
  devkit8000: protect board_mmc_init
  arm, post: add missing post_time_ms for arm
  cosmetic, post: Codingstyle cleanup
  arm, logbuffer: make it compileclean
  tegra2: Enable MMC for Seaboard
  tegra2: Add more pinmux functions
  tegra2: Rename PIN_ to PINGRP_
  tegra2: Add more clock functions
  tegra2: Clean up board code a little
  tegra2: Rename CLOCK_PLL_ID to CLOCK_ID
2011-10-28 00:15:19 +02:00
Marek Vasut
3ff915e886 GCC4.6: Squash warnings in omap4 clocks.c
clocks.c:606:2: warning: format '%08x' expects type 'unsigned int', but argument
2 has type 'u32 * const'
clocks.c:633:2: warning: format '%08x' expects type 'unsigned int', but argument
2 has type 'u32 * const'

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
2011-10-27 23:54:09 +02:00
Marek Vasut
4a34af7114 GCC4.6: Squash warning in tegra2 board.c
board.c:43:2: warning: format '%08lX' expects type 'long unsigned int', but
argument 2 has type 'u32'

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
2011-10-27 23:54:09 +02:00
Rob Herring
37fc0ed268 ARM: Add Calxeda Highbank platform
Add basic support for Calxeda Highbank platform. Only minimal support with
serial and SATA are included.

Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-10-27 21:56:37 +02:00
Chandan Nath
5289e83a8c ARM:AM33XX: Add support for TI AM335X EVM
This patch adds basic support for booting the board.
This patch adds support for the UART necessary to
get to the u-boot prompt.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:36 +02:00
Chandan Nath
f0f4b5ff50 ARM:AM33XX: Added timer support
This patch adds timer support for AM33xx platform.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:36 +02:00
Chandan Nath
62d7fe7c91 ARM:AM33XX: Add emif/ddr support
This patch adds AM33xx emif/ddr support along with board specific
defines.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:36 +02:00
Chandan Nath
f87fa62af9 ARM:AM33XX: Add clock definitions
This patch adds basic clock definition of am33xx SoC.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:36 +02:00
Chandan Nath
5655108a82 ARM:AM33XX: Added support for AM33xx
This patch adds basic support for AM33xx which is based on ARMV7
Cortex A8 CPU.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:36 +02:00
Joe Hershberger
b5db0a068a omap: Don't use gpio_free to change direction to input
gpio_free() should not have the side effect of setting the line to input since this prevents the gpio command from being able to set a line as output.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:35 +02:00
Aneesh V
2d01dd953a omap: spl: fix build break due to changes in FAT
FAT library now uses malloc() and free(). But SPL doesn't
have heap until now. Setup a heap in SDRAM to fix this issue.

However this increases SPL footprint beyond the available SRAM
budget. So, compile out some fancy features in the SDARM init
bring back footprint under control

CC: Sandeep Paulraj <s-paulraj@ti.com>
CC: Wolfgang Denk <wd@denx.de>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:35 +02:00
Tom Rini
cc3f705843 OMAP3 SPL: Provide weak omap_rev_string
We add an weak version of omap_rev_string in omap-common/spl.c
and while at it drop the omap3 version.  Move the prototype over
to <asm/omap_common.h> with the other SPL functions.

Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:35 +02:00
Ricardo Salveti de Araujo
53430a4f25 omap4: splitting padconfs into common, 4430 and 4460
Not all padconfs are the same between 4430 and 4460, so instead of
working around this with an if, we should have an specific padconf
structure for both chips (like handling the differences between the LEDs
GPIOs and TPS).

Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@linaro.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:34 +02:00
Ricardo Salveti de Araujo
8f6a027f62 omap4: adding revision detection for 4460 ES1.1
Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@linaro.org>

 2 files changed, 17 insertions(+), 1 deletions(-)
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:33 +02:00
Ricardo Salveti de Araujo
20033c9f87 omap4: replacing OMAP4_CONTROL with OMAP4430_CONTROL
OMAP4460 has a different set of values for the ID code, so moving the
old ones to be related just with 4430.

Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@linaro.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-10-27 21:56:33 +02:00
Fabio Estevam
77f11a99e1 imx: fix coding style
Fix checkpatch warning and errors in several i.MX related files.

While at it also address a checkpatch warning at arch/arm/cpu/armv7/mx5/soc.c
regarding the usage of extern in a C file.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-10-27 21:56:32 +02:00
Simon Glass
20e18e051f tegra2: Add more pinmux functions
This adds support for changing pinmux functions of pin groups. This is done
by defining a PMUX_FUNC_... enum which can be used to select the function for
each group using pinmux_set_func(). It is also possible to enable
pullup/pulldown, and the existing tristate functionality is retained.

Also provided is a means of configuring a list of pingroups by providing a
configuration table to pinmux_config_table().

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
2011-10-27 21:56:29 +02:00
Simon Glass
c3cf49d247 tegra2: Rename PIN_ to PINGRP_
The pin groupings are better named PINGRP, since on Tegra2 they refer to
multiple pins.

Sorry about this, but better to get it right now when there is only a small
amount of code affected.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
2011-10-27 21:56:29 +02:00
Simon Glass
4ed59e70e4 tegra2: Add more clock functions
This adds most of the clock functions required by board and driver code:

-query and adjust peripheral clocks
-query and adjust PLLs
-reset and enable control

These functions are plumbed in as required.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
2011-10-27 21:56:29 +02:00
Simon Glass
03c609f69b tegra2: Rename CLOCK_PLL_ID to CLOCK_ID
Rename CLOCK_PLL_ID to CLOCK_ID which takes account of the fact that the
code now deals with both PLL clocks and source clocks.

This also tidied up the assert() to match the one sent upstream, and fixes
an error in the PWM id.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
2011-10-27 21:56:29 +02:00
Mike Frysinger
26ddff2d8d build: add missing $(AR)->$(cmd_link_o_target) update
Seems people fixed their files to use libfoo.o, but didn't actually
update the creation targets to use $(cmd_link_o_target).  Update the
rest of the Makefile's found with grep.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Simon Glass <sjg@chromium.org>
2011-10-22 01:18:41 +02:00
Simon Glass
efb2172ece Move timestamp and version files into 'generated' subdir
There is a rather subtle build problem where the build time stamp is not
updated for out-of-tree builds if there exists an in-tree build which
has a valid timestamp file. So if you do an in-tree build, then an
out-of-tree build your timestamp will not change.

The correct timestamp_autogenerated.h lives in the object tree, but it
is not always found there. The source still lives in the source tree and
when compiling version.h, it includes timestamp_autogenerated.h. Since
the current directory is always searched first, this will come from the
source tree rather than the object tree if it exists there. This affects
dependency generation also, which means that common/cmd_version.o will not
even be rebuilt if you have ever done an in-tree build.

A similar problem exists with the version file.

This change moves both files into the 'generated' subdir, which is already
used for asm-offsets.h. Then timestamp.h and version.h are updated to
include the files from there.

There are other places where these generated files are included, but I
cannot see why these don't just use the timestamp.h and version.h headers.
So this change also tidies that up.

I have tested this with in- and out-of-tree builds, but not SPL. I have
looked at various other options for fixing this, including sed on the dep
files, -I- and -include flags to gcc, but I don't think they can be made
to work. Comments welcome.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-10-17 23:57:00 +02:00
Marek Vasut
37a6d2085e MX5: Clean up the output of "clocks" command
The new output looks like this:
> clocks
PLL1            800 MHz
PLL2            665 MHz
PLL3            216 MHz

AHB          133000 kHz
IPG           66500 kHz
IPG PERCLK   665000 kHz

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
2011-09-30 22:01:05 +02:00
Marek Vasut
95c0eb198d MX5: Add AHB clock reporting and fix IPG clock reporting
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jason Liu <jason.hui@linaro.org>
Acked-by: Jason Liu <jason.hui@linaro.org>
2011-09-30 22:01:05 +02:00
Marek Vasut
bf2eaf5112 MX5: Modify the PLL decoding algorithm
The PLL decoding algorithm didn't take into account many configuration bits.
Adjust it according to Linux kernel. Also, add PLL4 for MX53.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jason Hui <jason.hui@linaro.org>
Tested-by: Jason Liu <Jason.hui@linaro.org>
2011-09-30 22:01:05 +02:00
Sanjeev Premi
939e722276 omap3: Fix compile warning
Building without option CONFIG_DISPLAY_CPUINFO leads to
this warning:
sys_info.c:50:14: warning: 'rev_s_37xx' defined but not used

Signed-off-by: Sanjeev Premi <premi@ti.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:55 +02:00
Simon Schwarz
9ea5c6efd8 omap-common: reorganize spl.c
split-up spl.c into spl.c, spl_mmc.c and spl_nand.c. This avoids problems
with missing defines if a board does not use mmc or nand. This includes
adding spl_ prefix to some functions which are now public. spl_image_t is now
a public type. Added some of the common functions to omap-common.h

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:55 +02:00
Simon Schwarz
409ef1bcfb omap3: implement boot parameter saving
Implements the saving of boot params passed by OMAP3 ROM code.

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:55 +02:00
Simon Schwarz
78ce977967 omap3: new SPL structure support
Support for the new spl structure. Using the interface defined by Aneesh V for
OMAP4

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:54 +02:00
Simon Schwarz
bb085b87e5 omap-common: add nand spl support
Add NAND support for the new SPL structure.

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:54 +02:00
Simon Schwarz
b88e42560b omap3: Configure RAM bank 0 if in SPL
OMAP3 relied on the memory config done by X-loader or Configuration Header. This
has to be reworked for the implementation of a SPL. This patch configures RAM
bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by devkit8000
are added to mem.h

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:54 +02:00
Simon Schwarz
63ffcfcbd0 omap-common/omap4: relocate early UART clock setup
Moves the early UART clock setup setup_clocks_for_console() from
preloader_console_init() to s_init() of OMAP4.

This is done to prepare for OMAP3 integration.

This patch was posted seperatly to the mailinglist but I decidet - since it is
a prereqesit for this patch to add it. Former port to ML:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/104395

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:54 +02:00
Aneesh V
4ecfcfaa9e omap4: IO settings
Tuning some IO settings for better performance and power.
And consolidate all such IO settings at one place.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-13 08:25:16 +02:00
Aneesh V
025bc4254b omap4: make SDRAM init work for ES1.0 silicon
SDRAM init was not working on ES1.0 due to a programming
error. A pointer that was passed by value to a function
was set in function emif_get_device_details(), but the effect
wouldn't be seen in the calling function. The issue came
out while testing for ES1.0 because ES1.0 doesn't have any
SDRAM chips connected to CS1

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-13 08:25:15 +02:00
Sanjeev Premi
3b690ebbbf omap: gpio: generic changes after changing API
This patch contains the generic changes required after
change to generic API in the previous patch.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-13 08:25:15 +02:00
Sanjeev Premi
81bdc155c7 omap: gpio: Use generic API
Convert all OMAP specific functions to use the common API
definitions in include/asm/gpio.h. In the process, made
few additional changes:
 - Use -EINVAL consistently. -1 was used in many places.
 - Removed one-liner static functions that were used only
   once. Replaced the content as necessary.
 - Combines implementation of functions omap_get_gpio_dataout()
   and omap_get_gpio_datain(). To do so, new static function
   _get_gpio_direction() was added.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-13 08:25:15 +02:00
Howard D. Gray
32b58ce736 ARMV7: OMAP3: Add 37xx ESx revision numbers.
OMAP3: Add 37xx ESx revision numbers.

Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
Signed-off-by: Howard D. Gray <howard.gray@matrix-vision.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-12 17:40:48 +02:00
Joel A Fernandes
569919d8e2 OMAP: Add function to get state of a GPIO output
Read directly from OMAP_GPIO_DATAOUT to get the output state of the GPIO pin

Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-12 17:40:48 +02:00
Wolfgang Denk
3aa7782ac4 tegra2: fix warning: "assert" redefined
Commit 21726a7 "Add assert() for debug assertions" caused build
warnings for all tegra2 based boards:

clock.c:36:1: warning: "assert" redefined
In file included from clock.c:29:
include/common.h:144:1: warning: this is the location of the previous definition

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
2011-09-10 16:17:25 +02:00
Stefano Babic
a4814a69d3 Makefile : fix generation of cpu related asm-offsets.h
commit 0edf8b5b2f breaks
building on a different directory with the O= parameter.
The patch wil fix this issue, generating always asm-offsets.h before
the other targets.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
CC: Wolfgang Denk <wd@denx.de>
2011-09-07 21:41:27 +02:00
Eric Benard
31c8598425 dm3730: enable dpll5
which is used to provide 120MHz to USB EHCI
This allows EHCI to work on BeagleBoard XM

Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:22 +02:00
Vaibhav Hiremath
7dd5a5be2f omap3:clock: check cpu_family before enabling clks for IVA & CAM
In case of AM3517 and AM3505 (which is OMAP3 varients), IVA2 and
ISP-CAMERA modules have been removed. So add check for cpu_family before
enabling clocks for these modules, else this impacts subsequent
power consumption and system suspend/resume functionality.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:17 +02:00
Vaibhav Hiremath
f4dac3e16c omap3:clock: configure GFX clock to 200MHz for AM/DM37x
AM/DM37x is another OMAP3 variant, where the GFX clock has been
boosted to 192MHz/200MHz. So fix the GFX_DIV value for this change.

HW Errata: Due to dependency of TV out clock of 54MHz, it is not
possible to configure GFX to 192MHz. So as per HW errats, the
recommended GFX clock is 200MHz (=CORE_CLK/2).

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:17 +02:00
Aneesh V
cabe2878a8 armv7: cache: remove flush on un-aligned invalidate
Remove the flush of boundary cache-lines done as part
of invalidate on a non cache-line boundary aligned
buffer

Also, print a warning when this situation is recognized.

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-09-04 11:36:16 +02:00
Aneesh V
882f80b993 armv7: stronger barrier for cache-maintenance operations
set-way operations need a DSB after them to ensure the
operation is complete. DMB may not be enough. Use DSB
after all operations instead of DMB.

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-09-04 11:36:16 +02:00
Aneesh V
13d4f9bd74 omap: enable caches at system start-up
Signed-off-by: Aneesh V <aneesh@ti.com>
2011-09-04 11:36:16 +02:00
Simon Glass
d07dc4993d Tegra2: Use clock and pinmux functions to simplify code
Signed-off-by: Simon Glass <sjg@chromium.org>
2011-09-04 11:36:15 +02:00
Simon Glass
858bd095e1 Tegra2: Add additional pin multiplexing features
This adds an enum for each pin and some functions for changing the pin
muxing setup.

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-09-04 11:36:15 +02:00
Simon Glass
b4ba2be8dc Tegra2: Add more clock support
This adds functions to enable/disable clocks and reset to on-chip peripherals.

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-09-04 11:36:15 +02:00
Simon Glass
39d3416f0a Tegra2: Add microsecond timer function
These functions provide access to the high resolution microsecond timer
and tidy up a global variable in the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-09-04 11:36:15 +02:00
Stefano Babic
7acec25948 MX: MX35 / MX5: uniform clock command with powerpc
There was already a command to show the processor clocks
for PowerPC (clocks). For i.MX, the "clockinfo" command
was introduce. The patch sets the same command name used on
PowerPC.
A nasty and not needed newline is also dropped in the help for
the command.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:11 +02:00
David Jander
9db1bfa110 ARM: MX51: PLL errata workaround
This is a port of the official PLL errata workaround from Freescale to
mainline u-boot.
The PLL's in the i.MX51 processor can go out of lock due to a metastable
condition in an analog flip-flop when used at high frequencies.
This workaround implements an undocumented feature in the PLL (dither
mode), which causes the effect of this failure to be much lower (in terms
of frequency deviation), avoiding system failure, or at least decreasing
the likelihood of system failure.

Signed-off-by: David Jander <david@protonic.nl>
2011-09-04 11:36:11 +02:00
Aneesh V
080a46eaf1 omap: fix gpio related build breaks
Signed-off-by: Aneesh V <aneesh@ti.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
2011-09-04 11:33:36 +02:00
Aneesh V
b4dc644291 omap4: clock init support for omap4460
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
d506719f7f omap4: support TPS programming
TPS62361 is the new power supply used in OMAP4460 that
supplies vdd_mpu.

VCORE1 from Phoenix supplies vdd_core and VCORE2 supplies
vdd_iva. VCORE3 is not used in OMAP4460.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
25223a68e5 omap: reuse omap3 gpio support in omap4
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
924eb369e3 omap4: sdram init changes for omap4460
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
5ab12a9eeb omap4: add omap4460 revision detection
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
John Rigby
3decb14abe mkimage: Add OMAP boot image support
- Add mkimage support for OMAP boot image
- Add support for OMAP boot image(MLO) generation in the new
  SPL framework

Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
8cf686e19b omap: add MMC and FAT support to SPL
- Add MMC raw and FAT mode boot support for OMAP
- Provide a means by which parameters passed by ROM-code
  can be saved in u-boot.
- Save boot mode related information passed by OMAP4 ROM-code
  and use it to determine where to load the u-boot from
- Assumes that the image has a mkimage header. Gets the
  payload size and load address from this header. If the
  header is not detected assume u-boot.bin as payload

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
bcae721162 omap: add basic SPL support
- Provide alternate implementations of board_init_f()
  board_init_r() for OMAP spl.
- Provide linker script
- Initialize global data
- Add serial console support
- Update CONFIG_SYS_TEXT_BASE to allow for SPL's bss and move
  it to board config header from config.mk

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
033ca72438 armv7: start.S: fixes and enhancements for SPL
- Allow SPL to have .bss disjoint from rest of the image
- Allow for .bss setup in CONFIG_SPL_BUILD case too.
- Take care of the special case where relocation offset = 0.
- Compile out exception handling code and install a simpler
  vector

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
1e463866f5 omap4: automatic sdram detection
Identify SDRAM devices connected to EMIF automatically:
LPDDR2 devices have some Mode Registers that provide details
about the device such as the type, density, bus width
etc. EMIF has the capability to read these registers. If there
are no devices connected to a given chip-select reading mode
registers will return junk values. After reading as many such
registers as possible and matching with expected ranges of
values the driver can identify if there is a device connected
to the respective CS. If we identify that a device is connected
the values read give us complete details about the device.

This along with the base AC timings specified by JESD209-2
allows us to do a complete automatic initialization of
SDRAM that works on all boards.

Please note that the default AC timings specified by JESD209-2
will be safe for all devices but not necessarily optimal. However,
for the Elpida devices used on Panda and SDP the default timings
are both safe and optimal.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Aneesh V
095aea293b omap4: calculate EMIF register values
Calculate EMIF register values based on AC timing parameters
from the SDRAM datasheet and the DDR frequency rather than
using the hard-coded values.

For a new board the user doen't have to go through the tedious
process of calculating the register values. Instead, just
provide the AC timings from the device data sheet as input
and the driver will automatically calculate the register values.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Aneesh V
2ae610f030 omap4: add sdram init support
Add support for the SDRAM controller (EMIF).

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Aneesh V
3776801d0a omap4: add clock support
Add support for:
1. DPLL locking
2. Initialization of clock domains and clock modules
3. Setting up the right voltage on voltage rails

This work draws upon previous work done for x-loader by:
	Santosh Shilimkar <santosh.shilimkar@ti.com>
	Rajendra Nayak <rnayak@ti.com>

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Aneesh V
ad577c8a48 omap4: add OMAP4430 revision check
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Aneesh V
469ec1e353 omap4: cleanup pin mux data
- separate mux settings into essential and non essential parts
- essential part is board independent as of now(so move it
  to SoC directory). Will help in having single SPL for all
  boards.
- Non-essential part(the pins not essential for u-boot to function)
  need to be phased out eventually.
- Correct mux data by aligning to the latest settings in x-loader

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Sanjeev Premi
80bb756dbe omap3: Include array definition only when it is used
The array of strings corresponding to cpu revision is
used only when CONFIG_DISPLAY_CPUINFO is selected - in
the function print_cpuinfo().

Enclose definition of this array in #ifdef...#endif for
the same.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:18 +02:00
Graeme Russ
17659d7de9 Timer: Remove reset_timer_masked()
In some circumstances, reset_timer_masked() was called be timer_init() in
order to perform architecture specific timer initialisation. In such
cases, the required code in reset_timer_masked() has been moved into
timer_init()
2011-07-26 14:54:15 +02:00
Graeme Russ
4769be21cc Timer: Remove reset_timer() for non-Nios2 arches 2011-07-26 14:53:30 +02:00
Graeme Russ
5c8404aff1 Timer: Remove set_timer completely 2011-07-26 14:52:17 +02:00
Aneesh V
401bb30b6d replace CONFIG_PRELOADER with CONFIG_SPL_BUILD
replace all occurences of CONFIG_PRELOADER with CONFIG_SPL_BUILD

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-26 14:44:34 +02:00
David Jander
6e25b6ce5d ARM: MX5: Fix broken leftover TO-2 errata workaround
This check was broken. r3 does not contain the silicon revision anymore, so
we need to reload it. Also, this errata only applies to i.MX51.

Signed-off-by: David Jander <david@protonic.nl>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-07-18 14:41:48 +02:00
Rob Herring
22193540c1 ARM: add missing CONFIG_SKIP_LOWLEVEL_INIT for armv7
cpu_init_crit can be skipped, but the code is still enabled requiring a
platform to supply lowlevel_init.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Albert ARIBAUD <albert.aribaud@free.fr>
2011-07-17 11:24:35 +02:00
Stefano Babic
0edf8b5b2f MX5: Update to autogenerated asm-offsets.h
On i.MX5, the asm-offsets.h file is not yet generated as it should be.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
Fabio Estevam
a6e961c292 MX5: Introduce a function for setting the chip select size
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-07-04 10:55:26 +02:00
John Rigby
aadcfc179a OMAP[34]: fix broken timer
As implemented now the timer used to implement __udelay counts
to 0xffffffff and then gets stuck there because the the programmed
reload value is 0xffffffff.  This value is not only wrong but
illegal according to the reference manual.

One can reproduce the bug by leaving a board at the u-boot prompt
for sometime then issuing a sleep command.  The sleep will hang
forever.

The timer is a count up timer that reloads as it rolls over
from 0xffffffff so the correct load value is 0.

Change TIMER_LOAD_VAL from 0xffffffff to 0 and introduce
a new constant called TIMER_OVERFLOW_VAL set to 0xffffffff.

Signed-off-by: John Rigby <john.rigby@linaro.org>
Tested-by: Igor Grinberg <grinberg@compulab.co.il>
2011-07-04 10:55:26 +02:00
Aneesh V
137db2d7f5 armv7: adapt s5pc1xx to the new cache maintenance framework
adapt s5pc1xx to the new layered cache maintenance framework

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-04 10:55:25 +02:00
Aneesh V
45bf05854b armv7: adapt omap3 to the new cache maintenance framework
adapt omap3 to the new layered cache maintenance framework

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-04 10:55:25 +02:00
Aneesh V
8b457fa828 armv7: adapt omap4 to the new cache maintenance framework
adapt omap4 to the new layered cache maintenance framework

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-04 10:55:25 +02:00
Aneesh V
c2dd0d4554 armv7: integrate cache maintenance support
- Enable I-cache on bootup
- Enable MMU and D-cache immediately after relocation
	- Do necessary initialization before enabling d-cache and MMU
- Changes to cleanup_before_linux()
	- Make changes according to the new framework

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-04 10:55:25 +02:00
Aneesh V
e47f2db537 armv7: rename cache related CONFIG flags
Replace the cache related CONFIG flags with more meaningful
names. Following are the changes:

CONFIG_L2_OFF	     -> CONFIG_SYS_L2CACHE_OFF
CONFIG_SYS_NO_ICACHE -> CONFIG_SYS_ICACHE_OFF
CONFIG_SYS_NO_DCACHE -> CONFIG_SYS_DCACHE_OFF

Signed-off-by: Aneesh V <aneesh@ti.com>
V2:
 * Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE
V4:
 * Changed all three flags to the final names suggested as above
   and accordingly changed the commit message
2011-07-04 10:55:25 +02:00
Aneesh V
2c451f7831 armv7: cache maintenance operations for armv7
- Add a framework for layered cache maintenance
	- separate out SOC specific outer cache maintenance from
	  maintenance of caches known to CPU

- Add generic ARMv7 cache maintenance operations that affect all
  caches known to ARMv7 CPUs. For instance in Cortex-A8 these
  opertions will affect both L1 and L2 caches. In Cortex-A9
  these will affect only L1 cache

- D-cache operations supported:
	- Invalidate entire D-cache
	- Invalidate D-cache range
	- Flush(clean & invalidate) entire D-cache
	- Flush D-cache range
- I-cache operations supported:
	- Invalidate entire I-cache

- Add maintenance functions for TLB, branch predictor array etc.

- Enable -march=armv7-a so that armv7 assembly instructions can be
  used

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-04 10:55:25 +02:00
Wolfgang Denk
4c9640865b Minor coding style cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-06-02 23:18:32 +02:00
John Rigby
be72e0c8c5 armv7: Add ST-Ericsson u8500 arch
Based on ST-Ericsson internal git repo.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
CC: Albert Aribaud <albert.aribaud@free.fr>
2011-06-01 19:22:41 +02:00
Minkyu Kang
b4f73910d9 S5PC2XX: clock: support pwm clock for evt1 (cpu revision 1)
The source of pwm clock is fixed at evt1.
And some registers for pwm clock are removed.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-05-26 19:33:25 +09:00
Jaehoon Chung
68a8cbfad9 S5P: add set_mmc_clk for external clock control
This patch added set_mmc_clk for external clock control.

c210 didn't support host clock control.
So We need external_clock_control function for c210.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-05-26 19:33:09 +09:00
Minkyu Kang
5d845f2758 S5PC2XX: Support the cpu revision
S5PC210 SoC have two cpu revisions, and have some difference.
So, support the cpu revision for each revision.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-05-26 19:31:11 +09:00
Chander Kashyap
b0ad862177 S5P:SROM config code moved to s5p-common directory
SROM config code is made common for S5P series of boards.
smdkc100.c now refers to s5p-common/sromc.c for SROM related
subroutines.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-05-26 19:30:46 +09:00
Fabio Estevam
aa1cb689d5 MX53: Handle silicon revision 2.1 case
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-05-23 08:36:46 +02:00
Wolfgang Denk
cd6881b519 Minor coding style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-05-19 22:22:44 +02:00
Luca Ceresoli
6cbec7b3ba ARMV7: OMAP3: Cleanup extern variables in mem.c
Removed boot_flash_* extern variables.
boot_flash_type was totally unused. The other ones were actually constants, so
they have been replaced with #defines in the board config files.

Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-04-27 19:38:10 +02:00
Tom Warren
1436d51076 arm: Tegra2: Add missing PLLX init
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-04-27 19:38:09 +02:00