Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2025-02-18 06:58:54 +00:00
Code Issues Projects Releases Packages Wiki Activity

S5P:SROM config code moved to s5p-common directory

Browse source 
SROM config code is made common for S5P series of boards.
smdkc100.c now refers to s5p-common/sromc.c for SROM related
subroutines.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
Chander Kashyap 2011-04-14 19:05:18 +00:00 • committed by Minkyu Kang
parent 920c428d0a
commit b0ad862177
6 changed files with 70 additions and 19 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
arch/arm/cpu/armv7/s5p-common/Makefile
View file

@ -27,7 +27,8 @@ LIB = $(obj)libs5p-common.o
COBJS-y += cpu_info.o
COBJS-y += timer.o
COBJS-$(CONFIG_PWM) += pwm.o
COBJS-y += sromc.o
COBJS-$(CONFIG_PWM) += pwm.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))

22
arch/arm/cpu/armv7/s5pc1xx/sromc.c → arch/arm/cpu/armv7/s5p-common/sromc.c
View file

@ -23,27 +23,27 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/smc.h>
#include <asm/arch/sromc.h>
/*
* s5pc1xx_config_sromc() - select the proper SROMC Bank and configure the
* band width control and bank control registers
* srom_bank - SROM Bank 0 to 5
* smc_bw_conf - SMC Band witdh reg configuration value
* smc_bc_conf - SMC Bank Control reg configuration value
* s5p_config_sromc() - select the proper SROMC Bank and configure the
* band width control and bank control registers
* srom_bank - SROM
* srom_bw_conf - SMC Band witdh reg configuration value
* srom_bc_conf - SMC Bank Control reg configuration value
*/
void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf)
void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf)
{
u32 tmp;
struct s5pc1xx_smc *srom =
(struct s5pc1xx_smc *)samsung_get_base_sromc();
struct s5p_sromc *srom =
(struct s5p_sromc *)samsung_get_base_sromc();
/* Configure SMC_BW register to handle proper SROMC bank */
tmp = srom->bw;
tmp &= ~(0xF << (srom_bank * 4));
tmp |= smc_bw_conf;
tmp |= srom_bw_conf;
srom->bw = tmp;
/* Configure SMC_BC register */
srom->bc[srom_bank] = smc_bc_conf;
srom->bc[srom_bank] = srom_bc_conf;
}

1
arch/arm/cpu/armv7/s5pc1xx/Makefile
View file

@ -32,7 +32,6 @@ SOBJS = cache.o
SOBJS += reset.o
COBJS += clock.o
COBJS += sromc.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))

8
arch/arm/include/asm/arch-s5pc1xx/smc.h → arch/arm/include/asm/arch-s5pc1xx/sromc.h
View file

@ -23,8 +23,8 @@
* Only SROMC is defined as of now
*/
#ifndef __ASM_ARCH_SMC_H_
#define __ASM_ARCH_SMC_H_
#ifndef __ASM_ARCH_SROMC_H_
#define __ASM_ARCH_SROMC_H_
#define SMC_DATA16_WIDTH(x) (1<<((x*4)+0))
#define SMC_BYTE_ADDR_MODE(x) (1<<((x*4)+1)) /* 0-> Half-word base address*/
@ -41,13 +41,13 @@
#define SMC_BC_PMC(x) (x << 0) /* normal(1data)page mode configuration */
#ifndef __ASSEMBLY__
struct s5pc1xx_smc {
struct s5p_sromc {
unsigned int bw;
unsigned int bc[6];
};
#endif /* __ASSEMBLY__ */
/* Configure the Band Width and Bank Control Regs for required SROMC Bank */
void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf);
void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf);
#endif /* __ASM_ARCH_SMC_H_ */

51
arch/arm/include/asm/arch-s5pc2xx/sromc.h Normal file
View file

@ -0,0 +1,51 @@
/*
* (C) Copyright 2010 Samsung Electronics
* Naveen Krishna Ch <ch.naveen@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
* Note: This file contains the register description for SROMC
*
*/
#ifndef __ASM_ARCH_SROMC_H_
#define __ASM_ARCH_SROMC_H_
#define SROMC_DATA16_WIDTH(x) (1<<((x*4)+0))
#define SROMC_BYTE_ADDR_MODE(x) (1<<((x*4)+1)) /* 0-> Half-word base address*/
/* 1-> Byte base address*/
#define SROMC_WAIT_ENABLE(x) (1<<((x*4)+2))
#define SROMC_BYTE_ENABLE(x) (1<<((x*4)+3))
#define SROMC_BC_TACS(x) (x << 28) /* address set-up */
#define SROMC_BC_TCOS(x) (x << 24) /* chip selection set-up */
#define SROMC_BC_TACC(x) (x << 16) /* access cycle */
#define SROMC_BC_TCOH(x) (x << 12) /* chip selection hold */
#define SROMC_BC_TAH(x) (x << 8) /* address holding time */
#define SROMC_BC_TACP(x) (x << 4) /* page mode access cycle */
#define SROMC_BC_PMC(x) (x << 0) /* normal(1data)page mode configuration */
#ifndef __ASSEMBLY__
struct s5p_sromc {
unsigned int bw;
unsigned int bc[4];
};
#endif /* __ASSEMBLY__ */
/* Configure the Band Width and Bank Control Regs for required SROMC Bank */
void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf);
#endif /* __ASM_ARCH_SROMC_H_ */

4
board/samsung/smdkc100/smdkc100.c
View file

@ -24,7 +24,7 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/smc.h>
#include <asm/arch/sromc.h>
#include <asm/arch/gpio.h>
#include <netdev.h>
@ -50,7 +50,7 @@ static void smc9115_pre_init(void)
| SMC_BC_TACP(0x6) | SMC_BC_PMC(0x0);
/* Select and configure the SROMC bank */
s5pc1xx_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
}
int board_init(void)