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https://github.com/AsahiLinux/u-boot
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Minor coding style cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
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parent
b79003627d
commit
4c9640865b
3 changed files with 22 additions and 22 deletions
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@ -28,8 +28,8 @@ lowlevel_init:
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.align 5
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.globl reset_cpu
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reset_cpu:
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ldr r0, =CFG_PRCMU_BASE
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ldr r1, =0x1
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str r1, [r0, #0x228]
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ldr r0, =CFG_PRCMU_BASE
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ldr r1, =0x1
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str r1, [r0, #0x228]
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_loop_forever:
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b _loop_forever
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@ -38,25 +38,25 @@
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struct gpio_register {
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u32 gpio_dat; /* data register *//*0x000 */
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u32 gpio_dats; /* data Set register *//*0x004 */
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u32 gpio_datc; /* data Clear register *//*0x008 */
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u32 gpio_pdis; /* Pull disable register *//*0x00C */
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u32 gpio_dir; /* data direction register *//*0x010 */
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u32 gpio_dirs; /* data dir Set register *//*0x014 */
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u32 gpio_dirc; /* data dir Clear register *//*0x018 */
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u32 gpio_slpm; /* Sleep mode register *//*0x01C */
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u32 gpio_afsa; /* AltFun A Select reg *//*0x020 */
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u32 gpio_afsb; /* AltFun B Select reg *//*0x024 */
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u32 gpio_lowemi;/* low EMI Select reg *//*0x028 */
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u32 gpio_dat; /* data register : 0x000 */
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u32 gpio_dats; /* data Set register : 0x004 */
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u32 gpio_datc; /* data Clear register : 0x008 */
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u32 gpio_pdis; /* Pull disable register : 0x00C */
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u32 gpio_dir; /* data direction register : 0x010 */
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u32 gpio_dirs; /* data dir Set register : 0x014 */
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u32 gpio_dirc; /* data dir Clear register : 0x018 */
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u32 gpio_slpm; /* Sleep mode register : 0x01C */
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u32 gpio_afsa; /* AltFun A Select reg : 0x020 */
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u32 gpio_afsb; /* AltFun B Select reg : 0x024 */
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u32 gpio_lowemi;/* low EMI Select reg : 0x028 */
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u32 reserved_1[(0x040 - 0x02C) >> 2]; /*0x028-0x3C Reserved*/
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u32 gpio_rimsc; /* rising edge intr set/clear *//*0x040 */
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u32 gpio_fimsc; /* falling edge intr set/clear register *//*0x044 */
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u32 gpio_mis; /* masked interrupt status register *//*0x048 */
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u32 gpio_ic; /* Interrupt Clear register *//*0x04C */
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u32 gpio_rwimsc;/* Rising-edge Wakeup IMSC register *//*0x050 */
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u32 gpio_fwimsc;/* Falling-edge Wakeup IMSC register *//*0x054 */
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u32 gpio_wks; /* Wakeup Status register *//*0x058 */
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u32 gpio_rimsc; /* rising edge intr set/clear : 0x040 */
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u32 gpio_fimsc; /* falling edge intr set/clear register : 0x044 */
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u32 gpio_mis; /* masked interrupt status register : 0x048 */
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u32 gpio_ic; /* Interrupt Clear register : 0x04C */
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u32 gpio_rwimsc;/* Rising-edge Wakeup IMSC register : 0x050 */
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u32 gpio_fwimsc;/* Falling-edge Wakeup IMSC register : 0x054 */
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u32 gpio_wks; /* Wakeup Status register : 0x058 */
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};
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/* Error values returned by functions */
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@ -50,7 +50,7 @@ lowlevel_init:
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/* check reset status */
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ldr r0, =(S5PC210_POWER_BASE + 0x81C) @ INFORM7
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ldr r1, [r0]
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ldr r1, [r0]
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/* AFTR wakeup reset */
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ldr r2, =S5P_CHECK_DIDLE
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