DRA7 evm REV G and later boards uses a vtt regulator for DDR3 termination
and this is controlled by gpio7_11. Configuring gpio7_11.
The pad A22(offset 0x3b4) is used by gpio7_11 on REV G and later boards,
and left unused on previous boards, so it is safe enough to enable gpio
on all DRA7 boards.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
- Drop CONFIG_SERIAL[1-6] and use CONFIG_CONS_INDEX tests instead
- Add choice and help text to board/ti/am335x/Kconfig
- Correct comment about IDK in board/ti/am335x/mux.c
- Remove am335x_evm_uart* defconfig files as they're just variations
on a config option now.
Signed-off-by: Tom Rini <trini@ti.com>
Boot from eMMC boot partition corresponds to BOOT_DEVICE_MMC2
omap_bootmode, while BOOT_DEVICE_MMC2_2 corresponds to the user
data partition boot.
Fix mmc_get_env_part() boot mode check to use a correct value.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Fix cl_eeprom_read_mac_addr() return value check.
Fix long line codding style issue in board_init().
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
This patch reads EFUSE_BOOTROM register to see the maximum supported
clock for CORE and TETRIS PLLs and configure them accordingly.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
This patch adds support for parallel NOR device (S29GL512S10) present on J6-EVM.
The Flash device is connected to GPMC controller on chip-select[0] and accessed
as memory-mapped device. It has data-witdh=x16, capacity-64MBytes(512Mbits) and
is CFI compatible.
As multiple devices are share GPMC pins on this board, so following board
settings are required to detect NOR device:
SW5.1 (NAND_BOOTn) = OFF (logic-1)
SW5.2 (NOR_BOOTn) = ON (logic-0) /* Active-low */
SW5.3 (eMMC_BOOTn) = OFF (logic-1)
SW5.4 (QSPI_BOOTn) = OFF (logic-1)
And also set appropriate SYSBOOT configurations:
SW3.1 (SYSBOOT[ 8])= ON (logic-1) /* selects SYS_CLK1 speed */
SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */
SW3.3 (SYSBOOT[10])= ON (logic-1) /* wait-pin monitoring = enabled */
SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Non Muxed */
SW3.5 (SYSBOOT[12])= OFF (logic-0) /* device type: Non Muxed */
SW3.6 (SYSBOOT[13])= ON (logic-1) /* device bus-width: 1(x16) */
SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */
SW3.8 (SYSBOOT[15])= ON (logic-1) /* reserved */
Also, following changes are required to enable NOR Flash support in
dra7xx_evm board profile:
This patch adds support for NAND device connected to GPMC chip-select on
following AM43xx EVM boards.
am437x-gp-evm: On this board, NAND Flash signals are muxed with eMMC, thus at a
time either eMMC or NAND can be enabled. Selection between eMMC and NAND is
controlled by:
(a) Statically using Jumper on connecter (J89) present on board.
(a) If Jumper on J89 is NOT used, then selection can be dynamically controlled
by driving SPI2_CS0[MUX_MODE=GPIO] pin via software:
SPI2_CS0 == 0: NAND (default)
SPI2_CS0 == 1: eMMC
am43x-epos-evm: On this board, NAND Flash control lines are muxed with QSPI,
Thus only one of the two can be used at a time. Selection is controlled by:
(a) Dynamically driving following GPIO pin from software
GPMC_A0(GPIO) == 0 NAND is selected (default)
NAND device (MT29F4G08AB) on these boards has:
- data-width=8bits
- blocksize=256KB
- pagesize=4KB
- oobsize=224 bytes
For above NAND device, ROM code expects the boot-loader to be flashed in BCH16
ECC scheme for NAND boot, So by default BCH16 ECC is enabled for AM43xx EVMs.
Signed-off-by: Pekon Gupta <pekon@ti.com>
This patch adds support of NOR cape[1] for both Beaglebone (white) and
Beaglebone(Black) boards. NOR Flash on this cape is connected to GPMC
chip-select[0] and accesses as external memory-mapped device.
This cape has 128Mbits(16MBytes), x16, CFI compatible NOR Flash device.
As GPMC chip-select[0] can be shared by multiple capes so NOR profile is
not enabled by default in boards.cfg. Following changes are required to
enable NOR cape detection when building am335x_boneblack board profile.
Signed-off-by: Tom Rini <trini@ti.com>
Beaglebone Board can be connected to expansion boards to add devices to them.
These expansion boards are called 'capes'. This patch adds support for
following versions of Beaglebone(AM335x) NAND capes
(a) NAND Device with bus-width=16, block-size=128k, page-size=2k, oob-size=64
(b) NAND Device with bus-width=16, block-size=256k, page-size=4k, oob-size=224
Further information and datasheets can be found at [1] and [2]
* How to boot from NAND using Memory Expander + NAND Cape ? *
- Important: As BOOTSEL values are sampled only at POR, so after changing any
setting on SW2 (DIP switch), disconnect and reconnect all board power supply
(including mini-USB console port) to POR the beaglebone.
- Selection of ECC scheme
for NAND cape(a), ROM code expects BCH8_HW ecc-scheme
for NAND cape(b), ROM code expects BCH16_HW ecc-scheme
- Selction of boot modes can be controlled via DIP switch(SW2) present on
Memory Expander cape.
SW2[SWITCH_BOOT] == OFF follow default boot order MMC-> SPI -> UART -> USB
SW2[SWITCH_BOOT] == ON boot mode selected via DIP switch(SW2)
So to flash NAND, first boot via MMC or other sources and then switch to
SW2[SWITCH_BOOT]=ON to boot from NAND Cape.
- For NAND boot following switch settings need to be followed
SW2[ 1] = OFF (SYSBOOT[ 0]==1: NAND boot mode selected )
SW2[ 2] = OFF (SYSBOOT[ 1]==1: -- do -- )
SW2[ 3] = ON (SYSBOOT[ 2]==0: -- do -- )
SW2[ 4] = ON (SYSBOOT[ 3]==0: -- do -- )
SW2[ 5] = OFF (SYSBOOT[ 4]==1: -- do -- )
SW2[ 6] = OFF (SYSBOOT[ 8]==1: 0:x8 device, 1:x16 device )
SW2[ 7] = ON (SYSBOOT[ 9]==0: ECC done by ROM )
SW2[ 8] = ON (SYSBOOT[10]==0: Non Muxed device )
SW2[ 9] = ON (SYSBOOT[11]==0: -- do -- )
[1] http://beagleboardtoys.info/index.php?title=BeagleBone_Memory_Expansion
[2] http://beagleboardtoys.info/index.php?title=BeagleBone_4Gb_16-Bit_NAND_Module
*IMPORTANT NOTE*
As Beaglebone board shares the same config as AM335x EVM, so following
changes are required in addition to this patch for Beaglebone NAND cape.
(1) Enable NAND in am335x_beaglebone board profile
(2) Add CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config because:
- AM335x EVM has NAND device with datawidth=8, whereas
- Beaglebone NAND cape has NAND device with data-width=16
Emails to Sandeep Paulraj <s-paulraj@ti.com>
have been bouncing.
Please assign new maintainer(s) to get these boards
back to Maintained.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Emails to the board maintainer
"Rishi Bhattacharya <rishi@ti.com>"
have been bouncing.
Tom suggested to remove this board.
Remove also omap1510_udc.c because this is the last board
to enable it.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Suggested-by: Tom Rini <trini@ti.com>
There is the requirement on the chassis's backplane that when the clocks
have been enabled, they then should not disappear.
Resetting the Zarlink clocking chips at unit reset violates this
requirement because the backplane clocks are not supplied during the
reset time.
To avoid this side effect, both the Zarlink clocking chips are reset
only at power up.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
XFI is supported on T4QDS-XFI board, which removed slot3, and four LANEs
of serdes2 are routed to a SFP+ cages, which to house fiber cable or
direct attach cable(copper), the copper cable is used to emulate the
10GBASE-KR scenario.
So, for XFI usage, there are two scenarios, one will use fiber cable,
another will use copper cable. For fiber cable, there is NO PHY, while
for copper cable, we need to use internal PHY which exist in Serdes to
do auto-negotiation and link training, which implemented in kernel.
We use hwconfig to define cable type for XFI, and fixup dtb based on the
cable type.
For copper cable, set below env in hwconfig:
fsl_10gkr_copper:<10g_mac_name>
the <10g_mac_name> can be fm1_10g1, fm1_10g2, fm2_10g1, fm2_10g2. The
four <10g_mac_name>s do not have to be coexist in hwconfig. For XFI ports,
if a given 10G port will use the copper cable for 10GBASE-KR, set the
<10g_mac_name> of the port in hwconfig, otherwise, fiber cable will be
assumed to be used for the port.
For ex. if four XFI ports will both use copper cable, the hwconfig
should contain:
fsl_10gkr_copper:fm1_10g1,fm1_10g2,fm2_10g1,fm2_10g2
For fiber cable:
1. give PHY address to a XFI port, otherwise, the XFI ports will not be
available in U-boot, there is no PHY physically for XFI when using fiber
cable, this is just to make U-boot happy and we can use the XFI ports
in U-boot.
2. fixup dtb to use fixed-link in case of fiber cable which has no PHY.
Kernel requests that a MAC must have a PHY or fixed-link.
When using XFI protocol, the MAC 9/10 on FM1 should init as 10G interface.
Change serdes 2 protocol 56 to 55 which has same feature as 56 since 56
is not valid any longer.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
mx6sxsabresd board has 2 FEC ports, each one connected to a AR8031.
Add support for one FEC port initially.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
mx6sxsabresd was not in the master branch when the conversion to the new Kconfig
style happened, so convert it now so that it can build again.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
It is necessary to provide the same Vendor and Product IDs as the one in
the original Linux kernel code.
Without this change the USB mass storage gadget is not working with Windows7.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
The Gateworks Ventana EEPROM contains a set of configuration bits that
affect the removal of device-tree nodes that support peripherals that do not
exist on sub-loaded boards. This patch adds:
- a structure to define a config bit name, dt node alias, bit position
- an array of supported configuration items
- an econfig command to get/set/list configuration bits
- use of the array when adjusting the FDT prior to boot
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The PCISKT_WDIS# gpio allows for asserting WDIS# going to the various PCIe
sockets on the Ventana board.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The i2c_dis# pinmux/padconf was missing for the GW53xx (this feature was
added to the GW53xx on revB PCB's). Additionally, remove the duplicate
config for GW54xx.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The Gateworks System Controller EEPROM config is flash based. Add a delay
following writes to avoid errors on back-to-back writes.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
NAND devices have differing layouts with respect to page size and pages per
block. These parameters affect the parameters that need to be passed to
mkfs.ubifs and ubinize used to create UBI images. The various NAND chips
supported by Gateworks Ventana fall into two different layouts which we
refer to as 'normal' and 'large'. This layout is useful when referencing
ubi files to download and flash so we create a dynamic env variable for it.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Use the latest DDR initialization values suggested by the FSL hardware team.
While at it, add some comments for clarification.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Currently I don't have access to a mx31pdk board.
Magnus was the original maintainer of the board and accepted to take back
this role.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Magnus Lilja <lilja.magnus@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Now that Kconfig has a per-board option, we can use that directly rather
than inventing a custom define for the AS3722 code to determine which
board it's being built for.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This adds board support for the Toradex Colibri T30 module.
Working functions:
- SD card boot
- eMMC environment and boot
- USB host/USB client (on the dual role port)
- Network (via ASIX USB)
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Tom Warren <twarren@nvidia.com>
On MarS usdhc3 is eMMC, on RIoT usdhc3 is uSD and eMMC is usdhc4.
Don't run the MarS specific eMMC reset code on usdhc3 when
board_type == BOARD_IS_RIOTBOARD
Signed-off-by: Iain Paton <ipaton0@gmail.com>
aristainetos board was merged in u-boot-imx before
Kconfig was integrated, but it is not yet
mainline.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Add deep sleep support in SPI/SD boot. The destination address
second stage uboot image is loaded to is changed because
currently this address will be used by kernel which means
we can't reserve it for resume.
Entry point to kernel is still placed in second stage uboot.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
T1042 has internal display interface unit (DIU) for driving video.
T1042RDB supports video mode via
-LCD using TI enconder
-HDMI type interface via HDMI encoder
Chrontel, CH7301C encoder which is I2C programmable is used
as HDMI connector on T1042RDB.
This patch add support to
-enable Video interface for T1042RDB
-route qixis multiplexing to enable DIU-HDMI interface on board
-program DIU pixel clock gerenartor for T1042
-program HDMI encoder via I2C on board
This patch refer to the upstream diu patch
(337b0c52b3) for T1040qds.
Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
[York Sun: resolve conflict and move changes to T104xRDB.h]
Reviewed-by: York Sun <yorksun@freescale.com>
The ch7301 encoder not only used in t1040qds platform, so we split
it for t1042rdb and LSx platform.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Automatic booting using an extlinux.conf file requires various environment
variables to be set.
Also modify CONFIG_SYS_LOAD_ADDR and CONFIG_STANDALONE_LOAD_ADDR to match
the value chosen for kernel_addr_r, see the added comment for why the new
value is chosen.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
SYS_CPU, SYS_BOARD and SYS_SOC are identical for all sunxi boards, move
them to a shared code block.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
It is redundant to use 'PFUZE100_PMIC' as the PMIC name because we already
know it is a PMIC.
Call it simply 'PFUZE100' instead.
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Markus Niebel <Markus.Niebel@tq-group.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
This patch configures the qrio to trigger a core reset on
a CPU reset request.
Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
To acheive this, the qrio_uprstreq() function that sets the UPRSTREQN
flag in the qrio RESCNF reg is added.
Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Check the core timer status register (TSR) for watchdog reset,
and and set the QRIO's reset reason flag REASON1[0] accordingly.
This allows the appliction SW to identify the cpu watchdog as a
reset reason, by setting the REASON1[0] flag in the QRIO.
Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
To achieve this, the qrio_cpuwd_flag() function that sets the CPU watchdog
flag in the REASON1 reg is added.
Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The Banana Pi is an A20 based development board using Raspberry Pi compatible
IO headers. It comes with 1 GB RAM, 1 Gb ethernet, 2x USB host, sata, hdmi
and stereo audio out + various expansion headers:
http://www.lemaker.org/
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Add support for boards which I own and which already have a dts file in the
upstream kernel.
Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Add support for boards which I own and which already have a dts file in the
upstream kernel.
Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Add support for boards which I own and which already have a dts file in the
upstream kernel.
Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done
for sun7i only since I don't have access to any other sunxi platforms
with sata included.
The PHY setup is derived from the Alwinner releases and Linux, but is mostly
undocumented.
The Allwinner AHCI controller also requires some magic (and, again,
undocumented) DMA initialisation when starting a port. This is added under a
suitable ifdef.
This option is enabled for Cubieboard, Cubieboard2 and Cubietruck based on
contents of Linux DTS files, including SATA power pin config taken from the
DTS. All build tested, but runtime tested on Cubieboard2 and Cubietruck only.
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
We have switched to Kconfig and the boards.cfg file is going to
be removed. We have to retrieve the board status and maintainers
information from it.
The MAINTAINERS format as in Linux Kernel would be nice
because we can crib the scripts/get_maintainer.pl script.
After some discussion, we chose to put a MAINTAINERS file under each
board directory, not the top-level one because we want to collect
relevant information for a board into a single place.
TODO:
Modify get_maintainer.pl to scan multiple MAINTAINERS files.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Suggested-by: Tom Rini <trini@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
This commit adds:
- arch/${ARCH}/Kconfig
provide a menu to select target boards
- board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig
set CONFIG macros to the appropriate values for each board
- configs/${TARGET_BOARD}_defconfig
default setting of each board
(This commit was automatically generated by a conversion script
based on boards.cfg)
In Linux Kernel, defconfig files are located under
arch/${ARCH}/configs/ directory.
It works in Linux Kernel since ARCH is always given from the
command line for cross compile.
But in U-Boot, ARCH is not given from the command line.
Which means we cannot know ARCH until the board configuration is done.
That is why all the "*_defconfig" files should be gathered into a
single directory ./configs/.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
It's convenient to hold configurations for DDR3 PHY and EMIF in
separate common place. This patch moves K2HK DDR3 PHY and EMIF
configuration data with different rates and memory size to a common
ddr3_cfg.c file.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
This patch moves K2HK board directory to a common Keystone II board
directory. The Board related common functions are moved to a common
keystone board file.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
With latest v3.13 kernel, unitrd dt fixup is not needed. However for
older kernel versions such as v3.8/v3.10, it is needed. So to work
with both, add a u-boot env variable that can be set to do dt fixup
for older kernels.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Use KS2_ prefix in all definitions, for that replace K2HK_ prefix and
add KS2_ prefix where it's needed. It requires to change names also
in places where they're used. Align lines and remove redundant
definitions in kardware-k2hk.h at the same time.
Using common KS2_ prefix helps resolve redundant redefinitions and
adds opportunity to use KS2_ definition across a project not thinking about
what SoC should be used. It's more convenient and we don't need to worry
about the SoC type in common files, hardware.h will think about that.
The hardware.h decides definitions of what SoC to use.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
The SoC related common functions in board.c should be placed to
a common keystone.c arch file.
Acked-by: Murali Karicheri <m-maricheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
It's convinient to hold ddr3 function definitions in separate file
such as ddr3.h. So move this from hardware.h to ddr3.h.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
As noted by clang, we have been shifting certain values out of 32bit
range when setting some DDR registers. Upon further inspection these
had been touching reserved fields (and having no impact). These came in
from historical bring-up code and can be discarded. Similarly, we had
been declaring some fields as 0 when they will be initialized that way.
Tested on Beaglebone White.
Reported-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Cc: Ash Charles <ash@gumstix.com>
Signed-off-by: Tom Rini <trini@ti.com>
Tested-By: Ash Charles <ashcharles@gmail.com>
Add script to automate NAND flash process. As for now the board has
two burn scripts - burn to boot from SPI NOR flash and burn to boot
from AEMIF NAND flash, rename burn_uboot script to burn_uboot_spi.
Also update README to contain NAND burn U-boot process description.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Add in an init function for the drivers/power framework so we can dump
and read the registers via i2c.
Cc: Łukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Tom Rini <trini@ti.com>
The alt board has R8A7794, 1GB DDR3-SDRAM, USB, Ethernet, QSPI,
MMC, SDHI and more.
This commit supports the following functions:
- DDR3-SDRAM
- SCIF
- I2C
- Ethernet
- QSPI
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
The files ps7_init.c and ps7_init.h are supposed to be generated by
hw projects such as Vivado, PlanAhead and then to be copied into
board/xilinx/zynq directory.
But some prototypes in them cause annoying warning messages:
CC spl/board/xilinx/zynq/ps7_init.o
In file included from board/xilinx/zynq/ps7_init.c:50:0:
board/xilinx/zynq/ps7_init.h:137:1: warning: function declaration isn't a prototype [-Wstrict-prototypes]
board/xilinx/zynq/ps7_init.h:138:1: warning: function declaration isn't a prototype [-Wstrict-prototypes]
board/xilinx/zynq/ps7_init.h:139:1: warning: function declaration isn't a prototype [-Wstrict-prototypes]
board/xilinx/zynq/ps7_init.h:145:1: warning: function declaration isn't a prototype [-Wstrict-prototypes]
board/xilinx/zynq/ps7_init.c:12602:1: warning: function declaration isn't a prototype [-Wstrict-prototypes]
board/xilinx/zynq/ps7_init.c:12723:1: warning: function declaration isn't a prototype [-Wstrict-prototypes]
board/xilinx/zynq/ps7_init.c:12742:1: warning: function declaration isn't a prototype [-Wstrict-prototypes]
board/xilinx/zynq/ps7_init.c:12761:1: warning: function declaration isn't a prototype [-Wstrict-prototypes]
board/xilinx/zynq/ps7_init.c:12854:6: warning: function declaration isn't a prototype [-Wstrict-prototypes]
The prototypes should be
int ps7_init(void);
int ps7_post_config(void);
int ps7_debug(void);
rather than
int ps7_init();
int ps7_post_config();
int ps7_debug();
We do not want to be bothered because of automatically generated files.
But we cannot touch the external projects for now.
What we can do is to disable -Wstrict-prototypes for ps7_init.c
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
At present stdio device functions do not get any clue as to which stdio
device is being acted on. Some implementations go to great lengths to work
around this, such as defining a whole separate set of functions for each
possible device.
For driver model we need to associate a stdio_dev with a device. It doesn't
seem possible to continue with this work-around approach.
Instead, add a stdio_dev pointer to each of the stdio member functions.
Note: The serial drivers have the same problem, but it is not strictly
necessary to fix that to get driver model running. Also, if we convert
serial over to driver model the problem will go away.
Code size increases by 244 bytes for Thumb2 and 428 for PowerPC.
22: stdio: Pass device pointer to stdio methods
arm: (for 2/2 boards) all +244.0 bss -4.0 text +248.0
powerpc: (for 1/1 boards) all +428.0 text +428.0
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
There is no point in setting a structure's memory to NULL when it has
already been zeroed with memset().
Also, there is no need to create a stub function for stdio to call - if the
function is NULL it will not be called.
This is a clean-up, with no change in functionality.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
This patch adds the changes to boards.cfg and the board directory
under board/tqc.
TQMa6 is a family of modules based on Freescale i.MX6. It consists of
TQMa6Q (i.MX6 Quad), TQMa6D (i.MX6 Dual) featuring eMMC, and 1 GiB DDR3
TQMa6S (i.MX6 Solo) featuring eMMC and 512 MiB DDR3
The modules need a baseboard. Initially the MBa6x starterkit mainboard is
supported. To easy support for other mainboards the functionality is splitted
in one file for the module (tqma6.c) and one file for the baseboard (tqma6_
mba6).
The modules can be boot from eMMC (on USDHC3) and SPI flash.
The following features are supported:
- MMC: eMMC on module (on USDHC3) and SD-card (on MBa6x mainboard)
- Ethernet: RGMII using micrel KSZ9031 phy on MBa6x mainboard for TQMa6<x> module.
The phy needs special configurations for the pad skew registers to adjust for
the signal routing.
Also support for standard ethernet commands and uppdate via tftp.
- SPI: ECSPI1 with bootable serial flash on module and two additional
chip selects on MBa6x
- I2C: This patch adds support for the I2C busses on the TQMa6<x> modules (I2C3)
and MBa6x baseboards (I2C1). The LM75 temperature sensors on TQMa6<x> and MBa6x
are also configured.
- USB: high speed host 1 on MBa6x and support for USB storage
- PMIC: support for pfuze 100 on TQMa6<x>
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
There is no need to keep iomuxc_base_regs structure as it serves the exact same
purpose of the iomuxc structure, which is to provide access to the GPR
registers.
The additional fields of iomuxc_base_regs are not used. Other advantage of
'iomuxc' is that it has a shorter name and the variable declarations can fit
into a single line.
So remove iomuxc_base_regs structure and use iomuxc instead.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
T4240 has 4 serdes, each serdes has 4k memory space, two PLLs.
We use PLL1CR0 to check the serdes reference clock.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
find_tlb_idx() is called in board_early_init_r() on multiple boards.
The return value is not checked before being used to disable a TLB.
In normal case the return value wouldn't be -1. In case of a mis-
configuration during porting to a new board, checking the return value
may be helpful to reveal some user errors.
Signed-off-by: York Sun <yorksun@freescale.com>
Since P1023RDS is no longer supported/manufactured by Freescale,
we clean up P1023RDS related code.
Since P1023RDB is still supported by Freescale,
we keep P1023RDB releated code.
Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The latest GCC is so clever that it reports more warnings
than old ones did:
------------------------------>8------------------------------
board/freescale/m5253demo/flash.c: In function 'flash_get_offsets':
board/freescale/m5253demo/flash.c:65:23: warning: iteration 2047u
invokes undefined behavior [-Waggressive-loop-optimizations]
info->start[k + 1] = info->start[k] + CONFIG_SYS_SST_SECTSZ;
^
board/freescale/m5253demo/flash.c:64:3: note: containing loop
for (k = 0, j = 0; j < CONFIG_SYS_SST_SECT; j++, k++) {
^
------------------------------8<------------------------------
The cause of the warning is like this:
The for statement iterates 2048 times in flash_get_offsets() func.
(Notice CONFIG_SYS_SST_SECT is defined as 2048)
The last iteration does
info->start[2048] = info->start[2047] + CONFIG_SYS_SST_SECTSZ;
causing an undefined behavior.
(Please note the array size of info->start is 2048.
CONFIG_SYS_MAX_FLASH_SECT is defined as 2048 for this board.)
This commit fixes that so as not to overrun the info->start array.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Jason Jin <Jason.jin@freescale.com>
There is only one line diff between LEON2 and LEON3 linker scripts:
- arch/sparc/cpu/leon2/start.o (.text)
+ arch/sparc/cpu/leon3/start.o (.text)
They can be written in the same way:
*/start.o (.text)
So, board/gaisler/grsim_leon2/u-boot.lds
and arch/sparc/cpu/leon3/u-boot.lds
can be merged into arch/sparc/cpu/u-boot.lds.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Daniel Hellstrom <daniel@gaisler.com>
The linker scripts of LEON3
- board/gaisler/grsim/u-boot.lds
- board/gaisler/gr_cpci_ax2000/u-boot.lds
- board/gaisler/gr_ep2s60/u-boot.lds
- board/gaisler/gr_xc3s_1500/u-boot.lds
are the same (except cosmetic differences such as indentation).
This commit merges them into arch/sparc/cpu/leon3/u-boot.lds.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Daniel Hellstrom <daniel@gaisler.com>
Rather than calling do_source directly (which is not officially exported
from cmd_source.c) call 'source' which is exported and requires a little
less code to do so as well.
Signed-off-by: Tom Rini <trini@ti.com>
This is a sun7i (A20) based followup to the sun4i (A10)
Cubieboard. It has GMAC using MII mode.
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Similar to the USB NIC found on OMAP5uEVM, PandaBoard and BeagleBoard-XM
boards, the sunxi SoCs have a NIC onboard without an embedded MAC address.
Just like the omap used on these boards, the sunxi SoCs do have a unique chip
id, in the form of the 128 bit SID register:
http://linux-sunxi.org/SID_Register_Guide
So mimick the BeagleBoard-XM board code (commit 548a64d8) and use the chip id
to generate a unique fixed MAC address.
We check for the SID not being all 0, since some early A20 batches
shipped without having there SID programmed.
Note we use specific parts of the 128 bits, since some parts indicate the
SoC family / revision, and thus are fixed. The algorithm for this was taken
from the linux-sunxi.org kernels.
Signed-off-by: Jonathan Liu <net147@gmail.com>
[hdegoede@redhat.com: Expanded the commit message with some more info]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Add support for the x-powers axp152 pmic which is found on most A10s boards
and enable it for the r7-tv-dongle board.
Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Add support for the x-powers axp209 pmic which is found on most A10, A13 and
A20 boards.
And enable AXP209 support for the Cubietruck and Cubieboard boards.
Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Add support for the i2c controller found on all Allwinner sunxi SoCs,
this is the same controller as found on the Marvell orion5x and kirkwood
SoC families, with a slightly different register layout, so this patch uses
the existing mvtwsi code.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Heiko Schocher <hs@denx.de>
[ ijc -- updated u-boot-spl-fel.lds ]
For proper displayport performance, scrambling has to be enabled, but
is turned off on DP501 by default.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
The I2C bridge on DP501 supports EDID, MCCS and HDCP by default.
Allow EDID only to avoid I2C address conflicts.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
readl was called with values instead of pointers to these values.
Why this ever did work is a mystery...
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* Boot failures have been discovered due to a combination of routing issues and
non optimal ddr3 timings in the EMIF
* Since ddr3 timings are different after significant board layout changes
different timings are required for alpha, beta and production boards.
Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
J6 EVM can be built with UART3 as console, but currently
there's nothing muxing UART3 correctly. Likely this only
works because, based on commit log, author was only testing
with UART3 boot and - I assume - ROM code leave UART3 correctly
muxed in that case.
If we want to boot from MMC and still use UART3 as console,
then we need to mux those signals correctly.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Many A20 boards (ie Cubieboard2, A20-OLinuXino_MICRO) use an 100 Mbit MII
phy together with the GMAC nic found in the A20 SoC, add support for this
(this will get used when we add these boards in a later patch).
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Add support for the Allwinner A13 and A10s SoCs also know as the Allwinner
sun5i family, and the A13-OLinuXinoM A13 based and r7-tv-dongle A10s based
boards.
The only differences compared to the already supported sun4i and sun7i
families are all in the DRAM controller initialization:
-Different hcpr values
-Different MBUS settings
-Some other small initialization changes
Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Oliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Add support for the Allwinner A10 SoC also known as the Allwinner sun4i family,
and add the Cubieboard board which uses the A10 SoC.
Compared to sun7 only the DRAM controller is a bit different:
-Controller reset bits are inverted, but only for Rev. A
-Different hpcr values
-No MBUS on sun4i
-Various other initialization changes
Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Oliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
To move the arch common function away from board folder to
arch/arm/cpu/armv7/socfpga folder. Its to avoid code duplication
for other non Altera dev kit which is using socfpga device.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Detlev Zundel <dzu@denx.de>
Scan Manager driver will be called to configure the IOCSR
scan chain. This configuration will setup the IO buffer settings
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
This patch returns back support for old ep93xx processors family
Signed-off-by: Sergey Kostanbaev <sergey.kostanbaev@gmail.com>
Cc: albert.u.boot@aribaud.net
LS2085A is an ARMv8 implementation. This adds board support for emulator
and simulator:
Two DDR controllers
UART2 is used as the console
IFC timing is tightened for speedy booting
Support DDR3 and DDR4 as separated targets
Management Complex (MC) is enabled
Support for GIC 500 (based on GICv3 arch)
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
The armv8 ARM Trusted Firmware (ATF) can be used to load various ATF
images and u-boot, and does this for virtual platforms by using
semihosting. This commit extends this idea by allowing u-boot to also
use semihosting to load the kernel/ramdisk/dtb. This eliminates the need
for a bootwrapper and produces a more realistic boot sequence with
virtual models.
Though the semihosting code is quite generic, support for armv7 in
fastmodel is less useful due to the wide range of available silicon
and the lack of a free armv7 fastmodel, so this change contains an
untested armv7 placeholder for the service trap opcode.
Please refer to doc/README.semihosting for a more detailed description
of semihosting and how it is used with the armv8 virtual platforms.
Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Cc: trini@ti.com
Cc: fenghua@phytium.com.cn
Cc: bhupesh.sharma@freescale.com
The u-boot Overo board actually supports both Overo (OMAP35xx)
and Overo Storm (AM/DM37xx) COMs with a range of different expansion
boards. This provides a mechanism to select the an appropriate device
tree file based on the processor version and, if available, the
expansion board ID written on the expansion board EEPROM. To match the
3.15+ kernels, fdtfile names have this format:
"omap3-overo[-storm]-<expansion board name>.dtb"
By default, we use "omap3-overo-storm-tobi.dtb".
Signed-off-by: Ash Charles <ashcharles@gmail.com>
Conflicts:
include/configs/omap3_overo.h
AM437x Starter Kit has a qspi flash and gbit ethernet
support. By muxing those signals, we can use those
interfaces from u-boot.
Signed-off-by: Felipe Balbi <balbi@ti.com>
AM43xx Starter Kit is a new board based on
AM437x line of SoCs. Being a low-cost EVM and
small size EVM are intended to provide an entry
level development platform on a full fledged
Hardware System.
Signed-off-by: Felipe Balbi <balbi@ti.com>
when porting u-boot to a new am43xx board, it
helps to know the name of the current unsupported
board so we don't have to hunt for design documents
to figure out what's written in the EEPROM.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Move AEMIF driver to drivers/memory/ti-aemif.c along with AEMIF
definitions collected in arch/arm/include/asm/ti-common/ti-aemif.h
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
The definitions inside emif_defs.h concern davinci nand driver and
should be in it's header. So create header file for davinci nand
driver and move definitions from emif_defs.h and nand_defs.h to it.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
[trini: Fixup more davinci breakage]
Signed-off-by: Tom Rini <trini@ti.com>
nios-32 arch was removed back in 2010 (1117cbf). Code depending on
its headers (nios.h, nios-io.h) can't possibly compile since then.
As it wasn't fixed till now it is safe to remove.
Signed-off-by: Vasili Galka <vvv444@gmail.com>
commit 18b06652cd "tools: include u-boot version of sha256.h"
unconditionally forced the sha256.h from u-boot to be used
for tools instead of the host version. This is fragile though
as it will also include the host version. Therefore move it
to include/u-boot to join u-boot/md5.h etc which were renamed
for the same reason.
cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Fix the following warning messages:
In function 'flash_erase': 180:21:
warning: variable 'last' set but not used [-Wunused-but-set-variable]
In function 'write_buff': 322:10:
warning: variable 'port_width' set but not used [-Wunused-but-set-variable]
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
From comparison of current logic and the logic that was prior to commit
aba27ac, we see that first parameter of FPGA_GET_REG() shall be the
FPGA index and not channel number. The re-factoring in commit aba27ac
accidentally changed that.
Cc: Stefan Roese <sr@denx.de>
Acked-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Vasili Galka <vvv444@gmail.com>
Generic board support is now enabled for Exynos 4, and if any
init function returns an error then the init process is stopped.
This makes a boot issue on the Trats and Trats2 devices. If the device
is supplied by USB cable or an external power supply then it can't boot
because function exynos_power_init returns an error. Now this function
returns 0 if battery is not connected.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Piotr Wilczek <p.wilczek@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Explain the necessary steps in order to boot from SPI NOR.
Based on a earlier submission from Mårten Wikman.
Signed-off-by: Mårten Wikman <marten.wikman@novia.fi>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Clang interpretes an if condition like "if ((a = b) == NULL)
as it tries to assign a value in a statement. Hence if you do
"if ((something)) it warns you that you might be confused.
Hence drop the double braces for plane if statements.
cc: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Most of the warnings seem to be related to using 'int' for size_t. Change
this and fix up the remaining warnings and problems. For bootm, the warning
was masked by others, and there is an actual bug in the code.
Signed-off-by: Simon Glass <sjg@chromium.org>
run_command() returns 0 for success, 1 for failure. Fix places which
assume that failure is indicated by a negative return code.
Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
This should include the hash so that image_binary_size is really at the
end of the image, and not some 300 bytes earlier.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add QSPI support for VF610TWR, such as clock and iomux.
Signed-off-by: Alison Wang <Huan.Wang@freescale.com>
Signed-off-by: Chao Fu <b44548@freescale.com>
This family is supported by the TPS65218 PMIC. Implement a scale_vcores
to set the MPU and CORE voltage correctly to the max frequency that is
supported (and what we will be scaling them to in setup_dplls()).
Signed-off-by: Tom Rini <trini@ti.com>
if we have no NAND-Chip, we don't need the gpmc-controller and therefore
is no need to init it.
Cc: trini@ti.com
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
The ePOS EVM and EVM SK have QSPI as an option to boot. Add a qspiboot
target that utilizes QSPI for env and so forth as an example of best
practices. As QSPI is booted from directly we need to chang
CONFIG_SYS_TEXT_BASE.
Note that on ePOS EVM the QSPI and NAND are mutually exclusive choices
we need to handle that elsewhere, once NAND support is also added.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
OMAP3 used GPMC_NAND_ECC_LP_x8_LAYOUT and GPMC_NAND_ECC_LP_x16_LAYOUT macros
to configure GPMC controller for x7 or x8 bit device connected to its interface.
Now this information is encoded in CONFIG_SYS_NAND_DEVICE_WIDTH macro, so above
macros can be completely removed.
Signed-off-by: Pekon Gupta <pekon@ti.com>
Switch to an SPL image. The SPL for Ventana does the following:
- setup i2c and read the factory programmed EEPROM to obtain DRAM config
and model for board-specific calibration data
- configure DRAM per CPU/size/layout/devices/calibration
- load u-boot.img from NAND and jump to it
This allows for a single SPL+u-boot.img to replace the previous multiple boa
configurations.
Cc: Stefan Roese <sr@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Andy Ng <andreas2025@gmail.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
use the new iomux function and a macros to create a multi-dimensional array
of iomux values without duplicating the defintions.
Cc: Stefan Roese <sr@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Andy Ng <andreas2025@gmail.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Split the read_eeprom function out so that it can be shared (ie with SPL)
Cc: Stefan Roese <sr@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Andy Ng <andreas2025@gmail.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
arch/arm/include/asm/spl.h requires all SoCs to have
arch/arm/include/asm/arch-*/spl.h.
But many of them just define BOOT_DEVICE_* macros.
Those macros are used in the "switch (boot_device) { ... }"
statement in common/spl/spl.c.
So they should not be archtecture specific, but be described as
a simpile enumeration.
This commit merges most of arch/arm/include/asm/arch-*/spl.h
into arch/arm/include/asm/spl.h.
With a little more effort, arch-zynq/spl.h and arch-socfpga/spl.h
will be merged, while I am not sure about OMAP and Exynos.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Michal Simek <monstr@monstr.eu>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Bo Shen <voice.shen@atmel.com> [on sama5d3xek board for at91 part]
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stefano Babic <sbabic@denx.de> [applying Tim's i.MX6 patches]
Acked-by: Tom Rini <trini@ti.com>
Commit 3d5a335c announced that all the nand_spl boards
would be removed before v2014.07 release.
Also update README.scrapyard.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Commit 3d5a335c announced that all the nand_spl boards
would be removed before v2014.07 release.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Because cmd_mkimage is used in various subdirectories,
it seems reasonable to define it in scripts/Makefile.lib.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Crossbars and IDT were not getting configured for Serdes2 protocol
0x9d for B4420.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
A-007186: SerDes PLL is calibrated at reset. It is possible
for jitter to increase and cause the PLL to unlock when the
temperature delta from the time the PLL is calibrated exceeds
+56C/-66C when using X VDD of 1.35 V (or +70C/-80C when using
XnVDD of 1.5 V). No issues are seen with LC VCO. The protocols
only using Ring VCOs are impacted.
Workaround:
For all 1.25/2.5/5 GHz protocols, use LC VCO instead of Ring
VCO, this need to use alternate serdes protocols. Alternate
option has the same functionality as the original option; the
only difference being LC VCO rather than Ring VCO.
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
- add support for 2nd DIMM slot.
- make it work with DIMM which is less than 2GB.
Verified with two 2GB UDIMM MT9JSF25672AZ-2G1K1 in two DIMM slots.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
A-007186: SerDes PLL is calibrated at reset. It is possible for jitter to
increase and cause the PLL to unlock when the temperature delta from the
time the PLL is calibrated exceeds +56C/-66C when using X VDD of 1.35 V
(or +70C/-80C when using XnVDD of 1.5 V). No issues are seen with LC
VCO. Only the protocols using Ring VCOs are impacted.
Workaround:
For all 1.25/2.5/5 GHz protocols, use LC VCO instead of Ring VCO, this need
to use alternate serdes protocols. The alternate option has the same
functionality as the original option; the only difference being LC VCO
rather than Ring VCO.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
As errata A-007186, we need to use the alternate serdes
protocol instead of those impacted protocols.
- add support for serdes protocols: 0x1b, 0x50, 0x5e,
0x64, 0x6a, 0xd2, 0x67, 0x70.
- update t2080_rcw.cfg to adapt to new rcw_66_15 for
t2080qds and t2080rdb.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)
Because MPC82xx family is old enough, nobody would pick up
the maintainership on it.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denx <wd@denx.de>
This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)
Because MPC82xx family is old enough, nobody would pick up
the maintainership on it.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denx <wd@denx.de>
This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)
Because MPC82xx family is old enough, nobody would pick up
the maintainership on it.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denx <wd@denx.de>
This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)
Because MPC82xx family is old enough, nobody would pick up
the maintainership on it.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denx <wd@denx.de>
This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)
Because MPC82xx family is old enough, nobody would pick up
the maintainership on it.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denx <wd@denx.de>
This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)
Because MPC82xx family is old enough, nobody would pick up
the maintainership on it.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denx <wd@denx.de>
This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)
Because MPC82xx family is old enough, nobody would pick up
the maintainership on it.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denx <wd@denx.de>
This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)
Because MPC82xx family is old enough, nobody would pick up
the maintainership on it.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denx <wd@denx.de>
This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)
Because MPC8xx family is old enough, nobody would pick up
the maintainership on it.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denx <wd@denx.de>
The quad100hd has been unmaintained and dead ever since it's been
added some 6 years ago. Remove it.
Also update README.scrapyard and insert some commit IDs for removed
boards.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Gary Jennejohn <gljennjohn@googlemail.com>
Add a bootretry_ prefix to these two functions, and remove the need for
the #ifdef around everything (it moves to the Makefile).
Signed-off-by: Simon Glass <sjg@chromium.org>
This code is only used by one board, so it seems a shame to clutter up
the readline code with it. Move it into its own file.
Signed-off-by: Simon Glass <sjg@chromium.org>
The backlight uses FETs on the TPS65090. Enable this so that the display
is visible.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The TSP65090 is a PMIC on some exynos5 boards. The init function is
called for the TPS65090 pmic. If that device is not a part of the device
tree (returns -ENODEV) then continue. Otherwise return a failure.
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This is not used by any boards now. Drop it to avoid confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Development board for headless gateway platform from Abilis Systems.
Initial commit with working UART and DW GMAC.
For now with generic Ethernet PHY due to problems in Realtek PHY driver.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Christian Ruppert <christian.ruppert@abilis.com>
Cc: Pierrick Hascoet <pierrick.hascoet@abilis.com>
Also we enable the mmc command in configuration file.
As both CONFIG_CMD_MMC and CONFIG_CMD_USB use the CONFIG_DOS_PARTITION,
so remove the redundant CONFIG_DOS_PARTITION definition.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
It supports boot from NAND and SD/MMC card.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote:
> > + case 1:
> > +#if CONFIG_MMC1_PG
> Are you sure that this is correct and shouldn't be:
>
> +#ifdef CONFIG_MMC1_PG
>
> ?
It's "correct" in so far as it works (the boards.cfg config stuff
#defines things to 1), but I think you are right that it isn't the
preferred style. But...
> A quick scan through this patch series shows that this define
> is not set at all. Perhaps its outdated? Or is it used to support
> some other sunxi SoC? Not sure, perhaps it should be removed for
> now.
...I had thought that it was to support some other board which wasn't
being upstreamed right now, so eventually useful and harmless for now,
but I've just checked and it isn't actually used by any of the boards in
u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it.
Rather than resend the entire series, here is v5.1 of this patch.
> Other than this please add my:
>
> Reviewed-by: Stefan Roese <sr@denx.de>
Thanks!
8<---------------------------------
>From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001
From: Ian Campbell <ijc@hellion.org.uk>
Date: Fri, 7 Mar 2014 04:29:39 +0000
Subject: [PATCH v5.1 7/8] sunxi: mmc support
This adds support for the MMC controller on the Allwinner A20 (sun7i)
processor.
Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: Luke Leighton <lkcl@lkcl.net>
Signed-off-by: Oliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Wills Wang <wills.wang.open@gmail.com>
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Tom Cubie <Mr.hipboi@gmail.com>
Cc: Aaron Maoye <leafy.myeh@allwinnertech.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: Tom Rini <trini@ti.com>
Add support for the GMAC Ethernet controller on Allwinner A20 (sun7i)
processors. Enable for the Cubietruck.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@ti.com>
Signed-off-by: Oliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Tom Rini <trini@ti.com>
Reviewed-by: Marek Vasut <marex@denx.de>
This patch adds generic board, start of day and basic build system support for
the Allwinner A20 (sun7i) processor. This code will not been compiled until the
build is hooked up in a later patch. It has been split out to keep the patches
manageable.
Signed-off-by: Adam Sampson <ats@offog.org>
Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Signed-off-by: Luke Leighton <lkcl@lkcl.net>
Signed-off-by: Oliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Patrick Wood <patrickhwood@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Wills Wang <wills.wang.open@gmail.com>
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Marek Vasut <marex@denx.de>
Cc: Tom Cubie <Mr.hipboi@gmail.com>
Reviewed-by: Tom Rini <trini@ti.com>
Set DDR_SEL_PAD_CONTR register explicitly to DDR3 which solves RAM
issues with newer silicon (1.1). This register was added in revision
4 of the Vybrid Reference Manual.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Make the common eeprom library available for any I2C driver.
Signed-off-by: Ilya Ledvich <ilya@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
cm-t54 Eth MAC address is stored in onboard EEPROM.
Add EEPROM support and setup stored Eth MAC address.
If EEPROM does not contain a valid MAC, then generate it from the
processor ID code (reference code is taken from OMAP5 uEvm board file).
Modify Device Tree blob MAC address field with retrieved data.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
This adds the Gumstix DuoVero machine [1]. This is a OMAP4430-based
computer-on-module (COM aka SOM) that can be mounted on various
expansion boards with different peripherals.
[1] https://store.gumstix.com/index.php/category/43/
Signed-off-by: Ash Charles <ash@gumstix.com>
[trini: Rename gpmc_enable_gpmc_cs_config to gpmc_enable_gpmc_net_config]
Signed-off-by: Tom Rini <trini@ti.com>
Add EEPROM ID switches for Alto35, Arbor43C, Stagecoach, Thumbo, and
Turtlecore Gumstix Overo expansion boards.
Signed-off-by: Ash Charles <ash@gumstix.com>
Gumstix Overo COMs with board revision 0x4 use a different Wifi and
Bluetooth module: Wi2Wi's W2CBW0015. No other code changes are required
in u-boot---just handling of this particular board revision.
Signed-off-by: Ash Charles <ashcharles@gmail.com>
Since B&R boards uses only MMC-Controller #1, it only
wastes time if we initialize #0 first to see that there is nothing.
Cc: <trini@ti.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Clean up partial, full and compressed bitstream handling.
U-Boot supports full bitstream loading and partial
based on detection which is not 100% correct.
Extending fpga_load/fpga_loadbitstream() with one more
argument which stores bitstream type.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Conflicts:
boards.cfg
Conflicts were trivial once u-boot-arm/master boards.cfg was
reformatted (commit 6130c146) to match u-boot/master's own
reformatting (commit 1b37fa83).
In the earlier patches, the SPL/TPL fraamework was introduced.
For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The
SPL was loaded by the code from the internal on-chip ROM. The SPL initializes
the DDR according to the SPD and loads the final uboot image into DDR, then
jump to the DDR to begin execution.
For NAND booting way, the nand SPL has size limitation on some board(e.g.
P1010RDB), it can not be more than 4KB, we can call it "minimal SPL", So the
dynamic DDR driver doesn't fit into this minimum SPL. We added the TPL that is
loaded by the the minimal SPL. The TPL initializes the DDR according to the SPD
and loads the final uboot image into DDR,then jump to the DDR to begin execution.
This patch enabled SPL/TPL for P1_P2_RDB to support starting from NAND/SD/SPI
flash with SPL framework and initializing the DDR according to SPD in the SPL/TPL.
Because the minimal SPL load the TPL to L2 SRAM and the jump to the L2 SRAM to
execute, so the section .resetvec is no longer needed.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
T104xrdb has several sleep management signals that are used for deep
sleep. They are enabled by OS to enter deep sleep and should be
disabled by u-boot when cores wake up.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
According to AN3638, CRC of NXID v1 is at the end of the
256-byte I2C memory. The wrong CRC32 offset prevents Uboot
from reading system information from EEPROM. No NXID v0 is
being used on Freescale boards.
Signed-off-by: Ebony Zhu <b45385@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Because sandbox is not a real hardware, setting vendor=sandbox is
almost meaningless.
This commit sets sandbox's vendor field to '-'.
It is a good thing that it decreases one level directory hierarchy.
The files board/sandbox/sandbox/* have been moved to board/sandbox/*.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
This reverts commit 258060905e.
Conflicts:
boards.cfg
Wrong patch 25806090 was applied by accident. Revert it.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Exynos4 can be used the dwmmc controller for eMMC.
Then it needs to check dwmmc_init() at first.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Proper adjustment for supporting DFU at GONI target has been made.
The s5p_goni.h file has been updated. Moreover the code for low level
USB initialization has been added to GONI board code.
The malloc pool has been enlarged in order to support larger buffer
sizes needed by DFU implementation.
Signed-off-by: Arkadiusz Wlodarczyk <a.wlodarczyk@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mateusz Zalega <m.zalega@samsung.com>
Tested-by: Arkadiusz Wlodarczyk <a.wlodarczyk@samsung.com>
Tested-by: Mateusz Zalega <m.zalega@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Exception handling is basically identical for all ARM targets.
Factorize it out of the various start.S files and into a
single vectors.S file, and adjust linker scripts accordingly.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
ps7_init.c and ps7_init.h are supposed to be exported by hw project
and copied to board/xilinx/zynq/ directory.
We want them to be ignored by git.
So what we should do is to always treat them as external files
rather than replacing ps7_init.c
This commit does:
- Move a weak function ps7_init() to arch/arm/cpu/armv7/zynq/spl.c
and delete board/xilinx/zynq/ps7_init.c
- Compile board/xilinx/zynq/ps7_init.c only when it exists
- Add .gitignore to ignore ps7_init.c/h
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ps7_init.c exported by hw project has #include "xil_io.h" line
but U-Boot does not have "xil_io.h".
So we get an error on SPL build:
ps7_init.c:12581:20: fatal error: xil_io.h: No such file or directory
We can delete the include directive in ps7_init.c to avoid this error.
But it is painful to do this every time we export ps7_init.c file.
Instead, we can put an empty xil_io.h in the same directory
so we can directly copy ps7_init.c as is.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
When CONFIG_FPGA is defined but CONFIG_SPL_FPGA is not, the build fails:
board.c: In function 'board_init':
board.c:41:3: error: 'fpga' undeclared (first use in this function)
fpga = fpga010;
Fix this by expanding the "#if.." around this block to match the other
FPGA checks and don't compile this block when buildign for SPL without
FPGA support.
Tested a bootloader that had CONFIG_FPGA defined without CONFIG_SPL_FPGA,
this now compiles without errors and loading FPGA from u-boot works.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Warnings:
board/xilinx/zynq/board.c:17:13: warning: symbol 'fpga' was not declared. Should it be static?
board/xilinx/zynq/board.c:20:13: warning: symbol 'fpga010' was not declared. Should it be static?
board/xilinx/zynq/board.c:21:13: warning: symbol 'fpga015' was not declared. Should it be static?
board/xilinx/zynq/board.c:22:13: warning: symbol 'fpga020' was not declared. Should it be static?
board/xilinx/zynq/board.c:23:13: warning: symbol 'fpga030' was not declared. Should it be static?
board/xilinx/zynq/board.c:24:13: warning: symbol 'fpga045' was not declared. Should it be static?
board/xilinx/zynq/board.c:25:13: warning: symbol 'fpga100' was not declared. Should it be static?
board/xilinx/zynq/board.c:120:5: warning: symbol 'board_mmc_init' was not declared. Should it be static?
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This adds the Gumstix Pepper[1] single-board computer based on the
TI AM335x processor. Schematics are available [2].
[1] https://store.gumstix.com/index.php/products/344/
[2] https://pubs.gumstix.com/boards/PEPPER/
Signed-off-by: Ash Charles <ash@gumstix.com>
[trini: Move 'cdev' in board.c down to under #ifdef's where it's used]
Signed-off-by: Tom Rini <trini@ti.com>
The actual board name is draco and dxr2 is the target name.
In the future we'll have different targets based on draco board.
All changes are purely non-functional and basically rename dxr2
to draco.
One style fix in board.c that existed already before.
Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Reviewed-by: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
* remove setting LED in user button function.
We want to decouple reading user button and setting LED. This
two things need to be done independently.
* led cmd can be used to control LEDs that are defined in board file
having a led cmd, one can easily set LEDs in u-boot shell. For
example bootcmd can be extended to disable status LED before
loading kernel.
Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
* add parameters for factory and print them at start up to
facilitate control of right DDR3 settings in EEPROM.
* cosmetic changes in a couple of printfs
Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
For dxr2 board DXR2_IOCTRL_VAL is set by data in EEPROM. In pxm2
board it does not make sense to have dxr2 as prefix. Replace it with
more meaningful DDR prefix.
Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Pascal Bach <pascal.bach@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
The Venice2 pinmux spreadsheet was updated to fix a few issues. Import
those changes into the U-Boot pinmux initialization tables.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This re-imports the entire Venice2 pinmux data from the board's master
spreadsheet, and makes use of the new IO clamping GPIO initialization
table features. This makes the board port fully compliant with the
required HW-defined pinmux initialization sequence.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The HW-defined procedure for booting Tegra requires that
CLAMP_INPUTS_WHEN_TRISTATED be enabled before programming the pinmux.
Modify the Jetson TK1 board to do this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The HW-defined procedure for booting Tegra requires that some pins be
set up as GPIOs immediately at boot in order to avoid glitches on those
pins, when the pinmux is programmed. This patch implements this
procedure for Jetson TK1. For pins which are to be used as GPIOs, the
pinmux mux function need not be programmed, so the pinmux table is also
adjusted.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The return value has not been checked by its caller, until recent change
of using generic board architecture. The error of this function is not
critical enough to hang the system. Printing the warning message is enough
to catch user's attention. U-boot should continue to boot to give user
a chance to fix the EEPROM. Chaning the return value to 0 to avoid hanging
in the board_init_r().
Signed-off-by: York Sun <yorksun@freescale.com>
We only need u-boot to bother about a single core in the QEMU machine.
Everything that would require additional knowledge of more cores gets
handled by QEMU and passed straight into the payload we execute.
Because of this setup, it would be counterproductive to enable SMP support
in u-boot. We would have to rip CPUs out of already existing spin tables
and respin them from u-boot. It would be a pretty big mess.
So only assume we have a single core. This fixes errors about CONFIG_MP
being disabled.
Signed-off-by: Alexander Graf <agraf@suse.de>
This should prevent the problems that the CCF can deadlock with certain
traffic patterns.
This also fixes the workaround for A-006559 that was not correctly
implemented before.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Fix the IRQ/GPIO settings: all the muxed GPIO/external IRQs that are
used as internal interrupts are defined as GPIOs to avoid confusion
between the internal/external interrupts.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
This adds the reset support for the following devices that was until
then not implemented:
- BFTIC4
- QSFPs
This also fixes the configuration of the prst behaviour for the other
resets: Only the u-boot and kernel relevant subsystems are taken out of
reset (pcie, ZL30158, and front eth phy).
Most of the prst config move to misc_init_f(), except for the PCIe
related ones that are in pci_init_board and the bftic and ZL30158 ones
that should be done as soon as possible.
Only the behavior of the Hooper reset is changed according to the
documentation as the application is not able to not configure the switch
when it is not reset.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
This patch defines the post_hotkeys_pressed() function that is used for:
- triggering POST memory regions test
- starting the test application through the checktestboot command in
a script by setting the active bank to testbank
The post_hotkeys_pressed return the state of the SELFTEST pin.
The patch moves from the complete POST-memory test that is too long in
its SLOW version for our production HW test procedure to the much shorter
POST-memory-regions test.
Finally, the unused #defines for the not so relevant mtest command are
removed.
Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Add readout of dip-switch to revert to factory settings.
If one or more dip-switch are set, launch bank 0 that contains the
bootloader to do the required action.
Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
The unit LEDs are managed by the QRIO CPLD. This patch adds support for
accessing these LEDs in the QRIO.
The LEDs then are set to a correct boot state:
- UNIT-LED is red
- BOOT-LED is on.
Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
T4240RDB board Specification
----------------------------
Memory subsystem:
6GB DDR3
128MB NOR flash
2GB NAND flash
Ethernet:
Eight 1G SGMII ports
Four 10Gbps SFP+ ports
PCIe:
Two PCIe slots
USB:
Two USB2.0 Type A ports
SDHC:
One SD-card port
SATA:
One SATA port
UART:
Dual RJ45 ports
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
[York Sun: fix CONFIG_SYS_QE_FMAN_FW_ADDR in T4240RDB.h]
The fuse status register provides the values from on-chip
voltage ID efuses programmed at the factory.
These values define the voltage requirements for
the chip. u-boot reads FUSESR and translates the values
into the appropriate commands to set the voltage output
value of an external voltage regulator.
B4860QDS has a PowerOne ZM7300 programmable digital Power
Manager which is programmed as per the value read from
the fuses.
Reference for this code is taken from t4qds VID implementation.
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Adds Support for PowerOne ZM7300 voltage regulator.
This device is available on some Freescale Boards like B4860QDS
and has to be programmed to adjust the voltage on the board.
The device is accessible via I2C interface.
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch includes following changes :
* Adds gpio pin numbering support for EXYNOS SOCs.
To have consistent 0..n-1 GPIO numbering the banks are divided
into different parts where ever they have holes in them.
* Rename GPIO definitions from GPIO_... to S5P_GPIO_...
These changes were done to enable cmd_gpio for EXYNOS and
cmd_gpio has GPIO_INPUT same as s5p_gpio driver and hence
getting a error during compilation.
* Adds support for name to gpio conversion in s5p_gpio to enable
gpio command EXYNOS SoCs. Function has been added to asm/gpio.h
to decode the input gpio name to gpio number.
Example: SMDK5420 # gpio set gpa00
Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Commit 345b77ba removed some nand_spl boards but
it missed to delete linker scripts.
These linker scripts are not used now.
And one more fix:
amcc/acadia does not support nand_spl anymore, so remove
#if !defined(CONFIG_NAND_U_BOOT) ... #endif
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
CONFIG_BOARDDIR is not referenced in these linker scripts.
The comment /* CONFIG_BOARDDIR */ is misleading.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
bfin_gen_rand_mac() uses __DATE__ as the seed for random ethernet
address. This makes the build non-deterministic.
In the first place, it should not be implemented as a Bfin-specific
function. Use eth_random_addr() instead.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Sonic Zhang <sonic.zhang@analog.com>
Some functions in include/net.h are ported from
include/linux/etherdevice.h of Linux Kernel.
For ex.
is_zero_ether_addr()
is_multicast_ether_addr()
is_broadcast_ether_addr()
is_valid_ether_addr();
So, we should use the same function name as that of Linux Kernel,
eth_rand_addr(), for consistency.
Besides, eth_rand_addr() has been implemented as an inline function.
So it should not be surrounded by #ifdef CONFIG_RANDOM_MACADDR.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
gd->bd->bi_baudrate is a copy of gd->baudrate.
Since baudrate is a common feature for all architectures,
keep gd->baudrate only.
It is true that bi_baudrate was passed to the kernel in that structure
but it was a long time ago.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Acked-by: Michal Simek <monstr@monstr.eu> (For microblaze)
Prior to commit 33a02da0, all boards must have board/${BOARD}/
or board/${VENDOR}/${BOARD}/ directory.
Now this rule is obsolete.
It looks weird that sandbox defines "vendor" and "board" just for
meeting the old U-Boot directory structure.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Now that sandbox has a good base of features, the README is quite out of
date. Update it, and document the new features.
Signed-off-by: Simon Glass <sjg@chromium.org>
This adds support for the 7" WVGA produced by Future Eletronics and
make it dynamically detect if it is connected or not based on the
touchscreen controller.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
The LTC3676 PMIC is used instead of the PFUZE100 PMIC on the
GW51xx/GW52xx/GW53xx Ventana baseboards. In order to support the IMX6Q SoC
at 1GHz on those baseboards, we need to adjust the voltage scaling for the SW1
and SW3 DC/DC converters on the LTC3676 for 1225mV. Note that the scalar
values for the LTC3676 are board-specific as they relate to a resistor devider
chosen by the board design.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
There's nothing Samsung-/board-specfic about the implementation of
ums_init(). Move the code into cmd_usb_mass_storage.c, so that it can
be shared by any user of that command.
Cc: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Now that ums_disk_init() is so simple, there's no need for it to be a
separate function. Instead, just add it to the tail end of ums_init().
Cc: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
There's no reason to believe that an MMC device will incorrectly report
its capacity. Remove error checking of this value from ums_disk_init()
to simplify it.
Cc: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
These values aren't set anywhere at present, and hence have no effect.
The concept of a single global offset/number of sectors to expose through
USB Mass Storage doesn't even make sense in the face of multiple storage
devices. Remove these defines to simplify the code.
Cc: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
The USB Mass Storage function could equally well support a SATA device
as support an MMC device. Update struct ums to contain a block device
descriptor, not an MMC device descriptor.
Cc: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
This change removes LCD menu download mode info screen.
Now key press timeout is checked in function download_menu()
and menu options are displayed directly after PWR + VOLUP keys.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Increase menu loop delay to 200 ms helps choose the right
menu option by user. Before this, each time key was pressed
the current menu option was changed few times.
Now it changes only once and also changes few times if key
is pressed for a longer time.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This change allows reset device environment to default without using u-boot
console, which is useful for system developers.
Signed-off-by: Inha Song <ideal.song@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This menu option allows restore gpt.
This is usefull and no needs access to the u-boot console.
For proper operation:
- each partition uuid should be set in environment or
- CONFIG_RANDOM_UUID should be defined for automatically uuid setting
After operation success device is going to be reset.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Function cmd_process() runs commands with directly given list of arguments
but it doesn't expand given environmental variables names as macros.
Command "gpt" as one of arguments expects expanded macro e.g. $partitions
so it needs to be called by function run_command().
Changes:
- extend array mode_name by lower case commands names - used by find_cmd()
- put each command arguments into one string - used by run_command()
- use run_command() instead of cmd_process()
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
In cases when MMC hadn't been initialized before, ie. by the user or other
subsystem, it was still uninitialized while UMS media capacity check,
leading to broken ums command.
UMS has to initialize resources it uses.
Tested on Samsung Goni.
Signed-off-by: Mateusz Zalega <m.zalega@samsung.com>
Tested-by: Mateusz Zalega <m.zalega@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Former usb_cable_connected() patch broke compilation of boards which do
not support this feature.
I've renamed usb_cable_connected() to g_dnl_usb_cable_connected() and added
its default implementation to gadget downloader driver code. There's
only one driver of this kind and it's unlikely there'll be another, so
there's no point in keeping it in /common.
Previously this function was declared in usb.h. I've moved it, since
it's more appropriate to keep it in g_dnl.h - usb.h seems to be intended
for USB host implementation.
Existing code, confronted with default -EOPNOTSUPP return value,
continues as if the cable was connected.
CONFIG_USB_CABLE_CHECK was removed.
Change-Id: Ib9198621adee2811b391c64512f14646cefd0369
Signed-off-by: Mateusz Zalega <m.zalega@samsung.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
ECSPI chipselect (MX6_PAD_EIM_D19__GPIO3_IO19) is used with GPIO functionality,
so it does not make sense to set its pad as SPI pin.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
mx6slevk has a m25p32 SPI NOR flash connected to ESCSPI port.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
MACH_TYPE_LAGER and CONFIG_MACH_TYPE are not already available on Lager board.
This removes them.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Maximum CPU clock of R8A7790 that are used in lager board is 1.4GHz.
This change to use the maximum clock in this board.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Maximum CPU clock of R8A7791 that are used in koelsch board is 1.5GHz.
This change to use the maximum clock in this board.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This update QoS version 0.240 for ES1 and version 0.310 for ES2.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
There is koelsch where ES2 revision of R8A7791 was put on.
This is different in Qos setting.
This adds Qos setting for ES2 revision of R8A7791.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Lagar board has NOR-Flash. But user uses SPI-Flash ROM instead of NOR-Flash.
This removed the setting of NOR-Flash.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This changes from r8a7790_ to rcar_.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Koelsch board has NOR-Flash. But user uses SPI-Flash ROM instead of NOR-Flash.
This removed the setting of NOR-Flash.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This changes from r8a7791_ to rcar_.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This patch adds support for the new PMC440 hardware revision 1.4.
The board now uses Micrel KSZ9031 phys.
Add missing i2c initialization before reading bootstrap eeprom.
Fix a couple of coding style issues.
Make local functions static.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
create vendor board directory ids and move ids8247 board to it.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Add support of 2 stage NAND/SD boot loader using SPL framework.
PBL initialise the internal SRAM and copy SPL, this further
initialise DDR using SPD and environment and copy u-boot from
NAND/SD to DDR, finally SPL transfer control to u-boot.
NOR uses CS1 instead of CS2 when NAND boot, fix it.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
- update readme.
- add CONFIG_SYS_CORTINA_FW_IN_* for loading Cortina PHY CS4315
ucode from NOR/NAND/SPI/SD/REMOTE.
- update cpld vbank with SW3[5:7]=000 as default vbank0 instead of
previous SW3[5:7]=111 as default vbank.
- fix CONFIG_SYS_I2C_EEPROM_ADDR_LEN to 2.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Add support of 2-stage NAND/SPI/SD boot loader using SPL framework.
PBL initializes the internal CPC-SRAM and copy SPL(160K) to it,
SPL further initializes DDR using SPD and environment and copy
u-boot(768K) from SPI/SD/NAND to DDR, finally SPL transfers control
to u-boot.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Add support of 2-stage NAND/SPI/SD boot loader using SPL framework.
PBL initializes the internal CPC-SRAM and copy SPL(160K) to it,
SPL further initializes DDR using SPD and environment and copy
u-boot(768 KB) from SPI/SD/NAND to DDR, finally SPL transfers
control to u-boot.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
[York Sun: fix boards.cfg for T2081QDS_SDCARD and _SPIFLASH]
Reviewed-by: York Sun <yorksun@freescale.com>
There should be a break for case PHY_INTERFACE_MODE_SGMII, otherwise it
will fall into case PHY_INTERFACE_MODE_RGMII.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Add support of 2 stage NAND, SD, SPI boot loader using SPL framework.
here, PBL initialise the internal SRAM and copy SPL(160KB). This further
initialise DDR using SPD and environment and copy u-boot(768 KB) from NAND to DDR.
Finally SPL transer control to u-boot.
Initialise/create followings required for SPL framework
- Add spl.c which defines board_init_f, board_init_r
- update tlb and ddr accordingly
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Add support of 2 stage NAND boot loader using SPL framework.
here, PBL initialise the internal SRAM and copy SPL(160KB). This further
initialise DDR using SPD and environment and copy u-boot(768 KB) from NAND to DDR.
Finally SPL transer control to u-boot.
Initialise/create followings required for SPL framework
- Add spl.c which defines board_init_f, board_init_r
- update tlb and ddr accordingly
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
T1040RDB and T1042RDB_PI has CPLD. Here CPLD controls board mux/features.
This support of CPLD includes
- files and register defintion
- Commands to swtich alternate bank and default bank
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
T1040QDS_D4 is a variant of T1040QDS, with additional circuit to support
DDR4 memory. Tested with MTA9ASF51272AZ-2G1AYESZG.
Signed-off-by: York Sun <yorksun@freescale.com>
The MDC generate by default value of MDIO_CLK_DIV is too high i.e. higher
than 2.5 MHZ. It violates the IEEE specs.
So Slow MDC clock to comply IEEE specs
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
For KVM we have a special PV machine type called "ppce500". This machine
is inspired by the MPC8544DS board, but implements a lot less features
than that one.
It also provides more PCI slots and is supposed to be enumerated by
device tree only.
This patch adds support for the generic ppce500 machine and tries to
rely solely on device tree for device enumeration.
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This is dead hardware and no one is interested in making the
necessary changes for upcoming features like generic board or
driver model.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Enough time has passed since this board was moved to Orphan. Remove.
- Remove board/lubbock/*
- Remove include/configs/lubbock.h
- Cleanup defined(CONFIG_LUBBOCK)
- Move the entry from boards.cfg to doc/README.scrapyard
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Enough time has passed since this board was moved to Orphan. Remove.
- Remove board/mousse/*
- Remove include/configs/MOUSSE.h
- Clean-up defined(CONFIG_MOUSSE)
- Move the entry from boards.cfg to doc/README.scrapyard
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Enough time has passed since this board was moved to Orphan. Remove.
- Remove board/rsdproto/*
- Remove include/configs/rsdproto.h
- Move the entry from boards.cfg to doc/README.scrapyard
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Enough time has passed since this board was moved to Orphan. Remove.
- Remove board/rpxsuper/*
- Remove include/configs/RPXsuper.h
- Move the entry from boards.cfg to doc/README.scrapyard
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Enough time has passed since these boards were moved to Orphan. Remove.
- Remove board/RPXlite/*
- Remove board/RPXClassic/*
- Remove include/configs/RPXlite.h
- Remove include/configs/RPXClassic.h
- Clean-up defined(CONFIG_RPXCLASSIC)
- Move the entry from boards.cfg to doc/README.scrapyard
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
