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arm:am43xx: Add TPS65218 support to scale voltages up
This family is supported by the TPS65218 PMIC. Implement a scale_vcores to set the MPU and CORE voltage correctly to the max frequency that is supported (and what we will be scaling them to in setup_dplls()). Signed-off-by: Tom Rini <trini@ti.com>
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86db550b38
commit
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2 changed files with 45 additions and 7 deletions
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@ -19,6 +19,7 @@
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#include <asm/arch/gpio.h>
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#include <asm/emif.h>
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#include "board.h"
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#include <power/tps65218.h>
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#include <miiphy.h>
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#include <cpsw.h>
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@ -254,13 +255,6 @@ void emif_get_ext_phy_ctrl_const_regs(const u32 **regs, u32 *size)
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const struct dpll_params *get_dpll_ddr_params(void)
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{
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struct am43xx_board_id header;
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enable_i2c0_pin_mux();
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i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
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if (read_eeprom(&header) < 0)
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puts("Could not get board ID.\n");
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if (board_is_eposevm())
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return &epos_evm_dpll_ddr;
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else if (board_is_gpevm())
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@ -338,6 +332,46 @@ const struct dpll_params *get_dpll_per_params(void)
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return &dpll_per[ind];
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}
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void scale_vcores(void)
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{
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const struct dpll_params *mpu_params;
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int mpu_vdd;
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struct am43xx_board_id header;
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enable_i2c0_pin_mux();
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i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
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if (read_eeprom(&header) < 0)
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puts("Could not get board ID.\n");
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/* Get the frequency */
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mpu_params = get_dpll_mpu_params();
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if (i2c_probe(TPS65218_CHIP_PM))
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return;
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if (mpu_params->m == 1000) {
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mpu_vdd = TPS65218_DCDC_VOLT_SEL_1330MV;
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} else if (mpu_params->m == 600) {
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mpu_vdd = TPS65218_DCDC_VOLT_SEL_1100MV;
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} else {
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puts("Unknown MPU clock, not scaling\n");
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return;
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}
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/* Set DCDC1 (CORE) voltage to 1.1V */
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if (tps65218_voltage_update(TPS65218_DCDC1,
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TPS65218_DCDC_VOLT_SEL_1100MV)) {
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puts("tps65218_voltage_update failure\n");
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return;
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}
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/* Set DCDC2 (MPU) voltage */
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if (tps65218_voltage_update(TPS65218_DCDC2, mpu_vdd)) {
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puts("tps65218_voltage_update failure\n");
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return;
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}
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}
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void set_uart_mux_conf(void)
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{
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enable_uart0_pin_mux();
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@ -32,11 +32,15 @@
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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#define CONFIG_SYS_I2C_MULTI_EEPROMS
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/* Power */
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#define CONFIG_POWER_TPS65218
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/* SPL defines. */
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#define CONFIG_SPL_TEXT_BASE 0x40300350
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#define CONFIG_SPL_MAX_SIZE (220 << 10) /* 220KB */
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#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
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(128 << 20))
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#define CONFIG_SPL_POWER_SUPPORT
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#define CONFIG_SPL_YMODEM_SUPPORT
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/* Enabling L2 Cache */
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