Commit graph

678 commits

Author SHA1 Message Date
Giulio Benetti
8d9c0762a8 imx: imxrt1050-evk: Add support for the NXP i.MXRT1050-EVK
This commit adds board support for i.MXRT1050-EVK from NXP. This board
is an evaluation kit provided by NXP for i.MXRT105x processor family.

More information about this board can be found here:
https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/i.mx-rt1050-evaluation-kit:MIMXRT1050-EVK

The initial supported/tested devices include:
- Debug serial
- SD

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14 22:54:00 +01:00
Giulio Benetti
77eb9a90dd imx: Add basic support for the NXP IMXRT10xx SoC family
Add i.IMXRT family basic support.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14 22:54:00 +01:00
Anatolij Gustschin
eb79cafea2 imx: add imx8x based deneb board
Add support for Capricorn Deneb SoM variant.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-01-14 22:15:21 +01:00
Anatolij Gustschin
7b5b934313 imx: add imx8x capricorn giedi board
Add support for i.MX8X based Capricorn Giedi SoM.

Supported interfaces: GPIO, ENET, eMMC, I2C, UART.

Console output:

  U-Boot SPL 2020.01-00003-gfd1c98f (Jan 07 2020 - 15:51:25 +0100)
  Trying to boot from MMC1
  Load image from MMC/SD 0x3e400

  U-Boot 2020.01-00003-gfd1c98f (Jan 07 2020 - 15:51:25 +0100) ##v01.07

  CPU:   NXP i.MX8QXP RevB A35 at 1200 MHz at 30C

  Model: Siemens Giedi
  Board: Capricorn
  Boot:  MMC0
  DRAM:  1022 MiB
  MMC:   FSL_SDHC: 0
  Loading Environment from MMC... OK
  In:    serial@5a080000
  Out:   serial@5a080000
  Err:   serial@5a080000
  Net:   eth1: ethernet@5b050000 [PRIME]
  Autobooting in 1 seconds, press "<Esc><Esc>" to stop

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-01-14 22:15:21 +01:00
Peng Fan
439321b264 imx: add i.MX8MP EVK board
Add basic i.MX8MP EVK board support

U-Boot SPL 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)
power_pca9450b_init
DDRINFO: start DRAM init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Failed to find clock node. Check device tree
WDT:   Not found!
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0

U-Boot 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)

CPU:   Freescale i.MX8MP rev1.0 at 1000 MHz
Reset cause: POR
Model: NXP i.MX8MPlus EVK board
DRAM:  6 GiB
MMC:   FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Net:   No ethernet found.
Hit any key to stop autoboot:  0
u-boot=> mmc list
FSL_SDHC: 1 (SD)
FSL_SDHC: 2

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
234187e2bc imx: imx8m: add imximage-8mp-lpddr4.cfg
Add imximage-8mp-lpddr4.cfg for imximage usage, almost same
as i.MX8MN ddr4 cfg, but with different ddr firmware

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
19957ee33d imx: imx8m: only support non-dm code in clock_imx8mm.c
The drivers/clk/imx/*.c are used for CLK dm case, the
clock_imx8mm.c is used for non CLK dm case, let's split
it. Sometimes it is hard to enable CLK dm in SPL stage,
considering code size, malloc size requirement, the splittion
will make it easy to use non CLK dm in SPL stage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
9d5e1aa78b imx: Kconfig: make SPL_IMX_ROMAPI_LOADADDR visible to i.MX8MP
i.MX8MP ROM support ROMAPI as i.MX8MN, so make
SPL_IMX_ROMAPI_LOADADDR visible to i.MX8MP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
e997d30be8 imx: imx8m: add 1GHz fracpll entry
4000MTS DDR needs 1GHz fracpll, so add the entry

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
db4510ff8e imx: imx8mp: add basic clock
i.MX8MP has similar architecture as i.MX8MN, but it has different
clk root and index, so add that to make i.MX8MP could use
the non-dm clock driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
7df6397eb4 imx: spl: support i.MX8MP spl_boot_device
i.MX8MP follows i.MX8MN, so just let it use spl_board_boot_device

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
de749aecbb imx: imx8m: add Kconfig entry for i.MX8MP
Add Kconfig entry for i.MX8MP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
13868eaf06 imx: cpu: enlarge bit mask to 0x1FF for cpu type
i.MX8MP use 0x182 as dummy id, 0xFF is not able the get the highest
bit, so enlarge bit mask to 0x1FF to make it could detect
cpu type correctly

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
a07c718129 imx8mp: set BYPASS ID SWAP to avoid AXI bus errors
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
625b03d810 imx: get cpu id/type of i.MX8MP
Support get i.MX8MP cpu id and cpu type

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
392a4e6dd3 imx: imx8mq: handle ESDHC in mxc_get_clock
fsl_esdhc_imx driver will call "mxc_get_clock(MXC_ESDHC_CLK +
dev->seq)", however mxc_get_clock wrongly handle MXC_ESDHC_CLK
as root clk and cause sd card could not be detected in U-Boot proper,
as below:
"Loading Environment from MMC... unable to select a mode"

Handle MXC_ESDHC_CLK in mxc_get_clock to fix the issue.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Tested-by: Fabio Estevam <festevam@gmail.com>
2020-01-08 13:18:55 +01:00
Igor Opaniuk
061b63b775 mach-imx: nandbcb: improve cmd help
Add info about supported i.MX7, improve details the usage of
bcbonly subcommand.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-01-07 10:26:57 +01:00
Igor Opaniuk
c0f037f6a2 mach-imx: bootaux: elf firmware support
Currently imx-specific bootaux command doesn't support ELF format
firmware for Cortex-M4 core.

This patches introduces a PoC implementation of handling elf firmware
(load_elf_image_phdr() was copy-pasted from elf.c just for PoC).
ELF64 binaries isn't supported yet.

This has the advantage that the user does not need to know to which
address the binary has been linked to. However, in order to handle
and load the elf sections to the right address, we need to translate the
Cortex-M4 core memory addresses to primary/host CPU memory
addresses (Cortex A7/A9 cores).

This allows to boot firmwares from any location with just using
bootaux, e.g.:
> tftp ${loadaddr} hello_world.elf && bootaux ${loadaddr}

Similar translation table can be found in the Linux remoteproc
driver [1].

[1] https://elixir.bootlin.com/linux/latest/source/drivers/remoteproc/imx_rproc.c

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-01-07 10:26:56 +01:00
Fabio Estevam
0417ef17ac mx7ulp: Add support for Embedded Artists COM board
The Embedded Artists COM board is based on NXP i.MX7ULP.

It has a BD70528 PMIC from Rohm with discrete DCDC powering option and
improved current observability (compared to the existing NXP i.MX7ULP EVK).

Add the initial support for the board.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-01-07 10:26:56 +01:00
Igor Opaniuk
89038264bb mach-imx: bootaux: add dcache flushing before enabling M4
This patch fixes the issue with broken bootaux command,
when M4 binary is loaded and data cache isn't flushed
before M4 core is enabled.

Reproducing:
> tftpboot ${loadaddr} ${board_name}/hello_world.bin
> cp.b ${loadaddr} 0x7F8000 $filesize
> bootaux 0x7F8000

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-01-07 10:26:56 +01:00
Igor Opaniuk
0ba1b4de0e mach-imx: bootaux: print stack pointer and reset vector
1. Change information printed about loaded M4 binary, print the stack
pointer and reset vector addressed.
2. Add sanity check for the address provided as param.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-01-07 10:26:56 +01:00
Marek Vasut
c35b19531d ARM: mx6: ddr: Add support for iMX6SX
This patch adds support for iMX6SX MMDC into the DDR calibration
code. The only difference between MX6DQ and MX6SX is that the SX
has 2 SDQS registers, while the DQ has 8.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Eric Nelson <eric@nelint.com>
2020-01-07 10:26:56 +01:00
Marek Vasut
b314003fda ARM: mx6: ddr: Configure all SDQS pullups using loop
Instead of explicitly setting up each SDQS register, use a loop.
No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Eric Nelson <eric@nelint.com>
2020-01-07 10:26:56 +01:00
Marek Vasut
7ec0e39ec4 ARM: mx6: ddr: Factor out SDQS configuration code
Pull out the code turning SDQS pullups on and off into a separate
function, since it is replicated in two places in the code and it
is the single place in the entire function which is SoC dependent.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Eric Nelson <eric@nelint.com>
2020-01-07 10:26:56 +01:00
Marek Vasut
736b491f31 ARM: mx6: ddr: Make debug prints work with tiny printf
The %08X format returns just zeroes with tiny printf, which is
horribly confusing, especially when debugging DRAM calibration
problems. Change the format to %08x (with lowercase x), which
behaves correctly with either implementation of printf in SPL.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Eric Nelson <eric@nelint.com>
2020-01-07 10:26:56 +01:00
Lukasz Majewski
010e58d448 imx: Add support for i.MX28 based XEA board
This patch introduces support for i.MX28 based XEA board.

This board supports DM/DTS in U-Boot proper as well as DM aware drivers
in SPL (u-boot.sb) by using OF_PLATDATA.
More detailed information regarding usage of it can be found in
./board/liebherr/xea/README file.

U-Boot SPL 2019.10-rc1-00233-g6aa549f05c (Aug 12 2019 - 09:23:36 +0200)
Trying to boot from MMC1
MMC0: Command 8 timeout (status 0xf0344020)
mmc_load_image_raw_sector: mmc block read error

U-Boot 2019.10-rc1-00233-g6aa549f05c (Aug 12 2019 - 09:23:36 +0200)

CPU:   Freescale i.MX28 rev1.2 at 454 MHz
BOOT:  SSP SPI #3, master, 3V3 NOR
Model: Liebherr (LWE) XEA i.MX28 Board
DRAM:  128 MiB
MMC:   MXS MMC: 0
Loading Environment from SPI Flash... SF: Detected n25q128a13 with page size 256 Bytes, erase size 64 KiB, total 16 MiB
OK
In:    serial
Out:   serial
Err:   serial
Net:
Warning: ethernet@800f0000 (eth0) using random MAC address - ce:e1:9e:46:f3:a2
eth0: ethernet@800f0000
Hit any key to stop autoboot:  0

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-01-07 10:26:56 +01:00
Heiko Schocher
227cb30047 imx6: aristainetos: add support for rev C board
add support for revision C boards. This board has
no longer a NAND.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07 10:26:56 +01:00
Heiko Schocher
c08aa77173 imx6: aristainetos: add aristainetos 2b csl
add aristainetso board version CSL.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07 10:26:56 +01:00
Heiko Schocher
1204b9675e imx6: aristainetos: readd aristainetos 2b board
readd aristainetos 2b board.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07 10:26:56 +01:00
Heiko Schocher
f44b4ab3c8 imx6: aristainetos: add DM_SERIAL support
add DM_SERIAL support for the aristainetos board, and
remove not used code from board code.

remove CONSOLE_OVERWRITE_ROUTINE.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07 10:26:55 +01:00
Heiko Schocher
1b857f1a92 imx6: aristainetos: remove 2b version
remove 2b version of aristainetos board, as it
is easier to make the DM / DTS port and introduce
the 2b board version again (also some more board
version).

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07 10:26:55 +01:00
Heiko Schocher
3882e6fc01 imx6: aristainetos: move defines to Kconfig
move defines, which are already moved to Kconfig
out of board config.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07 10:26:55 +01:00
Heiko Schocher
a7e2dc9cf6 imx6: remove aristainetos board
remove not anymore used aristainetos board.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07 10:26:55 +01:00
Troy Kisky
61d7e2bcc7 ARM: i.MX6: TARGET_NITROGEN6X: add 'select MX6QDL'
This fixes commit <91435cd40d30> "ARM: i.MX6: exclude the ARM errata
 from i.MX6 UP system"

for nitrogen6x. The above commit removed the errata for the board
since MX6Q/MXDL/MX6S is selected via CONFIG_SYS_EXTRA_OPTIONS

This restores the errata configs.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-12-27 14:28:42 +01:00
Jorge Ramirez-Ortiz
e97bdfa5da tools/imximage: share DCD information via Kconfig
IMX based platforms can have the DCD table located on different
addresses due to differences in their memory maps (ie iMX7ULP).

This information is required by the user to sign the images for secure
boot so continue making it accessible via mkimage.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
2019-12-27 12:55:59 +01:00
Tom Rini
2f02845817 Fixes for 2020.01
-----------------
 
 - imx8qxp_mek: increase buffer sizes and args number
 - Fixes for imx7ulp
 - imx8mm: Fix the first root clock in imx8mm_ahb_sels[]
 - colibri_imx7: reserve DDR memory for Cortex-M4
 - vining2000: fixes and convert to ethernet DM
 - imx8m: fix rom version check to unbreak some B0 chips
 - tbs2910: Disable VxWorks image booting support
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Merge tag 'u-boot-imx-20191209' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Fixes for 2020.01
-----------------

- imx8qxp_mek: increase buffer sizes and args number
- Fixes for imx7ulp
- imx8mm: Fix the first root clock in imx8mm_ahb_sels[]
- colibri_imx7: reserve DDR memory for Cortex-M4
- vining2000: fixes and convert to ethernet DM
- imx8m: fix rom version check to unbreak some B0 chips
- tbs2910: Disable VxWorks image booting support
2019-12-09 10:32:08 -05:00
Patrick Wildt
6a4b07e086 imx8m: fix rom version check to unbreak some B0 chips
Recently the version check was improved to be able to determine that
we're running on SoC revision 2.1.  A check for B0 was tightened so
that it now must equal 0x20 instead of being bigger than 0x20.  On
some B0 chips the value returned is 0x1020 instead of 0x20.  This
means even though it's B0, the check will fail and code relying on
the correct chip revision will make wrong decisions.  There is no
documentation of those bits, but it seems that NXP always uses a
byte to encode the revision.  Thus remove the upper bits to fix the
regression.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
2019-12-09 11:52:06 +01:00
Marek Vasut
7d84f4469f ARM: imx: vining2000: Convert to SPL framework
In preparation for use of DDR DRAM fine-tuning upon boot,
convert the board to SPL framework instead of using DCD
tables to bring up DRAM and pinmux.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
2019-12-06 13:57:42 +01:00
Marek Vasut
df1b721f60 ARM: mx6: pmu: Expose PMU LDO configuration interface
Make the PMU LDO configuration interface available to board code,
so that board code can reconfigure the internal LDOs of the SoC.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Eric Nelson <eric@nelint.com>
2019-12-06 13:57:42 +01:00
Fabio Estevam
d396f1384c mx6: Allow configuring the NoC registers on i.MX6QP
The NoC registers on i.MX6QP needs to be configured, otherwise some
usecases in the kernel behave incorrectly, such as rotation and resize.

Currently the NoC registers are not configured in the kernel, so
configure them in U-Boot like it is done in the NXP U-Boot tree.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2019-12-06 12:09:25 +01:00
Fabio Estevam
d136eb9bfe mx7ulp: scg: Remove unnused scg_a7_apll_init()
scg_a7_apll_init() is not called anywhere, so remove such dead code

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06 12:05:08 +01:00
Fabio Estevam
0619af0942 mx7ulp: Remove the _RUN notation from the PMC1 LDOVL definitions
The LDOVL definitions is common to all the modes, not only RUN mode,
so in order to avoid confusion, remove the _RUN notation from the PMC1
LDOVL definitions.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06 12:05:08 +01:00
Fabio Estevam
b8cabb0e3d mx7ulp: Introduce the CONFIG_LDO_ENABLED_MODE option
Introduce the CONFIG_LDO_ENABLED_MODE option so that i.MX7ULP boards
designed to operate with LDO enabled mode can work with 0.95V at LDO
output in RUN mode as per the datasheet.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06 12:05:08 +01:00
Fabio Estevam
72a093a8ac mx7ulp: Print the LDO mode status
As per the i.MX7ULP datasheet, it can boot in LDO enabled mode
or LDO bypass mode.

Print the LDO mode status in the U-Boot log for convenience.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06 12:05:08 +01:00
Miquel Raynal
eb446ef625 cmd: nand/sf: isolate legacy code
The 'sf' command is not supposed to rely on the MTD stack, but both
'sf' and 'nand' commands use helpers located in mtd_uboot.c. Despite
their location, these functions do not depend at all on the MTD
stack.

This file (drivers/mtd/mtd_uboot.c) is only compiled if CONFIG_MTD is
selected, which is inconsistent with the current situation. Solve this
by moving these three functions (which are only used by the above two
commands) out of mtd_uboot.c and put them in a C file only compiled
with cmd/sf.c and cmd/nand.c.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
[trini: Don't export get_part function now]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-12-04 17:10:51 -05:00
Miquel Raynal
88718be300 mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NAND
Add more clarity by changing the Kconfig entry name.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
[trini: Re-run migration, update a few more cases]
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2019-12-03 23:04:10 -05:00
Simon Glass
5255932f01 common: Move some board functions out of common.h
A number of board function belong in init.h with the others. Move them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:25:21 -05:00
Simon Glass
1eb69ae498 common: Move ARM cache operations out of common.h
These functions are CPU-related and do not use driver model. Move them to
cpu_func.h

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:24:58 -05:00
Simon Glass
9edefc2776 common: Move some cache and MMU functions out of common.h
These functions belong in cpu_func.h. Another option would be cache.h
but that code uses driver model and we have not moved these cache
functions to use driver model. Since they are CPU-related it seems
reasonable to put them here.

Move them over.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:55 -05:00
Simon Glass
6887c5bed9 common: Move some time functions out of common.h
These functions belong in time.h so move them over and add comments.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:11 -05:00
Simon Glass
62f9b65447 common: Move older CPU functions to their own header
These should be moved to driver model, but in the meantime, move them
out of the common header to help reduce its size.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:06 -05:00
Peng Fan
cd7c806f4f imx: imx8m: fix boot when CONFIG_$(SPL_)CLK not defined
When CONFIG_$(SPL_)CLK not defined, the clock controller device
not exist, so to avoid boot failure for platform not have
CONFIG_$(SPL_)CLK, add a check.

Reviewed-by: Patrick Wildt <patrick@blueri.se>
Tested-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
d239d9d946 imx: add i.MX8MN DDR4 board support
Support pinctrl/clk/sdhc, include ddr4 timing data.

Log:
U-Boot SPL 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800)
Normal Boot
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0

U-Boot 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800)

CPU:   Freescale i.MX8MNano rev1.0 at 24 MHz
Reset cause: POR
Model: NXP i.MX8MNano DDR4 EVK board
DRAM:  2 GiB
MMC:   FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... *** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   No ethernet found.
Hit any key to stop autoboot:  0

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
88a4ece74a imx8m: add i.MX8MN ddr4 image cfg file
Add cfg file for i.MX8MN DDR4

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
b1821376ee imx8mn: add get_boot_device
No ROM INFO structure on iMX8MN, use new ROM API to get boot device
from ROM.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
b890c4aede imx: cpu: restrict get_boot_device
i.MX8MN has its own get_boot_device, so restrict with i.MX8MQ and
i.MX8MM.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
1cbebc7862 imx: add rom api support
i.MX8MN support loading images with rom api, so we implement
reuse board_return_to_bootrom to let ROM loading images.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
a92c7b144f imx: spl: use spl_board_boot_device for i.MX8MN
i.MX8MN follow same logic as i.MX8MM, so use spl_board_boot_device

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
deca6cfbf5 imx8mn: set BYPASS ID SWAP to avoid AXI bus errors
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
f4c36ab6ee imx8m: add clk support for i.MX8MN
i.MX8MN has similar architecture with i.MX8MM, so it could reuse
the clock code of i.MX8MM, but i.MX8MN has different CCM root
configurations, so need a separate root entry.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
2434131a7b imx8mn: support get_cpu_rev
Add a dummy cpu type and support get_cpu_rev for i.MX8MN

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
66ec590c49 imx: add i.MX8MN kconfig entry
Add i.MX8MN kconfig entry

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Igor Opaniuk
ae8a53ece0 imx: nandbcb: add support for writing BCB only
Add subcommand for add writing BCB only, where we provide appropriate
offsets for firmware1 and firmware2 and size.

Example of usage:
> nandbcb bcbonly 0x00180000 0x00080000 0x00200000
Writing 1024 bytes to 0x0: randomizing
OK
Writing 1024 bytes to 0x20000: randomizing
OK

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03 21:49:49 +01:00
Igor Opaniuk
1b899a8041 imx: nandbcb: refactor update function
Move code for writing FCB/DBBT pages to a separate function

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03 21:49:40 +01:00
Igor Opaniuk
dad30dd72b imx: nandbcb: add support for i.MX7
Add support for updating FCB/DBBT on i.MX7:
- additional new fields in FCB structure
- Leverage hardware BCH/randomizer for writing FCB

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03 21:49:28 +01:00
Oliver Graute
eef72440db imx: support i.MX8QM ROM 7720 a1 board
Add i.MX8QM ROM 7720a1 board support

Boot log as below:
U-Boot 2019.10-rc3-00004-gd073e0242f (Sep 20 2019 - 08:24:13 +0200)

CPU:   NXP i.MX8QM RevB A53 at 1200 MHz

Model: Advantech iMX8QM Qseven series
Board: ROM-7720-A1 4GB
Build: SCFW 65afe5f6
Boot:  SD2
DRAM:  4 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial@5a060000
Out:   serial@5a060000
Err:   serial@5a060000
Net:   eth0: ethernet@5b040000Could not get PHY for FEC1: addr 1
, eth-1: ethernet@5b050000
Hit any key to stop autoboot:  0

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
2019-11-03 21:18:00 +01:00
Hannes Schmelzer
c04ac5bd40 board/BuR/brppt2: initial commit
This commit adds support for the brppt2 board. The board is based on the
i.mx6 dual-lite SoC.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-11-03 21:17:55 +01:00
Anatolij Gustschin
910b2fca97 imx8: output SECO-FW and ATF commit IDs
Borrow ID reading code from Ye Li (NXP U-Boot, commit ID 5b443e3e2617)
but drop imx-mkimage commit ID reading since we now use in tree mkimage.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Ye Li
264977d1c2 mach-imx: Adding new argument for SIP call interface
Need to pass total 5 arguments for SIP HAB call on i.MX8MQ,
so update the interface to add new argument.

Signed-off-by: Ye Li <ye.li@nxp.com>
[agust: fixed imx8m-power-domain build]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Peng Fan
7e2db74231 imx8: Add AHAB secure boot support
Add function and new command "auth_cntr" for secure boot support.
When booting with life cycle set to OEM closed, we need to use
this function to authenticate the OS container and load kernel & FDT
from OS container to their destination.

Also add image authentication call when loading container images.

Users can set CONFIG_AHAB_BOOT=y to enable the feature. It is not
set at default.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Peng Fan
9d86dbd9cf imx: spl: implement spl_boot_mode for i.MX7/8/8M
It will be easy to separate SD/EMMC when booting in SPL stage, then
no need to bother which device is BOOT_DEVICE_MMC1/2.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Peng Fan
2dfecdd1ed imx: imx8mq: add init_nand_clk
Add init_nand_clk to enable gpmi nand clock. Since i.MX8MQ not use CCF,
so we still use legacy mode to configure the clock.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Peng Fan
eeca15a50a imx8m: clock: improve irq response latency
Improve the IRQ response latency by setting GIC root clock source to
sys_pll2_200m from osc.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Peng Fan
9e09445549 imx8m: imx8mq: get chip rev for B1 revision
The i.MX8MQ B1 uses OCOTP_HW_OCOTP_READ_FUSE_DATA register for chip id.
It returns a magic number 0xff0055aa. update get_cpu_rev to support it,
and enable ocotp clock to access ocotp.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Sébastien Szymanski
b72dd938ec imx6ul: opos6ul: migrate to DM_ETH
Migrate to DM_ETH and remove code that is no longer necessary.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2019-11-03 17:04:16 +01:00
Lukasz Majewski
8e64181a99 ARM: imx: Convert mccmon6 to use DM/DTS in the u-boot proper
This commit converts mccmon6's u-boot proper (in a single commit to avoid
build breaks) to use solely DM/DTS.

The DTS description of the mccmon6 has been ported from Linux kernel
(v4.20, SHA1: 8fe28cb58bcb235034b64cbbb7550a8a43fd88be)

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-11-03 17:04:16 +01:00
Claudius Heine
dde31a14ec ARM: imx: Use IMX6_SRC_GPR10_BMODE instead of magic number
Signed-off-by: Claudius Heine <ch@denx.de>
2019-11-03 17:04:16 +01:00
Claudius Heine
e01c8cfe57 ARM: imx: Fix bmode detection from grp10
imx6_is_bmode_from_gpr9 always returns false, because
IMX6_SRC_GPR10_BMODE is 1<<28 and gets casted to u8 on return.

This moves the function body into imx6_src_get_boot_mode, since that is the
only one using it and it is on the same abstraction level (accessing
registers directly).

Signed-off-by: Claudius Heine <ch@denx.de>
2019-11-03 17:04:16 +01:00
Parthiban Nallathambi
6aa874911e i.MX6: nand: extend nandbcb command for imx6UL(L)
Firmware Configuration Block(FCB) for imx6ul(l) needs to be
BCH encoded.

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Acked-by: Shyam Saini <shyam.saini@amarulasolutions.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Fabio Estevam
fa64df4602 mx6: clock: Introduce disable_ipu_clock()
Introduce disable_ipu_clock(). This is done in preparation for
configuring the NoC registers on i.MX6QP in SPL.

Afer the NoC registers are set the IPU clocks can be disabled.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 13:16:51 +01:00
Fabio Estevam
1be51fed56 mx6: clock: Use setbits_le32()
The code can be made simpler by using setbits_le32(), so switch
to it.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 13:16:41 +01:00
Sjoerd Simons
b4eca2d787 imx :hab: Add hab version command
THe RVT data includes a major and minor version in its header
parameter. Add a new command to print this out.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
2019-10-14 09:31:41 +02:00
Fabio Estevam
d9fba73a88 imx: mmdc_size: Allow building it for i.MX7ULP
i.MX7ULP uses the same MMDC controller IP as found on i.MX53
and i.MX6, so build mmdc_size.c for i.MX7ULP as well.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-10-14 09:31:41 +02:00
Fabio Estevam
a02a5fb6ff imx: mmdc_size: Fix checkpatch warnings
The original imx_ddr_size() implementation had some
issues reported by checkpatch like this:

CHECK: Prefer kernel type 'u32' over 'uint32_t'
#127: FILE: arch/arm/mach-imx/mmdc_size.c:16:
+	uint32_t	ctl;

WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
#151: FILE: arch/arm/mach-imx/mmdc_size.c:40:
+	unsigned ctl = readl(&mem->ctl);

Fix all of them.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-10-14 09:31:41 +02:00
Fabio Estevam
89bc388a32 imx: Place imx_ddr_size() into a separate file
Place imx_ddr_size() into a separate file.

The motivation for doing this is to be able to easily reuse
imx_ddr_size() on i.MX7ULP.

Currently imx_ddr_size() is inside arch/arm/mach-imx/cpu.c, which
is not built for i.MX7ULP.

Changing the logic to allow building cpu.c for i.MX7UP would
require adding several ifdef's, leading to a not a very elegant
solution.

To allow better reuse, just place imx_ddr_size() into a common
mmdc_size.c file.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
2019-10-14 09:31:33 +02:00
Lukasz Majewski
0bcb11fa1f imx: tpc70: Convert TPC70 (imx6q) board to use DM/DTS in SPL and u-boot
This patch converts the TPC70 to use driver model and device tree
description in both SPL and u-boot proper.

Notable changes (DM/DTS conversion):

- PINCTRL{_IMX6}
- DM_I2C
- enable 'regulator' and 'pmic' commands
- DM_MMC and BLK (USDHC)
- DM_ETH
- DM WDT (including SYSRESET)

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-13 22:49:12 +02:00
Shawn Guo
6802d7951c Add i.MX7D based Meerkat96 board support
The Meerkat96 board, based on the NXP i.MX7D SoC, is a member of
96Boards community and complies with all Consumer Edition board
specifications.

https://www.novtech.com/products/meerkat96.html
https://www.96boards.org/product/imx7-96/

The initial supported/tested devices include:
 - Debug serial
 - SD
 - USB Host (with Ethernet)

With these support, it's good enough for loading Linux Kernel from SD or
Ethernet over USB.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-10-13 22:49:11 +02:00
Adam Ford
63ce94b16b Revert "spl: imx6: Let spl_boot_device return USDHC1 or USDHC2"
Apologies to everyone whose board I broke by attempting to return
MMC1 or MMC2. I misunderstood how the MMC indexing worked.

This reverts commit 14d319b185.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-10-08 16:36:37 +02:00
Stefano Babic
83afe3b1c9 Revert "imx: mmc_env: update runtime SD/MMC boot env device"
This reverts commit 34f2feb92db6146831bafa696b7b46785c9f6b10.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2019-10-08 16:36:37 +02:00
Stefano Babic
d714a75fd4 imx: replace CONFIG_SECURE_BOOT with CONFIG_IMX_HAB
CONFIG_SECURE_BOOT is too generic and forbids to use it for cross
architecture purposes. If Secure Boot is required for imx, this means to
enable and use the HAB processor in the soc.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2019-10-08 16:36:37 +02:00
Parthiban Nallathambi
4ee0ff1268 imx: nandbcb: include long help only when enabled
conditionally include long help text when enabled

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:37 +02:00
Peng Fan
d1c07785fd imx8: Add support to get container image set size
To avoid hardcoded offset when adding u-boot.cnt to flash.bin, we use
flexible offset which is calculated based on the size of the container
image generated int the first stage. And pad u-boot.cnt at 1KB
alignment.

So add code to get the offset when SPL loading u-boot.cnt.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
9b15ce9193 imx: Add i.MX8MM EVK board support.
Add board and SoC dts
Add ddr training code
support SD/MMC/GPIO/PINCTRL/UART

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
e663c703b1 imx8m: soc: probe clock device in arch_cpu_init_dm
Because we need to get cpu freq in print_cpuinfo at very early stage,
so we need to make sure the ccm be probed.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
e89d211f30 imx: mmc_env: update runtime SD/MMC boot env device
When DM_MMC enabled, the USDHC index in U-Boot is the USDHC port.
To directly return devno, we could avoid add board specific code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
5f24d0cb9c imx8m: add clk support for i.MX8MM
Introduce clk implementation for i.MX8MM, including pll configuration,
ccm configuration. Mostly will be done clk dm driver,
but such as DRAM part, we still use non clk dm driver, because we
have limited sram.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
8838cdf10d imx8m: restructure clock.h
i.MX8MQ and i.MX8MM use different analog pll design, but they
share same ccm design.
Add clock_imx8mq.h for i.MX8MQ
keep common part in clock.h

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
2005916f54 imx8m: rename clock to clock_imx8mq
i.MX8MQ and i.MX8MM has totally different pll design, so
rename clock to clock_imx8mq.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
d2041725e8 imx8m: restrict reset_cpu
Make reset_cpu only visible when CONFIG_SYSRESET not defined
or CONFIG_SPL_BUILD.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
0528ba0e1c imx8m: soc: enable SCTR clock before timer init
To i.MX8MM SCTR clock is disabled by ROM, so before timer init
need to enable it.
To i.MX8MQ, it does not hurt the clock is enabled again.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Ye Li
b3cf0a8f03 imx8m: Configure trustzone region 0 for non-secure access
Set trustzone region 0 to allow both non-secure and secure access
when trust zone is enabled. We found USB controller fails to access
DDR if the default region 0 is secure access only.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
dbb2b7e508 imx8m: set BYPASS ID SWAP to avoid AXI bus errors
set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
59efa6b52b imx8m: Fix MMU table issue for OPTEE memory
When running with OPTEE, the MMU table in u-boot does not remove the OPTEE
memory from its settings. So ARM speculative prefetch in u-boot may access
that OPTEE memory. Due to trust zone is enabled by OPTEE and that memory
is set to secure access, then the speculative prefetch will fail and cause
various memory issue in u-boot.
The fail address register and int_status register in trustzone has logged
that speculative access from u-boot.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
78db9a5463 imx: add get_cpu_rev support for i.MX8MM
There are several variants based on i.MX8MM, add the support in
get_cpu_rev

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
6c646b3de4 imx: spl: add spl_board_boot_device for i.MX8MM
Differnet board has different controller used, it is
hard to use one layout for them all.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
65a6c50095 imx: add i.MX8MM cpu type
Add i.MX8MM cpu type and related helper functions

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
1b1eaa0e12 imx: add IMX8MM kconfig entry
Add IMX8MM kconfig entry

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
d968ae7ed6 imx: add IMX8MQ kconfig entry
Add IMX8MQ kconfig entry, preparing support IMX8MM

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
478f944a96 imx8m: add image cfg for i.MX8MM lpddr4
There is no HDMI on i.MX8MM, so we need to remove HDMI entry, then
we could not reuse imximage.cfg, so create a new one.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Frieder Schrempf
fa99af41e0 imx: mkimage_fit_atf: Fix FIT image for correct boot order
Fix the FIT image metadata for i.MX8 to result in the intended boot
order (SPL -> ATF -> U-Boot).

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Stefan Roese
2a9f86b277 ARM: imx: arch/arm/mach-imx/spl_qspi.cfg
Similar to "spl_sd.cfg", this patch introduces "spl_qspi.cfg" so that
all i.MX6 based boards can use it, when they use SPL and QSPI boot
mode.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
2019-10-08 16:36:36 +02:00
Stefan Roese
d10d1386a0 ARM: imx: Add QSPI boot mode for i.MX6UL/ULL
This patch adds the missing boot mode detection for QSPI boot on
i.MX6UL/ULL. Without it, booting with SPL from QSPI NOR does not work.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
2019-10-08 16:36:36 +02:00
Breno Matheus Lima
5b20d141f2 imx: Kconfig: Reduce default CONFIG_CSF_SIZE
The default CSF_SIZE defined in Kconfig is too high and SPL cannot
fit into the OCRAM in certain cases.

The CSF cannot achieve 0x2000 length when using RSA 4K key which is
the largest key size supported by HABv4.

According to AN12056 "Encrypted Boot on HABv4 and CAAM Enabled Devices"
it's recommended to pad CSF binary to 0x2000 and append DEK blob to
deploy encrypted boot images.

As the maximum DEK blob size is 0x58 we can reduce CSF_SIZE to 0x2060
which should cover both CSF and DEK blob length.

Update default_image.c and image.c to align with this change and avoid
a U-Boot proper authentication failure in HAB closed devices:

Authenticate image from DDR location 0x877fffc0...
bad magic magic=0x32 length=0x6131 version=0x38
bad length magic=0x32 length=0x6131 version=0x38
bad version magic=0x32 length=0x6131 version=0x38
spl: ERROR:  image authentication fail

Fixes: 96d27fb218 (Revert "habv4: tools: Avoid hardcoded CSF size for SPL targets")

Reported-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
2019-10-08 16:36:36 +02:00
Lukasz Majewski
772b55723b imx: Introduce CONFIG_SPL_FORCE_MMC_BOOT to force MMC boot on falcon mode
This change tries to fix the following problem:

- The board boots (to be more precise - ROM loads SPL) from a slow SPI-NOR
  memory.
  As a result the spl_boot_device() will return SPI-NOR as a boot device
  (which is correct).

- The problem is that in 'falcon boot' the eMMC is used as a boot medium to
  load kernel from its partition.
  Calling spl_boot_device() will break things as it returns SPI-NOR device.

To fix this issue the new CONFIG_SPL_FORCE_MMC_BOOT Kconfig flag is
introduced to handle this special use case. By default it is not defined,
so there is no change in the legacy code flow.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:36:36 +02:00
Lukasz Majewski
e95b4bdd8d DM: SPI: Convert display5 to use SPI with DM/DTS (but no in SPL)
The DM/DTS support for SPI is disabled on purpose for SPL, as it is not
supported as of time of this conversion.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:35:59 +02:00
Lukasz Majewski
32e0751383 DM: eth: Switch display5 board to use DM_ETH
After this commit the display5 device would use FEC driver supporting
driver model (DM_ETH).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:35:59 +02:00
Lukasz Majewski
19e874c6d7 DM: mmc: Switch display5 board to use DM_MMC and BLK (USDHC)
After this commit the display5 device would use eMMC driver supporting
driver model (DM_MMC and BLK).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:35:59 +02:00
Lukasz Majewski
dac9a8f8a2 DM: I2C: Switch display5 board to use DM_I2C
After this commit the display5 device would use I2C driver supporting
driver model (DM_I2C).

The 'i2c' and 'eeprom' commands now use DM I2C drivers and initialize
on-bus devices according to device tree description.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:35:59 +02:00
Fabio Estevam
004eee86f1 pico-imx6: Add initial support
Add the initial support for the pico-imx6 variants.

DDR initialization is based on the TechNexion's U-Boot code.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2019-10-08 16:35:59 +02:00
Fabio Estevam
b8bffab76f mx6: clock: Allow enable_ipu_clock() to be built for SPL code
Allow enable_ipu_clock() to be built for SPL code. This is done
in preparation for configuring the NoC registers on i.MX6QP in SPL.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2019-10-08 16:35:59 +02:00
Peng Fan
bae4e8cb92 imx8: cpu: fix mac fuse word for i.MX8QM
i.MX8QM does not share same FUSE MAC word index, so update the word
index for i.MX8QM.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
43c5087385 imx8: move i.MX8 cpu desc code to drivers/cpu/imx8_cpu.c
Move cpu desc code to cpu driver directory and name it imx8_cpu.c
No functional change.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
94e4d028b2 imx8: fdt: add optee node
Add OP-TEE device tree node for Linux according to args passed from ATF.
If ATF has been built with OP-TEE running, boot_pointer[1] will indicate
that.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
fefe051335 imx8: save args passed from ATF
We use information from ATF to know whether OP-TEE is running or not.
So save args passed from ATF.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
01cacf9682 imx8: fdt: configure sid for masters
On i.MX8QM, sid is programmable, so we could program sid according the
value encoded in device tree.

This patch support legacy bindings which are still being used by XEN
and new bindings used by Linux Kernel.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
9f779fa410 imx8: disable node when the resource is not owned
When resource is not assigned to non-secure Linux, if linux continue
to use the node, linux may crash or hang. So need to set the node
status to disabled for not owned resources.

The resource id is in the power-domains property in device tree,
so parse the power-domains property to get the resource id and
use scfw api to check whether it is owned by current partition.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
8f99438b09 imx8qm: power up SMMU
There is SMMU in i.MX8QM. To use SMMU in Linux, need power up it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Ye Li
bcf94abd1c imx8: Probe the SCU driver by using uclass function
Since SCU MU driver has been bound in dm_init, so we don't need to
bind it again. Just replace by using uclass function to probe it.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
700315c9ac imx: add container target
To support SPL loading container file, add a new Makefile target,
and introduce a new Kconfig file to source the cfg file which
will be parsed by mkimage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:58 +02:00
Peng Fan
7b86cd4274 imx8: support parsing i.MX8 Container file
Add parsing i.MX8 Container file support, this is to let
SPL could load images in a container file to destination address.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:58 +02:00
Breno Matheus Lima
5f2fe3b93a Kconfig: Migrate CONFIG_CSF_SIZE to Kconfig
Move CONFIG_CSF_SIZE to Kconfig and define default value as 0x4000.

mx8mqevk requires 0x2000 add this configuration in imx8mq_evk_defconfig
file.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:35:58 +02:00
Ye Li
971a71e114 i.MX7ULP: Change clock rate calculation for NIC1 BUS and EXT
On i.MX7ULP B0, there is change in NIC clock dividers architecture.
On A0, the NIC1 BUS and EXT dividers were in a chain with NIC1 DIV, but
on B0 they are parallel with NIC1 DIV. So now the dividers are independent.
This patch modifies the scg_nic_get_rate function according to this change.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Ye Li
df3572e930 i.MX7ULP: Set A7 core frequency to 500Mhz for B0 chip
The normal target frequency for ULP A7 core is 500Mhz, but now ROM
set the core frequency to 413Mhz. So change it to 500Mhz in u-boot.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Peng Fan
e25dc290aa i.MX7ULP: Add CPU revision check for B0
Since there is no register for CPU revision, we use ROM version to
check the A0 or B0 chip.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Ye Li
eae4e0f3c1 i.MX7ULP: Workaround APLL PFD2 to 345.6Mhz
The GPU uses APLL PFD2 as its clock parent (483.84Mhz) with divider
set to 1. This frequecy is out of ULP A0 spec. The MAX rate for GPU
is 350Mhz. So we simply configure the APLL PFD2 to 345.6Mhz (FRAC=28)
to workaround the problem. The correct fix should let GPU handle the
clock rate in kernel.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Ye Li
eb6d2e5920 i.MX7ULP: Fix SPLL/APLL clock rate calculation issue
The num/denom is a float value, but in the calculation it is convert
to integer 0, and cause the result wrong.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Ye Li
61bf6173cd i.MX7ULP: Fix wrong i2c configuration name
Wrong I2c driver configuration name is used in codes, so I2c driver is
not built. Correct it.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Ye Li
911d7d356a i.MX7ULP: Add CONFIG_MX7ULP to kconfig
Since many drivers need this CONFIG_MX7ULP to distiguish the settings
for i.MX7ULP only. Add this entry to cpu's kconfig.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Bai Ping
3ed6734e69 i.MX7ULP: Correct the clock index
On i.MX7ULP, value zero is reserved in SCG1 RCCR register,
so the val should be decreased by 1 to get the correct clock
source index.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Bai Ping
7777406a8a i.MX7ULP: Fix system reset after a7 rtc alarm expired.
The board will reboot if A7 core enter mem mode by rtc, then M4 core
enter VLLS mode after the RTC alarm expired. Enable the dumb PMIC mode
to fix this issue.
Since i.MX7ULP B0 moves the SNVS LP into M4 domain, A core can't access
it. So check the CPU rev and not apply the settings for B0.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Peng Fan
e92fca66a3 imx: i.MX7ULP: add get_boot_device
Add get_boot_device for i.MX7ULP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:35:16 +02:00
Robert Hancock
06f5b5a5fc ARM: imx: Support larger SPL size on IMX6DQ
Previously the SPL size on all iMX6 platforms was restricted to 68KB
because the OCRAM size on iMX6SL/DL parts is only 128KB. However, the
other iMX6 variants have 256KB of OCRAM. Add an option
CONFIG_MX6_OCRAM_256KB which allows using the full size on boards which
don't need to support the SL/DL variants. This allows for an SPL size of
196KB, which makes it much easier to use configurations such as SPL with
driver model and FDT control.

Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Tested-by: Adam Ford <aford173@gmail.com> #imx6q_logic
2019-10-08 16:35:16 +02:00
Ricardo Salveti
01fc7e7b87 spl: imx: only use HAB if spl fit signature is not enabled
There is no need to use HAB for FIT signature validation when
SPL_FIT_SIGNATURE is also enabled, as that will be validated via the
normal U-Boot signed FIT image flow.

This allows having SPL validated by HAB and the payloads to follow
being validated with FIT signatures only.

Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Ricardo Salveti
a3f5c79507 imx: apalis_imx6: select MX6Q via Kconfig
Toradex Apalis iMX6 modules are available in the iMX6D and iMX6Q
variants, which are quite similar and already managed via only one
dtb in u-boot (imx6-apalis.dtb). Select MX6Q via Kconfig by default in
order to automatically enable the HAS_CAAM and MX6_SMP features.

Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2019-10-08 16:35:16 +02:00
Peng Fan
81ae46c2e6 imx: add i.MX6ULZ cpu type
Add i.MX6ULZ cpu type and helper.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:33:45 +02:00
Simon Glass
e7dcf5645f env: Drop environment.h header file where not needed
This header file is now only used by files that access internal
environment features. Drop it from various places where it is not needed.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Simon Glass
0ac7d722ed env: Move get/set_default_env() to env.h
Move these functions to the new header file and rename set_default_env()
to env_set_default() so that it has a consistent env_ prefix.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Simon Glass
7b51b576d6 env: Move env_get() to env.h
Move env_get() over to the new header file.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Simon Glass
9fb625ce05 env: Move env_set() to env.h
Move env_set() over to the new header file.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Igor Opaniuk
9de5eb23dc colibri-imx6ull: support building with DM_VIDEO=y
1. This fixes linking issues when building with DM_VIDEO enabled mxsfb
driver.
2. Provide proper defines for both VIDEO=y and DM_VIDEO=y.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-07-29 00:11:54 +02:00
Tom Rini
df9a7a195b u-boot-imx-20190719
- CCF for i.MX6
 - nandbcb command to write SPL into NAND
 - Switch to DM (i.MX28)
 - Boards: Toradex, engicam, DH
 - Fixes for i.MX8
 - Fixes for i.MX7ULP
 
 Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/561147504
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Merge tag 'u-boot-imx-20190719' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20190719

- CCF for i.MX6
- nandbcb command to write SPL into NAND
- Switch to DM (i.MX28)
- Boards: Toradex, engicam, DH
- Fixes for i.MX8
- Fixes for i.MX7ULP

Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/561147504
2019-07-27 09:35:05 -04:00
Patrick Delaunay
e21e3ffdd1 psci: Fix warnings when compiling with W=1
This patch solves the following warnings:
arch/arm/mach-stm32mp/psci.c:

warning: no previous prototype for ‘psci_set_state’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_arch_cpu_entry’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_features’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_version’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_affinity_info’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_migrate_info_type’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_cpu_on’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_cpu_off’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_system_reset’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_system_off’ [-Wmissing-prototypes]

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-24 14:15:38 -04:00
Ludwig Zenz
86e59530be ARCH: imx: Call sata_remove() not on imx6 duallite/solo boards
For a single binary approach for imx6 quad/dual/duallite/solo it
is necessary to enable CONFIG_SATA for quad/dual. On the other hand
on imx6 duallite/sole SATA is not available.
Therefore sata_remove() is skipped according to a blacklist scheme.

Adding further imx derivates is probably not recessary as they are
usually not pin-compatible and therefore a different board with its
own configuration.

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.com>
2019-07-19 20:32:24 +02:00
Ye Li
5fdef6c4c5 imx6dq: Fix chip version issue for rev1.3
According to iMX6DQ RM, the minor field (low 8 bits) in DIGPROG is not
aligned on silicon revision 1.3. So update get_cpu_rev to correct the
revision.

0x00630002 Silicon revision 1.2
0x00630005 Silicon revision 1.3
0x00630006 Silicon revision 1.6

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-07-19 20:32:24 +02:00
Anatolij Gustschin
d87b2486e6 arm: imx8: don't duplicate build_info()
Move build_info() to common place.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-07-19 20:14:50 +02:00
Anatolij Gustschin
64b5f46975 arm: imx8: factor out uart init code
New imx8 boards started adding duplicated UART init code.
Factor out this to common function sc_pm_setup_uart().

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-07-19 20:14:50 +02:00
Adam Ford
14d319b185 spl: imx6: Let spl_boot_device return USDHC1 or USDHC2
Currently, when the spl_boot_device checks the boot device, it
will only return MMC1 when it's either sd or eMMC regardless
of whether or not it's MMC1 or MMC2.  This is a problem when
booting from MMC2 if MMC isn't being manually configured like in
the DM_SPL case with SPL_OF_CONTROL.

This patch will check the register and return either MMC1 or MMC2.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-19 14:53:50 +02:00
Shyam Saini
1d43e24b94 i.MX6: nand: add nandbcb command for imx
Writing/updating boot image in nand device is not
straight forward in i.MX6 platform and it requires
boot control block(BCB) to be configured.

It becomes difficult to use uboot 'nand' command to
write BCB since it requires platform specific attributes
need to be taken care of.

It is even difficult to use existing msx-nand.c driver by
incorporating BCB attributes like mxs_dma_desc does
because it requires change in mtd and nand command.

So, cmd_nandbcb implemented in arch/arm/mach-imx

BCB contains two data structures, Firmware Configuration Block(FCB)
and Discovered Bad Block Table(DBBT). FCB has nand timings,
DBBT search area, page address of firmware.

On summary, nandbcb update will
- erase the entire partition
- create BCB by creating 2 FCB/DBBT block followed by
  1 FW block based on partition size and erasesize.
- fill FCB/DBBT structures
- write FW/SPL on FW1
- write FCB/DBBT in first 2 blocks

for nand boot, up on reset bootrom look for FCB structure in
first block's if FCB found the nand timings are loaded for
further reads. once FCB read done, DTTB will load and finally
firmware will be loaded which is boot image.

Refer section "NAND Boot" from doc/imx/common/imx6.txt for more usage
information.

Reviewed-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
2019-07-19 14:51:25 +02:00
Tom Rini
c76c93a3d5 configs: Rename CONFIG_IMAGE_FORMAT_LEGACY to CONFIG_LEGACY_IMAGE_FORMAT
The name CONFIG_LEGACY_IMAGE_FORMAT reads slightly better along with
allowing us to avoid a rather nasty Kbuild/Kconfig issue down the line
with CONFIG_IS_ENABLED(IMAGE_FORMAT_LEGACY).  In a few places outside of
cmd/ switch to using CONFIG_IS_ENABLED() to test what is set.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-07-11 14:11:18 -04:00
Tom Rini
f5e73a34ed Merge tag 'mmc-6-23' of https://github.com/MrVan/u-boot
- Pull in the series to split fsl_esdhc for i.MX/non-i.MX cleanly
2019-07-08 15:59:41 -04:00
Breno Matheus Lima
5760069ae8 mx6sl: hab: Fix pu_irom_mmu_enabled address
According to hab.c code we have to notify the ROM code if the MMU is
enabled or not. This is achieved by setting the "pu_irom_mmu_enabled"
to 0x1.

The current address in hab.c code is wrong for i.MX6SL, according to ROM
map file the correct address is 0x00901c60.

As we are writing in the wrong address the ROM code is not flushing the
caches when needed, and the following HAB event is observed in certain
scenarios:

--------- HAB Event 1 -----------------
event data:
        0xdb 0x00 0x14 0x41 0x33 0x18 0xc0 0x00
        0xca 0x00 0x0c 0x00 0x01 0xc5 0x00 0x00
        0x00 0x00 0x07 0xe4

STS = HAB_FAILURE (0x33)
RSN = HAB_INV_SIGNATURE (0x18)
CTX = HAB_CTX_COMMAND (0xC0)
ENG = HAB_ENG_ANY (0x00)

Update MX6SL_PU_IROM_MMU_EN_VAR to address this issue.

Reported-by: Frank Zhang <frank.zhang@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-06-27 14:10:40 +02:00
Yangbo Lu
e37ac717d7 Convert to use fsl_esdhc_imx for i.MX platforms
Converted to use fsl_esdhc_imx for i.MX platforms.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
Acked-by: Jason Liu <Jason.hui.liu@nxp.com>
2019-06-23 14:18:34 +08:00
Tom Rini
529faf80c3 u-boot-imx-20190612
--------------------
 
 - Board fixes:
 	- imx6logic
 	- wandboard
 	- mx6sabre boots again
 	- imx8qm_mek
 	- pico-* boards
 	- Toradex apalis / colibri
 	- engicam imx6 (environment)
 	- KP MX53
 	- opos6ul
 - Switch to DM:
 	- vining2000
 	- dh MX6
 	- Toradex colibri i.MX7
 	- Novena
 - Security : fix CSF size for HAB
 - Other:
       - imx: fix building for i.mx8 without spl
       - pcie and switch to DM
 
       mx6sabreauto: Enable SPL SDP support
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Merge tag 'u-boot-imx-20190612' of git://git.denx.de/u-boot-imx

u-boot-imx-20190612
--------------------

- Board fixes:
	- imx6logic
	- wandboard
	- mx6sabre boots again
	- imx8qm_mek
	- pico-* boards
	- Toradex apalis / colibri
	- engicam imx6 (environment)
	- KP MX53
	- opos6ul
- Switch to DM:
	- vining2000
	- dh MX6
	- Toradex colibri i.MX7
	- Novena
- Security : fix CSF size for HAB
- Other:
      - imx: fix building for i.mx8 without spl
      - pcie and switch to DM

      mx6sabreauto: Enable SPL SDP support
2019-06-11 13:41:24 -04:00
Peng Fan
1796e50939 imx8: cpu: get temperature when print cpu desc
Read the temperature when print cpu inforation.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-06-11 10:43:00 +02:00
Marek Vasut
4c05e966fd ARM: imx: Rename VINING|2000
The company Samtec was merged into Softing, migrate the board over to
the new name and update copyright headers.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
2019-06-11 10:42:48 +02:00
Marek Vasut
42dc1230cd ARM: imx: Call imx_pcie_remove() only for non-DM PCI driver
The DM iMX PCI driver has DM_FLAG_OS_PREPARE set and will call
imx_pcie_remove() from the .remove callback. Do not call it from
the architecture code again.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-06-11 10:42:48 +02:00
Parthiban Nallathambi
d2d1191843 imx: Extend PCL063 support for phyCORE-i.MX6ULL SOM
Extend PHYTEC phyBOARD-i.MX6UL for phyCORE-i.MX6UL SoM (PCL063)
with eMMC on SoM.

CPU:   Freescale i.MX6ULL rev1.0 792 MHz (running at 396 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 38C
Reset cause: POR
Model: Phytec phyBOARD-i.MX6ULL-Segin SBC
Board: PHYTEC phyCORE-i.MX6ULL
DRAM:  256 MiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
In:    serial@02020000
Out:   serial@02020000
Err:   serial@02020000
Net:   FEC0

Working:
 - Eth0
 - i2C
 - MMC/SD
 - eMMC
 - UART (1 & 5)
 - USB (host & otg)

Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-06-11 10:42:48 +02:00
Marcel Ziswiler
3d60366500 board: toradex: add apalis imx8qm 4gb wb it v1.0b module support
This commit adds initial support for the Toradex Apalis iMX8QM 4GB WB IT
V1.0B module. Unlike the V1.0A early access samples exclusively booting
from SD card, they are now strapped to boot from eFuses which are
factory fused to properly boot from their on-module eMMC. U-Boot
supports either booting from the on-module eMMC or may be used for
recovery purpose using the universal update utility (uuu) aka mfgtools
3.0.

Functionality wise the following is known to be working:
- eMMC, 8-bit and 4-bit MMC/SD card slots
- Gigabit Ethernet
- GPIOs
- I2C

Unfortunately, there is no USB functionality for the i.MX 8QM as of yet.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Max Krummenacher <max.krummenacher@toradex.com>
2019-06-11 10:42:48 +02:00
Marcel Ziswiler
1da39d3ce8 imx8qm: fix cpu frequency reporting
CPU frequency reporting failed with the following error message being
printed:

sc_pm_get_clock_rate: resource:507 clk:2: res:3
Could not read CPU frequency: -22
CPU:   NXP i.MX8QM RevB A53 at 0 MHz

Fix this by differentiating between the A35 as found on the i.MX 8QXP
and the A53 as found on the i.MX 8QM SoCs.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Max Krummenacher <max.krummenacher@toradex.com>
2019-06-11 10:42:48 +02:00
Jun Nie
79fcbde8eb pico-imx7d: Correct uart clock root
Correct uart clock root ID. Incorrect ID may result the
clock is gated because rate value 0 is returned in
imx_get_uartclk()

The ID can be ignored if CONFIG_SKIP_LOWLEVEL_INIT is not enabled
because init_clk_uart() will enable all uart clocks in that case.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
2019-06-11 10:42:48 +02:00
Jun Nie
bc7c9ed33c imx: mx7: Skip secure init in arch_cpu_init
Skip secure related initialization in arch_cpu_init if low level
init is skipped.  Because these should be done in early stage
firmware, such as ARM trusted firmware.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
2019-06-11 10:42:48 +02:00
Heiko Schocher
16c776d321 arm, imx, Makefile: fix u-boot-dtb.imx build in CONFIG_MULTI_DTB_FIT case
in case CONFIG_MULTI_DTB_FIT is set and u-boot-dtb.imx
image is build, currently u-boot-dtb.bin is used for
generating the u-boot-dtb.imx binary, which is wrong, as
it contains only a dtb blob not the fit.blob

Use instead the u-boot-fit-dtb.bin for generating
u-boot-dtb.imx which contains the fit.blob.

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-06-11 10:42:48 +02:00
Sébastien Szymanski
0ab85fe68f opos6ul: set REFSEL and REFR fields
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2019-06-11 10:42:48 +02:00
Ye Li
15bae9a86d mx7ulp: Add common plugin codes for mx7ulp
Add common plugin codes to call ROM's hwcnfg_setup and generate IVT2
header.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-06-11 10:42:48 +02:00
Marcel Ziswiler
7ce134b7c3 board: toradex: add colibri imx8qxp 2gb wb it v1.0b module support
This commit adds initial support for the Toradex Colibri iMX8QXP 2GB WB
IT V1.0B module. Unlike the V1.0A early access samples exclusively
booting from SD card, they are now strapped to boot from eFuses which
are factory fused to properly boot from their on-module eMMC. U-Boot
supports either booting from the on-module eMMC or may be used for
recovery purpose using the universal update utility (uuu) aka mfgtools
3.0.

Functionality wise the following is known to be working:
- eMMC and MMC/SD card
- Ethernet
- GPIOs
- I2C

Unfortunately, there is no USB functionality for the i.MX 8QXP as of
yet.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-06-11 10:42:48 +02:00
Marcel Ziswiler
4c45e43a2a imx: fix building for i.mx8 without spl
Building with Travis CI complained and stopped with the following error:
+cc1: fatal error: opening output file spl/u-boot-spl.cfgout: No such
file or directory
+compilation terminated.

This fixes commit caceb739ea ("imx: build flash.bin for i.MX8") which
took SPL being enabled on i.MX8 for granted.

Reported-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-06-11 10:42:48 +02:00
Tom Rini
99e14d5249 - mxsfb DM_VIDEO conversion
- splash fix for DM_VIDEO configurations
 - meson HDMI fix for boards without hdmi-supply regulator
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Merge tag 'video-updates-for-2019.07-rc3' of git://git.denx.de/u-boot-video

- mxsfb DM_VIDEO conversion
- splash fix for DM_VIDEO configurations
- meson HDMI fix for boards without hdmi-supply regulator
2019-06-10 09:41:19 -04:00
Heinrich Schuchardt
219dee7e38 imx: move BOARD_SIZE_CHECK to main Makefile
We currently have duplicate definitions for BOARD_SIZE_CHECK in Makefile
and arch/arm/mach-imx/Makefile.

Move the board size check from arch/arm/mach-imx/Makefile to Makefile.

Depending on the value of CONFIG_BOARD_SIZE_LIMIT an error like an error
like the following is thrown:

u-boot-dtb.imx exceeds file size limit:
  limit:  503696 bytes
  actual: 509720 bytes
  excess: 6024 bytes
make: *** [Makefile:1051: u-boot-dtb.imx] Error 1

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-06-07 11:03:39 -04:00
Igor Opaniuk
8c1df09f07 video: mxsfb: add DM_VIDEO support
Extend the driver to build with DM_VIDEO enabled. DTS files
must additionally include 'u-boot,dm-pre-reloc' property in
soc and child nodes to enable driver binding to mxsfb device.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-06-04 23:25:54 +02:00
Trevor Woerner
1001502545 CONFIG_SPL_SYS_[DI]CACHE_OFF: add
While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances
where these configuration items are conditional on SPL. This commit adds SPL
variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates
the configurations as required.

Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Make the default depend on the setting for full U-Boot, update
more zynq hardware]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-05-18 08:15:35 -04:00
Parthiban Nallathambi
d8d33b6d4d imx: Add variscite DART-6UL Evaluation Kit
Port for the DART-6UL Evaluation Kit SBC. Based on the variscite
DART-6UL iMX6ULL SoM.

CPU:   Freescale i.MX6ULL rev1.1 900 MHz (running at 396 MHz)
CPU:   Commercial temperature grade (0C to 95C) at 43C
Reset cause: POR
Model: Variscite DART-6UL Evaluation Kit
Board: Variscite DART-6UL Evaluation Kit
DRAM:  512 MiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
In:    serial@02020000
Out:   serial@02020000
Err:   serial@02020000
Net:   FEC0

Working:
 - Eth0
 - i2c
 - MMC/SD
 - eMMC
 - USB host
 - UART 1

Note: LCDIF porting needs DM_VIDEO
https://lists.denx.de/pipermail/u-boot/2019-April/365506.html

Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-04-25 19:16:24 +02:00
Peng Fan
702339bdf4 imx: i.MX8MQ: clear ocotp error bit
In case ocotp error bit is set, clear it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25 19:16:24 +02:00
Peng Fan
7a0c9b0888 imx: add lowlevel init for ARM64
Sometimes we met SERROR, but only to catch it when Linux boots up.
Let's enable catching in U-Boot to catch it ealier and ease debug.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25 19:16:24 +02:00
Chris Packham
4eceb4bc8b ARM: imx: Fix typo in select option for ZMX25
Correct CPU_ARM926EJS1 to CPU_ARM926EJS.

Reported-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-04-25 19:16:24 +02:00
Peng Fan
0d331c035a imx: support i.MX8QM MEK board
Add i.MX8QM MEK board support.
Included a basic dts, enabled SPL FIT

Boot log as below:
U-Boot SPL 2019.01-rc1-00029-gf002213219 (Dec 24 2018 - 10:28:30 +0800)
Normal Boot
Trying to boot from MMC2_2

U-Boot 2019.01-rc1-00029-gf002213219 (Dec 24 2018 - 10:28:30 +0800)

CPU:   NXP i.MX8QM RevB A53 at 142933 MHz

Model: Freescale i.MX8QM MEK
Board: iMX8QM MEK
Build: SCFW 9330215b
Boot:  SD1
DRAM:  6 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... *** Warning - bad CRC, using default environment

In:    serial@5a060000
Out:   serial@5a060000
Err:   serial@5a060000
Net:
Error: ethernet@5b040000 address not set.
eth-1: ethernet@5b040000
Hit any key to stop autoboot:  0

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25 17:03:25 +02:00
Peng Fan
7f50af6090 imx8: add cpu support
Add cpu type and Kconfig entry

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25 17:03:25 +02:00
Lukasz Majewski
13e7b72f32 ARM: defconfig: kp_imx53: Enable DM_USB support on HSC|DDC boards
This commit enables the DM_USB on HSC|DDC i.MX53 based boards.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-04-25 17:03:25 +02:00
Lukasz Majewski
81253ebba2 ARM: Enable CONFIG_DM_MMC and CONFIG_DM_BLK on HSC and DDC boards
This commit enables DM_MMC and DM_BLK on imx53 based HSC and DDC boards.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-04-25 17:03:25 +02:00
Peng Fan
a87eb0405f imx: sip: add call_imx_sip_ret2
This function will be used by i.MX8 fuse driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25 09:03:15 +02:00
Marcel Ziswiler
37822a6ca1 imx: bootaux: add dependency on vf610
Allow using bootaux also on VF610 aka Vybrid.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-04-13 20:30:09 +02:00
Anatolij Gustschin
57f065fee2 video: ipuv3: add DM_VIDEO support
Extend the driver to build with DM_VIDEO enabled. DTS files
must additionally include 'u-boot,dm-pre-reloc' property in
soc and ipu nodes to enable driver binding to ipu device.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2019-04-13 20:30:09 +02:00
Fabio Estevam
75cd09cb18 imx8qxp: Fix the reported CPU frequency
Currently the CPU frequency is incorrectly reported:

CPU:   NXP i.MX8QXP RevB A35 at 147228 MHz

Fix this problem by using a direct call to the SCU firmware to
retrieve the Cortex A35 CPU frequency.

With this change applied the CPU frequency is displayed correctly:

CPU:   NXP i.MX8QXP RevB A35 at 1200 MHz

Tested-by: Marcelo Macedo <marcelo.macedo@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Andrejs Cainikovs <andrejs.cainikovs@netmodule.com>
2019-03-13 09:14:35 +01:00
Fabio Estevam
737d8bd820 pico-imx6ul: Convert to DM MMC
Select CONFIG_DM_MMC=y in order to support MMC driver model.

This allows the MMC board related code to be removed.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2019-03-13 09:14:35 +01:00
Max Krummenacher
6ed4d26c21 imx: cpu.c: give access to reset cause in spl
This makes get_imx_reset_cause() accessible in SPL, but keeps the SRSR
register content intact so that U-Boot proper can evaluated the
reset_cause again should this be needed.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2019-02-15 22:01:15 +01:00
Lukasz Majewski
dc619924c7 ddr: vybrid: Add calibration code to memory controler's (DDRMC) setup code
This patch extends the vf610 DDR memory controller code to support SW
leveling.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
2019-02-15 12:16:50 +01:00
Lukasz Majewski
548cc1095f ddr: vybrid: Provide code to perform on-boot calibration
This patch provides the code to calibrate the DDR's
DQS to DQ signals (RDLVL).

It is based on:
VFxxx Controller Reference Manual, Rev. 0, 10/2016, page 1600
10.1.6.16.4.1 "Software Read Leveling in MC Evaluation Mode"

and NXP's community thread:
"Vybrid: About DDR leveling feature on DDRMC."
https://community.nxp.com/thread/395323

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-02-15 12:16:50 +01:00
Tien Fong Chee
0c3a9ed409 spl: Kconfig: Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT
Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT so
obj-$(CONFIG_$(SPL_)FS_FAT) can be used to control the build in both
SPL and U-Boot.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-02-01 09:12:48 -05:00
Tom Rini
db4a29993d - ihs and imx driver fixes
- relax EDID validation checks for 0 hsync/vsync
   pulse width (support some quirky displays)
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Merge tag 'video-updates-for-2019.04-rc1' of git://git.denx.de/u-boot-video

- ihs and imx driver fixes
- relax EDID validation checks for 0 hsync/vsync
  pulse width (support some quirky displays)
2019-01-31 16:07:37 -05:00
Ye Li
3fd39937b1 imx: video: Fix return value issue
When framebuffer driver init is failed, we should return the err value not 0.
So the video init can exit immediately.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-01-28 21:13:33 +01:00
Peng Fan
9382f73bb0 imx8: cpu: restrict checking ROM passover info for revA
Passover info only for revA.

move get_cpu_rev out of CONFIG_CPU to avoid build failure when using
get_cpu_rev in SPL.
Add a CONFIG_SPL_BUILD for passover usage, no need to execute it again
in normal U-Boot stage. Also if still checking passover info in normal
U-Boot stage, need to make the passover code executed after
arch_cpu_init_dm.
So to make it easy and clean, only execute the code for SPL stage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28 20:55:46 +01:00
Ye Li
d8bbf362f3 imx: Check the PL310 version for applying errata
Apply errata based on PL310 version instead of compile
time. Also set Prefetch offset to 15, since it improves
memcpy performance by 35%. Don't enable Incr double
Linefill enable since it adversely affects memcpy
performance by about 32MB/s and reads by 90MB/s. Tested
with 4K to 16MB sized src and dst aligned buffer.

Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
2019-01-28 20:55:46 +01:00
Ye Li
528915c717 imx: Fix potential lmb memory overwritten by stack
At default, u-boot reserves the memory from SP - 4KB to DRAM end for
lmb in arch_lmb_reserve. So lmb won't allocate any memory from it.
But we found the 4K gap for SP is not enough now, because some FDT
updating operations are added in our u-boot before jumping to kernel,
which needs larger stack. This causes the lmb allocated memory is overwritten
by stack.

Fix the issue by implementing the board_lmb_reserve to reserve from
SP - 16KB to memory end for lmb.

Signed-off-by: Ye Li <ye.li@nxp.com>
2019-01-28 20:35:47 +01:00
Peng Fan
caceb739ea imx: build flash.bin for i.MX8
Build flash.bin for i.MX8 when SPL enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28 20:35:47 +01:00
Peng Fan
b184a796a0 imx: mkimage_fit_atf: introduce BL33_BASE_ADDR
Introduce BL33_BASE_ADDR, then we could reuse this script for i.MX8QXP.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28 20:35:47 +01:00
Peng Fan
f541796af9 spl: imx8: add spl boot device
Add spl_boot_device for i.MX8, also add BOOT_DEVICE_MMC2_2 for
spl_boot_mode.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28 20:35:47 +01:00
Peng Fan
c1e0940f7c arm: imx: build mach-imx for i.MX8
To enable SPL for i.MX8, we could reuse code in arch/arm/mach-imx.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28 20:35:47 +01:00
Peng Fan
04b249656e imx8: scu: use dedicated MU for SPL
SPL runs in EL3 mode, except MU0_A, others are not powered on,
and could not be used. However normal U-Boot use MU1_A, so we
could not reuse the one in dts. And we could not replace the one
in dts with MU0_A, because MU0_A is reserved in secure world.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28 20:35:47 +01:00
Peng Fan
3bd888b55e imx8qxp: add SUPPORT_SPL option
Enable SUPPORT_SPL option for i.MX8QXP, then we could enable SPL.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28 20:35:47 +01:00
Fabio Estevam
bab289cbe9 mx7: Do not call lcdif_power_down() in the SPL case
Like it was done on imx6 in commit 9236269de5 ("imx: mx6: Fix
implementantion reset_misc")

Do not call lcdif_power_down() in the SPL case to fix the following
build error:

  LD      spl/u-boot-spl
  MKIMAGE u-boot.img
arch/arm/mach-imx/built-in.o: In function `reset_misc':
/home/fabio/ossystems/u-boot/arch/arm/mach-imx/mx7/soc.c:372: undefined reference to `lcdif_power_down'
scripts/Makefile.spl:375: recipe for target 'spl/u-boot-spl' failed

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-01-28 12:53:21 +01:00
Martyn Welch
0963060c99 imx: Add PHYTEC phyBOARD-i.MX6UL-Segin
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on
the PHYTEC phyCORE-i.MX6UL SOM (PCL063).

CPU:   Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 44C
Reset cause: POR
Board: PHYTEC phyCORE-i.MX6UL
I2C:   ready
DRAM:  256 MiB
NAND:  512 MiB
MMC:   FSL_SDHC: 0
In:    serial
Out:   serial
Err:   serial
Net:   FEC0

Working:
 - Eth0
 - i2C
 - MMC/SD
 - NAND
 - UART (1 & 5)
 - USB (host & otg)

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2019-01-28 12:47:27 +01:00
Breno Matheus Lima
b2ca8907d9 imx: hab: Convert non-NULL IVT DCD pointer warning to an error
The following NXP application notes and manual recommend to ensure the
IVT DCD pointer is Null prior to calling HAB API authenticate_image()
function:

- AN12263: HABv4 RVT Guidelines and Recommendations
- AN4581: Secure Boot on i.MX50, i.MX53, i.MX 6 and i.MX7 Series using
  HABv4
- CST docs: High Assurance Boot Version 4 Application Programming
  Interface Reference Manual

Commit ca89df7dd4 ("imx: hab: Convert DCD non-NULL error to warning")
converted DCD non-NULL error to warning due to the lack of documentation
at the time of first patch submission. We have warned U-Boot users since
v2018.03, and it makes sense now to follow the NXP recommendation to
ensure the IVT DCD pointer is Null.

DCD commands should only be present in the initial boot image loaded by
the SoC ROM. Starting in HAB v4.3.7 the HAB code  will generate an error
if a DCD pointer is present in an image being authenticated by calling the
HAB RVT API. Older versions of HAB will process and run DCD if it is
present, and this could lead to an incorrect authentication boot flow.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-01-28 12:45:45 +01:00
Tom Rini
7f9418688d Merge branch 'master' of git://git.denx.de/u-boot-usb 2019-01-11 10:47:41 -05:00
Jean-Jacques Hiblot
f811e9763f Kconfig: rename CONFIG_SPL_USB_GADGET_SUPPORT as CONFIG_SPL_USB_GADGET
The SPL option for USB gadget should be named after the option for u-boot
(CONFIG_USB_GADGET)

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-01-10 18:52:55 +01:00
Fabio Estevam
d4a0c09892 imx8m: clock: Fix oscillator values
OSC_27M_CLK should return 27MHz and OSC_32K_CLK should return
32768Hz to reflect the reality.

This also keeps the values in sync with the Linux clock tree.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-01-09 17:10:30 +01:00
Peng Fan
da72574b21 imx8: cpu: correct info
The CPU banner printed is as following:
CPU:   CPU:   Freescale i.MX8QXP RevB A35 at 147228 MHz

1. Drop the CPU:
2. Change vendor from Freescale to NXP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-09 17:04:17 +01:00
Stefan Agner
81653478eb ARM: vf610: ddrmc: do not write CR79 by default
The current value CTLUPD_AREF(0) is the reset value of the register,
so there is no need to write a value. If needed, the register can be
written using board specific CR settings.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-01-09 16:27:39 +01:00
Stefan Agner
52c2c97e7c ARM: vf610: ddrmc: fix initialization completion detection
The CR80 register has multiple interrupt bits, the code is supposed
to check bit 8 but instead uses a logical and. In most cases this
probably did not affect real operations since at that stage typically
none of the other bits are set.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2019-01-09 16:27:23 +01:00
Stefan Agner
a95d444055 ARM: vf610: ddrmc: program Dummy DDRBYTE1/2
The Vybrid reference manual VFXXXRM Rev. 0 10/2016 states in chapter
5.2.6.1 DUMMY PADS (DDR/QuadSPI) that those pads need to be programed
for correct operation of DDR. Assume the default DDR pin configuration
which seems to work well on a Colibri VF50.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2019-01-09 16:19:36 +01:00
Peng Fan
86ac7a9a5d imx: add i.MX8MQ EVK support
Add i.MX8MQ EVK support. SPL will initialize ddr and load ddr phy
firmware. Then loading FIT image, ATF to OCRAM, U-Boot and DTB to
DRAM.

The boot log with Arm trusted firmware console enabled:
"
U-Boot SPL 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800)
PMIC:  PFUZE100 ID=0x10
Normal Boot
Trying to boot from MMC2
NOTICE:  Configureing TZASC380
NOTICE:  BL31: v1.5(release):p9.0.0_1.0.0-beta-20180928-8-ge09c4b62-dirty
NOTICE:  BL31: Built : 09:28:54, Nov  8 2018
lpddr4 swffc start
NOTICE:  sip svc init

U-Boot 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800)

CPU:   Freescale i.MX8MQ rev2.0 at 1000 MHz
Reset cause: POR
Model: Freescale i.MX8MQ EVK
DRAM:  3 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
In:    serial
Out:   serial
Err:   serial
Net:
Warning: ethernet@30be0000 using MAC address from ROM
eth0: ethernet@30be0000
Hit any key to stop autoboot:  0
"

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2019-01-01 14:12:18 +01:00
Peng Fan
60afc5009b imx: imx8m: not build bootaux when building SPL
No need to build bootaux in SPL stage

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01 14:12:18 +01:00
Peng Fan
94df988596 imx: imx8mq: build flash.bin
Build flash.bin for i.MX8MQ, it will include signed hdmi firmware,
spl, ddr firmware, fit image(bl31.bin, u-boot-nodtb.bin, dtb).
Burn it to 33KB offset of SD card.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01 14:12:18 +01:00
Peng Fan
dfbc296a85 imx: imx8m: introduce imximage cfg file
imximage.cfg will be used to generate the flash.bin

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01 14:12:18 +01:00
Peng Fan
a9eed6e1b8 imx: imx8m: introduce script to generate fit image
Introduce script to generate fit image for i.MX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01 14:12:18 +01:00
Peng Fan
b3e5cb8d35 imx: imx8m: clock refactor dram pll part
Refactor dram_pll_init to accept args to configure different pll freq.
Introduce dram_enable_bypass and dram_disable_bypass

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01 14:12:18 +01:00
Peng Fan
278f273c56 imx: spl: add MMC BOOT Device for i.MX8M
Add MMC BOOT Device for i.MX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01 14:12:18 +01:00
Peng Fan
cd357ad112 imx: rename mx8m,MX8M to imx8m,IMX8M
Rename mx8m,MX8M to imx8m,IMX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jon Nettleton <jon@solid-run.com>
2019-01-01 14:12:18 +01:00
Peng Fan
4ac94bfa01 arm: imx8qxp: build u-boot-dtb.cfgout before checking files
Build u-boot-dtb.cfgout before checking files, otherwise
u-boot-dtb.cfgout is generated at late stage and cause final image not
generated.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01 14:12:18 +01:00
Parthiban Nallathambi
ea91031b22 imx: hab: extend hab_auth_img to calculate ivt_offset
Current implementation of hab_auth_img command needs ivt_offset to
authenticate the image. But ivt header is placed at the end of image
date after padding.

This leaves the usage of hab_auth_img command to fixed size or static
offset for ivt header. New function "get_image_ivt_offset" is introduced
to find the ivt offset during runtime. The case conditional check in this
function is same as boot_get_kernel in common/bootm.c

With this variable length image e.g. FIT image with any random size can
have IVT at the end and ivt_offset option can be left optional

Can be used as "hab_auth_img $loadaddr $filesize" from u-boot script

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Reviewed-by: Breno Lima <breno.lima@nxp.com>
2019-01-01 14:12:18 +01:00
Ye Li
e246bfcfe2 SPL: Add HAB image authentication to FIT
Introduce two board level callback functions to FIT image loading process, and
a SPL_FIT_FOUND flag to differentiate FIT image or RAW image.

Implement functions in imx common SPL codes to call HAB funtion
to authenticate the FIT image. Generally, we have to sign multiple regions
in FIT image:
1. Sign FIT FDT data (configuration)
2. Sign FIT external data (Sub-images)

Because the CSF supports to sign multiple memory blocks, so that we can use one
signature to cover all regions in FIT image and only authenticate once.
The authentication should be done after the entire FIT image is loaded into
memory including all sub-images.
We use "-p" option to generate FIT image to reserve a space for FIT IVT
and FIT CSF, also this help to fix the offset of the external data (u-boot-nodtb.bin,
ATF, u-boot DTB).

The signed FIT image layout is as below:
--------------------------------------------------
|     |     |     |   |           |     |        |
| FIT | FIT | FIT |   | U-BOOT    | ATF | U-BOOT |
| FDT | IVT | CSF |   | nodtb.bin |     |   DTB  |
|     |     |     |   |           |     |        |
--------------------------------------------------

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01 14:12:18 +01:00
Gary Bisson
68e7410fa2 imx: bootaux: fix stack and pc assignment on 64-bit platforms
Using ulong is wrong as its size depends on the Host CPU architecture
(32-bit vs. 64-bit) although the Cortex-M4 is always 32-bit.

Without this patch, the stack and PC are obviously wrong and it
generates an abort when used on 64-bit processors such as the i.MX8MQ.

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-01-01 14:12:18 +01:00
Gary Bisson
cb15885b48 imx: mx8m: add memory mapping for CAAM and TCM
Otherwise can't boot the M4 core as it is impossible to load its
firmware into the TCM memory.

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-01-01 14:12:18 +01:00
Fabien Lahoudere
725019bebe embestmx6boards: Add SPL support
In order to boot faster with falcon mode, we need to add SPL
support to riotboard.

Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
2019-01-01 14:12:18 +01:00
Marcel Ziswiler
43e6f94cbc imx: mkimage: add size check to the u-boot.imx make target
The make macro to check if the binary exceeds the board size limit is
taken straight from the root Makefile.

Without this and e.g. enabled EFI Vybrid fails booting as the regular
size limit check does not take the final u-boot.imx binary size into
account which is bigger due to alignment as well as IMX header stuff.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2018-11-12 11:08:53 +01:00
Christoph Niedermaier
19bbd09825 imx: imx6: perform gpr_init only on suitable cpu types
If the function gpr_init is used in a common MX6 spl
implementation we have to ensure that it is only called for
suitable cpu types, otherwise it breaks hardware parts like
enet1, can1, can2, etc.

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.de>
2018-11-08 14:35:40 +01:00
Tom Rini
cf033e04da Merged imx8 architecture, fix build for imx8 + warnings
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Merge tag 'u-boot-imx-20181025' of git://git.denx.de/u-boot-imx

Merged imx8 architecture, fix build for imx8 + warnings
2018-10-25 10:16:21 -04:00
Peng Fan
d79611598f imx: mkimage: avoid stop CI when required files not exists
Introduce a new script to check whether file exists and
use that check in Makefile to avoid break CI system.

The script return 1 when the required files not exists, return 0
when files exists. The script will ignore check to u-boot-dtb.bin,
because if there is something wrong to generate u-boot-dtb.bin,
there must be some code error.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-10-25 11:47:53 +02:00
Rui Miguel Silva
be277c3a89 imx: mx7: avoid some initialization if low level is skipped
We can have the case where u-boot is launched after some other low level
enabler, like for example when u-boot runs after arm-trusted-firmware
and/or optee. So, because of that we may need to jump the initialization of
some IP blocks even because we may no longer have the permission for that.

So, if the config option to skip low level init is set disable also timer,
board and csu initialization.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: u-boot@lists.denx.de
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2018-10-22 14:37:28 +02:00
Peng Fan
0e5c8ce734 arm: imx: include imx8image support
When building i.MX8/8X board, use imx8image type.

`-e $(CONFIG_SYS_TEXT_BASE)` is not needed, but
no harm to keep it for i.MX8/8X

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-10-22 13:01:27 +02:00
Peng Fan
d0dd73974c imx: add i.MX8QXP MEK board support
Add i.MX8QXP MEK board support
Enabled pinctrl/clk/power-domain/mmc/i2c/fec driver.
Added README file.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-10-22 13:00:09 +02:00
Peng Fan
2d58296f3e imx8: add dummy clock
This driver is mostly used to avoid build errors.
We use uclass clk driver for clk related operations.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-22 12:59:01 +02:00
Peng Fan
abeebc19db imx8: add iomux configuration api
Add iomux configuration api.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-22 12:59:01 +02:00
Anatolij Gustschin
2fdb1a1df9 imx8: cpu: add uclass based CPU driver
print_cpuinfo() in board init code requires uclass CPU driver,
add it to be able to display CPU info when CONFIG_DISPLAY_CPUINFO
option is enabled. CPU node in DT will have to include 'clocks'
and 'u-boot,dm-pre-reloc' properties for generic print_cpuinfo()
to work as expected. The driver outputs info for i.MX8QXP Rev A
and Rev B CPUs.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2018-10-22 12:59:01 +02:00
Anatolij Gustschin
70b4b49b91 imx8: cpu: add function for reading FEC MAC from fuse
FEC driver requires imx_get_mac_from_fuse(). Add it in preparation
for ENETx support.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2018-10-22 12:59:01 +02:00
Peng Fan
1ef20a3d81 imx8: add arch_cpu_init arch_cpu_init_dm
Add arch_cpu_init(_dm) mainly to open the channel between ACore and SCU.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-22 12:59:01 +02:00
Peng Fan
930b595291 imx8: add mmu and dram related functions
Add mmu memmap, some memory regions are reserved by M4, Arm Trusted
Firmware, so need to get memreg using SCFW API and setup the memmap.

Add dram_init, dram_init_banksize, get_effective_memsize functions,
according to the memreg.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-22 12:59:01 +02:00
Peng Fan
c1aae21d89 imx8: implement mmc_get_env_dev
Implement mmc_get_env_dev for i.MX8.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-22 12:59:01 +02:00
Peng Fan
8aa1505b59 imx8: add boot device detection
Add get_boot_device to detect boot device.
Add print_bootinfo to print the boot device info.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-22 12:59:01 +02:00
Peng Fan
60d33fcd19 imx8: add basic cpu support
Add basic cpu support, including cpu revision, cpu type,
cpu core detection.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-22 12:59:01 +02:00
Peng Fan
b2b8b9be2f imx: add Kconfig entry for i.MX8QXP
Add Kconfig entry for i.MX8QXP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-22 12:59:01 +02:00
Marek Vasut
39cb4f3c25 arm: mx5: Add M53Menlo board
Add Menlosystems M53 board, based on the M53 SoM.
This board has Ethernet, USB host, USB gadget, UART and LCD on it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-16 10:34:19 +02:00
Marek Vasut
ed85f77190 arm: mx5: Add LDB clock config code
Add code to configure PLL4, from which the LDB clock are directly
derived.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-16 10:34:02 +02:00
Marek Vasut
0b6b8a3a19 arm: imx: mx5: Make videoskip available on MX5
The board_video_skip() implementation in imx-common/video.c works
on i.MX5x as well, so loosen the SoC filter in Makefile to make it
available.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-16 10:33:26 +02:00
Patrick Delaunay
6180ea7e66 arm: remove prototype for get_timer_masked
The interruption support had be removed for ARM architecture and
the function get_timer_masked() is no more used except in some
the timer.c files.

This patch clean each timer.c which implement this function and
remove the associated prototype in u-boot-arm.h

For timer.c, I don't verify if the weak version of get_timer
(in lib/time.c) can be used

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-10 13:35:09 -04:00
Marcel Ziswiler
2cea8d74dc imx: mx7: fix potential overflow in imx_ddr_size()
The imx_ddr_size() function may overflow as it is possible to kind of
over provision the DDR controller. Fix this by capping it to 2 GB which
is the maximum allowed size as per reference manual.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-10-09 18:32:47 +02:00
Fabio Estevam
82a8a93327 pico-imx6ul: Convert to SPL
There are two versions of imx6ul pico SOMs: one with 256MB and another
one with 512MB of RAM.

Convert to SPL so that both versions can be supported. This patch
doesn't rework the clock initialization to avoid changing the behavior
in this same patch, so it will be cleaned up in future.

Currently only the 256MB is tested/supported.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-14 15:04:24 +02:00
Anson Huang
57b620255e imx: mx7: add system suspend/resume support
This patch adds system suspend/resume support,
when linux kernel enters deep sleep mode, SoC will go
into below mode:

 - CA7 platform goes into STOP mode;
 - SoC goes into DSM mode;
 - DDR goes into self-refresh mode;
 - CPU0/SCU will be powered down.

When wake up event arrives:

 - SoC DSM mdoe exits;
 - CA7 platform exit STOP mode, SCU/CPU0 power up;
 - Invalidate L1 cache;
 - DDR exit self-refresh mode;
 - Do secure monitor mode related initialization;
 - Jump to linux kernel resume entry.

Belwo is the log of 1 iteration of system suspend/resume:

[  338.824862] PM: suspend entry (deep)
[  338.828853] PM: Syncing filesystems ... done.
[  338.834433] Freezing user space processes ... (elapsed 0.001 seconds) done.
[  338.842939] OOM killer disabled.
[  338.846182] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
[  338.869717] PM: suspend devices took 0.010 seconds
[  338.877846] Disabling non-boot CPUs ...
[  338.960301] Retrying again to check for CPU kill
[  338.964953] CPU1 killed.
[  338.968104] Enabling non-boot CPUs ...
[  338.973598] CPU1 is up
[  339.267155] mmc1: queuing unknown CIS tuple 0x80 (2 bytes)
[  339.275833] mmc1: queuing unknown CIS tuple 0x80 (7 bytes)
[  339.284158] mmc1: queuing unknown CIS tuple 0x80 (6 bytes)
[  339.385065] PM: resume devices took 0.400 seconds
[  339.389836] OOM killer enabled.
[  339.392986] Restarting tasks ... done.
[  339.398990] PM: suspend exit

The resume entry function has to initialize stack pointer before calling
C code, otherwise there will be an external abort occur, in additional,
invalidate L1 cache must be done in secure section as well, so this
patch also adds assembly code back and keep it as simple as possible.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Tested-by: Stefan Agner <stefan@agner.ch>
2018-09-04 08:47:23 +02:00
Anson Huang
b059837850 imx: mx7: add gpc initialization for low power mode
Add i.MX7D GPC initialization for low power mode
support like system suspend/resume from linux kernel:

 - Pending IOMUXC IRQ to workaround GPC state machine issue;
 - Mask all GPC interrupts for M4/C0/C1;
 - Configure SCU timing;
 - Configure time slot ack;
 - Configure C0/C1 power up/down timing;
 - Configure wakeup source mechanism;
 - Disable DSM/RBC related settings.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-09-04 08:47:23 +02:00
Anson Huang
11e52bca84 imx: mx7: psci: improve cpu hotplug flow
This patch improves cpu hotplug, previous cpu_off
implementation is NOT safe, a CPU can NOT power down
itself in runtime, it will cause system bus hang due
to pending transaction. So need to use other online
CPU to kill it when it is ready for killed.

Here use SRC parameter register and a magic number
of ~0 as handshake for killing a offline CPU,
when the online CPU checks the psci_affinity_info,
it will help kill the offline CPU according to
the magic number stored in SRC parameter register.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-09-04 08:47:23 +02:00
Michal Simek
b3815fc4e5 dm: Fix CMD_DM enabling
The patch "dm: Change CMD_DM enabling"
(sha1: 08a00cba06) was incorrectly updated
and PICO_IMX7D is missing imply CMD_DM and WARP7 has it twice.
This patch is fixing it.

Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-31 14:46:22 -04:00
Michal Simek
58008cbab5 Kconfig: Sort bool, default, select and imply options
Another round of sorting Kconfig entries aplhabetically.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-30 07:18:48 -04:00
Michal Simek
08a00cba06 dm: Change CMD_DM enabling
CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-30 07:18:48 -04:00
Michal Simek
5ed063d10f Kconfig: Sort bool, default, select and imply options
Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-07-30 07:18:48 -04:00
Michal Simek
6e7bdde4fe Kconfig: Replace spaces with tabs and missing newline
Trivial Kconfig cleanup. Use tabs instead of spaces and every Kconfig
entry should be separated by newline.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-30 07:18:47 -04:00
Adam Ford
bbbb50f9fd imx: i.mx6q: imx6q_logic: Migrate to SPL and enable SDP
Since the vast majority of i.MX6 boards are migrating to SPL,
this patch converts im6q_logic to SPL and enables the SDP for
loading SPL and u-boot.img over USB.  The Falcon mode only
supports NAND flash as of now due to limited space/RAM, but
all i.MX6D/Q SOM's from Logic PD have internal NAND from which
to boot.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-07-23 11:03:20 +02:00
Fabio Estevam
d5b7177f91 pico-imx7d: Add SPL support
Convert pico-imx7d to SPL support.

There are two variants of pico-imx7d SOMs:
- One with 512MB of RAM
- One with 1GB of RAM

The 512MB module contains two Hynix H5TC2G63GFR-PBA.
The 1GB module contains two Hynix H5TC4G63GFR-PBA.

The RAM size is determined in runtime by reading GPIO1_12.

While at it, also add USB Serial Download mode support as it
is very helpful for loading SPL and u-boot.img via imx_usb_loader.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-07-23 10:59:48 +02:00
Stefan Agner
f97df68898 imx: mx7: psci: implement MIGRATE_INFO_TYPE
Implement MIGRATE_INFO_TYPE. This informs Linux that no migration
for the trusted operating system is necessary:
  [    0.000000] psci: Trusted OS migration not required

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-23 10:54:32 +02:00
Stefan Agner
28a5af11f8 imx: mx7: psci: support CPU0 on/off
So far psci_cpu_(on|off) only worked for CPU1. Allow to control
CPU0 too. This allows to run the Linux PSCI checker successfully:
  [    2.213447] psci_checker: PSCI checker started using 2 CPUs
  [    2.219107] psci_checker: Starting hotplug tests
  [    2.223859] psci_checker: Trying to turn off and on again all CPUs
  [    2.267191] IRQ21 no longer affine to CPU0
  [    2.293266] Retrying again to check for CPU kill
  [    2.302269] CPU0 killed.
  [    2.311648] psci_checker: Trying to turn off and on again group 0 (CPUs 0-1)
  [    2.354354] IRQ21 no longer affine to CPU0
  [    2.383222] Retrying again to check for CPU kill
  [    2.392148] CPU0 killed.
  [    2.398063] psci_checker: Hotplug tests passed OK
  [    2.402910] psci_checker: Starting suspend tests (10 cycles per state)
  [    2.410019] psci_checker: cpuidle not available on CPU 0, ignoring
  [    2.416452] psci_checker: cpuidle not available on CPU 1, ignoring
  [    2.422757] psci_checker: Could not start suspend tests on any CPU
  [    2.429370] psci_checker: PSCI checker completed

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-23 10:54:23 +02:00
Stefan Agner
a89eb89b38 imx: mx7: psci: provide complete PSCI 1.0 implementation
PSCI 1.0 require PSCI_VERSION, PSCI_FEATURES, AFFINITY_INFO and
CPU_SUSPEND to be implemented. Commit 0ec3d98f76 ("mx7_common:
use psci 1.0 instead of 0.1") marked the i.MX 7 implementation to
be PSCI 1.0 compliant but failed to implement those functions.
Especially the missing PSCI version callback was noticeable when
booting Linux:

  [    0.000000] psci: probing for conduit method from DT.
  [    0.000000] psci: PSCIv65535.65535 detected in firmware.
  [    0.000000] psci: Using standard PSCI v0.2 function IDs
  [    0.000000] psci: MIGRATE_INFO_TYPE not supported.
  [    0.000000] psci: SMC Calling Convention v1.0

This patch provides a minimal implementation thereof. With this
patch applied Linux detects PSCI 1.0:

  [    0.000000] psci: probing for conduit method from DT.
  [    0.000000] psci: PSCIv1.0 detected in firmware.
  [    0.000000] psci: Using standard PSCI v0.2 function IDs
  [    0.000000] psci: MIGRATE_INFO_TYPE not supported.
  [    0.000000] psci: SMC Calling Convention v1.0

Fixes: 0ec3d98f76 ("mx7_common: use psci 1.0 instead of 0.1")
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-23 10:54:01 +02:00
Stefan Agner
cff38c5504 imx: mx7: psci: use C code exclusively
There is no need for assembly in the platform specific part of
the PSCI implementation.

Note that this does not make it a complete PSCI 1.0 implementation
yet but aids to do so in upcoming patches.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-23 10:53:42 +02:00
Michael Trimarchi
4a72abcb71 imx: imx6: Add comment to gpr_init function
This function can be used only for some of the nxp SoC. Make
it explicit in the comment. This adjust a bit commit
3aa4b703b4 ("imx: imx6: Move gpr_init() function to soc.c")

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-23 10:50:53 +02:00
Fabio Estevam
2756d31fae mx7: Remove BMODE support
i.MX7 does not support BMODE due to the erratum e10574 ("Watchdog:
A watchdog timeout or software trigger will not reset the SOC"), so
remove its support.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-07-23 10:50:00 +02:00
Michael Trimarchi
9236269de5 imx: mx6: Fix implementantion reset_misc
lcdif_power_down should not be included in spl build to avoid build
failure introduced by commit eb111bb31d

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2018-07-23 10:31:52 +02:00
Stefan Agner
31b1e17f44 board: toradex: add Colibri iMX6ULL support
Add support for the Colibri iMX6ULL module which comes with
on-board raw NAND.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-23 10:12:00 +02:00
Yaniv Levinsky
c5d548a9f8 env: common: accept flags on reset to default env
The function set_default_env() sets the hashtable flags for import_r().
Formally set_default_env() doesn't accept flags from its callers. In
practice the caller can (un)set the H_INTERACTIVE flag, but it has to be
done using the first character of the function's string argument. Other
flags like H_FORCE can't be set by the caller.

Change the function to accept flags argument. The benefits are:
1. The caller will have to explicitly set the H_INTERACTIVE flag,
   instead of un-setting it using a special char in a string.
2. Add the ability to propagate flags from the caller to himport(),
   especially the H_FORCE flag from do_env_default() in nvedit.c that
   currently gets ignored for "env default -a -f" commands.
3. Flags and messages will not be coupled together. A caller will be
   able to set flags without passing a string and vice versa.

Please note:
The propagation of H_FORCE from do_env_default() does not introduce any
functional changes, because currently himport_r() is set to destroy the
old environment regardless if H_FORCE flag is set or not. More changes
are needed to utilize the propagation of H_FORCE.

Signed-off-by: Yaniv Levinsky <yaniv.levinsky@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2018-07-19 16:17:58 -04:00
Tom Rini
03b54997d5 board/aries: Remove
The various Aries Embedded boards have been orphaned for a year and no
one has come forward to take care of them.  Remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-07-02 15:52:50 -04:00
Fabio Estevam
ee322f3c79 mx5: Select ARM_CORTEX_A8_CVE_2017_5715
On a 4.18-rc1 kernel the following warning is seen on i.MX51 and
i.MX53:

CPU0: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable

Select the ARM_CORTEX_A8_CVE_2017_5715 workaround for i.MX51/i.MX53
to fix the problem.

With this patch applied the kernel reports:

CPU0: Spectre v2: using BPIALL workaround

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-06-30 08:49:55 -04:00
Tom Rini
de76610545 Merge git://git.denx.de/u-boot-imx 2018-06-27 13:09:55 -04:00
Michal Simek
20b016a336 common: Fix cpu nr type which is always unsigned type
cpu_cmd() is reading cpu number via simple_strtoul() which is always
unsigned type.
Platform code implementations are not expecting that nr can be negative
and there is not checking in the code for that too.

This patch is using u32 type for cpu number to make sure that platform
code get proper value range.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-19 07:31:45 -04:00
Ye Li
c5437e5b8a imx: Enable ACTLR.SMP bit for all i.MX cortex-a7 platforms
According to the Cortex-A7 TRM, for ACTLR.SMP bit "You must ensure this bit
is set to 1 before the caches and MMU are enabled, or any cache and TLB
maintenance operations are performed".
ROM sets this bit in normal boot flow, but when in serial download mode,
it is not set.
Here we add it in u-boot as a common flow for all i.MX cortex-a7 platforms,
including mx7d, mx6ul/ull and mx7ulp.

Signed-off-by: Ye Li <ye.li@nxp.com>
[fabio: adapted to U-Boot mainline codebase and make checkpatch happy]
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-06-18 16:21:25 +02:00
Lukasz Majewski
ee94365557 arm: imx53: Add support for imx53 boards from K+P
This commit adds support for DDC and HSC boards from
K+P in u-boot.

Console output:

U-Boot 2018.05-rc2-00090-g752b7ed6f9 (Apr 26 2018 - 14:24:24 +0200)

CPU:   Freescale i.MX53 rev2.1 at 800 MHz
Reset cause: WDOG
Model: K+P iMX53
DRAM:  512 MiB
MMC:   FSL_SDHC: 0
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Module EEPROM:
  ID: TQMa53-CB.0401
  SN: 63152762
  MAC: 00:0b:64:03:14:2a
BBoard:40x0 Rev:10
Net:   eth0: ethernet@63fec000
Hit any key to stop autoboot:  0

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-05-18 08:29:38 +02:00
Jagan Teki
e810565e23 i.MX6DL: mamoj: Add PFUZE100 support
MX6DL Mamoj boards has Freescale PFUZE100 PMIC, add support
for it through DM_PMIC dt definition.

pmic log:
Reviewed-by: Stefano Babic <sbabic@denx.de>

========
=> pmic list
| Name                            | Parent name         | Parent uclass @ seq
| pfuze100@08                     | i2c@021f8000        | i2c @ 3
=> pmic dev pfuze100@08
dev: 0 @ pfuze100@08
=> pmic dump
Dump pmic: pfuze100@08 registers

0x00: 10 00 00 21 00 01 3f 01 00 7f 00 00 00 00 00 81
0x10: 00 00 3f 00 00 00 00 00 00 00 00 10 00 00 00 00
0x20: 2b 2b 2b 08 c4 00 00 00 00 00 00 00 00 00 2b 2b
0x30: 2b 08 c4 00 00 72 72 72 08 d4 00 00 2c 2c 2c 08
0x40: e4 00 00 2c 2c 2c 08 e4 00 00 6f 6f 6f 08 f4 00
0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x60: 00 00 00 00 00 00 48 00 00 00 10 06 1e 1e 17 10
0x70: 1a 1f 00 00 00 00 00 00 00 00 00 00 00 00 00

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
2018-05-18 08:23:43 +02:00
Jagan Teki
dda9892171 i.MX6DL: mamoj: Add I2C support
i.MX6DL Mamoj has i2c3 and i2c4 buses, add support
through DM_I2C with dt definition.

i2c log:
Reviewed-by: Stefano Babic <sbabic@denx.de>

=======
=> i2c bus
Bus 2:  i2c@021a8000
Bus 3:  i2c@021f8000
=> i2c dev 2
Setting bus to 2
=> i2c speed 400000
Setting bus speed to 400000 Hz
=> i2c probe
Valid chip addresses: 20 51 53
=> i2c md 53 0xff
00ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
=> i2c md 51 0xff
00ff: a8 08 40 50 09 43 46 52 42 18 80 8e ae a9 d0 53    ..@P.CFRB......S
=> i2c dev 3
Setting bus to 3
=> i2c speed 100000
Setting bus speed to 100000 Hz
=> i2c probe
Valid chip addresses: 08 40 48 4B
=> i2c md 08 0xff
00ff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
2018-05-18 08:23:43 +02:00
Jagan Teki
1494cc89cb i.MX6: board: Add BTicino i.MX6DL Mamoj initial support
Add initial support for i.MX6DL BTicino Mamoj board.

Mamoh board added:
- SPL
- SPL_DM
- SPL_OF_CONTROL
- DM for U-Boot proper
- OF_CONTROL for U-Boot proper
- eMMC
- FEC
- Boot from eMMC
- Boot from USB SDP

Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-18 08:23:43 +02:00
Peter Robinson
02ada2d958 mx6: Select CONFIG_MP with MX6_SMP
It makes sense to select the MP multi processor option at the same time we
select the other SMP options needed for SMP capable i.MX6 SoCs.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2018-05-17 12:04:22 +02:00
Magnus Lilja
71720d6793 mx31: Convert MX31_HCLK_FREQ and MX31_CLK32 to Kconfig.
Also remove the #ifdef's from clock.h since the Kconfig values defaults
the to old default values in clock.h.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-17 12:02:28 +02:00
Magnus Lilja
3159ec64f5 mx31pdk: Convert CONFIG_MX31 flag to use Kconfig.
Move CONFIG_MX31 from mx31pdk.h to mx31pdk_defconfig and introduce
necessary Kconfig changes as well.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-17 12:02:24 +02:00
Ian Ray
51a42bea52 board: ge: bx50v3: remove redundant targets
This replaces TARGET_GE_B{4,6,8}50V3 with common TARGET_GE_BX50V3.
The boards are identified automatically at runtime.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-05-17 11:58:48 +02:00
Patrick Delaunay
47ec6b4ea3 imx7: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07 11:52:55 -04:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Tom Rini
b25f8e2112 Merge git://git.denx.de/u-boot-imx 2018-04-30 07:14:05 -04:00
Andre Przywara
7842b6a91e arm: move SYS_ARCH_TIMER to KConfig
SYS_ARCH_TIMER guards the usage of the ARM Generic Timer (aka arch
timer) in U-Boot.
At the moment it is mandatory for ARMv8 and used by a few ARMv7 boards.
Add a proper Kconfig symbol to express this dependency properly,
allowing certain board configuration to later disable arch timer in case
there are any problems with it.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[tuomas: rebase + fix conflicts and resync with moveconfig & use select]
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2018-04-28 18:30:43 -04:00
Tom Rini
d024236e5a Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:48 -04:00
Sébastien Szymanski
ea77217828 imx6ul: opos6ul: in Serial Downloader boot mode use ymodem
When booting in Serial Downloader mode load the U-Boot image using
ymodem.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2018-04-26 09:34:16 +02:00
Sébastien Szymanski
30754ef77c imx6ul: opos6ul: add SPL_DM support
Since commit commit 152038ea18 ("i.MX6UL: icore: Add SPL_OF_CONTROL
support") the OPOS6UL board doesn't boot anymore. Adding SPL_DM support
makes the board boot again.

Fixes: commit 152038ea18 ("i.MX6UL: icore: Add SPL_OF_CONTROL support")
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2018-04-26 09:34:00 +02:00
Tom Rini
ebca902aeb Merge git://git.denx.de/u-boot-imx
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-15 08:43:50 -04:00
Trent Piepho
f916757300 imx: Create distinct pre-processed mkimage config files
Each imx image is created by a separate sub-make and during this process
the mkimage config file is run though cpp.

The cpp output is to the same file no matter what imx image is being
created.

This means if two imx images are generated in parallel they will attempt
to independently produce the same pre-processed mkimage config file at
the same time.

Avoid the problem by making the pre-processed config file name unique
based on the imx image it will be used in.  This way each image will
create a unique config file and they won't clobber each other when run
in parallel.

This should fixed the build bug referenced in b5b0e4e3 ("imximage:
Remove failure when no IVT offset is found").

Cc: Breno Lima <breno.lima@nxp.com>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-15 11:55:23 +02:00
Bryan O'Donoghue
723f8359c1 imx: mx7: snvs: Add an SNVS init routine
Working with HAB on the i.MX7 we've encountered a case where a board that
successfully authenticates u-boot when booting Linux via OPTEE subsequently
fails to properly bring up the RTC.

The RTC registers live in the low-power block of the Secure Non-Volatile
Storage (SNVS) block.

The root cause of the error has been traced to the HAB handing off the
SNVS-RTC in a state where HPCOMR::NPSWA_EN = 0 in other words where the
Non-Privileged Software Access Enable bit is zero. In ordinary
circumstances this is OK since we typically do not run in TZ mode, however
when we boot via HAB and enablng TrustZone, it is required to set
HPCOMR::NPSWA_EN = 1 in order for the upstream Linux driver to have
sufficient permissions to manipulate the SNVS-LP block.

On our reference board it is the difference between Linux doing this:

root@imx7s-warp-mbl:~# dmesg | grep rtc
snvs_rtc_enable read 0x00000000 from SNVS_LPLR @ 0x00000034
snvs_rtc_enable read 0x00000021 from SNVS_LPCR @ 0x00000038
snvs_rtc_enable read 0x00000000 from SNVS_HPLR @ 0x00000000
snvs_rtc_enable read 0x80002100 from SNVS_HPCOMR @ 0x00000004
snvs_rtc 30370000.snvs:snvs-rtc-lp: rtc core: registered
         30370000.snvs:snvs-rtc-lp as rtc0
snvs_rtc 30370000.snvs:snvs-rtc-lp: setting system clock to2018-04-01 00:51:04 UTC (1522543864)

and doing this:

root@imx7s-warp-mbl:~# dmesg | grep rtc
snvs_rtc_enable read 0x00000000 from SNVS_LPLR @ 0x00000034
snvs_rtc_enable read 0x00000020 from SNVS_LPCR @ 0x00000038
snvs_rtc_enable read 0x00000001 from SNVS_HPLR @ 0x00000000
snvs_rtc_enable read 0x00002020 from SNVS_HPCOMR @ 0x00000004
snvs_rtc 30370000.snvs:snvs-rtc-lp: failed to enable rtc -110
snvs_rtc: probe of 30370000.snvs:snvs-rtc-lp failed with error -110
hctosys: unable to open rtc device (rtc0)

Note bit 1 of LPCR is not set in the second case and is set in the first
case and that bit 31 of HPCOMR is set in the second case but not in the
first.

Setting NPSWA_EN in HPCOMR allows us to boot through enabling TrustZone
and continue onto the kernel. The kernel then has the necessary permissions
to set LPCR::SRTC_ENV (RTC enable in the LP command register) whereas in
contrast - in the failing case the non-privileged kernel cannot do so.

This patch adds a simple init_snvs() call which sets the permission-bit
called from soc.c for the i.MX7. It may be possible, safe and desirable to
perform this on other i.MX processors but for now this is only tested on
i.MX7 as working.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2018-04-15 11:48:44 +02:00
Lukasz Majewski
dd4671cb3f imx: board: Add support for the K+P's kp_imx6q_tpc board
This commit provides support for Kieback & Peter GmbH IMX6Q based
TPC board.

U-boot console output:

U-Boot SPL 2018.05-rc1-00005-g631e2d01fd (Apr 04 2018 - 21:16:24 +0200)
Trying to boot from MMC1

U-Boot 2018.05-rc1-00005-g631e2d01fd (Apr 04 2018 - 21:16:24 +0200)

CPU:   Freescale i.MX6Q rev1.5 996 MHz (running at 792 MHz)
CPU:   Extended Commercial temperature grade (-20C to 105C) at 37C
Reset cause: POR
Board: K+P KP_IMX6Q_TPC i.MX6Q
       Watchdog enabled
I2C:   ready
DRAM:  2 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Net:   FEC [PRIME]
Autoboot in 3 seconds
2018-04-15 11:47:19 +02:00
Bryan O'Donoghue
49e6242673 imx: hab: Provide hab_auth_img_or_fail command
This patch adds hab_auth_img_or_fail() a command line function that
encapsulates a common usage of authenticate and failover, namely if
authenticate image fails, then drop to BootROM USB recovery mode.

For secure-boot systems, this type of locked down behavior is important to
ensure no unsigned images can be run.

It's possible to script this logic but, when done over and over again the
environment starts get very complex and repetitive, reducing that script
repetition down to a command line function makes sense.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
2018-04-15 11:44:13 +02:00
Bryan O'Donoghue
1ab1ffded4 imx: mx7: Add comment to describe OTP TESTER registers
The tester registers provide a unique chip-level identifier which
get_board_serial() returns in a "struct tag_serialnr".

This patch documents the properties of the registers; in summary.

31:0 OCOTP_TESTER0 (most significant)
- FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID

OCOTP_TESTER1 (least significant)
31:24
- The X-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
  ID
23:16
- The Y-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
  ID
15:11
- The wafer number of the wafer on which the device was fabricated/SJC
  CHALLENGE/ Unique ID
10:0
- FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID

The 64 bits of data generate a unique serial number per-chip.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-04-15 11:44:13 +02:00