Kconfig: Sort bool, default, select and imply options

Another round of sorting Kconfig entries aplhabetically.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
This commit is contained in:
Michal Simek 2018-07-23 15:55:15 +02:00 committed by Tom Rini
parent 08a00cba06
commit 58008cbab5
20 changed files with 111 additions and 110 deletions

24
Kconfig
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@ -68,25 +68,25 @@ config CC_COVERAGE
config DISTRO_DEFAULTS
bool "Select defaults suitable for booting general purpose Linux distributions"
imply USE_BOOTCOMMAND
select CMD_BOOTZ if ARM && !ARM64
select AUTO_COMPLETE
select CMDLINE_EDITING
select CMD_BOOTI if ARM64
select CMD_BOOTZ if ARM && !ARM64
select CMD_DHCP if CMD_NET
select CMD_PING if CMD_NET
select CMD_PXE if NET
select CMD_ENV_EXISTS
select CMD_EXT2
select CMD_EXT4
select CMD_FAT
select CMD_FS_GENERIC
imply CMD_MII if NET
select CMD_PART if PARTITIONS
select HUSH_PARSER
select CMDLINE_EDITING
select AUTO_COMPLETE
select SYS_LONGHELP
select SUPPORT_RAW_INITRD
select CMD_PING if CMD_NET
select CMD_PXE if NET
select ENV_VARS_UBOOT_CONFIG
select HUSH_PARSER
select SUPPORT_RAW_INITRD
select SYS_LONGHELP
imply CMD_MII if NET
imply USE_BOOTCOMMAND
help
Select this to enable various options and commands which are suitable
for building u-boot for booting general purpose Linux distributions.
@ -237,8 +237,8 @@ if FIT
config FIT_ENABLE_SHA256_SUPPORT
bool "Support SHA256 checksum of FIT image contents"
select SHA256
default y
select SHA256
help
Enable this to support SHA256 checksum of FIT image contents. A
SHA256 checksum is a 256-bit (32-byte) hash value used to check that
@ -252,8 +252,8 @@ config FIT_ENABLE_SHA256_SUPPORT
config FIT_SIGNATURE
bool "Enable signature verification of FIT uImages"
depends on DM
select RSA
select HASH
select RSA
help
This option enables signature verification of FIT uImages,
using a hash signed and verified using RSA. If

View file

@ -31,36 +31,36 @@ choice
config CPU_ARC750D
bool "ARC 750D"
select ARC_MMU_V2
depends on ISA_ARCOMPACT
select ARC_MMU_V2
help
Choose this option to build an U-Boot for ARC750D CPU.
config CPU_ARC770D
bool "ARC 770D"
select ARC_MMU_V3
depends on ISA_ARCOMPACT
select ARC_MMU_V3
help
Choose this option to build an U-Boot for ARC770D CPU.
config CPU_ARCEM6
bool "ARC EM6"
select ARC_MMU_ABSENT
depends on ISA_ARCV2
select ARC_MMU_ABSENT
help
Next Generation ARC Core based on ISA-v2 ISA without MMU.
config CPU_ARCHS36
bool "ARC HS36"
select ARC_MMU_ABSENT
depends on ISA_ARCV2
select ARC_MMU_ABSENT
help
Next Generation ARC Core based on ISA-v2 ISA without MMU.
config CPU_ARCHS38
bool "ARC HS38"
select ARC_MMU_V4
depends on ISA_ARCV2
select ARC_MMU_V4
help
Next Generation ARC Core based on ISA-v2 ISA with MMU.

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@ -1,5 +1,7 @@
config ARCH_LS1021A
bool
select SYS_FSL_DDR_BE if SYS_FSL_DDR
select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR
select SYS_FSL_ERRATUM_A008378
select SYS_FSL_ERRATUM_A008407
select SYS_FSL_ERRATUM_A008997
@ -10,18 +12,16 @@ config ARCH_LS1021A
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_A010315
select SYS_FSL_HAS_CCI400
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR_BE if SYS_FSL_DDR
select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR
select SYS_FSL_HAS_DDR3 if SYS_FSL_DDR
select SYS_FSL_HAS_DDR4 if SYS_FSL_DDR
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_5
select SYS_FSL_SEC_LE
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
imply CMD_PCI
imply SCSI
imply SCSI_AHCI
imply CMD_PCI
menu "LS102xA architecture"
depends on ARCH_LS1021A

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@ -44,8 +44,8 @@ config ARMV8_SPIN_TABLE
menu "ARMv8 secure monitor firmware"
config ARMV8_SEC_FIRMWARE_SUPPORT
bool "Enable ARMv8 secure monitor firmware framework support"
select OF_LIBFDT
select FIT
select OF_LIBFDT
help
This framework is aimed at making secure monitor firmware load
process brief.
@ -60,8 +60,8 @@ config ARMV8_SEC_FIRMWARE_SUPPORT
config SPL_ARMV8_SEC_FIRMWARE_SUPPORT
bool "Enable ARMv8 secure monitor firmware framework support for SPL"
select SPL_OF_LIBFDT
select SPL_FIT
select SPL_OF_LIBFDT
help
Say Y here to support this framework in SPL phase.

View file

@ -18,9 +18,9 @@ config TARGET_DA850EVM
config TARGET_EA20
bool "EA20 board"
select BOARD_LATE_INIT
select MACH_DAVINCI_DA850_EVM
select SOC_DA850
select BOARD_LATE_INIT
config TARGET_OMAPL138_LCDK
bool "OMAPL138 LCDK"
@ -57,8 +57,8 @@ config SOC_DA850
config SOC_DA8XX
bool
select SYS_DA850_PLL_INIT if SUPPORT_SPL || DA850_LOWLEVEL
select SYS_DA850_DDR_INIT if SUPPORT_SPL || DA850_LOWLEVEL
select SYS_DA850_PLL_INIT if SUPPORT_SPL || DA850_LOWLEVEL
config MACH_DAVINCI_DA850_EVM
bool

View file

@ -6,8 +6,8 @@ choice
config ARCH_EXYNOS4
bool "Exynos4 SoC family"
select CPU_V7A
select BOARD_EARLY_INIT_F
select CPU_V7A
help
Samsung Exynos4 SoC family are based on ARM Cortex-A9 CPU. There
are multiple SoCs in this family including Exynos4210, Exynos4412,
@ -15,14 +15,14 @@ config ARCH_EXYNOS4
config ARCH_EXYNOS5
bool "Exynos5 SoC family"
select CPU_V7A
select BOARD_EARLY_INIT_F
select CPU_V7A
select SHA_HW_ACCEL
imply CRC32_VERIFY
imply CMD_HASH
imply CRC32_VERIFY
imply HASH_VERIFY
imply USB_ETHER_RTL8152
imply USB_ETHER_ASIX
imply USB_ETHER_RTL8152
imply USB_ETHER_SMSC95XX
help
Samsung Exynos5 SoC family are based on ARM Cortex-A15 CPU (and
@ -46,9 +46,9 @@ choice
prompt "EXYNOS4 board select"
config TARGET_SMDKV310
select SUPPORT_SPL
bool "Exynos4210 SMDKV310 board"
select OF_CONTROL
select SUPPORT_SPL
config TARGET_TRATS
bool "Exynos4210 Trats board"
@ -93,39 +93,39 @@ config TARGET_ARNDALE
select ARM_ERRATA_774769
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select SUPPORT_SPL
select OF_CONTROL
select SUPPORT_SPL
config TARGET_SMDK5250
bool "SMDK5250 board"
select SUPPORT_SPL
select OF_CONTROL
select SUPPORT_SPL
config TARGET_SNOW
bool "Snow board"
select SUPPORT_SPL
select OF_CONTROL
select SUPPORT_SPL
config TARGET_SPRING
bool "Spring board"
select SUPPORT_SPL
select OF_CONTROL
select SPL_DISABLE_OF_CONTROL
select SUPPORT_SPL
config TARGET_SMDK5420
bool "SMDK5420 board"
select SUPPORT_SPL
select OF_CONTROL
select SUPPORT_SPL
config TARGET_PEACH_PI
bool "Peach Pi board"
select SUPPORT_SPL
select OF_CONTROL
select SUPPORT_SPL
config TARGET_PEACH_PIT
bool "Peach Pit board"
select SUPPORT_SPL
select OF_CONTROL
select SUPPORT_SPL
endchoice
endif
@ -139,12 +139,12 @@ config TARGET_ESPRESSO7420
bool "ESPRESSO7420 board"
select ARM64
select ARMV8_MULTIENTRY
select SUPPORT_SPL
select CLK_EXYNOS
select OF_CONTROL
select SPL_DISABLE_OF_CONTROL
select PINCTRL
select PINCTRL_EXYNOS7420
select CLK_EXYNOS
select SPL_DISABLE_OF_CONTROL
select SUPPORT_SPL
endchoice
endif

View file

@ -9,9 +9,9 @@ choice
config TARGET_MX31PDK
bool "Support the i.MX31 PDK board from Freescale/NXP"
select BOARD_EARLY_INIT_F
select BOARD_LATE_INIT
select SUPPORT_SPL
select BOARD_EARLY_INIT_F
endchoice

View file

@ -6,14 +6,14 @@ config HAVE_MVEBU_EFUSE
config ARMADA_32BIT
bool
select ARCH_MISC_INIT
select BOARD_EARLY_INIT_F
select CPU_V7A
select SUPPORT_SPL
select SPL_DM
select SPL_DM_SEQ_ALIAS
select SPL_OF_CONTROL
select SPL_SIMPLE_BUS
select BOARD_EARLY_INIT_F
select ARCH_MISC_INIT
select SUPPORT_SPL
config ARMADA_64BIT
bool

View file

@ -6,11 +6,11 @@ choice
config OMAP34XX
bool "OMAP34XX SoC"
select ARM_CORTEX_A8_CVE_2017_5715
select ARM_ERRATA_430973
select ARM_ERRATA_454179
select ARM_ERRATA_621766
select ARM_ERRATA_725233
select ARM_CORTEX_A8_CVE_2017_5715
select USE_TINY_PRINTF
imply NAND_OMAP_GPMC
imply SPL_EXT_SUPPORT
@ -52,9 +52,9 @@ config OMAP44XX
config OMAP54XX
bool "OMAP54XX SoC"
select ARM_CORTEX_A15_CVE_2017_5715
select ARM_ERRATA_798870
select SYS_THUMB_BUILD
select ARM_CORTEX_A15_CVE_2017_5715
imply NAND_OMAP_ELM
imply NAND_OMAP_GPMC
imply SPL_DISPLAY_PRINT
@ -116,8 +116,8 @@ config AM43XX
config AM33XX
bool "AM33XX SoC"
select SPECIFY_CONSOLE_INDEX
select ARM_CORTEX_A8_CVE_2017_5715
select SPECIFY_CONSOLE_INDEX
imply NAND_OMAP_ELM
imply NAND_OMAP_GPMC
imply SPL_NAND_AM33XX_BCH

View file

@ -23,26 +23,26 @@ config TARGET_DRA7XX_EVM
bool "TI DRA7XX"
select BOARD_LATE_INIT
select DRA7XX
select TI_I2C_BOARD_DETECT
select PHYS_64BIT
imply SCSI
select TI_I2C_BOARD_DETECT
imply DM_PMIC
imply PMIC_LP87565
imply DM_REGULATOR
imply DM_REGULATOR_LP87565
imply SPL_THERMAL
imply DM_THERMAL
imply PMIC_LP87565
imply SCSI
imply SPL_THERMAL
imply TI_DRA7_THERMAL
config TARGET_AM57XX_EVM
bool "AM57XX"
select BOARD_LATE_INIT
select CMD_DDR3
select DRA7XX
select TI_I2C_BOARD_DETECT
select CMD_DDR3
imply DM_THERMAL
imply SCSI
imply SPL_THERMAL
imply DM_THERMAL
imply TI_DRA7_THERMAL
endchoice

View file

@ -14,8 +14,8 @@ endif
config TARGET_QEMU_ARM_32BIT
bool "Support qemu_arm"
depends on ARCH_QEMU
select CPU_V7A
select ARCH_SUPPORT_PSCI
select CPU_V7A
select SYS_ARCH_TIMER
config TARGET_QEMU_ARM_64BIT

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@ -87,22 +87,22 @@ config TARGET_POPMETAL_RK3288
config TARGET_VYASA_RK3288
bool "Vyasa-RK3288"
select BOARD_LATE_INIT
select TPL
select SUPPORT_TPL
select TPL_DM
select TPL_REGMAP
select TPL_SYSCON
select TPL_CLK
select TPL_RAM
select TPL_OF_PLATDATA
select TPL_OF_CONTROL
select TPL_BOOTROM_SUPPORT
select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
select ROCKCHIP_BROM_HELPER
select SUPPORT_TPL
select TPL
select TPL_BOOTROM_SUPPORT
select TPL_CLK
select TPL_DM
select TPL_DRIVERS_MISC_SUPPORT
select TPL_LIBCOMMON_SUPPORT
select TPL_LIBGENERIC_SUPPORT
select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
select TPL_OF_CONTROL
select TPL_OF_PLATDATA
select TPL_RAM
select TPL_REGMAP
select TPL_SERIAL_SUPPORT
select TPL_SYSCON
help
Vyasa is a RK3288-based development board with 2 USB ports,
HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet, It

View file

@ -9,8 +9,8 @@ config TARGET_SOCFPGA_ARRIA5
config TARGET_SOCFPGA_ARRIA10
bool
select SPL_BOARD_INIT if SPL
select ALTERA_SDRAM
select SPL_BOARD_INIT if SPL
config TARGET_SOCFPGA_CYCLONE5
bool
@ -23,8 +23,8 @@ config TARGET_SOCFPGA_GEN5
config TARGET_SOCFPGA_STRATIX10
bool
select ARMV8_MULTIENTRY
select ARMV8_SPIN_TABLE
select ARMV8_SET_SMPEN
select ARMV8_SPIN_TABLE
choice
prompt "Altera SOCFPGA board select"

View file

@ -9,9 +9,9 @@ config STM32F4
select PINCTRL
select PINCTRL_STM32
select RAM
select STM32_SDRAM
select STM32_RCC
select STM32_RESET
select STM32_SDRAM
select STM32_SERIAL
select STM32_TIMER
select TIMER
@ -25,13 +25,6 @@ config STM32F7
select PINCTRL
select PINCTRL_STM32
select RAM
select STM32_SDRAM
select STM32_RCC
select STM32_RESET
select STM32_SERIAL
select STM32_TIMER
select TIMER
select SUPPORT_SPL
select SPL
select SPL_BOARD_INIT
select SPL_CLK
@ -46,13 +39,20 @@ config STM32F7
select SPL_OF_CONTROL
select SPL_OF_LIBFDT
select SPL_OF_TRANSLATE
imply SPL_OS_BOOT
select SPL_PINCTRL
select SPL_RAM
select SPL_SERIAL_SUPPORT
select SPL_SYS_MALLOC_SIMPLE
select SPL_TIMER
select SPL_XIP_SUPPORT
select STM32_RCC
select STM32_RESET
select STM32_SDRAM
select STM32_SERIAL
select STM32_TIMER
select SUPPORT_SPL
select TIMER
imply SPL_OS_BOOT
config STM32H7
bool "stm32h7 family"
@ -64,9 +64,9 @@ config STM32H7
select PINCTRL_STM32
select RAM
select REGMAP
select STM32_SDRAM
select STM32_RCC
select STM32_RESET
select STM32_SDRAM
select STM32_SERIAL
select STM32_TIMER
select SYSCON

View file

@ -6,16 +6,16 @@ choice
config TARGET_APALIS_TK1
bool "Toradex Apalis TK1 module"
select ARCH_SUPPORT_PSCI
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
config TARGET_JETSON_TK1
bool "NVIDIA Tegra124 Jetson TK1 board"
select ARCH_SUPPORT_PSCI
select BOARD_LATE_INIT
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
config TARGET_CEI_TK1_SOM
bool "Colorado Engineering Inc Tegra124 TK1-som board"

View file

@ -5,10 +5,10 @@ config SYS_CONFIG_NAME
config ARCH_UNIPHIER_32BIT
bool
select ARCH_SUPPORT_PSCI
select ARMV7_NONSEC
select CPU_V7A
select CPU_V7_HAS_NONSEC
select ARMV7_NONSEC
select ARCH_SUPPORT_PSCI
choice
prompt "UniPhier SoC select"
@ -69,6 +69,7 @@ config ARCH_UNIPHIER_LD20
bool "Enable UniPhier LD20 SoC support"
depends on ARCH_UNIPHIER_V8_MULTI
default y
select OF_BOARD_SETUP
config ARCH_UNIPHIER_PXS3
bool "Enable UniPhier PXs3 SoC support"
@ -78,8 +79,8 @@ config ARCH_UNIPHIER_PXS3
config CACHE_UNIPHIER
bool "Enable the UniPhier L2 cache controller"
depends on ARCH_UNIPHIER_32BIT
select SYS_CACHE_SHIFT_7
default y
select SYS_CACHE_SHIFT_7
help
This option allows to use the UniPhier System Cache as L2 cache.

View file

@ -6,30 +6,30 @@ config SYS_SOC
config SOC_AR933X
bool
select MIPS_TUNE_24KC
select ROM_EXCEPTION_VECTORS
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
select ROM_EXCEPTION_VECTORS
select MIPS_TUNE_24KC
help
This supports QCA/Atheros ar933x family SOCs.
config SOC_AR934X
bool
select MIPS_TUNE_74KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
select MIPS_TUNE_74KC
help
This supports QCA/Atheros ar934x family SOCs.
config SOC_QCA953X
bool
select MIPS_TUNE_24KC
select ROM_EXCEPTION_VECTORS
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
select ROM_EXCEPTION_VECTORS
select MIPS_TUNE_24KC
help
This supports QCA/Atheros qca953x family SOCs.

View file

@ -20,10 +20,10 @@ choice
config SOC_BMIPS_BCM3380
bool "BMIPS BCM3380 family"
select MIPS_L1_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select MIPS_TUNE_4KC
select MIPS_L1_CACHE_SHIFT_4
select SWAP_IO_SPACE
select SYSRESET_WATCHDOG
help
@ -31,10 +31,10 @@ config SOC_BMIPS_BCM3380
config SOC_BMIPS_BCM6318
bool "BMIPS BCM6318 family"
select MIPS_L1_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select MIPS_TUNE_4KC
select MIPS_L1_CACHE_SHIFT_4
select SWAP_IO_SPACE
select SYSRESET_SYSCON
help
@ -42,10 +42,10 @@ config SOC_BMIPS_BCM6318
config SOC_BMIPS_BCM6328
bool "BMIPS BCM6328 family"
select MIPS_L1_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select MIPS_TUNE_4KC
select MIPS_L1_CACHE_SHIFT_4
select SWAP_IO_SPACE
select SYSRESET_SYSCON
help
@ -53,10 +53,10 @@ config SOC_BMIPS_BCM6328
config SOC_BMIPS_BCM6338
bool "BMIPS BCM6338 family"
select MIPS_L1_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select MIPS_TUNE_4KC
select MIPS_L1_CACHE_SHIFT_4
select SWAP_IO_SPACE
select SYSRESET_SYSCON
help
@ -64,10 +64,10 @@ config SOC_BMIPS_BCM6338
config SOC_BMIPS_BCM6348
bool "BMIPS BCM6348 family"
select MIPS_L1_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select MIPS_TUNE_4KC
select MIPS_L1_CACHE_SHIFT_4
select SWAP_IO_SPACE
select SYSRESET_WATCHDOG
help
@ -75,10 +75,10 @@ config SOC_BMIPS_BCM6348
config SOC_BMIPS_BCM6358
bool "BMIPS BCM6358 family"
select MIPS_L1_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select MIPS_TUNE_4KC
select MIPS_L1_CACHE_SHIFT_4
select SWAP_IO_SPACE
select SYSRESET_SYSCON
help
@ -86,10 +86,10 @@ config SOC_BMIPS_BCM6358
config SOC_BMIPS_BCM6368
bool "BMIPS BCM6368 family"
select MIPS_L1_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select MIPS_TUNE_4KC
select MIPS_L1_CACHE_SHIFT_4
select SWAP_IO_SPACE
select SYSRESET_SYSCON
help
@ -97,10 +97,10 @@ config SOC_BMIPS_BCM6368
config SOC_BMIPS_BCM6362
bool "BMIPS BCM6362 family"
select MIPS_L1_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select MIPS_TUNE_4KC
select MIPS_L1_CACHE_SHIFT_4
select SWAP_IO_SPACE
select SYSRESET_SYSCON
help
@ -108,10 +108,10 @@ config SOC_BMIPS_BCM6362
config SOC_BMIPS_BCM63268
bool "BMIPS BCM63268 family"
select MIPS_L1_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select MIPS_TUNE_4KC
select MIPS_L1_CACHE_SHIFT_4
select SWAP_IO_SPACE
select SYSRESET_SYSCON
help

View file

@ -9,12 +9,12 @@ choice
config SOC_PIC32MZDA
bool "Microchip PIC32MZ[DA] family"
select SUPPORTS_LITTLE_ENDIAN
select MIPS_L1_CACHE_SHIFT_4
select ROM_EXCEPTION_VECTORS
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
select MIPS_L1_CACHE_SHIFT_4
select SUPPORTS_LITTLE_ENDIAN
select SYS_MIPS_CACHE_INIT_RAM_LOAD
select ROM_EXCEPTION_VECTORS
help
This supports Microchip PIC32MZ[DA] family of microcontrollers.

View file

@ -20,9 +20,9 @@ config MPC85xx
select CREATE_ARCH_SYMLINK
select SYS_FSL_DDR
select SYS_FSL_DDR_BE
imply USB_EHCI_HCD if USB
imply CMD_HASH
imply CMD_IRQ
imply USB_EHCI_HCD if USB
config MPC86xx
bool "MPC86xx"