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imx: mx7: Skip secure init in arch_cpu_init

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Skip secure related initialization in arch_cpu_init if low level
init is skipped.  Because these should be done in early stage
firmware, such as ARM trusted firmware.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
This commit is contained in:
Jun Nie 2019-05-08 14:38:30 +08:00 • committed by Stefano Babic
parent 3ad0d26878
commit bc7c9ed33c
1 changed files with 28 additions and 15 deletions
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43
arch/arm/mach-imx/mx7/soc.c
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@ -164,15 +164,6 @@ u32 __weak get_board_rev(void)
}
#endif
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
/* enable all periherial can be accessed in nosec mode */
static void init_csu(void)
{
int i = 0;
for (i = 0; i < CSU_NUM_REGS; i++)
writel(CSU_INIT_SEC_LEVEL0, CSU_IPS_BASE_ADDR + i * 4);
}
static void imx_enet_mdio_fixup(void)
{
struct iomuxc_gpr_base_regs *gpr_regs =
@ -191,6 +182,26 @@ static void imx_enet_mdio_fixup(void)
}
}
static void init_cpu_basic(void)
{
imx_enet_mdio_fixup();
#ifdef CONFIG_APBH_DMA
/* Start APBH DMA */
mxs_dma_init();
#endif
}
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
/* enable all periherial can be accessed in nosec mode */
static void init_csu(void)
{
int i = 0;
for (i = 0; i < CSU_NUM_REGS; i++)
writel(CSU_INIT_SEC_LEVEL0, CSU_IPS_BASE_ADDR + i * 4);
}
static void imx_gpcv2_init(void)
{
u32 val, i;
@ -269,12 +280,7 @@ int arch_cpu_init(void)
/* Disable PDE bit of WMCR register */
imx_wdog_disable_powerdown();
imx_enet_mdio_fixup();
#ifdef CONFIG_APBH_DMA
/* Start APBH DMA */
mxs_dma_init();
#endif
init_cpu_basic();
#if CONFIG_IS_ENABLED(IMX_RDC)
isolate_resource();
@ -286,6 +292,13 @@ int arch_cpu_init(void)
return 0;
}
#else
int arch_cpu_init(void)
{
init_cpu_basic();
return 0;
}
#endif
#ifdef CONFIG_ARCH_MISC_INIT