Commit graph

15508 commits

Author SHA1 Message Date
Anup Patel
a706029410 mmc: mmc_spi: Use SPI_XFER_BEGIN and SPI_XFER_END flags
Most DM based SPI host controller drivers use SPI_XFER_BEGIN and
SPI_XFER_END flags to enable/disable slave chip select.

This patch extends MMC SPI driver to pass SPI_XFER_BEGIN flag when
MMC command is send at start and pass SPI_XFER_END flag using a
dummy transfer (of bitlen = 0) at the end of MMC command.

Suggested-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Sagar Kadam <sagar.kadam@sifive.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-18 17:11:16 +05:30
Thomas Schaefer
733391e84b drivers/spi: fsl_qspi: improve timeout calculation
Use readl_poll_timeout instead of explicit calculation

Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-18 17:11:16 +05:30
Thomas Schaefer
c6d0c5eb30 drivers/spi: fsl_qspi: fix read timeout
During QSPI reads, current is_controller_busy function sporadically
fails with -ETIMEDOUT due to fixed number of 5 test loops. Using
timer functions to wait 1000 us instead will fix this.

Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-18 17:11:16 +05:30
Ye Li
535b1fdb8e spi: spi-mem: Fix read data size issue
When slave drivers don't set the max_read_size, the spi-mem should directly
use data.nbytes and not limit to any size. But current logic will limit to
the max_write_size.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-18 17:11:16 +05:30
Vignesh R
14106bcadb i2c: omap24xx_i2c: Adapt driver to support K3 devices
K3 devices have I2C IP that is same as OMAP2+ family. Allow driver to be
compiled for ARCH_K3.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-17 11:12:54 -04:00
Andreas Dannenberg
70942db4dd mmc: am654_sdhci: Allow driver to probe without PDs specified
We would like to use the driver even without power domains being
specified for cases such as during early boot when the required power
domains have already gotten enabled by the SoC's boot ROM and such
explicit initialization is not needed and possible.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17 11:12:54 -04:00
Faiz Abbas
f605807f3d mmc: am654_sdhci: Add a platform specific set_control_reg() callback
Add a platform specific set_control_reg() callback to help switch to
UHS speed modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17 11:12:08 -04:00
Faiz Abbas
d1c0a2200a mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings
The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.

Also create a common API to set UHS timings in HOST_CONTROL2.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17 11:12:08 -04:00
Faiz Abbas
ce142ff0c5 mmc: am654_sdhci: Add Support for PHY
Add support in the driver for handling phy specific registers.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17 11:12:08 -04:00
Faiz Abbas
a8185c50d3 mmc: sdhci: Make set_ios_post() return int
Make set_ios_post() return int to faciliate error handling in
platform drivers.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-07-17 11:12:08 -04:00
Faiz Abbas
3966c7d006 mmc: sdhci: Make sdhci_set_clock() non static
The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.

Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17 11:12:08 -04:00
Faiz Abbas
3d296365e4 mmc: sdhci: Add support for sdhci-caps-mask
Add Support for masking some bits in the capabilities
register of a host controller.

Also remove the redundant readl() into caps1.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17 11:12:08 -04:00
Faiz Abbas
55a1a09b2a regmap: Add API regmap_init_mem_index()
In device nodes with more than one entry in the reg property,
it is sometimes useful to regmap only of the entries. Add an
API regmap_init_mem_index() to facilitate this.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17 11:12:08 -04:00
Faiz Abbas
6fca7fb3a0 mmc: am654_sdhci: Remove quirks
The host controller works perfectly well without having to add any
quirks. Remove them.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17 11:12:08 -04:00
Faiz Abbas
3a1a0dfc39 arm64: dts: k3: Sync sdhci0 node from kernel and change driver name
Sync the sdhci0 node from kernel. This changes the compatible that is
required to be there in the driver. Change the same for the SD card node
which is not yet supported in kernel. This also syncs the main_pmx0 node
as a side effect.

Also change the name of the driver to match the compatible in kernel.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17 11:12:08 -04:00
Tom Rini
0e80dda32c Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- Beelink-x2 STB support (Marcus)
- H6 DDR3, LPDDR3 changes (Andre, Jernej)
- H6 pin controller, USB PHY (Andre)
2019-07-16 11:19:31 -04:00
Andre Przywara
35fa673e0e sunxi: phy: Add USB PHY support for Allwinner H6
The USB PHY used in the Allwinner H6 SoC has some pecularities (as usual),
which require a small addition to the USB PHY driver:
In this case the second PHY is PHY3, not PHY1, so we need to skip number
1 and 2 in the code. Just use the respective code from Linux for that.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16 17:13:15 +05:30
Andre Przywara
106c1300a5 sunxi: clocks: Add H6 USB clock gates and resets
To enable USB support in U-Boot, add the required clock and reset gates
to the H6 clock driver. Once enabled, the generic EHCI/OCHI drivers will
pick them up from there automatically.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16 17:13:15 +05:30
Andre Przywara
0d3c77f5c3 sunxi: gpio: Enable support for H6 pin controller
The Allwinner H6 pin controller is not really special, at least not when
it comes to normal GPIO operation.

Add the H6 compatible strings to the list of recognised strings, to make
GPIOs work for H6 boards.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16 17:13:15 +05:30
Andre Przywara
10cfbaabc1 sunxi: move SUNXI_GPIO to Kconfig
Probably for no particular reason SUNXI_GPIO was still defined the "old
way", in header files only.

Introduce SUNXI_GPIO to the Kconfig file in drivers/gpio to remove
another line from our dreadful config_whitelist.txt.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16 17:13:15 +05:30
Tom Rini
9c94e0a644 Merge branch 'master' of git://git.denx.de/u-boot-net 2019-07-15 18:56:24 -04:00
Radu Pirea
0dc97fc3d8 net: macb: Add support for 1000-baseX
Macb can be used with Xilinx PCS/PMA PHY in fpga which is a 1000-baseX
phy(lpa 0x41e0). This patch adds checks for LPA_1000XFULL and
LPA_1000XHALF bits.

Signed-off-by: Radu Pirea <radu_nicolae.pirea@upb.ro>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15 13:32:26 -05:00
Radu Pirea
1b0c9914cc net: macb: Fixed reading MII_LPA register
If macb is gem and is gigabit capable, lpa value is not read from
the right register(MII_LPA) and is read from MII_STAT1000. This patch
fixes reading of the lpa value.

Signed-off-by: Radu Pirea <radu_nicolae.pirea@upb.ro>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15 13:32:26 -05:00
Keerthy
9d0dca1199 net: ethernet: ti: Introduce am654 gigabit eth switch subsystem driver
Add new driver for the TI AM65x SoC Gigabit Ethernet Switch subsystem (CPSW
NUSS). It has two ports and provides Ethernet packet communication for the
device and can be configured as an Ethernet switch. CPSW NUSS features: the
Reduced Gigabit Media Independent Interface (RGMII), Reduced Media
Independent Interface (RMII), and the Management Data Input/Output (MDIO)
interface for physical layer device (PHY) management. The TI AM65x SoC has
integrated two-port Gigabit Ethernet Switch subsystem into device MCU
domain named MCU_CPSW0. One Ethernet port (port 1) with selectable RGMII
and RMII interfaces and an internal Communications Port Programming
Interface (CPPI) port (Host port 0).

Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX
channels and on RX channels operating by TI am654 NAVSS Unified DMA
Peripheral Root Complex (UDMA-P) controller.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15 13:32:25 -05:00
Keerthy
45e8c055cc driver: net: ti: cpsw-mdio: use phys_addr_t for mdio_base addr
Use phys_addr_t for mdio_base address to avoid build
warnings on arm64 and dra7. Cast it to uintprt_t before
assigning to regs.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15 13:32:25 -05:00
Yinbo Zhu
4db6e790ba net: phy: cortina: Use block layer to read from mmc
This patch is to use block layer to read from mmc in cortina

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15 13:32:25 -05:00
Horatiu Vultur
61243678c2 net: mscc: refactor mscc_miim
Because all MSCC SoC use the same MDIO bus, put the implementation in
one common file(mscc_miim) and make all the other MSCC network drivers to
use these functions.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15 13:32:25 -05:00
Alex Marginean
ec9594a50f test: dm: add MDIO test
A very simple test for DM_MDIO, mimicks a register write/read through the
sandbox bus to a dummy PHY.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15 13:32:25 -05:00
Alex Marginean
c3452b50c3 net: introduce MDIO DM class for MDIO devices
Adds UCLASS_MDIO DM class supporting MDIO buses that are probed as
stand-alone devices.  Useful in particular for systems that support
DM_ETH and have a stand-alone MDIO hardware block shared by multiple
Ethernet interfaces.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15 13:32:25 -05:00
Horatiu Vultur
149468699e net: mscc: serval: Remove delay when serdes is configured
When serdes configuration was written in hardware there was a delay
of 100ms to be sure that configuration was written. But the delay is not
needed because already the function serdes_write it is checking that the
operation finished.

Therefore remove the mdelay. This improves the speed of configuring the
network driver.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15 13:32:25 -05:00
Trent Piepho
2529dea893 net: phy: ti: Fix clock output DT property
The code block reading the DT property for the clock output control was
before the phy's DT node pointer was set, so it could never work.  Move
it after the node pointer is set.

Also store the unsigned 32-bit property into an unsigned value, not a
signed value, as the former will cause a problem if value overflows.
For instance, if one were to add 0xffffffff as a code to mean the clock
output should be turned off.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Janine Hagemann <j.hagemann@phytec.de>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15 13:32:25 -05:00
Trent Piepho
c2df9b49ce net: phy: ti: Use default values for tx/rx delay and fifo size
When not using DM_ETH, these PHY settings are programmed with default
values hardcoded into the driver.  When using DM_ETH, they should come
from the device tree.  However, if the device tree does not have the
properties, the driver will silent use -1.  Which is entirely out of
range, programs nonsense into the PHY's registers, and does not work.

Change this to use the same defaults as non-DM_ETH if the device tree is
lacking the properties.

As an alternative, the kernel driver for the phy will display an error
message and fail if the device tree is lacking.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Janine Hagemann <j.hagemann@phytec.de>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15 13:32:25 -05:00
Tom Rini
6674dc77c2 Merge tag 'mmc-2019-7-15' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- mmc spi driver model support
- drop mmc_spi command
- enhanced Strobe mmc HS400 support
- minor mmc bug/fixes and optimization
- omap hsmmc and mvbeu update
- sdhci card detect support
2019-07-15 09:42:41 -04:00
Peng Fan
356f782c6e mmc: fsl_esdhc_imx: enlarge mmc timeout
Flash system partition with fastboot will earse the partition firstly
The 600ms timeout will fail on some SD Card. Enlarge it to 5s to make
it works for most of sdcard

Cc: guoyin.chen <guoyin.chen@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-15 10:30:09 +08:00
Peng Fan
609ba125c5 mmc: fsl_esdhc_imx: add i.MX8QM compatible
Add i.MX8QM compatible and soc data, the soc data is following Linux
i.MX SDHC driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-15 10:30:09 +08:00
Peng Fan
e9c2255267 mmc: fsl_esdhc_imx: add HS400 Enhanced strobe support
Implement set_enhanced_strobe hook for fsl_esdhc_imx,
,in esdhc_set_timing and esdhc_change_pinstate, also handle HS400_ES.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-15 10:30:09 +08:00
Peng Fan
b0155ac63c mmc: fsl_esdhc_imx: use mmc_of_parse to set host_caps
Use mmc_of_parse to set host_caps.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-15 10:30:09 +08:00
Peng Fan
479a8dd6dc mmc: Parse no-1-8-v DT property
Parse no-1-8-v DT

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-07-15 10:30:08 +08:00
Peng Fan
b0fc3127bd mmc: Parse HS400 Enhanced strobe DT properties
Add HS400 Enhanced strobe properties parsing support to mmc_of_parse().

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-07-15 10:30:08 +08:00
Peng Fan
44acd49248 mmc: support hs400 enhanced strobe mode
eMMC 5.1+ supports HS400 Enhances Strobe mode without the need for
tuning procedure.
The flow is as following:
 - set HS_TIMIMG (Highspeed)
 - Host change freq to <= 52Mhz
 - set the bus width to Enhanced strobe and DDR8Bit(CMD6),
   EXT_CSD[183] = 0x86 instead of 0x80
 - set HS_TIMING to 0x3 (HS400)
 - Host change freq to <= 200Mhz
 - Host select HS400 enhanced strobe complete

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-15 10:30:08 +08:00
Ye Li
8277171663 mmc: fsl_esdhc_imx: fix config check issue when building in SPL
Should use CONFIG_IS_ENABLED not IS_ENABLED for clock and regulator drivers,
CONFIG_IS_ENABLED will check the CONFIG_SPL_CLK and CONFIG_SPL_DM_REGULATOR
when building SPL.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-15 10:30:08 +08:00
Bhargav Shah
05e35d4297 mmc: mmc_spi: Re-write driver using DM framework
This patch rewrites MMC SPI driver using U-Boot DM
framework and get it's working on SiFive Unleashed
board.

Signed-off-by: Bhargav Shah <bhargavshah1988@gmail.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-15 10:16:49 +08:00
Anup Patel
f49ff79935 mmc: skip select_mode_and_width for MMC SPI host
The MMC mode and width are fixed for MMC SPI host hence we skip
sd_select_mode_and_width() and mmc_select_mode_and_width() for
MMC SPI host.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
0538477c53 mmc: retry a few times if a partition switch failed
This operation may fail. Retry it a few times before giving up and report
a failure.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
9bc5666c8a mmc: do not change mode when accessing a boot partition
Accessing the boot partition had been error prone with HS200 and HS400 and
was disabled. The driver first switched to a lesser mode and then switched
the partition access. It was mostly due to a bad handling of the switch and
has been fixed, so let's remove this 'feature'

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
bb98b8c5c0 mmc: During a switch, poll on dat0 if available and check the final status
The switch operation can sometimes make the bus unreliable, in that case
the send_status parameter should be false to indicate not to poll using
CMD13. If polling on dat0 is possible, we should use it to detect the end
of the operation.
At the end of the operation it is safe to use CMD13 to get the status of
the card. It is important to do so because the operation may have failed.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
513e00b64e mmc: When switching partition, use the timeout specified in the ext_csd
The e-MMC spec allows the e-MMC to specify a timeout for the partition
switch command. It can take up to 2550 ms. There is no lower limit to this
value in the spec, but do as the the linux driver does and force it to be
at least 300ms.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
39320c537d mmc: use the generic timeout for cmd6 (SWITCH) provided in the ext_csd
Starting with rev 4.5, the eMMC can define a generic timeout for the
SWITCH command.

Following Linux Kernel code, the timeout also changed from 1000 -> 500

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
cd0b80ec9c mmc: if possible, poll the busy state using DAT0
Using the DAT0 line as a rdy/busy line is an alternative to reading the
status register of the card. It especially useful in situation where the
bus is not in a good shape, like when modes are switched.
This is also how the linux driver behaves.

Note of warning: As per the specification, while polling on DAT0 the CLK
must not turned off: "[...] Without a clock edge the Device (unless
previously disconnected by a deselect command (CMD7)) will force the DAT0
line down, forever. [...]"

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
863d10044a mmc: add mmc_poll_for_busy() and change the purpose of mmc_send_status()
mmc_send_status() is currently used to poll the card until it is ready, not
actually returning the status of the card.
Make it return the status and add another function to poll the card.

Also remove the 'extern' declaration in the mmc-private.h header to comply
with the coding standard.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
c2c22b9df3 mmc: omap_hsmmc: provide wait_dat0 even if UHS modes are not supported
This function can also be used for eMMC devices.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
c5bda37589 Revert "mmc: Add a new callback function to perform the 74 clocks cycle sequence"
This reverts commit 318a7a576b.

The last and only user of this callback had been the omap_hsmmc driver.
It is not used anymore. Removing the callback.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
db52e19ced mmc: omap_hsmmc: don't fill the send_init_stream callback
This is not required. The MMC core sends CMD0 right after the
initialization and it serves the same purpose.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
b2ffa3320a mmc: omap_hsmmc: reset FSM for DAT and CMD lines if needed before a new command
It sometimes happen that the PSTATE register does not indicate that the
bus is ready when it really is. This usually happens after a mode switch.
In that case it makes sense to reset the FSM handling the CMD and DATA

Also reset the FSMs if the STATE register cannot be cleared. This also
sometimes happens after a mode switch.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Akio Hirayama
24b1e0c7e2 mmc: rpmb: fix response type of CMD25
The response type of CMD25 is R1 instead of R1b.

Signed-off-by: Akio Hirayama <hirayama.akio@socionext.com>
[masahiro: add log ]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-07-15 10:16:49 +08:00
T Karthik Reddy
da18c62b6e mmc: sdhci: Implement SDHCI card detect
Card detect function implemented for SDHCI framework.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-15 10:16:49 +08:00
T Karthik Reddy
451931ea70 mmc: sdhci: Read cd-gpio from devicetree
This patch reads cd-gpio property from devicetree

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-07-15 10:16:49 +08:00
T Karthik Reddy
86a94e7b2b mmc: Read sd card detect properties from DT
This patch reads card detect properties from device tree &
added mmc capability macros in mmc.h.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-15 10:16:49 +08:00
Tom Rini
a9a3a37f92 - syscon: add support for power off
- stm32mp1: add op-tee config
 - stm32mp1: add specific commands: stboard and stm32key
 - add stm32 mailbox driver
 - solve many stm32 warnings when building with W=1
 - update stm32 gpio driver
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Merge tag 'u-boot-stm32-20190712' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- syscon: add support for power off
- stm32mp1: add op-tee config
- stm32mp1: add specific commands: stboard and stm32key
- add stm32 mailbox driver
- solve many stm32 warnings when building with W=1
- update stm32 gpio driver
2019-07-14 09:09:49 -04:00
Sven Schwermer
1164c546d5 regulator: Allow autosetting fixed regulators
Fixed regulators don't have a set_value method. Therefore, trying to
set their value will always return -ENOSYS.

Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-13 11:11:31 -04:00
Heiko Schocher
5fc7cf8c8e gpio: add gpio-hog support
add gpio-hog support. GPIO hogging is a mechanism
providing automatic GPIO request and configuration
as part of the gpio-controller's driver probe function.

for more infos see:
doc/device-tree-bindings/gpio/gpio.txt

Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Michal Simek <michal.simek@xilinx.com> (zcu102)
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-13 11:11:30 -04:00
Adam Ford
159a887e74 pinctrl: pinctrl-single: Add 'pinctrl-single, bits' support
The TI Davinci (da850/l138/am1808) use pinctrl-single,bits for
pinmuxing peripherals.  This patch allosw the pinctrl-single
driver to parse the pinctrl-single,bits options and correctly
setup devices.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-13 11:11:29 -04:00
Keerthy
28115e7bac power: regulator: Kconfig: Add SPL_DM_REGULATOR configs for palmas/lp873x/lp87565
Add SPL_DM_REGULATOR configs for palmas/lp873x/lp87565. These were missing
and the Makefile already assumes them to be defined. Add the corresponding
SPL config options. This enables the regulator support in SPL.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-07-13 11:11:29 -04:00
Keerthy
2463874883 power: pmic: Kconfig: Add SPL_PMIC configs for palmas/lp873x/lp87565
Add SPL_PMIC configs for palmas/lp873x/lp87565. These were missing
and the Makefile already assumes them to be defined. Add the corresponding
SPL config options. This enables the pmics in SPL.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-07-13 11:11:28 -04:00
Michael Walle
fb9a1ffef3 rtc: add Microcrystal RV-8803 driver
Signed-off-by: Michael Walle <michael@walle.cc>
2019-07-13 11:11:28 -04:00
Derald D. Woods
9adaa039b6 usb: musb-new: omap2430: Fix compilation warning with USB_MUSB_GADGET
This commit addresses the following warning, when _NOT_ USB_MUSB_HOST:

[...]
  CC      drivers/usb/gadget/f_mass_storage.o
  CC      drivers/usb/musb-new/omap2430.o
  CC      drivers/usb/gadget/f_fastboot.o
  CC      env/common.o
  CC      env/env.o
/src/etinker/software/u-boot-master/drivers/usb/musb-new/omap2430.c: In function ‘omap2430_musb_probe’:
/src/etinker/software/u-boot-master/drivers/usb/musb-new/omap2430.c:239:6: warning: assignment to ‘int’ from ‘struct musb *’ makes integer from pointer without a cast [-Wint-conversion]
  ret = musb_register(&platdata->plat,
      ^
  LD      drivers/usb/host/built-in.o
  CC      drivers/usb/gadget/f_sdp.o
  CC      fs/ext4/ext4fs.o
[...]

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2019-07-13 11:11:27 -04:00
Heiko Schocher
8dd6803ded rtc: ds1307: add support for m41t11
add m41t11 support in ds1307 driver. changes:

- add compatible string for m41t11
- check if RTC clock is running, if not
  enable the clock

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-07-13 11:11:26 -04:00
Ezequiel Garcia
d66fb5b1f6 mmc: Register only the first MMC device on MMC_TINY
When MMC_TINY is enabled, support for only one MMC device
is provided. Boards that register more than one device,
will just write over mmc_static keeping only the last one
registered.

This commit prevents this, keeping only the first MMC
device created. A debug warning message is added, if nothing
else, as a hint/documentation for developers.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
2019-07-13 11:11:26 -04:00
Ezequiel Garcia
bf7c01d92b spl: Move SPL_MMC_TINY option to appear under SPL menu
The SPL_MMC_TINY implements feature-reduced MMC support
on SPL, and as such, it's more consistent and convenient
to find it as part of the SPL configuration.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
2019-07-13 11:11:26 -04:00
Peng Fan
4213609cc7 drivers: core: use strcmp when find device by name
`if (!strncmp(dev->name, name, strlen(name)))` might find out
the wrong device, it might find out `dram_pll_ref_sel`, when name is
`dram_pll`. So use strcmp to avoid such issue.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-12 21:07:59 -04:00
Marek Behún
60ee60944b pci: ensure enumeration of all devices in pci_init
Use the uclass_first_device_check and uclass_next_device_check functions
instead of uclass_first_device and uclass_next_device in pci_init. This
ensures that all PCI devices are tried to be probed. Currently if a
device fails to probe, the enumeration stops and the devices which come
after the failed device are not probed.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Cc: Anton Schubert <anton.schubert@gmx.de>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Phil Sutter <phil@nwl.cc>
Cc: VlaoMao <vlaomao@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-12 21:07:58 -04:00
Patrice Chotard
60bc487666 gpio: stm32: Remove .ofmatch callback
As compatible string "st,stm32-gpio" is no more used, .ofmatch
callback becomes useless, remove it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:58 +02:00
Patrice Chotard
158abbf57b pinctrl: stm32: update .bind callback
Update .bind callback in order to bind all pinctrl subnodes
with "gpio-controller" property to gpio_stm32 driver.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:58 +02:00
Patrice Chotard
95fbdd1ad8 gpio: stm32: Rename stm32f7_gpio to stm32_gpio
As this driver is used on stm32f4/f7/h7 and stm32mp1
SoCs, rename it with a more generic name.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:58 +02:00
Patrick Delaunay
54ef8fb86b spi: stm32: Fix warnings when compiling with W=1
This patch solves the following warnings:

drivers/spi/stm32_spi.c: In function 'stm32_spi_write_txfifo':
drivers/spi/stm32_spi.c:116:20: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
   if (priv->tx_len >= sizeof(u32) &&
                    ^~
drivers/spi/stm32_spi.c:122:27: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
   } else if (priv->tx_len >= sizeof(u16) &&
                           ^~
drivers/spi/stm32_spi.c: In function 'stm32_spi_read_rxfifo':
drivers/spi/stm32_spi.c:150:21: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
       (priv->rx_len >= sizeof(u32) || (sr & SPI_SR_RXWNE))) {
                     ^~
drivers/spi/stm32_spi.c:156:21: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
       (priv->rx_len >= sizeof(u16) ||
                     ^~
drivers/core/simple-bus.c:15:12: warning: no previous prototype for 'simple_bus_translate' [-Wmissing-prototypes]
 fdt_addr_t simple_bus_translate(struct udevice *dev, fdt_addr_t addr)
            ^~~~~~~~~~~~~~~~~~~~
drivers/spi/stm32_spi.c: In function 'stm32_spi_set_speed':
drivers/spi/stm32_spi.c:335:10: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
      div > STM32_MBR_DIV_MAX)
          ^
drivers/spi/stm32_spi.c:344:19: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits]
  if ((mbrdiv - 1) < 0)
                   ^
drivers/spi/stm32_spi.c: In function 'stm32_spi_probe':
drivers/spi/stm32_spi.c:531:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
  for (i = 0; i < ARRAY_SIZE(priv->cs_gpios); i++) {
                ^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:57 +02:00
Patrick Delaunay
1ddf544e63 spi: stm32_qspi: avoid warnings when building with W=1 option
This patch solves warnings detected by setting W=1 when building.

Warnings type detected:
 - [-Wtype-limits]
 - [-Wsign-compare]

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:57 +02:00
Patrick Delaunay
d99ea13cdf mtd: rawnand: stm32_fmc2: avoid warnings when building with W=1 option
This patch solves warnings detected by setting W=1 when building.

Warnings type detected:
 - [-Wsign-compare]
 - [-Wtype-limits]

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:57 +02:00
Patrick Delaunay
92be6834da power: stpmic1: Fix warnings when compiling with W=1
This patch solves the following warnings:
warning: this statement may fall through [-Wimplicit-fallthrough=]

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:57 +02:00
Patrick Delaunay
91ca91e855 pinctrl: pinctrl_stm32: Fix warnings when compiling with W=1
This patch solves the following warnings:

warning: comparison of unsigned expression < 0 is always false [-Wtype-limits]
    if (*idx < 0)
             ^
drivers/pinctrl/pinctrl_stm32.c: At top level:
warning: no previous prototype for 'stm32_pinctrl_probe' [-Wmissing-prototypes]
 int stm32_pinctrl_probe(struct udevice *dev)
     ^~~~~~~~~~~~~~~~~~~

Signed-off-by: Patrice CHOTARD <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:56 +02:00
Patrick Delaunay
588448517f ram: stm32mp1_ram: Fix warnings when compiling with W=1
This patch solves the following warnings:

drivers/ram/stm32mp1/stm32mp1_ram.c: In function 'stm32mp1_ddr_clk_enable':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
  for (idx = 0; idx < ARRAY_SIZE(clkname); idx++) {
                    ^
drivers/ram/stm32mp1/stm32mp1_ram.c: In function 'stm32mp1_ddr_setup':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
  for (idx = 0; idx < ARRAY_SIZE(param); idx++) {
                    ^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:56 +02:00
Patrick Delaunay
be56ab1b8f misc: stm32_fuse: Fix warnings when compiling with W=1
This patch solves the following warnings:

warning: no previous prototype for 'fuse_read' [-Wmissing-prototypes]
 int fuse_read(u32 bank, u32 word, u32 *val)
     ^~~~~~~~~
  CC      cmd/sf.o
warning: no previous prototype for 'fuse_prog' [-Wmissing-prototypes]
 int fuse_prog(u32 bank, u32 word, u32 val)
     ^~~~~~~~~
warning: no previous prototype for 'fuse_sense' [-Wmissing-prototypes]
 int fuse_sense(u32 bank, u32 word, u32 *val)
     ^~~~~~~~~~
warning: no previous prototype for 'fuse_override' [-Wmissing-prototypes]
 int fuse_override(u32 bank, u32 word, u32 val)
     ^~~~~~~~~~~~~

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:56 +02:00
Patrick Delaunay
c8a8937b92 power: regulator: stm32: Fix warnings when compiling with W=1
This patch solves the following warnings:

drivers/power/regulator/stm32-vrefbuf.c: In function 'stm32_vrefbuf_set_value':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
   if (uV == stm32_vrefbuf_voltages[i]) {
          ^~

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:56 +02:00
Patrick Delaunay
67d74ce2fa clk: clk_stm32mp1: Fix warnings when compiling with W=1
This patch solves the following warnings:

drivers/clk/clk_stm32mp1.c: In function 'stm32mp1_clk_get_parent':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
  for (i = 0; i < ARRAY_SIZE(stm32mp1_clks); i++)
                ^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:55 +02:00
Patrick Delaunay
499504ba06 i2c: stm32f7_i2c: Fix warnings when compiling with W=1
This patch solves the following warnings:

drivers/i2c/stm32f7_i2c.c: In function 'stm32_i2c_compute_solutions':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    if (scldel < scldel_min)
               ^
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
     if (((sdadel >= sdadel_min) &&
                  ^~
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
          (sdadel <= sdadel_max)) &&
                  ^~
drivers/i2c/stm32f7_i2c.c: In function 'stm32_i2c_choose_solution':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
      if (clk_error < clk_error_prev) {
                    ^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:55 +02:00
Patrick Delaunay
99e14b2793 gpio: stm32_gpio: Fix warnings when compiling with W=1
This patch solves the following warnings:

drivers/gpio/stm32_gpio.c: In function 'stm32_offset_to_index':
: comparison between signed and unsigned integer expressions [-Wsign-compare]
    if (idx == offset)
            ^~
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:55 +02:00
Patrick Delaunay
c0d7f1fbad adc: stm32: Fix warnings when compiling with W=1
This patch solves the following warnings:

drivers/adc/stm32-adc-core.c: In function 'stm32h7_adc_clk_sel':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
   for (i = 0; i < ARRAY_SIZE(stm32h7_adc_ckmodes_spec); i++) {
                 ^
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
  for (i = 0; i < ARRAY_SIZE(stm32h7_adc_ckmodes_spec); i++) {
                ^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Fabrice Gasnier <fabrice.gasnier@st.com>
2019-07-12 11:50:55 +02:00
Patrick Delaunay
0fb0365673 adc: stm32-adc: Fix warnings when compiling with W=1
This patch solves the following warnings:

drivers/adc/stm32-adc.c: In function 'stm32_adc_chan_of_init':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
  if (num_channels > adc->cfg->max_channels) {
                   ^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Fabrice Gasnier <fabrice.gasnier@st.com>
2019-07-12 11:50:55 +02:00
Patrick Delaunay
0e9fb25f71 mmc: stm32_sdmmc2: avoid warnings when building with W=1 option
This patch solves warnings detected by setting W=1 when building.

Warnings type detected:
 - [-Wmissing-prototypes]
 - [-Wimplicit-fallthrough=]

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:54 +02:00
Patrick Delaunay
585289b4fc serial: stm32: Fix warnings when compiling with W=1
This patch solves the following warnings:

drivers/serial/serial_stm32.c: In function 'stm32_serial_probe':
warning: comparison of unsigned expression < 0 is always false [-Wtype-limits]
  if (plat->clock_rate < 0) {
                       ^

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:54 +02:00
Patrick Delaunay
82cd1a2a04 pmic: stpmic1: add support for SYSRESET_POWER_OFF
Adds support for SYSRESET_POWER_OFF = PMIC power off used by command
power off and introduced by commit 751fed426f ("sysreset: Add a way
to find the last reset").
The driver use SYSRESET_POWER for the PMIC-level power cycle, with restart.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:18:53 +02:00
Patrick Delaunay
dfda7d4c83 stm32mp1: syscon: remove stgen
Reduce difference with kernel Linux device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:18:53 +02:00
Patrick Delaunay
486942184a sysreset: syscon: add support for power off
The new type sysreset 'POWER_OFF', introduced by
commit 751fed426f ("sysreset: Add a way to find the last reset")
is only supported for "syscon-poweroff" compatible.

For details see Linux binding:
./Documentation/devicetree/bindings/power/reset/syscon-poweroff.txt

This patch removes the support of POWER_OFF for "syscon-reboot"
and keeps only the COLD reset (for command reset support)
and it introduces the compatible "syscon-poweroff"
for the POWER_OFF case.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:18:53 +02:00
Fabien Dessenne
01964d8e23 mailbox: introduce stm32-ipcc driver
On STM32 family, the IPCC peripheral allows the communication
between 2 processors offering doorbells mechanism.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-07-12 11:18:53 +02:00
Tom Rini
a9758ece08 - Sandbox improvements including .dts refactor
- Minor tracing and PCI improvements
 - Various other minor fixes
 - Conversion of patman, dtoc and binman to support Python 3
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Merge tag 'dm-pull-9jul19-take2' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

- Sandbox improvements including .dts refactor
- Minor tracing and PCI improvements
- Various other minor fixes
- Conversion of patman, dtoc and binman to support Python 3
2019-07-11 18:10:11 -04:00
Tom Rini
68deea2308 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- SPL SATA enhancements to allow booting from RAW SATA device
  needed for Clearfog (Baruch)
- Enable SATA booting on Clearfog (Baruch)
- Misc changes to Turris Omnia (Marek)
- Enable CMD_BOOTZ and increase SYS_BOOTM_LEN on crs305-1g-4s
  (Luka)
- Enable FIT support for db-xc3-24g4xg (Chris)
- Enable DM_SPI on Keymile Kirkwood board with necessary changes
  for this (Pascal)
- Set 38x and 39x AVS on lower frequency (Baruch)
2019-07-11 18:09:38 -04:00
Tom Rini
79b8d3c285 UniPhier SoC updates for v2019.10
- import DT updates from Linux
 
 - add UniPhier SPI controller driver
 
 - make U-Boot image for 64bit SoCs position independent
 
 - tidy up various init code for next generation SoCs
 
 - misc cleanups
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Merge tag 'uniphier-v2019.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier

UniPhier SoC updates for v2019.10

- import DT updates from Linux

- add UniPhier SPI controller driver

- make U-Boot image for 64bit SoCs position independent

- tidy up various init code for next generation SoCs

- misc cleanups
2019-07-11 18:08:44 -04:00
Marek Vasut
4a09831ab2 gpio: pca953x: Add TI TCA9539 compatible string
Add TI TCA9539 compatible string for yet another I2C GPIO expander.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Peng Fan <van.freenix@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-07-11 14:11:20 -04:00
Roman Kapl
27eb177b39 tpm: wait for valid status
The TPM specification says that the EXPECT_DATA bit is not valid until
the VALID bit is set. Wait for that bit to be set. Fixes problems with
Ifineon SPI TPM.

Signed-off-by: Roman Kapl <rka@sysgo.com>
2019-07-11 14:11:18 -04:00
Ramon Fried
bb41333782 pci_ep: add pci endpoint sandbox driver
Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11 10:05:15 -04:00
Ramon Fried
c2ccc9e5cb pci_ep: add Cadence PCIe endpoint driver
Add Cadence PCIe endpoint driver supporting configuration
of header, bars and MSI for device.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11 10:05:15 -04:00
Ramon Fried
914026d258 drivers: pci_ep: Introduce UCLASS_PCI_EP uclass
Introduce new UCLASS_PCI_EP class for handling PCI endpoint
devices, allowing to set various attributes of the PCI endpoint
device, such as:
* configuration space header
* BAR definitions
* outband memory mapping
* start/stop PCI link

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11 10:05:15 -04:00
Pascal Linder
fd9d70d738 km/spi: remove deprecated SPI flash driver code for KM Kirkwood boards
KM Kirkwood boards now implement the driver model for its SPI flash
interface. Therefore, the old board specific claim and release functions
can be deleted. The preprocessor definition CONFIG_SYS_KW_SPI_MPP is yet
unused as well. All its appearances and dependencies are removed in the
kirkwood_spi driver, header files and finally the configuration whitelist.

Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:03 +02:00
Pascal Linder
f169653483 km/spi: add weak functions to kirkwood_spi driver (DM part)
The weak functions, known from the legacy code, are added to the DM part
as well. For this purpose, the release operation first needs to be
implemented. KM Kirkwood boards will overwrite those weak functions to
change the MPP configuration when claiming/releasing the bus, because the
hardware pins are shared between the SPI NOR and NAND devices.

Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:03 +02:00
Alex Marginean
b8e1f8270c drivers: pci: add API to issue FLR on a PCI function if supported
Adds dm_pci_flr API that issues a Function Level reset on a PCI-e function,
if FLR is supported.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-10 16:52:58 -06:00
Alex Marginean
21ebbafde8 test: dm: Add a test for PCI Enhanced Allocation
This test is built on top of the existing swap_case driver.  It adds EA
capability structure support to swap_case and uses that to map BARs.
BAR1 works as it used to, swapping upper/lower case.  BARs 2,4 map to a
couple of magic values.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-10 16:52:58 -06:00
Alex Marginean
0b143d8ab2 drivers: pci: add map_bar support for Enhanced Allocation
Makes dm_pci_map_bar API available for integrated PCI devices that
support Enhanced Allocation instead of the original PCI BAR mechanism.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-10 16:52:58 -06:00
Patrick Delaunay
6998974926 fdt: Allow indicating a node is for U-Boot proper only
This add missing parts for previous commit 06f94461a9
("fdt: Allow indicating a node is for U-Boot proper only")

At present it is not possible to specify that a node should be used before
relocation (in U-Boot proper) without it also ending up in SPL and TPL
device trees. Add a new "u-boot,dm-pre-proper" boolean property for this.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Vabhav Sharma
1edc5688df drivers: serial: lpuart: Enable Little Endian Support
By default LPUART driver with compatible string "fsl,ls1021a-lpuart"
support big-endian mode.On NXP SoC like LS1028A LPUART IP is
little-endian,Added support to Fetch LPUART IP Endianness from lpuart
device-tree node.

Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Simon Glass
ca2abb75a0 spi: Avoid using malloc() in a critical function
In general we should avoid calling malloc() and free() repeatedly in
U-Boot lest we turn it into tianocore. In SPL this can make SPI flash
unusable since free() is often a nop and allocation space is limited.

In any case, these seems no need for malloc() since the number of bytes
is very small, perhaps less than 8.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: d13f5b254a (spi: Extend the core to ease integration of SPI
	memory controllers)
2019-07-10 16:52:58 -06:00
Simon Glass
731ba3c0be blk: Allow control of the block cache in TPL
Generally block devices are not enabled in TPL, but in case they are,
add a Kconfig option for the block cache. This allows the setting (default
off) to be found with CONFIG_IS_ENABLED().

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Simon Glass
24c2776ba9 sandbox: Correct spi flash operation
Since the SPI nor conversion, 'sf probe' does not work on sandbox. Fix
this by using the expected compatible string in the flash node.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: cd35365762 (mtd: sf_probe: remove spi-flash compatible)
2019-07-10 16:52:58 -06:00
Simon Glass
9072326a6a sandbox: Exit when SYSRESET_POWER_OFF is requested
At present this returns but it seems better to just exit sandbox
immediately.

Signed-off-by: Simon Glass <sjg@chromium.org>

reset
2019-07-10 16:52:58 -06:00
Tom Rini
ef8b7e045e Merge https://gitlab.denx.de/u-boot/custodians/u-boot-i2c 2019-07-10 13:51:53 -04:00
Tom Rini
a52f1fe408 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-ubi
[trini: Migrate sama5d27_som1_ek_qspiflash/sama5d2_xplained_qspiflash
        for CONFIG_ENV_SECT_SIZE]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-07-10 13:18:54 -04:00
Masahiro Yamada
9a2f0e5ccd clk: uniphier: add EMMC clock for LD11, LD20, and PXs3
I also added comments for NAND clocks.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-07-10 22:41:55 +09:00
Kunihiko Hayashi
9424ecd735 spi: Add SPI controller driver for UniPhier SoCs
Add SPI controller driver implemented in Socionext UniPhier SoCs.
This controller has the SPI master mode only.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
2019-07-10 22:37:23 +09:00
Tom Rini
b4944e2574 First set of u-boot-atmel features and fixes for 2019.10 cycle
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Merge tag 'u-boot-atmel-2019.10-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel features and fixes for 2019.10 cycle

This includes the Atmel QSPI driver and support for the at91 boards.
This is the port of the driver from Linux, mostly done by Tudor Ambarus.
2019-07-09 08:17:12 -04:00
Chuanhua Han
ef6c26d338 rtc: pcf2127: Fixed bug with rtc settings and getting error time
The previous pcf2127 RTC chip could not read and set the correct time.
When reading the data of internal registers, the read address was the
value of register plus 1. This is because this chip requires the host
to send a stop signal after setting the register address and before
reading the register data.

This patch sets the register address using dm_i2c_write and reads
the register data using the original dm_i2c_xfer in order to generate
a stop signal after the register address is set, and fixes the bug of
the original read and write time.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-07-09 10:51:12 +02:00
Tudor Ambarus
24c8ff4684 spi: Add Atmel QuadSPI driver
Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-09 09:26:43 +03:00
Melin Tomas
d3826fb052 xilinx_xiic: Fix transfer initialisation
Prior to starting a new transfer, conditionally wait for bus to not
be busy.

Reinitialise controller as otherwise operation is not stable.
For reference, see linux kernel
commit 9656eeebf3f1 ("i2c: Revert i2c: xiic: Do not reset controller before every transfer")

hs: Fixed DOS line endings
    added missing '\n'
    Fixed git commit description style

Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
2019-07-09 07:02:11 +02:00
Melin Tomas
5324e8ef6c xilinx_xiic: Fix fill tx fifo loop
Comparison should be against the actual message length, not loop index.

len is used for stopping while loop, pos is position in message.
stop should be sent when entire message is sent, not when
len and pos meet.

hs: fixed DOS line endings

Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
2019-07-09 07:02:11 +02:00
Ley Foon Tan
2d1e879c79 i2c: designware: Get clock rate from clock DM
Get clock rate from clock DM if CONFIG_CLK is enabled.
Otherwise, uses IC_CLK define.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
2019-07-09 07:02:11 +02:00
Jun Chen
e3b93dcee8 i2c: designware_i2c: Restore enable state after set speed
Before calling __dw_i2c_set_bus_speed(),
the I2C could already be set as ether enable or disable,
we should restore the original setting instead of enable i2c anyway.

This patch fix a bug happened in init function:
    __dw_i2c_init(){
            /* Disable i2c */
            ...
            __dw_i2c_set_bus_speed(i2c_base, NULL, speed);
            writel(slaveaddr, &i2c_base->ic_sar);
            /* Enable i2c */
    }
In this case, enable i2c inside __dw_i2c_set_bus_speed() function
will cause ic_sar write fail.

Signed-off-by: Jun Chen <ptchentw@gmail.com>
2019-07-09 07:02:10 +02:00
Markus Klotzbuecher
a2257d378e ubispl: introduce separate CONFIG_UBI_SPL_SILENCE_MSG
This allows to silence ubi and ubispl individually.

Signed-off-by: Markus Klotzbuecher <markus.klotzbuecher@kistler.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Kyungmin Park <kmpark@infradead.org>
2019-07-09 07:00:26 +02:00
Hamish Guthrie
6ea31cce0b ubispl: add support for loading volumes by name
The motivation is to use the UBI atomic volume rename functionality to
allow double copy software updates on UBI. To that end the SPL is
configured to always load the same volume name (e.g. "u-boot"),
whereas a software updater always installs into the secondary volume
"u-boot_r". After successful installation, these two volume names are
switched.

This extension is protected by #ifdefs as it will somewhat slow down
loading of volumes by id. This is because the code needs to disable
the optimization of ignoring all volume ids which are not
to-be-loaded, since these can only be resolved after attaching.

This adds two vtbl related functions from Linux, which are taken from
the same kernel version as the current main U-Boot UBI code (Linux 4.2
64291f7db5bd8).

Signed-off-by: Hamish Guthrie <hamish.guthrie@kistler.com>
Signed-off-by: Markus Klotzbuecher <markus.klotzbuecher@kistler.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Kyungmin Park <kmpark@infradead.org>
2019-07-09 07:00:25 +02:00
Markus Klotzbuecher
5ebd3df64d ubi: fix UBI_SILENCE_MSG
- drop CONFIG_ prefix from kconfig entry
 - fix small compilation issue with CONFIG_UBI_SILENCE_MSG

Signed-off-by: Markus Klotzbuecher <markus.klotzbuecher@kistler.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Kyungmin Park <kmpark@infradead.org>
2019-07-09 07:00:23 +02:00
Tom Rini
f5e73a34ed Merge tag 'mmc-6-23' of https://github.com/MrVan/u-boot
- Pull in the series to split fsl_esdhc for i.MX/non-i.MX cleanly
2019-07-08 15:59:41 -04:00
Tom Rini
29e9363504 - fix pwm backlight
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Merge tag 'video-for-2019.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-video

- fix pwm backlight
2019-07-07 16:17:13 -04:00
Marc Dietrich
a2c4ef0977 video: backlight: fix pwm inversion
set_pwm() will always fail with -ENOSYS if pwm_ops set_invert() is
not implemented, leaving the backlight dark. Fix this by returning
no error if set_invert() is not implemented and no polarity change
is requested.

Fixes: 57e7775413 ("video: backlight: Parse PWM polarity cell")
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
2019-07-06 23:31:52 +02:00
Jean-Jacques Hiblot
3b83829ed6 usb: dwc3: Use UCLASS_NOP instead of UCLASS_MISC for the DWC3 generic glue
dwc3-generic has been broken since MISC uclass has been modified to scan DT
sub-nodes after bind.
Fixing it by a using the no-op uclass.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-05 14:19:41 +02:00
Jean-Jacques Hiblot
07e33711fe dm: Add a No-op uclass
This uclass is intended for devices that do not need any features from the
uclass, including binding children.
This will typically be used by devices that are used to bind child devices
but do not use dm_scan_fdt_dev() to do it. That is for example the case of
several USB wrappers that have 2 child devices (1 for device and 1 for
host) but bind only one at a any given time.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-05 14:19:41 +02:00
Jean-Jacques Hiblot
e445d46651 usb: dwc3-generic: remove dm_scan_fdt_dev() from the remove() callback
There is simply no reason to do that here.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-05 14:19:40 +02:00
Marek Vasut
501547cec1 usb: ehci-mx6: Fix bus enumeration for DM case
The EHCI iMX6 driver is only partly converted to DT probing and
still uses a tremendous amount of hard-coded addresses. Worse,
the driver uses hard-coded SoC-model-specific base addresses, which
are derived from values protected by SoC-specific macros, hence the
driver is also compiled for a specific SoC model. Even worse, the
driver depends on specific sequential indexing of the controllers,
from which it derives offsets in the PHY and ANATOP register sets.

However, when the driver is probed from DT, the indexing is not
correct. In fact, each controller has index 0. This patch derives
the index for DT probing case from the controller base addresses,
which is not the way this should be done, however it is the least
intrusive approach, favorable this close to release.

The necessary steps to convert this driver fully to DT probing are
described inside the patch, however this should be done in the next
release and depends on iMX clock driver patches.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Abel Vesa <abel.vesa@nxp.com>
Cc: Adam Ford <aford173@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Ludwig Zenz <lzenz@dh-electronics.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Vagrant Cascadian <vagrant@debian.org>
2019-07-05 14:19:40 +02:00
Kunihiko Hayashi
d5381853ad pinctrl: uniphier: Add SPI pin-mux settings
Add pin-mux settings for SPI controller.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-06-29 22:21:26 +09:00
Tom Rini
0352e878d2 Fixes for 2019.07
- menlo board
 - allow SDB on Sabre
 - HAB for mx6sl
 - apalis board
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Merge tag 'u-boot-imx-20190628' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Fixes for 2019.07

- menlo board
- allow SDB on Sabre
- HAB for mx6sl
- apalis board
2019-06-28 08:00:22 -04:00
Frieder Schrempf
2c72ead738 usb: gadget: f_sdp: Allow SPL to load and boot FIT via SDP
Add support for loading u-boot FIT images over the USB SDP protocol in
the SPL

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
[Various build fixes]
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Tested-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Lukasz Majewski <lukma@denx.de>
2019-06-27 13:50:28 +02:00
Yangbo Lu
5053da2e4a mmc: fsl_esdhc_imx: drop useless code
Dropped useless code for i.MX eSDHC driver.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-06-23 14:18:48 +08:00
Yangbo Lu
4d8ff42e46 mmc: fsl_esdhc: drop i.MX code
Dropped i.MX code which couldn't be reused.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
2019-06-23 14:18:42 +08:00
Yangbo Lu
fa33d20749 mmc: split fsl_esdhc driver for i.MX
The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX
initially. The later QoriQ series PowerPC processors (which were
evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and
i.MX series processors were using this driver for their eSDHCs too.

For the two series processors, the eSDHCs are becoming more and
more different. We should have split it into two drivers, like them
(sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel.

This patch is just to create a fsl_esdhc_imx driver which is a copy
of fsl_esdhc driver for i.MX processors. We will convert i.MX processors
to use fsl_esdhc_imx, and clean up the two drivers separately in the
future patches.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
2019-06-23 14:15:31 +08:00
Tom Rini
5eea874b5e Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- boot failure fix for Intel edison
- tangier wdt conversion to driver model
2019-06-22 12:09:33 -04:00
Andy Shevchenko
c974a3d155 watchdog: tangier: Convert to use WDT class
Convert legacy driver to use watchdog class.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-06-22 22:27:13 +08:00
Andy Shevchenko
8b295a2026 watchdog: tangier: Replace unused constant with a comment
The default timeout value had been left in order to leave some traces
about default setup of watchdog done by firmware.

For better understanding and compiler burden, replace it with a comment.

Suggested-by: Stefan Roese <sr@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-06-22 22:26:22 +08:00
Bin Meng
5fafd7e35f pci: Avoid assigning PCI resources that are below 0x1000
commit b7598a43f2 ("[PATCH] Avoid assigning PCI resources from
zero address") only moved the bus lower address to 0x1000 if the
given bus start address is zero. The comment said 0x1000 is a
reasonable starting value, hence we'd better apply the same
adjustment when the given bus start address is below 0x1000.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-06-21 10:07:11 -04:00
Shannon Barber
2bc1821e86 Fix watchdog timeout setup for mt7623
Signed-off-by: Shannon Barber <sbarber@dataspeedinc.com>
2019-06-20 10:57:08 -04:00
Joel Stanley
894e235f14 aspeed/watchdog: Correct timeout value
The driver was using milliseconds and programming it into a register
which takes ticks of the watchdog clock, which runs at 1MHz. This meant
we were off by 1000 with the desired value.

When 06985289d4 ("watchdog: Implement generic watchdog_reset()
version") was added the aspeed board would leave the watchdog running,
causing it to bite before u-boot was done.

Discovered by booting in qemu:

  $ qemu-system-arm -M ast2500-evb -drive file=test.img,format=raw,if=mtd -nographic -no-reboot -d cpu_reset

  U-Boot 2019.07-rc3-00091-g2253e40caef5 (Jun 06 2019 - 16:53:23 +0930)

  Model: Aspeed BMC
  DRAM:  496 MiB
  WDT:   Started with servicing (60s timeout)
  MMC:
  In:    serial@1e784000
  Out:   serial@1e784000
  Err:   serial@1e784000
  Watchdog timer expired.

Fixes: 06985289d4 ("watchdog: Implement generic watchdog_reset() version")
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-06-20 10:57:08 -04:00
Tom Rini
f643fb9f4c Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
- PCIe driver change to support DM model
- T2080QDS migrated to use PCIe DM model
2019-06-20 09:14:35 -04:00
Tom Rini
e8c185bb15 _ Update STM32MP entry in MAINTAINERS
_ Handle correctly binding for g-tx-fifo-size for USB DWC2 driver
 _ Fix trusted STM32MP1 defconfig with correct ethernet driver
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Merge tag 'u-boot-stm32-20190619' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- Update STM32MP entry in MAINTAINERS
- Handle correctly binding for g-tx-fifo-size for USB DWC2 driver
- Fix trusted STM32MP1 defconfig with correct ethernet driver
2019-06-20 09:14:03 -04:00
Tom Rini
64fabed971 Merge tag 'mmc-6-19' of https://github.com/MrVan/u-boot
- Avoid HS400 mode when accessing boot partitions
2019-06-20 09:13:27 -04:00
Hou Zhiqiang
b89e3d9250 dm: pci: add Freescale PowerPC PCIe driver
Add PCIe DM driver for Freescale PowerPC PCIe controllers.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-20 10:44:45 +05:30
Tom Rini
63a4585791 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- LS1046AFRWY support
- USB errata fix and secure boot defconfig support for LS1028A
- Enabled SDHC and SATA for LX2160
- LS1046A serdes fixes
- other minor fixes
2019-06-19 14:01:11 -04:00
Patrick Delaunay
7c65468346 usb: dwc2: allow peripheral mode for OTG configuration
Allow device mode in DWC2 driver when device tree select the dr_mode
"peripheral" or "otg".

The device mode is not allowed when dr_mode = "host" in device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2019-06-19 16:56:11 +02:00
Patrick Delaunay
7350a75b51 usb: dwc2: correctly handle binding for g-tx-fifo-size
Manage g-tx-fifo-size as a array as specify in the binding.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2019-06-19 16:56:11 +02:00
Yangbo Lu
66fa035b55 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled
u-boot is trying to make CONFIG_BLK as a hard requirement
for DM_MMC. But now it's still not.

config BLK
	bool "Support block devices"
	depends on DM
	default y if DM_MMC

When fsl_esdhc driver was reworked for DM_MMC support, DM_MMC
without CONFIG_BLK enabled wasn't considered. This patch is to
fix probe issue without CONFIG_BLK enabled.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:56 +05:30
Marek Vasut
72119aa14a mmc: Avoid HS400 mode when accessing boot partitions
U-Boot code currently only applies this restriction to HS200 mode,
extend this to HS400 mode as well.

Currently U-Boot code not support accessing boot partition in HS200/400
mode. This needs more check.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-06-19 13:53:59 +08:00
Tom Rini
c3f43185ee Merge branch 'master' of git://git.denx.de/u-boot-spi
- Drop zipitz2 board (Tom)
- Add DEPRECATED option (Tom)
- Mark legacy or non-dm drivers as DEPRECATED (Jagan)
2019-06-17 11:32:22 -04:00
Tom Rini
c3e8aa1a9e Merge branch 'master' of git://git.denx.de/u-boot-usb
- Assorted gadget fixes
2019-06-17 11:27:21 -04:00
Igor Opaniuk
220f655176 fastboot: Check if partition really exist in getvar_has_slot()
Currently getvar_has_slot() invocation for "boot" and "system"
partitions always returns affirmative response regardless the fact of
existence of these partitions, which leads to impossibility to flash them
on old non-A/B AOSP setups, where _a/_b suffixes aren't used:

$ fastboot flash boot boot.img
Sending 'boot__a' (11301 KB)    OKAY [  0.451s]
Writing 'boot__a'               FAILED (remote: 'cannot find partition')
fastboot: error: Command failed

Although partition layout is:
-> part list mmc 0
Partition Map for MMC device 0  --   Partition Type: EFI

Part	Start LBA	End LBA		Name
	Attributes
	Type GUID
	Partition GUID
  1	0x00000800	0x000107ff	"boot"
	attrs:	0x0000000000000000
	type:	ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
	guid:	ea2e2470-db4a-d646-b828-10167f736d63
  2	0x00010800	0x000127ff	"environment"
	attrs:	0x0000000000000000
	type:	ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
	guid:	10a819d2-6004-3d48-bd87-114e2a796db9
  3	0x00012800	0x0001a7ff	"recovery"
	attrs:	0x0000000000000000
	type:	ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
	guid:	9ea116e4-8a34-0c48-8cf5-2fe9480f56cd
  4	0x0001a800	0x0031a7ff	"system"
	attrs:	0x0000000000000000
......

This patch adds checks of existence for requested partitions
on eMMC/NAND.

Fixes: f73a7df984 ("net: fastboot: Merge AOSP UDP fastboot")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2019-06-14 12:39:54 +02:00
Sam Protsenko
f23a87d581 fastboot: getvar: Refactor fastboot_*_get_part_info() usage
Extract fastboot_*_get_part_info() usage for MMC and NAND into
getvar_get_part_info() function, as it will be needed further in other
functions. This way we can avoid code duplication and mess with
preprocessor directives across all points of usage.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-06-14 12:39:54 +02:00
Sam Protsenko
cacb03e490 fastboot: Use const qualifier for char *part_name
In fastboot_*_get_part_info() functions we can use stronger typing by
expecting const strings.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-06-14 12:39:54 +02:00
Sam Protsenko
97a0c6ff57 fastboot: Fix slot names reported by getvar
In commit [1] fastboot tool was changed w.r.t. new A/B specification [2],
and now we should report slot names in "a" format instead of "_a".
Latter is now considered legacy and we shouldn't rely on that anymore.

Due to this one can observe next error with recent fastboot tool:

    $ fastboot flash boot boot.img
    Sending 'boot__a' (11301 KB)
        OKAY [  0.451s]
    Writing 'boot__a'
        FAILED (remote: 'cannot find partition')
    fastboot: error: Command failed

Let's use new slot format in order to fix double underscores "__" and to
be in sync with AOSP master.

[1] 8091947847
[2] https://source.android.com/devices/tech/ota/ab/ab_implement#partitions

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2019-06-14 12:39:54 +02:00
Jagan Teki
ea73ec08d1 spi: Kconfig: Mark LPC32XX_SSP as DEPRECATED
Mark LPC32XX_SSP as DEPRECATED, this so the resulting build shows
warning for deprecated configuration enabled and associated code
will remove in v2019.07 release.

Cc: Albert ARIBAUD <albert.aribaud@3adev.fr>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Sylvain Lemieux <slemieux@tycoint.com>
[trini: Switch to DEPRECATED]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-06-13 12:51:06 +05:30
Jagan Teki
32f70d67c7 spi: Kconfig: Mark SOFT_SPI as DEPRECATED
Mark SOFT_SPI as DEPRECATED, this so the resulting build shows
warning for deprecated configuration enabled and associated code
will remove in v2019.07 release.

Cc: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
[trini: Switch to DEPRECATED]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-06-13 12:51:06 +05:30
Jagan Teki
e124759289 spi: Kconfig: Mark SH_SPI as DEPRECATED
Mark SH_SPI as DEPRECATED, this so the resulting build shows
warning for a deprecated configuration enabled and associated code
will remove in v2019.07 release.

Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
[trini: Switch to DEPRECATED]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-06-13 12:51:06 +05:30
Jagan Teki
d5ded320a1 spi: Kconfig: Mark MXS_SPI has DEPRECATED
Mark MXS_SPI as DEPRECATED, this so the resulting build shows
warning for broken configuration enabled and associated code
will remove in v2019.07 release.

Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
[trini: Switch to DEPRECATED]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-06-13 12:51:06 +05:30
Tom Rini
698bc1f2e9 - pinctrl: meson-gx: fix GPIO_TEST_N and GPIOCLK_ groups
- pinctrl: meson-gxbb: add hdmi related pins to fix HDMI on GXBB
 - pinctrl: meson: add support for getting pinmux status
 - pinctrl: meson-g12a: add support for drive-strength-microamp property
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Merge tag 'u-boot-amlogic-20190612' of git://git.denx.de/u-boot-amlogic

- pinctrl: meson-gx: fix GPIO_TEST_N and GPIOCLK_ groups
- pinctrl: meson-gxbb: add hdmi related pins to fix HDMI on GXBB
- pinctrl: meson: add support for getting pinmux status
- pinctrl: meson-g12a: add support for drive-strength-microamp property
2019-06-12 15:28:34 -04:00
Maxime Jourdan
63860dbfdf pinctrl: meson-gxbb: add hdmi related pins
The GXBB pinctrl is missing pins related to HDMI, namely hot plug
detection (hpd) and I2C (sda + scl).

This fixes HDMI support for GXBB in u-boot.

Reported-by: Mohammad Rasim <mohammad.rasim96@gmail.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mohammad Rasim <mohammad.rasim96@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-06-12 11:50:02 +02:00
Guillaume La Roque
60fe59355c pinctrl: meson: g12a: add DS bank value
add drive-strength bank regiter and bit value for G12A SoC

Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-06-12 11:50:02 +02:00
Guillaume La Roque
478c563b40 pinctrl: meson: add support of drive-strength-microamp
drive-strength-microamp is a new feature needed for G12A SoC.
the default DS setting after boot is usually 500uA and it is not enough for
many functions. We need to be able to set the drive strength to reliably
enable things like MMC, I2C, etc ...

Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-06-12 11:50:02 +02:00
Neil Armstrong
b9308f2c05 pinctrl: meson-axg: add support for getting pinmux status
In order to support the "pinmux status" command, use the common functions
to get the pins count and names, and add the AXG specific function to get
the current function from registers.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-06-12 11:50:02 +02:00
Neil Armstrong
2392289477 pinctrl: meson-gx: add support for getting pinmux status
In order to support the "pinmux status" command, use the common functions
to get the pins count and names, and add the GX specific function to get
the current function from registers.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Maxime Jourdan <mjourdan@baylibre.com>
2019-06-12 11:50:02 +02:00
Neil Armstrong
88fa32b849 pinctrl: meson: add common function to get pins name
In order to support the "pinmux status" command, add common function
to get pins count and pin name.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-06-12 11:50:02 +02:00
Neil Armstrong
fb94245534 pinctrl: meson-gx: fix GPIO_TEST_N and GPIOCLK_ groups
The GPIO_TEST_N was in the wrong pmx group table, move it back with the AO
groups, GPIODV_18 was missing, add it back, and finally the GPIOCLK_*
group names were missing.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-06-12 11:50:02 +02:00
Tom Rini
2702646bc0 - Add Ethernet support for STM32MP1
- Add saveenv support for STM32MP1
 - Add STM32MP1 Avenger96 board support
 - Add SPI driver suport for STM32MP1
 - Add watchdog support for STM32MP1
 - Update power supply check via USB TYPE-C for STM32MP1 discovery board
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Merge tag 'u-boot-stm32-20190606' of https://github.com/pchotard/u-boot

- Add Ethernet support for STM32MP1
- Add saveenv support for STM32MP1
- Add STM32MP1 Avenger96 board support
- Add SPI driver suport for STM32MP1
- Add watchdog support for STM32MP1
- Update power supply check via USB TYPE-C for STM32MP1 discovery board
2019-06-11 17:22:22 -04:00
Tom Rini
529faf80c3 u-boot-imx-20190612
--------------------
 
 - Board fixes:
 	- imx6logic
 	- wandboard
 	- mx6sabre boots again
 	- imx8qm_mek
 	- pico-* boards
 	- Toradex apalis / colibri
 	- engicam imx6 (environment)
 	- KP MX53
 	- opos6ul
 - Switch to DM:
 	- vining2000
 	- dh MX6
 	- Toradex colibri i.MX7
 	- Novena
 - Security : fix CSF size for HAB
 - Other:
       - imx: fix building for i.mx8 without spl
       - pcie and switch to DM
 
       mx6sabreauto: Enable SPL SDP support
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Merge tag 'u-boot-imx-20190612' of git://git.denx.de/u-boot-imx

u-boot-imx-20190612
--------------------

- Board fixes:
	- imx6logic
	- wandboard
	- mx6sabre boots again
	- imx8qm_mek
	- pico-* boards
	- Toradex apalis / colibri
	- engicam imx6 (environment)
	- KP MX53
	- opos6ul
- Switch to DM:
	- vining2000
	- dh MX6
	- Toradex colibri i.MX7
	- Novena
- Security : fix CSF size for HAB
- Other:
      - imx: fix building for i.mx8 without spl
      - pcie and switch to DM

      mx6sabreauto: Enable SPL SDP support
2019-06-11 13:41:24 -04:00
Lukasz Majewski
c0df121a97 pinctrl: imx: Define imx6_pinctrl_soc_info in .data section
This commit is necessary to be able to re-use the pinctrl code in early
SPL to properly configure pins.

The problem is that those "static" structures (without explicit
initialization) are placed in the SDRAM area, which corresponds to
u-boot proper (not even SPL).
Hence, when one wants to configure pins before relocation via DTS/DM,
the board hangs (imx6q SoC powered one) as only OCRAM area is available
(0x009xxxxx).

This commit prevents from this issue by moving the imx6_pinctrl_soc_info
structure to data section (from BSS).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-06-11 10:43:00 +02:00
Peng Fan
b5d97e10fa net: fec_mxc: not access reserved register on i.MX8
We should not access reserved register on i.MX8, otherwise met SERROR

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-06-11 10:43:00 +02:00
Marek Vasut
6757fa5756 serial: mxc: Add iMX6SX compatible string
Add compatible string for iMX6SX.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
2019-06-11 10:42:48 +02:00
Marek Vasut
a11c0f44b7 pci: imx: Add DM and DT support
Add DM support and support for probing the iMX PCI driver from DT.
The legacy non-DM support is retained, however shall be removed once
DM PCI is the only option remaining.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-06-11 10:42:48 +02:00
Marek Vasut
d2cc2e86f8 pci: imx: Pass driver private data around
Pass the driver private data around the driver as much as possible, instead
of having it as a static global variable. This is done in preparation for
the DM conversion, no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-06-11 10:42:48 +02:00
Marek Vasut
90f87fb525 pci: imx: Fix potential 64bit memory access clamping
The driver limits the config space base to 32bit, however it can be
64bit on 64bit iMX hardware too. Remove that limitation. This patch
has no impact on the iMX6, which is the only SoC currently supported
by this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-06-11 10:42:48 +02:00
Marek Vasut
33f794be36 pci: imx: Factor out hard-coded register base addresses
Pull out hard-coded register base addresses into driver private
structure in preparation for DM conversion. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-06-11 10:42:48 +02:00
Marcel Ziswiler
74c0f5cd7c imx8: fuse: fix fuse driver
This fixes the i.MX 8 fuse driver to actually build for i.MX 8QM as
well.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Max Krummenacher <max.krummenacher@toradex.com>
2019-06-11 10:42:48 +02:00
Marcel Ziswiler
16f8b84917 clk: imx8qm: fix usdhc2 clocks
Trying to bring up uSDHC2 the following error message was observed:

MMC:   imx8_clk_set_rate(Invalid clk ID #60)
imx8_clk_set_rate(Invalid clk ID #60)
usdhc@5b030000 - probe failed: -22

This commit fixes this by properly setting resp. clocks.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Max Krummenacher <max.krummenacher@toradex.com>
2019-06-11 10:42:48 +02:00
Heiko Schocher
7a3faf31a7 spi: imx: work with cs greater 0
currently spi mxc driver can only handle cs 0.
Allow it to handle also cs > 0.

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-06-11 10:42:48 +02:00
Heiko Schocher
2b849e1f74 spi: imx: remove doubled pointer from mxc_spi_probe
in mxc_spi_probe() plat and mxcs pointer are created:

struct mxc_spi_slave *plat = bus->platdata;
struct mxc_spi_slave *mxcs = dev_get_platdata(bus);

which have the same value. Remove plat pointer.

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-06-11 10:42:48 +02:00
Breno Matheus Lima
51f1357f34 Revert "drivers/crypto/fsl: assign job-rings to non-TrustZone"
Commit 22191ac353 ("drivers/crypto/fsl: assign job-rings to
 non-TrustZone") breaks HABv4 encrypted boot support in the
following i.MX devices:

- i.MX6UL
- i.MX7S
- i.MX7D
- i.MX7ULP

For preparing a HABv4 encrypted boot image it's necessary to
encapsulate the generated DEK in a blob. In devices listed
above the blob generation function takes into consideration
the Job Ring TrustZone ownership configuration (JROWN_NS)
and can be only decapsulated by the same configuration.

The ROM code expects DEK blobs encapsulated by the Secure World
environments which commonly have JROWN_NS = 0.

As U-Boot is running in Secure World we must have JROWN_NS = 0
so the blobs generated by dek_blob tool can be decapsulated
by the ROM code.

Job-rings assignment is now handled in OP-TEE OS, this commit can
be safely reverted.
https://github.com/OP-TEE/optee_os/pull/2986

This reverts commit 22191ac353.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-06-11 10:42:48 +02:00
Matti Vaittinen
1023c8739b regulator: bd71837: copy the bd71837 pmic driver from NXP imx u-boot
https://source.codeaurora.org/external/imx/uboot-imx

cherry picked, styled and merged commits:
- MLK-18387 pmic: Add pmic driver for BD71837: e9a3bec2e95a
- MLK-18590 pmic: bd71837: Change to use new fdt API: acdc5c297a96

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-06-11 10:42:48 +02:00
Trent Piepho
d3eaf95ec6 power: pfuze100: Fix off by one error in voltage table handling
The code that sets a regulator by looking up the voltage in a table had
an off by one error.  vsel_mask is a bitmask, not the number of table
entries, so a vsel_mask value of 0x7 indicates there are 8, not 7,
entries in the table.

Cc: Peng Fan <Peng.Fan@freescale.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
2019-06-11 10:42:48 +02:00
Tom Rini
07798764c2 Merge branch 'master' of git://git.denx.de/u-boot-spi
- mpc8xxx spi driver fixes (Mario)
- mpc8xxx spi dm conversion (Mario, Jagan)
- SPI DM Migration update (Jagan)
2019-06-10 09:43:11 -04:00
Jagan Teki
c1a3f1ee18 spi: mpc8xxx: Convert to DM
Support DM in the MPC8xxx SPI driver, and remove the legacy SPI
interface.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:49 +05:30
Mario Six
67adbaef5a spi: mpc8xxx: Use get_timer
The comment before the transmission loop in conjunction with the
definition of SPI_TIMEOUT as 1000 implies that the loop is supposed to
have a timeout value of 1000 ms. But since there is no mdelay(1) or
similar in the loop body, the loop just runs 1000 times, without regard
for the time elapsed.

To correct this, use the standard get_timer functionality to properly
time out the loop after 1000 ms.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:49 +05:30
Mario Six
f6fcad5f2a spi: mpc8xxx: Fix if check
Decreasing the bit length and increasing the write data pointer should
be done when there are more than 32 bit of data, not 16 bit.

This did not produce incorrect behavior, because the only time where the
two checks produce different outcomes is the case of 16 < bitlen < 32,
and in this case the subsequent transmission is the last one regardless,
hence the additional bit length decrease and write data pointer increase
has no effect anyway.

Still, the correct check is the check for "bitlen > 32", so correct this
behavior.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:49 +05:30
Mario Six
a1c178e4c7 spi: mpc8xxx: Re-order transfer setup
Minize the time the adapter is disabled (via SPI_MODE_EN
clearing/setting) to just the character length setting, and only set up
the temporary data writing variable right before we need it, so there is
a more clear distinction between setting up the SPI adapter, and setting
up the data to be written.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:49 +05:30
Mario Six
85fa265530 spi: mpc8xxx: Document LEN setting better
Instead of having a table right before the code implementing the length
setting for documentation, have inline comments for the if branches
actually implementing the length setting described table's entries
(which is readable thanks to the set_char_len function).

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:49 +05:30
Mario Six
5ccfb8a995 spi: mpc8xxx: Rename variable
The variable "char_size" holds the number of bits to be transferred in
the current loop iteration. A better name would be "xfer_bitlen", which
we rename this variable to.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:49 +05:30
Mario Six
8dea61da19 spi: mpc8xxx: Make code more readable
Introduce the to_prescale_mod and set_char_len inline functions to make
the code more readable.

Note that the added "if (bitlen > 16)" check does not change the
semantics of the current code, and hence only preserves the current
error (this will be fixed in a later patch in the series).

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
65f88e0408 spi: mpc8xxx: Reduce scope of loop variables
The transmission loop starts with setting some variables, which are only
used inside the loop. Reduce the scope to the loop to make the
declaration and initialization of these variables coincide.

In the case of char_size this also always initializes the variable
immediately with the final value actually used in the loop (instead of
the placeholder value 32).

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
e4da4c2e0e spi: mpc8xxx: Simplify logic a bit
We do nothing in the loop if the "not empty" event was not detected. To
simplify the logic, check if this is the case, and skip the execution of
the loop early to reduce the nesting level and flag checking.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
6409c6103a spi: mpc8xxx: Get rid of is_read
Get rid of the is_read variable, and just keep the state of the "not
empty" and "not full" events in two boolean variables within the loop
body.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
76c82afef3 spi: mpc8xxx: Simplify if
Instead of having a nested if block, just have two branches within the
overarching if block to eliminate one nesting level.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
1a907e41dc spi: mpc8xxx: Use IO accessors
Accesses to the register map are currently done by directly reading and
writing the structure.

Switch to the appropriate IO accessors instead.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
6ea9395bf7 spi: mpc8xxx: Replace defines with enums
Replace pre-processor defines with proper enums, and use the BIT macro
where applicable.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
fabe6c4909 spi: mpc8xxx: Fix function names in strings
Replace the function name with a "%s" format string and the __func__
variable in debug statements (as proposed by checkpatch).

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
6f3ac07ea3 spi: mpc8xxx: Fix space after cast
Fix all "superfluous space after case" style errors.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
01ac1e19df spi: mpc8xxx: Rename camel-case variables
There are three variables that have camel-case names, which is not the
preferred naming style.

Give those variables more compliant names instead.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
d93fe31020 spi: mpc8xxx: Fix comments
There are some comments on the same line as the code they document. Put
comments above the code lines they document, so the line length is not
unnecessarily increased.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Mario Six
d896b7baa1 spi: mpc8xxx: Use short type names
The function signatures in the driver are quite long as is. Use short
type names (uint etc.) to make them more readable.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-10 17:59:48 +05:30
Christophe Roullier
ac2d4efb16 net: dwc_eth_qos: add Ethernet stm32mp1 support
Synopsys GMAC 4.20 is used. And Phy mode for eval and disco is RMII
with PHY Realtek RTL8211 (RGMII)
We also support some other PHY config on stm32mp157c
PHY_MODE	(MII,GMII, RMII, RGMII) and in normal,
PHY wo crystal (25Mhz and 50Mhz), No 125Mhz from PHY config

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-06-06 17:40:18 +02:00
Patrick Delaunay
f6ccdda126 stm32mp1: clk: use the correct identifier for ethck
ETHCK_K is the identifier the kernel clock for ETH in kernel
binding, selected by ETHKSELR / gated by ETHCKEN = BIT(7).
U-Boot driver need to use the same identifier, so change ETHCK
to ETHCK_K.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
2019-06-06 17:40:18 +02:00
Patrice Chotard
a2a89b2e21 spi: stm32: Add Serial Peripheral Interface driver for STM32MP
Add SPI driver support for STM32MP SoCs family.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-06-06 17:40:17 +02:00
Patrice Chotard
248278d7f7 clk: stm32mp1: Add SPI1 clock entry
Add missing SPI1 clock needed by SPI1 instance.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-06-06 17:40:17 +02:00
Patrice Chotard
8c1007a2cb watchdog: stm32mp: Add watchdog driver
This patch adds IWDG (Independent WatchDoG) support for
STM32MP platform.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-06-06 17:40:16 +02:00
Patrice Chotard
b3134ffbd9 watchdog: Kconfig: Sort entry alphabetically
To make adding new entry easier, sort Kconfig entries in
alphabetical order.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-06-06 17:40:16 +02:00
Patrice Chotard
e6b7afe737 mtd: Fix get_mtdparts()
When ENV_IS_IN_UBI is enable, get_mtdparts is called before relocation.

During first get_mtdparts() call, mtdparts is not available in environment,
it can be retrieved by calling board_mtdparts_default(), but following
env_set() do nothing as we are before relocation. Finally mtdparts is
still not available in environment.

At second get_mtdparts() call, use_defaults is false, but mtdparts is still
not in environment and is NULL.

Remove use_defaults bool, only mtdparts criteria is useful.

Fixes: commit 5ffcd50612 ("mtd: Use default mtdparts/mtids when not defined
in the environment")

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-06-06 17:40:14 +02:00
Maxime Jourdan
f944b15966 video: meson: hdmi-supply regulator should be optional
Some boards don't have such a regulator, and don't need one to enable
HDMI display. Make it optional, fixing hdmi display for those boards.

Also surround the regulator code with a config check on DM_REGULATOR.

Reported-by: Mohammad Rasim <mohammad.rasim96@gmail.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mohammad Rasim <mohammad.rasim96@gmail.com>
2019-06-05 10:51:46 +02:00
Igor Opaniuk
8c1df09f07 video: mxsfb: add DM_VIDEO support
Extend the driver to build with DM_VIDEO enabled. DTS files
must additionally include 'u-boot,dm-pre-reloc' property in
soc and child nodes to enable driver binding to mxsfb device.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-06-04 23:25:54 +02:00
Igor Opaniuk
9a67205228 video: mxsfb: refactor video_hw_init()
Refactor video_hw_init() function, and introduce an independent function
for the common procedure of initialization.

Currently video_hw_init() is only in charge of parsing configuration from
env("videomode") and filling struct GraphicPanel, and new
mxs_probe_common() does hw specific initialization (invocation of
mxs_lcd_init() etc.)

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-06-04 23:22:59 +02:00
Igor Opaniuk
23816322d5 video: mxsfb: reorder includes
Follow alphabetical order of includes, which simplifies detecting duplicate
includes etc.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-06-04 23:22:19 +02:00
Igor Opaniuk
dcd91a61bf video: mxsfb: change mxs_lcd_init signature
Provide directly framebuffer address instead of pointer to
GraphicDevice struct, which will let to re-use this function in
DM_VIDEO configurations.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-06-04 23:21:57 +02:00
Tom Rini
38c2a8a001 Pull request for UEFI sub-system for v2019.07-rc4
Corrections for boottime services for protocols and for the SetTime()
 service are provided.
 
 Error messages for the 'setenv -e' and 'bootefi bootmgr' commands are
 added.
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Merge tag 'efi-2019-07-rc4' of git://git.denx.de/u-boot-efi

Pull request for UEFI sub-system for v2019.07-rc4

Corrections for boottime services for protocols and for the SetTime()
service are provided.

Error messages for the 'setenv -e' and 'bootefi bootmgr' commands are
added.
2019-06-02 18:19:45 -04:00
Bin Meng
3ef64444de dm: net: macb: Implement link speed change callback
At present the link speed change callback is a nop. According to
macb device tree bindings, an optional "tx_clk" is used to clock
the ethernet controller's TX_CLK under different link speed.

In 10/100 MII mode, transmit logic must be clocked from a free
running clock generated by the external PHY. In gigabit GMII mode,
the controller, not the external PHY, must generate the 125 MHz
transmit clock towards the PHY.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-06-01 13:33:17 -05:00
Bin Meng
a5e3d2350b dm: net: macb: Update macb_linkspd_cb() signature
This updates DM version macb_linkspd_cb() signature for future
expansion, eg: adding an implementation for link speed changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-06-01 13:33:17 -05:00
Bin Meng
49191d259f clk: sifive: Add clock driver for GEMGXL MGMT
This adds a clock driver to support the GEMGXL management IP block
found in FU540 SoCs to control GEM TX clock operation mode for
10/100/1000 Mbps.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-06-01 13:33:17 -05:00
Heinrich Schuchardt
3c1889e639 rtc: export rtc_month_days()
Export function rtc_month_days() for reuse in the UEFI subsystem.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-31 23:27:12 +02:00
Tom Rini
8a802a2eef Merge tag 'rockchip-for-v2019.07-rc3' of git://git.denx.de/u-boot-rockchip
- some fix for rk3399-puma;
- rockchip script make_fit_atf.py cleanup
- Enable TPL for rk3399 orangepi and nanopi4;
- add support for rk3399 boards: Nanopi NEO4, Rockpro64, Rock PI 4;
2019-05-31 07:17:09 -04:00
Neil Armstrong
08e09c263f clk: meson-g12a: Add PCIE PLL support
The G12A PCIE PLL clock was introduced in Linux 5.2-rc1, and is needed
for USB to operate, add basic support for it and associated gates.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-05-31 09:57:49 +02:00
Christoph Muellner
2461543632 rockchip: clk: rk3399: allow requests for all UART clocks
This patch adds the rate for UART1 and UART3 the same way
as already implemented for UART0 and UART2.

This is required for boards, which have their console output
on these UARTs.

Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-30 18:22:35 +08:00
Tom Rini
e2822ccc2c Merge branch 'master' of git://git.denx.de/u-boot-tegra
- Audio support
2019-05-29 07:28:40 -04:00
Thomas Fitzsimmons
77934fdedf dm: arm: bcmstb: Enable driver model MMC support
For bcm7445 and bcm7260, this patch enables CONFIG_DM_MMC and updates
the bcmstb SDHCI driver to use the new driver model.  This allows
removal of SDHCI configuration handling from bcmstb.c, and eliminates
a board removal compile warning.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-05-28 13:58:06 -04:00
Tom Rini
c18b103657 Merge branch 'master' of git://git.denx.de/u-boot-sh
- Gen3 PCIe driver + enablement on Salvator-X platforms.
- Gen3 recovery SPL used to reload ATF/OpTee/U-Boot instead of minimon.
- SDHI HS400 fixes ported from latest BSP and datasheet.
2019-05-26 20:18:20 -04:00
Tom Rini
696f02d99b Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- SoCFPGA PL310 cleanup + A10 fix, A10 DT cleanup, DW GPIO fix.
2019-05-26 20:15:46 -04:00
Tom Rini
cc1e98b559 configs: Migrate CONFIG_FMAN_ENET and some related options to Kconfig
Move the main symbol for Freescale Fman Ethernet controller option to
Kconfig.  Also migrate the CONFIG_SYS_QE_FMAN_FW_IN_xxx macros and
rename the SPIFLASH one to follow the same format as all of the others.
To do this fully we need to migrate CONFIG_QC, do so.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-05-26 14:40:50 -04:00
Simon Glass
7a6c6dba28 sound: tegra: Add a sound driver
Add a sound driver for tegra devices. This connects the audio hub, I2S
controller and audio codec to allow sound output.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-05-24 10:14:10 -07:00
Simon Glass
c5a120b3f0 tegra: sound: Add an I2S driver
Add a driver which supports transmitting digital sound to an audio codec.
This uses fixed parameters as a device-tree binding is not currently
defined.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-05-24 10:14:03 -07:00
Simon Glass
112f2e1443 tegra: sound: Add an audio hub driver
Add a driver for the audio hub. This is modelled as a misc device which
supports writing audio data from I2S.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-05-24 10:13:52 -07:00
Tom Rini
866a78dc28 - Add various STM32MP1 fixes for serial, env, clk, board, i2c ...
- Add STM32MP1 DDR driver update:
 	These update introduce the DDR interactive mode described in:
 	https://wiki.st.com/stm32mpu/index.php/U-Boot_SPL:_DDR_interactive_mode
 
 	This mode is used by the CubeMX: DDR tuning tool.
 	https://wiki.st.com/stm32mpu/index.php/STM32CubeMX
 
 	The DDR interactive mode is NOT activated by default because
 	it increase the SPL size and slow down the boot time
 	(200ms wait added).
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Merge tag 'u-boot-stm32-20190523' of https://github.com/pchotard/u-boot

- Add various STM32MP1 fixes for serial, env, clk, board, i2c ...

- Add STM32MP1 DDR driver update:
	These update introduce the DDR interactive mode described in:
	https://wiki.st.com/stm32mpu/index.php/U-Boot_SPL:_DDR_interactive_mode

	This mode is used by the CubeMX: DDR tuning tool.
	https://wiki.st.com/stm32mpu/index.php/STM32CubeMX

	The DDR interactive mode is NOT activated by default because
	it increase the SPL size and slow down the boot time
	(200ms wait added).
2019-05-24 08:13:27 -04:00
Tom Rini
afe9e1f197 Merge git://git.denx.de/u-boot-mpc85xx
- Enable DM for SATA, SDHC, USB in T2080QDS
2019-05-24 08:13:00 -04:00
Angelo Dureghello
461ea07963 drivers: serial: mcfuart: add DT support
This patch adds devicetree support to the mcfuart.c driver
and removes non DM code.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2019-05-24 08:11:58 -04:00
Angelo Dureghello
5ea3766461 drivers: spi: cf_spi: convert to driver model
Converting to driver model and removes non-dm code.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2019-05-24 08:11:57 -04:00
Angelo Dureghello
610e316d02 drivers: spi: cf_spi: add Kconfig option
This patch adds cf_spi DM Kconfig option.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2019-05-24 08:11:57 -04:00
Simon Goldschmidt
34b1a510e8 gpio: dwapb_gpio: fix broken dev->node
commit 1b898ffc04 ("gpio: dwapb_gpio: convert to livetree") introduced
a bug in that dev->node of the gpio chip was accidentally set to the
of_node of its bank subnode.

What it meant to do was assign subdev->node, not dev->node.

While this doesn't affect too many use cases, iterating over the gpio
chip's properties doesn't work any more after that, so fix this.

Fixes: commit 1b898ffc04 ("gpio: dwapb_gpio: convert to livetree")
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-24 00:01:08 +02:00
Peng Ma
1ee4942918 ata: fsl_ahci: Add sata DM support for Freescale powerpc socs
This patch is to support Freescale sata driver with dts initialized.
Also resolved the following problems.

===================== WARNING ======================
This board does not use CONFIG_DM_SCSI. Please update
the storage controller to use CONFIG_DM_SCSI before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-23 19:53:09 +05:30
Yinbo Zhu
ad9f2be334 usb: ehci: adopt 32 bit address for CONFIG_PPC
adopt 32 bit addr in fsl_esdhc for CONFIG_PPC.
So  adopt 32 bit address for CONFIG_PPC.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-23 19:53:08 +05:30
Patrick Delaunay
187c41d783 stm32mp1: ram: add tuning in DDR interactive mode
Add command tuning for DDR interactive mode, used during
board bring-up or with CubeMX DDR tools to execute software
tuning for the DDR configuration:
- software read DQS Gating (replace the built-in one)
- Bit de-skew
- Eye Training or DQS training

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-05-23 11:38:11 +02:00
Patrick Delaunay
0d44752442 stm32mp1: ram: add tests in DDR interactive mode
Add command tests for DDR interactive mode, used during
board bring-up or with CubeMX DDR tools to verify the
DDR configuration.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-05-23 11:38:11 +02:00
Patrick Delaunay
01a7510849 stm32mp1: ram: add interactive mode for DDR configuration
This debug mode is used by CubeMX DDR tuning tools
or manualy for tests during board bring-up.
It is simple console used to change DDR parameters and check
initialization.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-05-23 11:38:11 +02:00
Patrick Delaunay
1767ac2d1f stm32mp1: ram: add support for LPDDR2/LPDDR3
Manage power supply configuration for board using stpmic1
with LPDDR2 or with LPDDR3:
+ VDD_DDR1 = 1.8V with BUCK3 (bypass if possible)
+ VDD_DDR2 = 1.2V with BUCK2

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-05-23 11:38:11 +02:00
Patrick Delaunay
53bb831658 stm32mp1: ram: update parameter array initialization
Force alignment of the size of parameters array with
the expected value in the binding, that allows compilation
error when the array size change.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-05-23 11:38:10 +02:00
Patrick Delaunay
c60fed14f6 stm32mp1: ram: change ddr speed to kHz
Allow fractional support in DDR tools.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-05-23 11:38:10 +02:00
Patrick Delaunay
0cb1aa9409 stm32mp1: ram: increase the delay after reset to 128 cycles
Component Notification DDR controller errata (3.00a):9001313030
Synchronization Time Waited After De-assertion of presetn is
128 pclk Cycles.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-05-23 11:38:10 +02:00
Patrick Delaunay
c3ec370aed stm32mp1: ram: update mask for operating mode
Regression introduced by rebase, when loop
was replaced by readl_poll_timeout() function.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-05-23 11:38:10 +02:00
Patrick Delaunay
66dba9a18b serial: stm32: remove watchog reset in debug putc
For STM32MP, the watchdog is based on DM and the function watchod_reset
call the function uclass_get_device(UCLASS_WDT) to found the driver
associated IWDG2.

As this reset is not mandatory in debug putc (the  uart fifo will be
empty after some us), we can simplify the code by removing this call.

And this patch avoid issue when putc is called before initialization
of DM core, before the parsing of the device tree parsing and each
node bound to driver; that also avoid memory leak.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-05-23 11:36:48 +02:00
Patrick Delaunay
26603c0ea4 serial: stm32: remove unnecessary trace
Remove the trace indicating the end of the DEBUG initialization

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-05-23 11:36:48 +02:00
Patrick Delaunay
c3e828bff2 clk: stm32mp1: add set_rate for DDRPHYC clock
Add the DDRPHYC support for clk_set_rate, used in DDR interactive mode

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-05-23 11:36:47 +02:00
Nicolas Le Bayon
5237f37e5c i2c: stm32f7: improve loopback in timing algorithm
This avoids useless loops inside the I2C timing algorithm.
Actually, we support only one possible solution per prescaler value.
So after finding a solution with a prescaler, the algorithm can
switch directly to the next prescaler value.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-05-23 11:36:47 +02:00
Nicolas Le Bayon
e87da7521f i2c: stm32f7: Fix SDADEL minimum formula
It conforms with Reference Manual I2C timing section.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-05-23 11:36:47 +02:00
Yinbo Zhu
b69e1d0bc7 driver: mmc: adopt 32 bit addr in fsl_esdhc for CONFIG_PPC
PowerPC supports 32 bit address.
So adopt 32 bit addr in fsl_esdhc for CONFIG_PPC.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-23 14:22:33 +05:30
Yinbo Zhu
b512d07e8c driver: mmc: set sdhc clock in fsl_esdhc for CONFIG_PPC
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-23 14:22:33 +05:30
Tom Rini
40920bdecc Various DM fixes
Addition of ofnode_get_addr_size_index()
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Merge tag 'dm-pull-22may19' of git://git.denx.de/u-boot-dm

Various DM fixes
Addition of ofnode_get_addr_size_index()
2019-05-22 12:58:58 -04:00
Qiang Zhao
0652d9fb1a driver: watchdog: add sp805 watchdog support
sp805 is watchdog on some NXP layerscape SoCs, adding
it's driver. Configs CONFIG_WDT_SP805, CONFIG_WDT, CONFIG_CMD_WDT
needs to be enabled to use it.

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-22 12:24:24 +05:30
Peng Ma
d2ebc38236 scsi: ceva: Clean up the driver code
Distinguish the ecc val by chassis version and move the ecc addr to dts.
Add ls1028a soc support.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-22 12:24:24 +05:30
Hou Zhiqiang
1d341bc4b6 pci: ls_pcie_g4: add device tree fixups for PCI Stream IDs
Add the infrastructure for Layerscape SoCs PCIe Gen4 controller
to update device tree nodes to convey SMMU stream IDs in the
device tree.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-22 12:24:24 +05:30
Hou Zhiqiang
07ce19f5e9 pci: Add PCIe Gen4 controller driver for NXP Layerscape SoCs
Add PCIe Gen4 driver for the NXP Layerscape SoCs. This PCIe
controller is based on the Mobiveil IP, which is compatible
with the PCI Express™ Base Specification, Revision 4.0.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Bao Xiaowei <Xiaowei.Bao@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-22 12:24:24 +05:30
Patrice Chotard
ee730a7cd2 dm: core: Fix dm_extended_scan_fdt()
This function  takes an argument, blob,
but never uses it, instead uses gd->fdt_blob directly.

Fixes: e81c98649b ("dm: core: add clocks node scan")

Reported-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-21 17:33:23 -06:00
Trent Piepho
b061ef39c3 core: ofnode: Have ofnode_read_u32_default return a u32
It was returning an int, which doesn't work if the u32 it is reading,
or the default value, will overflow a signed int.

While it could be made to work, when using a C standard/compiler where
casting negative signed values to unsigned has a defined behavior,
combined with careful casting, it seems obvious one is meant to use
ofnode_read_s32_default() with signed values.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
2019-05-21 17:33:23 -06:00
Keerthy
e679d03b08 core: ofnode: Add ofnode_get_addr_size_index
Add ofnode_get_addr_size_index function to fetch the address
and size of the reg space based on index.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-05-21 17:33:23 -06:00
Simon Glass
aaba703fd0 spl: misc: Allow misc drivers in SPL and TPL
In some cases it is necessary to read the keyboard in early phases of
U-Boot. The cros_ec keyboard is kept in the misc directory. Update the
config to allow this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-05-21 17:33:23 -06:00
Marek Vasut
b5900a58ca mmc: tmio: sdhi: HS400 manual adjustment
Since Gen3 SDHI has an internal DS signal AC-spec violation in HS400 mode,
CRC-error may occur in read command in HS400 mode. This phoenomenon occurs
at low/high temperature.

To fix this, after completion of HS400 tuning, enable manual calibration.
However, Gen3 M3 Ver.1.2 or earlier and H3 1.x does not support HS400.
These SoC forcibly use HS200 mode by SoC attribute.

The DT adjustment of the tuning parameters is not supported until the
DT property names become clear.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Adapted from a patch by Takeshi Saito <takeshi.saito.xv@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Peng Fan <peng.fan@nxp.com>
2019-05-21 22:15:32 +02:00
Marek Vasut
1bac2b6b41 mmc: tmio: sdhi: Minor macro cleanup
Clean up the whitespaces in macros, no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Peng Fan <peng.fan@nxp.com>
2019-05-21 22:15:32 +02:00
Marek Vasut
776abedef4 pci: renesas: Add RCar Gen3 PCIe controller driver
Add driver for the Renesas RCar PCIe controller present on Gen3 SoCs.
The PCIe on Gen3 is used both to connect external PCIe peripherals.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-21 22:15:31 +02:00
Tom Rini
e1a2ed7180 Merge git://git.denx.de/u-boot-mpc83xx
- Update MPC83xx platform support to current best practices, etc.
2019-05-21 07:13:35 -04:00
Tom Rini
ffbad25b32 Merge tag 'mmc-5-20' of https://github.com/MrVan/u-boot
"Please pull mmc-5-20 for v2019.07, this is to avoid break i.MX53 boot."
2019-05-21 07:12:51 -04:00
Tom Rini
b9625abe03 - update for using splashfile instead of location->name
when loading the splash image from a FIT
 - updates for loading internal and external splash data from FIT
 - DM_GPIO/DM_VIDEO migration for mx53 cx9020 board
 - fix boot issue on mx6sabresd board after DM_VIDEO migration
 - increase the max preallocated framebuffer BPP to 32 in ipuv3
   driver to prepare for configurations with higher color depth
 - allow to use vidconsole_put_string() in board code for text
   output on LCD displays
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Merge tag 'video-for-2019.07-rc3' of git://git.denx.de/u-boot-video

- update for using splashfile instead of location->name
  when loading the splash image from a FIT
- updates for loading internal and external splash data from FIT
- DM_GPIO/DM_VIDEO migration for mx53 cx9020 board
- fix boot issue on mx6sabresd board after DM_VIDEO migration
- increase the max preallocated framebuffer BPP to 32 in ipuv3
  driver to prepare for configurations with higher color depth
- allow to use vidconsole_put_string() in board code for text
  output on LCD displays
2019-05-21 07:12:46 -04:00
Mario Six
9638879cba board: gazerbeam: Fix SC detection
The single channel detection in the gazerbeam board driver was not
implemented correctly.

Fix the detection.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-21 08:03:38 +02:00
Mario Six
935a89241c gdsys_rxaui_ctrl: Use new regmap interface
For the DM case, use the proper parameter for the regmap_init_mem call
(which is the ofnode, not the udevice).

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-21 07:52:34 +02:00
Mario Six
ca0eab2dcf gdsys_rxaui_ctrl: Return old state
Make the gdsys_rxaui_ctrl polarity setting function return the old
state to comply with the API requirements.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-21 07:52:34 +02:00
Mario Six
482c76e7c3 i2c: ihs: Improve error handling
Improve the error handling and reporting of the IHS I2C driver.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-05-21 07:52:34 +02:00
Mario Six
98e4249f97 i2c: ihs: Get rid of fpgamap
Since the IHS I2C driver want upstream, the surrounding infrastructure
has changed quite a bit (notably, the fpgamap driver was replaced with a
regmap driver).

Update the driver to work with these changes.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-05-21 07:52:34 +02:00
Mario Six
487bb2bc85 mpc83xx_clk: Add enable method
Some DM drivers have hardcoded clk_enable calls when handling
clocks (for example the fsl_esdhc driver).

To work with these drivers, add an enable method to the MCP83xx clock
driver (which does nothing, because the clocks are always enabled).

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-21 07:52:34 +02:00
Mario Six
133ec60284 mpc83xx: Get rid of CONFIG_SYS_DDR_SDRAM_BASE
CONFIG_SYS_DDR_SDRAM_BASE is set to the same value as
CONFIG_SYS_SDRAM_BASE on all existing boards. Just use
CONFIG_SYS_SDRAM_BASE instead.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-21 07:52:33 +02:00
Mario Six
fe7d654d04 mpc83xx: Migrate CONFIG_SYS_{BR, OR}*_PRELIM to Kconfig
Migrate the BR/OR settings to Kconfig. These must be known at compile
time, so cannot be configured via DT.

Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-21 07:52:33 +02:00
Mario Six
904c47fc7d mpc83xx: Make distinct caddy2 config
vme8349.h contains two separate boards: The vme8349 itself, and the
caddy2 board. The caddy2 board is chosen by setting certain config
variables. Create a proper config file for the caddy2 board to make
Kconfig migration easier.

Furthermore, simplify the vme8349 and caddy2 configs by keeping only the
options necessary for each board.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Mario Six
c2a446048e vme8349: Migrate to CONFIG_TARGET_VME8349
CONFIG_TARGET_VME8349 can replace CONFIG_VME8349. Hence, replace
CONFIG_VME8349 with CONFIG_TARGET_VME8349, and remove CONFIG_VME8349.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Mario Six
8439e99ddb mpc83xx: Introduce ARCH_MPC837X
Replace CONFIG_MPC837x with a proper CONFIG_ARCH_MPC837X Kconfig option.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Mario Six
61abced70f mpc83xx: Introduce ARCH_MPC836*
Replace CONFIG_MPC836* with proper CONFIG_ARCH_MPC836* Kconfig options.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Mario Six
d5cfa4aa5d mpc83xx: Introduce ARCH_MPC834*
Replace CONFIG_MPC834* with proper CONFIG_ARCH_MPC834* Kconfig options.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Mario Six
9403fc41c7 mpc83xx: Introduce ARCH_MPC831*
Replace CONFIG_MPC833* with proper CONFIG_ARCH_MPC833* Kconfig options.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Mario Six
4bc97a3b81 mpc83xx: Introduce ARCH_MPC830*
Replace CONFIG_MPC830* with proper CONFIG_ARCH_MPC830* Kconfig options.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Tom Rini
956520cd70 Merge branch 'master' of git://git.denx.de/u-boot-i2c
- Fix for mxc_i2c driver in DM mode, thanks to Trent!
2019-05-20 07:15:50 -04:00
Marek Vasut
e63168a9ff video: Factor out vidconsole_put_string()
Pull the vidconsole_put_string() function from DM tests, make it
available to e.g. boards that want to display information on the
LCD on boot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-05-20 12:00:05 +02:00
Marek Vasut
b5e1a82e92 video: ipuv3: Set max display bpp to 32
The IPUv3 can handle 1920x1080x32bpp displays , set the max preallocated
framebuffer BPP to 32 to cater for all eventualities.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
2019-05-20 11:58:12 +02:00
Steffen Dirkwinkel
01c9dd2127 dm: arm: imx: video: add compatible for imx53-ipu
This code also works with imx53 ipus so we can enable it for them.

Signed-off-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
2019-05-20 11:57:19 +02:00
Lukasz Majewski
b6a0427554 Revert "mmc: fsl_esdhc: fix sd/mmc ddr mode clock setting issue"
This reverts commit 72a89e0da5, which
causes the imx53 HSC to hang as the eMMC is not working properly anymore.

The exact error message:
MMC write: dev # 0, block # 2, count 927 ... mmc write failed
0 blocks written: ERROR

imx53 is not using the DDR mode.

Debugging of pre_div and div generation showed that those values are
generated in a way, which is not matching the ones from working setup.

As the original patch was performing code refactoring, let's revert this
change, so all imx53 boards would work again.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-05-20 11:34:27 +08:00
Tom Rini
e14d9ca491 Merge git://git.denx.de/u-boot-x86
- Allow coreboot to process unhandled tags
- Enable NVMe on QEMU x86_64 target
2019-05-19 09:42:19 -04:00
Bin Meng
5b2a20e956 nvme: Fix warning of cast from pointer to integer of different size
When dma_addr_t is u32 in 64-bit, there are some warnings when
building NVME driver. Fix it by doing an additional (long) cast.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-19 16:17:33 +08:00
Christian Gmeiner
26992928e8 ata: ahci: drop read-only ahci_ioports members
Also get rid of ahci_setup_port(..).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2019-05-18 12:32:01 -04:00
Philippe Reynes
c411adbdd0 watchdog: bcm6345: callback start use tick instead of ms
The function bcm6345_wdt_start use the argument timeout
as tick but it should be used as milliseconds.

A clock is added as requirement for this driver.
The frequency of the clock is then used to convert the
millisecond to ticks in the function bcm6345_wdt_start.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-05-18 12:31:58 -04:00
Trevor Woerner
1001502545 CONFIG_SPL_SYS_[DI]CACHE_OFF: add
While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances
where these configuration items are conditional on SPL. This commit adds SPL
variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates
the configurations as required.

Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Make the default depend on the setting for full U-Boot, update
more zynq hardware]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-05-18 08:15:35 -04:00
Trent Piepho
ca0a8f3e8c i2c: mxc: Hide kconfig based control in DM_I2C mode
These options only apply when not using DM_I2C.  When using device
trees, the dt will enable and control the speeds of the I2C
controller(s) and these configuration options have no effect.

So disable them in DM_I2C mode.  Otherwise they show up as decoys, and
make it look like one is enabling I2C controllers and setting the speed
when really it's doing nothing.

However, a system using a SPL build will not use DM_I2C in the SPL, even
if DM_I2C is enabled for the main u-boot.  And so the SPL might use the
kconfig based I2C speed controls while the main u-boot does not.

Cc: Sriram Dash <sriram.dash@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
2019-05-17 05:35:24 +02:00
Trent Piepho
c854933f50 i2c: mxc_i2c: Fix read and read->write xfers in DM mode
This is an old driver that supports both device mapped and non-mapped
mode, and covers a wide range of hardware.  It's hard to change without
risking breaking something.  I have to tried to be exceedingly detailed
in this patch, so please excuse the length of the commit essay that
follows.

In device mapped mode the I2C xfer function does not handle plain read,
and some other, transfers correctly.

What it can't handle are transactions that:
    Start with a read, or,
    Have a write followed by a read, or,
    Have more than one read in a row.

The common I2C/SMBUS read register and write register transactions
always start with a write, followed by a write or a read, and then end.
These work, so the bug is not apparent for most I2C slaves that only use
these common xfer forms.

The existing xfer loop initializes by sending the chip address in write
mode after it deals with bus arbitration and master setup.  When
processing each message, if the next message will be a read, it sends a
repeated start followed by the chip address in read mode after the
current message.

Obviously, this does not work if the first message is a read, as the
chip is always addressed in write mode initially by i2c_init_transfer().

A write following a read does not work because the repeated start is
only sent when the next message is a read.  There is no logic to send it
when the current message is a read and next is write.  It should be sent
every time the bus changes direction.

The ability to use a plain read was added to this driver in
commit 2feec4eafd ("imx: mxc_i2c: tweak the i2c transfer method"),
but this applied only the non-DM code path.

This patch fixes the DM code path.  The xfer function will call
i2c_init_transfer() with an alen of -1 to avoid sending the chip
address.  The same way the non-DM code achieves this.  The xfer
function's message loop will send the address and mode before each
message if the bus changes direction, and on the first message.

When reading data, the master hardware is one byte ahead of what we
receive.  I.e., reading a byte from the data register returns a byte
*already received* by the master, and causes the master to start the RX
of the *next* byte.  Therefor, before we read the final byte of a
message, we must tell the master what to do next.  I add a "last" flag
to i2c_read_data() to tell it if the message is to be followed by a stop
or a repeated start.  When last == true it acts exactly as before.

The non-DM code can only create an xfer where the read, if any, is the
final message of the xfer.  And so the only callsite of i2c_read_data()
in the non-DM code has the "last" parameter as true.  Therefore, this
change has no effect on the non-DM code.  As all other changes are in
the DM xfer function, which is not even compiled in non-DM code, I am
confident that this patch has no effect on boards not using I2C_DM.
This greatly reduces the range of hardware that could be affected.

For DM boards, I have verified every transaction the "i2c" command can
create on a scope and they are all exactly as they are supposed to be.
I also tested write->read->write, which isn't possible with the i2c
command, and it works as well.  I didn't fix multiple reads in a row, as
it's a lot more invasive and obviously no one has every wanted them
since they've never worked.  It didn't seem like the extra complexity
was justified to support something no one uses.

Cc: Nandor Han <nandor.han@ge.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
2019-05-17 05:35:23 +02:00
Trent Piepho
6314b3c7c3 i2c: mxc_i2c: Document how non-DM functions work
It is not very clear how these work in relation to the exact I2C xfers
they produce.  In paticular, the address length is somewhat overloaded
in the read method.  Clearly document the existing behavior.  Maybe this
will help the next person who needs to work on this driver and not break
non-DM boards.

Cc: Nandor Han <nandor.han@ge.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
2019-05-17 05:35:23 +02:00
Tom Rini
1da6006679 Merge branch 'master' of git://git.denx.de/u-boot-net
- micrel, ti PHY fixes
- rtl8169, mtk-eth fixes
2019-05-15 07:10:52 -04:00
Tom Rini
8b1d3d19be STM32 MCUs update:
_ Add MPU region for SPI NOR memory mapped region
 _ Add missing QSPI flash compatible for STM32 F7 boards
 _ Update spi-tx-bus-width and spi-rx-bus-width properties
 _ Add QSPI support for STM32F469 Discovery board
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Merge tag 'u-boot-stm32-mcu-20190514' of https://github.com/pchotard/u-boot

STM32 MCUs update:
_ Add MPU region for SPI NOR memory mapped region
_ Add missing QSPI flash compatible for STM32 F7 boards
_ Update spi-tx-bus-width and spi-rx-bus-width properties
_ Add QSPI support for STM32F469 Discovery board
2019-05-15 07:10:32 -04:00
Weijie Gao
ebb97ea868 eth: mtk-eth: fix incorrect read of phy-handle
In mt7629-rfb.dts, the phy-handle is a reference to the node phy0, not the
node itself:

	phy-handle = <&phy0>;

	phy0: ethernet-phy@0 {
		reg = <0>;
	}

However the driver used ofnode_find_subnode("phy-handle") to read the node.
It will always fail.

This patch replaces ofnode_find_subnode with dev_read_phandle_with_args to
make sure the node can be read correctly.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-14 14:43:33 -05:00
Thierry Reding
cdd69acc2c net: rtl8169: Support RTL-8168h/8111h
This version of the RTL-8168 is present on some development boards and
is compatible with this driver. Add support for identifying this version
of the chip so that U-Boot won't complain about it being unknown.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-14 14:43:33 -05:00
Thierry Reding
b6054b5351 net: rtl8169: Implement ->hwaddr_write() callback
Implement this callback that allows the MAC address to be set for the
Ethernet card. This is necessary in order for the device to be able to
receive packets for the MAC address that U-Boot advertises.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-14 14:43:33 -05:00
Michal Simek
6845b368f1 phy: ti: Init node before reading
There is a need to fill node before clk_output_sel is setup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Reviewed-by: <hannes.schmelzer@br-automation.com>
2019-05-14 14:43:33 -05:00
James Byrne
77b508d34b net: phy: micrel: Allow KSZ8xxx and KSZ90x1 to be used together
Commit d397f7c45b ("net: phy: micrel: Separate KSZ9000 drivers from
KSZ8000 drivers") separated the KSZ8xxx and KSZ90x1 drivers and warns
that you shouldn't select both of them due to a device ID clash between
the KSZ9021 and the KS8721, asserting that "it is highly unlikely for a
system to contain both a KSZ8000 and a KSZ9000 PHY". Unfortunately
boards like the SAMA5D3xEK do contain both types of PHY, but fortunately
the Linux Micrel PHY driver provides a solution by using different PHY
ID and mask values to distinguish these chips.

This commit contains the following changes:

- The PHY ID and mask values for the KSZ9021 and the KS8721 now match
those used by the Linux driver.
- The warnings about not enabling both drivers have been removed.
- The description for PHY_MICREL_KSZ8XXX has been corrected (these are
10/100 PHYs, not GbE PHYs).
- PHY_MICREL_KSZ9021 and PHY_MICREL_KSZ9031 no longer select PHY_GIGE
since this is selected by PHY_MICREL_KSZ90X1.
- All of the relevant defconfig files have been updated now that
PHY_MICREL_KSZ8XXX does not default to 'Y'.

Signed-off-by: James Byrne <james.byrne@origamienergy.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-14 14:43:33 -05:00
Tom Rini
d2d8f73da4 Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- A10 FPGA programming support, Gen5 livetree conversion
2019-05-13 07:13:03 -04:00
Simon Goldschmidt
1b898ffc04 gpio: dwapb_gpio: convert to livetree
Convert 'gpio_dwapb_bind' to iterate over subnodes using livetree
functions (inspired from mt7621_gpio.c).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10 22:48:11 +02:00
Simon Goldschmidt
6cdd0a4e54 reset: socfpga: convert to livetree
Convert 'socfpga_reset_probe' to use 'dev_read_u32_default'
instead of 'fdtdec_get_int'.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10 22:48:11 +02:00
Simon Goldschmidt
41b22c0acc serial: altera_uart: convert to livetree
Convert 'altera_uart_ofdata_to_platdata' to use 'dev_read_u32_default'
instead of 'fdtdec_get_int' and get rid of DECLARE_GLOBAL_DATA_PTR.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10 22:48:11 +02:00
Simon Goldschmidt
27c3e07bcb spi: designware: convert to livetree
Convert 'dw_spi_ofdata_to_platdata' to use 'dev_read_u32_default'
instead of 'fdtdec_get_int' and get rid of DECLARE_GLOBAL_DATA_PTR.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10 22:48:11 +02:00
Simon Goldschmidt
46b633d7b4 spi: cadence_qspi: convert to livetree
Convert 'cadence_spi_ofdata_to_platdata' to use dev_read_* functions to
read driver parameters and 'dev_read_first_subnode'/'ofnode_read_*' to
read flash (child node) parameters.

Tested on socfpga_socrates (socfpga gen5).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10 22:48:11 +02:00
Simon Goldschmidt
460a97f3a2 timer: dw-apb: remove unused DECLARE_GLOBAL_DATA_PTR
The dw-apb timer does not use 'gd', so remove its declaration.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10 22:48:11 +02:00
Tien Fong Chee
1085bb3cba spl: socfpga: Implement fpga bitstream loading with socfpga loadfs
Add support for loading FPGA bitstream to get DDR up running before
U-Boot is loaded into DDR. Boot device initialization, generic firmware
loader and SPL FAT support are required for this whole mechanism to work.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:11 +02:00
Tien Fong Chee
0a42a132a4 ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading
Add FPGA driver to support program FPGA with FPGA bitstream loading from
filesystem. The driver are designed based on generic firmware loader
framework. The driver can handle FPGA program operation from loading FPGA
bitstream in flash to memory and then to program FPGA.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:11 +02:00
Tien Fong Chee
c1cf539180 ARM: socfpga: Moving the watchdog reset to the for-loop status polling
Current watchdog reset is misplaced after for-loop status polling, so
this poses a risk that watchdog can't be reset timely if polling taking
longer than watchdog timeout. This patch moving the watchdog reset
into polling to ensure the watchdog can be reset timely.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:10 +02:00
Tien Fong Chee
f4b53b24d0 ARM: socfpga: Cleaning up and ensuring consistent format messages in driver
Ensure all the debug messages are always prefix with "FPGA: " and comment
beginning with uppercase letter.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:10 +02:00
Marek Vasut
d0487da83f sh: sh3: Remove CPU support
This CPU core is old, no boards using the CPU are left in mainline,
it has no prospects of ever being converted to DM, drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10 22:43:18 +02:00
Marek Vasut
7de3ea8b98 sh: sh2: Remove CPU support
This CPU core is old, no boards using the CPU are left in mainline,
it has no prospects of ever being converted to DM, drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10 22:43:18 +02:00
Marek Vasut
10e91cfdb0 serial: sh: Drop assorted SH3, SH4, SH5 macros
Drop unused macros from the header to clean it up.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10 22:43:18 +02:00
Marek Vasut
2a219297c5 serial: sh: Drop RTS7751R2D support
There is no RTS7751R2D support in U-Boot, drop all the RTS7751R2D macros.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10 22:43:18 +02:00
Marek Vasut
42c09a113e serial: sh: Drop SH2007 support
There is no SH2007 support in U-Boot, drop all the SH2007 macros.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10 22:43:18 +02:00
Marek Vasut
fcc7cc52e7 serial: sh: Drop H8 support
There is no H8 support in U-Boot, drop all the H8 macros.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10 22:43:18 +02:00
Chris Packham
661bbc50d3 mtd: ubi: Remove select for non existent option
There is no 'config CRC32' remove the select that was attempting to use
it.

Reported-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-05-10 07:18:13 -04:00
Chris Packham
26680b9f3a sysreset: select DM_GPIO instead of GPIO
CONFIG_GPIO does not exist. sysreset_gpio.c uses the DM gpio APIs so the
correct option to select is DM_GPIO.

Reported-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-05-10 07:18:13 -04:00
Lokesh Vutla
0d7b6cffa5 remoteproc: k3_system_controller: Increase rx timeout
There is one case where 400ms is not sufficient for loading the
system firmware:
- System firmware is not signed with rsa degenerate key.
- ROM loading the sysfw directly from SPI flash which is in memory
  mapped mode.

The above scenario is definitely not desired in production use cases
as it effects boot time. But still keeping this support as this is
a valid boot scenario.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-05-09 20:22:05 -04:00
Igor Opaniuk
34501d6713 test/py: avb: fix test_avb_persistent_values fail
Fix test_avb_persistent_values() pytest, which was failing because of
wrong size value provided from tee sandbox driver.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
2019-05-09 19:52:55 -04:00
Christian Gmeiner
28b4ba9481 ata: ahci: fix memory leak
malloc(..) and memalign(..) are both allocating memory and as a result
we leak the memory allocated with malloc(..).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-05-09 19:52:55 -04:00
Adam Ford
3a90b50a32 usb: ohci: ohci-da8xx: Cleanup Error handling and fix flags
Per feedback from Marek, he suggested better handling and
to enable DM_FLAG_OS_PREPARE, this patch re-orders some of
the error checking, and errors returns the error code right
away and also sets DM_FLAG_OS_PREPARE.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-05-09 19:52:55 -04:00
Tom Rini
f30f268a07 Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip
Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie
2019-05-09 12:36:17 -04:00
Tom Rini
7aaf2af0e0 - Add USB PHY drivers for Amlogic G12A
- Add USB Complex Glue driver for Amlogic G12A
 - Add USB Gadget support for Amlogic G12A
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Merge tag 'u-boot-amlogic-20190509' of git://git.denx.de/u-boot-amlogic

- Add USB PHY drivers for Amlogic G12A
- Add USB Complex Glue driver for Amlogic G12A
- Add USB Gadget support for Amlogic G12A
2019-05-09 07:11:39 -04:00
Neil Armstrong
277d9167cb phy: meson: add Amlogic G12A USB2 and USB3+PCIE PHY drivers
This adds support for the USB PHYs found in the Amlogic G12A SoC Family.

The USB2 PHY supports Host and/or Peripheral mode, depending on it's position.
The first PHY is only used as Host, but the second supports Dual modes
defined by the USB Control Glue HW in front of the USB Controllers.

The second driver supports USB3 Host mode or PCIE 2.0 mode, depending on
the layout of the board.
Selection is done by the #phy-cells, making the mode static and exclusive.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-05-09 10:38:32 +02:00
Neil Armstrong
adb049abf7 usb: dwc3: Add Meson G12A USB Glue
Adds support for Amlogic G12A USB Control Glue HW.

The Amlogic G12A SoC Family embeds 2 USB Controllers :
- a DWC3 IP configured as Host for USB2 and USB3
- a DWC2 IP configured as Peripheral USB2 Only

A glue connects these both controllers to 2 USB2 PHYs, and optionnally
to an USB3+PCIE Combo PHY shared with the PCIE controller.

The Glue configures the UTMI 8bit interfaces for the USB2 PHYs, including
routing of the OTG PHY between the DWC3 and DWC2 controllers, and
setups the on-chip OTG mode selection for this PHY.

This driver sets the OTG capable port as Host mode by default,
the switch to Device mode is to be done in a separate patch.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2019-05-09 10:38:32 +02:00
Tom Rini
eb511984e9 Merge branch 'master' of git://git.denx.de/u-boot-net
- Various PHY fixes / enhancements.
- TI K2G fixes
2019-05-08 22:46:31 -04:00
James Byrne
6314d1c8c0 net: phy: micrel: Find Micrel PHY node correctly
In some of the device trees that specify skew values for KSZ90x1 PHYs
the values are stored (incorrectly) in the MAC node, whereas in others
it is in an 'ethernet-phy' subnode. Previously the code would fail to
find and program these skew values, so this commit changes it to look
for an "ethernet-phy" subnode first, and revert to looking in the MAC
node if there isn't one.

The device trees affected (where the skew values are in a subnode) are
imx6qdl-icore-rqs.dtsi, r8a77970-eagle.dts, r8a77990-ebisu.dts,
r8a77995-draak.dts, salvator-common.dtsi, sama5d3xcm.dtsi,
sama5d3xcm_cmp.dtsi, socfpga_cyclone5_vining_fpga.dts,
socfpga_stratix10_socdk.dts and ulcb.dtsi. Before this change the skew
values in these device trees would be ignored.

The device trees where the skew values are in the MAC node are
socfpga_arria10_socdk.dtsi, socfpga_arria5_socdk.dts,
socfpga_cyclone5_de0_nano_soc.dts, socfpga_cyclone5_de10_nano.dts,
socfpga_cyclone5_de1_soc.dts, socfpga_cyclone5_is1.dts,
socfpga_cyclone5_socdk.dts, socfpga_cyclone5_sockit.dts. These should be
unaffected by this change.

The changes were tested on a sama5d3xcm.

Signed-off-by: James Byrne <james.byrne@origamienergy.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-08 17:27:01 -05:00
James Byrne
83f71ef558 net: phy: micrel: Use correct skew values on KSZ9021
Commit ff7bd212cb ("net: phy: micrel: fix divisor value for KSZ9031
phy skew") fixed the skew value divisor for the KSZ9031, but left the
code using the same divisor for the KSZ9021, which is incorrect.

The preceding commit c16e69f702 ("net: phy: micrel: add documentation
for Micrel KSZ90x1 binding") added the DTS documentation for the
KSZ90x1, changing it from the equivalent file in the Linux kernel to
correctly state that for this part the skew value is set in 120ps steps,
whereas the Linux documentation and driver continue to this day to use
the incorrect value of 200 that came from the original KSZ9021 datasheet
before it was corrected in revision 1.2 (Feb 2014).

This commit sorts out the resulting confusion in a consistent way by
making the following changes:

- Update the documentation to be clear about what the skew values mean,
in the same was as for the KSZ9031.

- Update the Micrel PHY driver to select the appropriate divisor for
both parts.

- Adjust all the device trees that state skew values for KSZ9021 PHYs to
use values based on 120ps steps instead of 200ps steps. This will result
in the same values being programmed into the skew registers as the
equivalent device trees in the Linux kernel do, where it incorrectly
uses 200ps steps (since that's where all these device trees were copied
from).

Signed-off-by: James Byrne <james.byrne@origamienergy.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-08 17:27:01 -05:00
Valentin-catalin Neacsu
c940646ed1 net: phy: aquantia: Set only autoneg on in register 4.c441
For AQR405 in register 4.c441 bit 15 was override with 0. This caused the
phy to not negotiate at 2.5GB rate with mac. To avoid
this override it needed first to know the previous value of reg 4.c441
and set only bit 3.

Signed-off-by: Valentin Catalin Neacsu <valentin-catalin.neacsu@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-08 17:27:00 -05:00
Siva Durga Prasad Paladugu
05eb6a698a net: phy: Fix return value check phy_probe
Don't ignore return value of phy_probe() call as
the probe may fail and it needs to be reported.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-08 17:27:00 -05:00
Siva Durga Prasad Paladugu
c689c48672 net: phy: Reloc next and prev pointers inside phy_drivers
This patch relocates the pointers inside phy_drivers incase
of manual reloc. Without this reloc, these points to invalid
pre relocation address and hence causes exception or hang.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-08 17:27:00 -05:00
Pankaj Bansal
4b0880d66b drivers: net: ldpaa_eth: fix resource leak
if an error occurs in ldpaa_eth_init, need to free all resources
before returning the error.

Threfore, free net_dev before returning from ldpaa_eth_init.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-08 17:26:59 -05:00
Tom Rini
504bf790da Merge branch 'master' of git://git.denx.de/u-boot-sunxi
- H6 Beelink GS1 board (Clément)
- Olimex A64-Teres-I board (Jonas)
- sunxi build fix for CONFIG_CMD_PXE|DHCP (Ondrej)
- Change include order (Jagan)
- EPHY clock changes (Jagan)
- EMAC enablement on Cubietruck Plus, BPI-M3 (Chen-Yu Tsai)
2019-05-08 16:21:43 -04:00
Jagan Teki
2348453c41 net: sun8i_emac: Add EPHY CLK and RESET support
Add EPHY CLK and RESET support for sun8i_emac driver to
enable EPHY TX clock and EPHY reset pins via CLK and RESET
framework.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Lothar Felten <lothar.felten@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-09 00:44:13 +05:30
Jagan Teki
ea9dc35aab reset: Get the RESET by index without device
Getting a RESET by index with device is not straight forward
for some use-cases like handling clock operations for child
node in parent driver. So we need to process the child node
in parent probe via ofnode and process RESET operation for child
without udevice but with ofnode.

So add reset_get_by_index_nodev() and move the common code
in reset_get_by_index_tail() to use for reset_get_by_index()

Cc: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-05-09 00:44:13 +05:30
Jagan Teki
dcb63fcd16 clk: Use clk_get_by_index_tail()
clk_get_by_index_tail() now handle common clk get by index
code so use it from clk_get_by_indexed_prop().

Cc: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-05-09 00:44:13 +05:30
Jagan Teki
75f98314f9 clk: Get the CLK by index without device
Getting a CLK by index with device is not straight forward
for some use-cases like handling clock operations for child
node in parent driver. So we need to process the child node
in parent probe via ofnode and process CLK operation for child
without udevice but with ofnode.

So add clk_get_by_index_nodev() and move the common code
in clk_get_by_index_tail() to use for clk_get_by_index()

Cc: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-05-09 00:44:13 +05:30
Jagan Teki
b24f9057e8 serial: sifive: Change include order
Like clk_get_by_index, there is requirement for
clk_get_by_index_nodev. In this case to make common
code functionalities for dev and nodev, clk_get_by_index
is trying to get the index of clock by passing ofnode
instead of actual dev like current gpio uclass does.

In these scenarios with current order of include files
the serial_sifive driver is unable to find CONFIG_ENV_SIZE.

In file included from arch/riscv/include/asm/u-boot.h:23:0,
                 from include/dm/of.h:10,
                 from include/dm/ofnode.h:12,
                 from include/clk.h:11,
                 from drivers/serial/serial_sifive.c:6:
include/environment.h:145:19: error: 'CONFIG_ENV_SIZE'
undeclared here (not in a function); did you mean 'CONFIG_CMD_XIMG'?
 #define ENV_SIZE (CONFIG_ENV_SIZE - ENV_HEADER_SIZE)

So, fix consists of changing the order of include files
in serial_sifive.c to include first common.h file.

Cc: Anup Patel <Anup.Patel@wdc.com>
Cc: Rick Chen <rick@andestech.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-05-09 00:44:08 +05:30
Jagan Teki
db2f696147 clk: sifive: fu540-prci: Change include order
Like clk_get_by_index, there is requirement for
clk_get_by_index_nodev. In this case to make common
code functionalities for dev and nodev, clk_get_by_index
is trying to get the index of clock by passing ofnode
instead of actual dev like current gpio uclass does.

In these scenarios with current order of include files
the fu540-prci driver is unable to find CONFIG_ENV_SIZE.

In file included from arch/riscv/include/asm/u-boot.h:23:0,
                 from include/dm/of.h:10,
                 from include/dm/ofnode.h:12,
                 from include/clk.h:11,
                 from include/clk-uclass.h:13,
                 from drivers/clk/sifive/fu540-prci.c:32:
include/environment.h:145:19: error: 'CONFIG_ENV_SIZE'
undeclared here (not in a function); did you mean 'CONFIG_CMD_XIMG'?
 #define ENV_SIZE (CONFIG_ENV_SIZE - ENV_HEADER_SIZE)

So, fix consists of changing the order of include files
in fu540-prci.c to include first common.h file.

Cc: Anup Patel <Anup.Patel@wdc.com>
Cc: Rick Chen <rick@andestech.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-05-09 00:43:59 +05:30
Jagan Teki
0cbee8544b spi: atcspi200: Change include order
Like clk_get_by_index, there is requirement for
clk_get_by_index_nodev. In this case to make common
code functionalities for dev and nodev, clk_get_by_index
is trying to get the index of clock by passing ofnode
instead of actual dev like current gpio uclass does.

In these scenarios with current order of include files
the atcspi200_spi driver is unable to find CONFIG_ENV_SIZE.

In file included from arch/nds32/include/asm/u-boot.h:24,
                 from include/dm/of.h:10,
                 from include/dm/ofnode.h:12,
                 from include/clk.h:11,
                 from drivers/spi/atcspi200_spi.c:9:
include/environment.h:145:19: error: 'CONFIG_ENV_SIZE'
undeclared here (not in a function); did you mean 'CONFIG_CMD_XIMG'?
 #define ENV_SIZE (CONFIG_ENV_SIZE - ENV_HEADER_SIZE)

So, fix consists of changing the order of include files
in atcspi200_spi.c to include first common.h file.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-05-09 00:42:55 +05:30
David Wu
79d16e4540 pinctrl: rockchip: Also move common set_schmitter func into per Soc file
Only some Soc need Schmitter feature, so move the
implementation into their own files.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
David Wu
623aca8830 pinctrl: rockchip: Clean the unused type and label
As the mux/pull/drive feature implement at own file,
the type and label are not necessary.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
David Wu
69a38f81bb pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' pull
RK3288 pmu_gpio0 pull setting have no higher 16 writing corresponding
bits, need to read before write the register.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
David Wu
743a77373b pinctrl: rockchip: Split the common set_pull() func into per Soc
As the common set_mux func(), implement the feature at the own file
for each Soc.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
David Wu
956362c84b pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' drive strength
RK3288 pmu_gpio0 drive strength setting have no higher 16 writing
corresponding bits, need to read before write the register.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
David Wu
625ab11fda pinctrl: rockchip: Split the common set_drive() func into per Soc
As the common set_mux func(), implement the feature at the own file
for each Soc.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
David Wu
cd8f00ce08 pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux
RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding
bits, need to read before write the register.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
David Wu
54e75702c4 pinctrl: rockchip: Split the common set_mux() into per Soc
Such as rk3288's pins of pmu_gpio0 are a special feature, which have no
higher 16 writing corresponding bits, use common set_mux() func would
introduce more code, so implement their set_mux() in each Soc's own
file to reduce the size of code.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
David Wu
8541beb86d pinctrl: rockchip: Remove redundant spaces
Some files have the redundant spaces, remove them.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
David Wu
0a5cc3cac9 pinctrl: rockchip: Add pull-pin-default param and remove unused param
Some Socs use the pull-pin-default config param, need to add it.
And input-enable/disable config params are not necessary, remove it.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
Kever Yang
cc325e4bb6 Revert "pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl"
This reverts commit 502980914b.
This is a superseded version, revert this to apply new patch set.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
Kever Yang
82763349a2 rockchip: ram: rk3399: update for TPL
Init the ddr sdram in TPL instead of SPL, update the code.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
2019-05-08 17:34:12 +08:00
Kever Yang
99a1a5b195 rockchip: dmc: rk3368: update rank number for evb-px5
evb-px5 has only 1 CS, update for it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
2019-05-08 17:34:12 +08:00
Kever Yang
09259fce1e sysreset: enable driver support in SPL/TPL
SPL/TPL also need use sysreset for some feature like panic callback.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
Kever Yang
5793e8c271 rockchip: clk: rk322x: fix assert clock value
BUS_PCLK_HZ and BUS_HCLK_HZ are from BUS_ACLK_HZ, not from GPLL_HZ.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
Kever Yang
e4d0d61275 rockchip: rk322x: add CLK_EMMC_SAMPLE clock support
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
Kever Yang
2f52378736 Revert "rockchip: rk322x: ram: enable DRAM init in SPL instead of TPL"
This reverts commit f338cca1d2.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
Simon Glass
6c456516e2 x86: Support PCI VGA ROM when TPL is used
When TPL is in use, U-Boot proper should support initing the VGA ROM even
though the 32-bit init portion is in SPL. Update the condition to handle
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:16 +08:00
Simon Glass
f77ab00e89 x86: sysreset: Implement the get_last() method
Add a default implementation of this method which always indicates that
the last reset was a power-on reset. This is the most likely type of reset
and without a PCH-specific driver we cannot determine any other type.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:16 +08:00
Simon Glass
d6b1ba2fb9 x86: sysreset: Implement power-off if available
On modern x86 devices we can power the system off using the power-
management features of the PCH. Add an implementation for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:15 +08:00
Simon Glass
40476f4afc x86: sysreset: Separate out the EFI code
The EFI implementation of reset sits inside the driver and is called
directly from outside the driver, breaking the normal driver-model
conventions. Worse, it passed NULL as the device pointer, hoping that
the called function won't use it, which breaks as soon as code is added
to use it.

Separate out the implementation to improve the situation enough to allow
a future patch to add new sysreset features.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:15 +08:00
Simon Glass
16f4d05164 cros_ec: Use a hyphen in the uclass name
Device-tree rules require that aliases use a hyphen rather than a
underscore. Update the uclass name to fit with this.

This allows device-tree aliases to be used to refer to cros-ec devices,
for example:

	aliases {
	    cros-ec0 = &ec;
	    cros-ec1 = &pd;
	};

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 12:44:07 +08:00
Simon Glass
003331827a dm: core: Fix translate condition in ofnode_get_addr_size()
Update the condition to translate only if this is enabled for SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 12:44:07 +08:00
Carlo Caione
d47cfdbd31 net: phy: realtek: Introduce quirk to mark RXC not stoppable
When EEE is supported by the PHY and the driver allows it, libphy in the
kernel is configuring the PHY to stop receiving the xMII clock while it
is signaling LPI. While this (usually) works fine in the kernel this is
causing issues in U-Boot when rebooting from the linux kernel with this
bit set (without having the possibility to reset the PHY) where the PHY
suddenly stops working.

A new quirk is introduced to unconditionally reset this bit. If the
quirk is not enabled using the proper configuration symbol, the PHY state
is not changed.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-07 14:51:55 -05:00
Carlo Caione
4c29dc1863 net: phy: ti: use generic helpers to access MMD registers
Now that generic helpers are available, use those instead of relying on
ti specific functions.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-07 14:51:55 -05:00
Carlo Caione
4f6746dc7f net: phy: Add generic helpers to access MMD PHY registers
Two new helper functions (phy_read_mmd() and phy_write_mmd()) are added
to allow access to the MMD PHY registers.

The MMD PHY registers can be accessed by several means:

1. Using two new MMD access function hooks in the PHY driver. These
functions can be implemented when the PHY driver does not support the
standard IEEE Compatible clause 45 access mechanism described in clause
22 or if the PHY uses its own non-standard access mechanism.

2. Direct access for C45 PHYs and C22 PHYs when accessing the reachable
DEVADs.

3. The standard clause 45 access extensions to the MMD registers through
the indirection registers (clause 22) in all the other cases.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-07 14:51:55 -05:00
Tom Rini
8d7f06bbbe Merge branch 'master' of git://git.denx.de/u-boot-sh
- RZ/A1 addition.
- Old board removal.
2019-05-07 09:38:00 -04:00
Tom Rini
6984044d05 Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- Assorted stratix10 fixes.
- DDR driver DM migration.
2019-05-07 09:37:11 -04:00
Marek Vasut
b5b6656794 spi: rpc: Add support for operation without clock framework
Add ifdeffery to allow operation without the clock framework
enabled. This is required on RZ/A1, as it does not have clock
driver yet.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07 05:41:32 +02:00
Marek Vasut
24b3247e24 net: sh_eth: Add support for operation without clock framework
Add ifdeffery to allow operation without the clock framework
enabled. This is required on RZ/A1, as it does not have clock
driver yet.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07 05:41:32 +02:00
Marek Vasut
31650cf4b0 net: sh_eth: Add RZ/A1 support
Add support for RZ/A1 SoC specifics.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07 05:41:32 +02:00
Marek Vasut
67180fe101 serial: sh: Add RZ/A1 support
Add support for RZ/A1 SoC specifics.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07 05:41:32 +02:00
Marek Vasut
4d0732bf3c timer: renesas: Add RZ/A1 R7S72100 OSTM timer driver
Add OSTM timer driver for RZ/A1 SoC. The IP is very different
from the R-Car Gen2/Gen3 one already present in the tree, hence
a custom driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07 05:41:32 +02:00
Marek Vasut
cbde9dea09 pinctrl: renesas: Add RZ/A1 R7S72100 pin control driver
Add pin control driver for RZ/A1 SoC. The IP is very different
from the R-Car Gen2/Gen3 one already present in the tree, hence
a custom driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07 05:41:32 +02:00
Marek Vasut
86b8e7d61a gpio: renesas: Add RZ/A1 R7S72100 GPIO driver
Add GPIO driver for RZ/A1 SoC. The IP is very different from the
R-Car Gen2/Gen3 one already present in the tree, hence a custom
driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07 05:41:32 +02:00
Marek Vasut
99156cd9d3 sh: 7785: Remove CPU support
There are no more boards using this CPU and there is no prospect
of any boards showing up soon, remove it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
2019-05-07 05:41:32 +02:00
Marek Vasut
d13a6144ff sh: 7724: Remove CPU support
There are no more boards using this CPU and there is no prospect
of any boards showing up soon, remove it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
2019-05-07 05:41:31 +02:00
Tom Rini
44237e272f Merge branch 'master' of git://git.denx.de/u-boot-sh
- Various pinctrl / gpio fixes for R-Car
2019-05-06 07:19:31 -04:00
Tom Rini
8b77ea90a7 Merge branch 'master' of git://git.denx.de/u-boot-spi
- Important spi-mem fix
2019-05-06 07:18:28 -04:00
Ley Foon Tan
6bf238a461 arm: socfpga: Move Stratix 10 SDRAM driver to DM
Convert Stratix 10 SDRAM driver to device model.

Get rid of call to socfpga_per_reset() and use reset
framework.

SPL is changed from calling function in SDRAM driver
directly to just probing UCLASS_RAM.

Move sdram_s10.h from arch to driver/ddr/altera directory.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-05-06 12:44:17 +02:00
Ley Foon Tan
5918afda9d ddr: altera: Compile ALTERA SDRAM in SPL only
Compile ALTERA_SDRAM driver in SPL only.
Rename ALTERA_SDRAM to SPL_ALTERA_SDRAM.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-05-06 12:44:17 +02:00
Patrice Chotard
351d2feffa spi: Kconfig: Add STM32F4 support for STM32_QSPI driver
Allow to select STM32_QSPI driver on STM32F4 SoCs.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06 09:50:28 +02:00
Adam Ford
9da5474389 usb: ohci: ohci-da8xx: Enable da850-ohci driver with DM support
This patch reuses some former code for the hawkboard, combines it
with some some similar DM_USB compatible code for the OHCI driver,
and enables the use of the da850's OHCI controller with DM_USB
compatibility.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-05-05 08:48:50 -04:00
Dinh Nguyen
88ebf5830f dm: cache: add the pl310 cache controller driver
Add a PL310 cache controller driver that is usually found on
ARMv7(32-bit) devices. The driver configures the cache settings that can
be found in the device tree files.

This initial revision only configures basic settings(data & instruction
prefetch, shared-override, data & tag latency). I believe these are the
settings that affect performance the most. Comprehensive settings can be
done by the OS.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-05-05 08:48:50 -04:00
Dinh Nguyen
84b124db35 dm: cache: Create a uclass for cache
The cache UCLASS will be used for configure settings that can be found
in a CPU's L2 cache controller.

Add a uclass and a test for cache.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-05-05 08:48:50 -04:00
Tom Rini
86f578ee85 - mscc: small fixes, enhance network support for Serval, Luton amd
Ocelot
 - mt7620: rename arch to more generic name mtmips
 - mips: pass initrd addresses via DT as physical addresses
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Merge tag 'mips-pull-2019-05-03' of git://git.denx.de/u-boot-mips

- mscc: small fixes, enhance network support for Serval, Luton and Ocelot
- mt7620: rename arch to more generic name mtmips
- mips: pass initrd addresses via DT as physical addresses
2019-05-04 20:02:42 -04:00
Tom Rini
c9baea6d0e Merge tag 'mmc-2019-5-3' of https://github.com/MrVan/u-boot 2019-05-04 20:02:16 -04:00
Marek Vasut
ef8c87812c net: ravb: Avoid unsupported internal delay mode for R-Car E3/D3
According to the R-Car Gen3 Hardware Manual Rev 1.50 of Nov 30, 2018, the
TX clock internal delay mode isn't supported on R-Car E3 (r8a77990) or D3
(r8a77995).

Avoid setting the APSR:TDM bit on these SoCs. Moreover, only set APSR:TDM
when the DT explicitly specifies RGMII ID or TXID mode instead of setting
it unconditionally when the PHY link speed is 1000 Mbit/s.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2019-05-04 19:26:49 +02:00
Marek Vasut
5403bec1cb pinctrl: renesas: Remove sh_pfc_config_mux_for_gpio()
This function is now replaced by common pin controller GPIO configuration
functionality, drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Alex Kiernan <alex.kiernan@gmail.com>
Cc: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Cc: Eugeniu Rosca <roscaeugeniu@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick DELAUNAY <patrick.delaunay@st.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Simon Glass <sjg@chromium.org>
2019-05-04 19:26:49 +02:00
Marek Vasut
fbf26bea39 gpio: renesas: Migrate to pinctrl GPIO accessors
Switch to generic pin controller API for configuring pins as GPIOs
instead of using the ad-hoc call into the R-Car PFC driver. Moreover,
add .free() implementation for the GPIO controller.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Alex Kiernan <alex.kiernan@gmail.com>
Cc: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Cc: Eugeniu Rosca <roscaeugeniu@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick DELAUNAY <patrick.delaunay@st.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Simon Glass <sjg@chromium.org>
2019-05-04 19:26:49 +02:00